Operational Amplifiers

Abstract

To achieve both low current consumption and large output current in an operational amplifier.SOLUTION: An operational amplifier 100A comprises a differential input stage 110, an amplification stage 130, and an assist circuit 150A. The amplification stage 130 includes a low-side transistor ML connected between an output terminal OUT and a ground line 104 being a fixed voltage line, and driven according to an intermediate signal Vb. A first transistor M11 in the assist circuit 150A is connected in parallel with the low-side transistor ML. A drive circuit 152A drives the first transistor M11 according to a gate voltage VgL of the low-side transistor ML.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to an operational amplifier. [Background technology]

[0002] An operational amplifier (differential amplifier) ​​is used to amplify the difference between two input voltages. The size of the output transistor in the output stage of the operational amplifier is designed according to the expected maximum output current. In addition, in a class AB output stage, the amount of bias current and the size of the output transistor are closely related. Therefore, an operational amplifier with a large maximum output current requires a large bias current, which results in a large current consumption. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 6-196942 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure has been made in light of the above-mentioned circumstances, and an exemplary purpose of an embodiment thereof is to provide an operational amplifier that can achieve both low current consumption and large output current. [Means for solving the problem]

[0005] An operational amplifier according to an embodiment of the present disclosure includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including an output transistor connected between an output terminal and a fixed voltage line and driven in response to the intermediate signal, and an assist circuit, the assist circuit including a first transistor connected in parallel with the output transistor and a drive circuit that drives the first transistor in response to the gate voltage of the output transistor.

[0006] Another aspect of the present disclosure is also an operational amplifier. The operational amplifier includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including a low-side transistor connected between an output terminal and a ground line and driven in response to the intermediate signal, and an assist circuit. The assist circuit includes a first transistor connected in parallel with the low-side transistor, a second transistor having a source connected to the ground line and biased to pass a constant current, a third transistor having a gate connected to the gate of the low-side transistor and a source connected to the drain of the second transistor, a current mirror circuit that mirrors the current passing through the third transistor and sources it to the gate of the first transistor, and a fourth transistor having a source connected to the ground line, a drain connected to the gate of the first transistor, and biased to pass a constant current.

[0007] Yet another aspect of the present disclosure is also an operational amplifier. The operational amplifier includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including a high-side transistor connected between an output terminal and a power supply line and driven in response to the intermediate signal, and an assist circuit. The assist circuit includes a first transistor connected in parallel with the high-side transistor, a second transistor having a source connected to the power supply line and biased to pass a constant current, a third transistor having a gate connected to the gate of the high-side transistor and a source connected to the drain of the second transistor, a current mirror circuit that mirrors the current passing through the third transistor and sinks it from the gate of the first transistor, and a fourth transistor having a source connected to the power supply line, a drain connected to the gate of the first transistor, and biased to pass a constant current.

[0008] Any combination of the above elements, or mutual substitution of elements or expressions between methods, devices, systems, etc., are also valid aspects of the present invention or the present disclosure. Furthermore, the description in this section (Means for Solving the Problems) does not explain all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. [Effects of the Invention]

[0009] According to an aspect of the present disclosure, both low current consumption and large output current can be achieved. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a circuit diagram of an operational amplifier according to a comparative technique. [Figure 2] FIG. 2 is a diagram illustrating the steady state of an operational amplifier. [Figure 3] FIG. 3 is a diagram illustrating the sink mode of the operational amplifier. [Figure 4] FIG. 4 is a circuit diagram of the operational amplifier according to the first embodiment. [Figure 5] FIG. 5 is a circuit diagram showing a specific example of the configuration of the assist circuit of FIG. [Figure 6] FIG. 6 is a circuit diagram of an operational amplifier according to the second embodiment. [Figure 7] FIG. 7 is a circuit diagram showing a specific example of the configuration of the assist circuit of FIG. [Figure 8] FIG. 8 is a diagram showing the sink current (simulation results) of the operational amplifier according to the second embodiment (FIG. 7) and the operational amplifier according to the comparative technique. [Figure 9] FIG. 9 is a diagram showing the gate voltage VgL (simulation results) of the low-side transistor of each of the operational amplifier according to the second embodiment (FIG. 7) and the operational amplifier of the comparative technique. [Figure 10] FIG. 10 is a circuit diagram of an operational amplifier according to the third embodiment. [Figure 11]FIG. 11 is a circuit diagram showing a specific example of the configuration of the assist circuit of FIG. [Figure 12] FIG. 12 is a circuit diagram of an operational amplifier according to the fourth embodiment. [Figure 13] FIG. 13 is a circuit diagram showing a specific example of the configuration of the assist circuit of FIG. [Figure 14] FIG. 14 is a diagram showing the source current (simulation results) of the operational amplifier according to the fourth embodiment (FIG. 12) and the operational amplifier according to the comparative technique. [Figure 15] FIG. 15 is a diagram showing the gate voltage VgH (simulation results) of the high-side transistor of each of the operational amplifier according to the fourth embodiment (FIG. 12) and the operational amplifier of the comparative technique. [Figure 16] FIG. 16 is a circuit diagram of an operational amplifier according to the fifth embodiment. [Figure 17] FIG. 17 is a diagram showing load regulation (simulation results) of the operational amplifier of FIG. [Figure 18] FIG. 18 is a diagram showing the relationship between the power supply voltage and the circuit current in the operational amplifier of FIG. 16 in a no-load state. [Figure 19] FIG. 19 is a circuit diagram of an operational amplifier according to the sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0012] An operational amplifier according to one embodiment includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including an output transistor connected between an output terminal and a fixed voltage line and driven in response to the intermediate signal, and an assist circuit, the assist circuit including a first transistor connected in parallel with the output transistor and a drive circuit that drives the first transistor in response to the gate voltage of the output transistor.

[0013] With this configuration, the maximum output current can be increased by connecting a first transistor in parallel with the output transistor and passing a current through the first transistor. Because the first transistor is controlled by a drive circuit independent of the bias circuit of the output transistor, when the output current of the operational amplifier is low, there is no need to constantly pass a large bias current through the first transistor and drive circuit, which also helps to suppress increases in operating current. This allows for both low current consumption and large output current.

[0014] In one embodiment, the output transistor may be a low-side transistor of an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), the fixed voltage line may be a ground line, and the drive circuit may include a first current source that sources a first current to the gate of the first transistor according to the gate voltage of the output transistor, and a second current source that sinks a second current from the gate of the first transistor.

[0015] In one embodiment, the first current source may include a second transistor having a source connected to a ground line and biased to pass a constant current, a third transistor having a gate connected to the gate of the low-side transistor and a source connected to the drain of the second transistor, and a current mirror circuit that mirrors the current flowing through the third transistor and sources it to the gate of the first transistor.

[0016] In one embodiment, the second current source may include a fourth transistor having a source connected to the ground line and a drain connected to the gate of the first transistor, the fourth transistor being biased to pass a constant current.

[0017] In one embodiment, the drive circuit may further include a fifth transistor having a gate connected to the gate of the low-side transistor and a source connected to the gate of the first transistor.

[0018] In one embodiment, the drive circuit may further include a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to the power supply line.

[0019] In one embodiment, the output transistor may be a P-type high-side transistor, the fixed voltage line may be a power supply line, and the drive circuit may include a first current source that sinks a first current from the gate of the first transistor according to a gate voltage of the output transistor, and a second current source that sources a second current to the gate of the first transistor.

[0020] In one embodiment, the first current source may include a second transistor having a source connected to a power supply line and biased to pass a constant current, a third transistor having a gate connected to the gate of the high-side transistor and a source connected to the drain of the second transistor, and a current mirror circuit that mirrors the current flowing through the third transistor and sinks it from the gate of the first transistor.

[0021] In one embodiment, the second current source may include a fourth transistor having a source connected to the power supply line and a drain connected to the gate of the first transistor, the fourth transistor being biased to pass a constant current.

[0022] In one embodiment, the drive circuit may further include a fifth transistor having a gate connected to the gate of the high-side transistor and a source connected to the gate of the first transistor.

[0023] In one embodiment, the driving circuit may further include a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to the ground line.

[0024] An operational amplifier according to one embodiment includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including a low-side transistor connected between an output terminal and a ground line and driven in response to the intermediate signal, and an assist circuit. The assist circuit includes a first transistor connected in parallel with the low-side transistor, a second transistor having a source connected to the ground line and biased to pass a constant current, a third transistor having a gate connected to the gate of the low-side transistor and a source connected to the drain of the second transistor, a current mirror circuit that mirrors the current passing through the third transistor and sources it to the gate of the first transistor, and a fourth transistor having a source connected to the ground line, a drain connected to the gate of the first transistor, and biased to pass a constant current.

[0025] In one embodiment, the assist circuit may further include a fifth transistor having a gate connected to the gate of the low-side transistor and a source connected to the gate of the first transistor, and a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to the power supply line.

[0026] An operational amplifier according to one embodiment includes a differential input stage that amplifies a differential input signal and generates an intermediate signal, an amplifier stage including a high-side transistor connected between an output terminal and a power supply line and driven in response to the intermediate signal, and an assist circuit. The assist circuit includes a first transistor connected in parallel with the high-side transistor, a second transistor having a source connected to the power supply line and biased to pass a constant current, a third transistor having a gate connected to the gate of the high-side transistor and a source connected to the drain of the second transistor, a current mirror circuit that mirrors the current passing through the third transistor and sinks it from the gate of the first transistor, and a fourth transistor having a source connected to the power supply line, a drain connected to the gate of the first transistor, and biased to pass a constant current.

[0027] In one embodiment, the assist circuit may further include a fifth transistor having a gate connected to the gate of the high-side transistor and a source connected to the gate of the first transistor, and a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to a ground line.

[0028] In one embodiment, the operational amplifier may be monolithically integrated on a single semiconductor substrate. "Monolithically integrated" includes cases where all of the circuit components are formed on a semiconductor substrate, and cases where the main circuit components are monolithically integrated, and some resistors, capacitors, etc. for adjusting the circuit constants may be provided outside the semiconductor substrate.

[0029] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

[0030] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0031] Similarly, "a state in which component C is connected (provided) between component A and component B" includes not only a case in which component A and component C, or component B and component C, are directly connected, but also a case in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0032] In addition, in this specification, symbols attached to electrical signals such as voltage signals and current signals, or circuit elements such as resistors, capacitors, and inductors, represent the respective voltage values, current values, or circuit constants (resistance values, capacitance values, inductances) as necessary.

[0033] First, with reference to FIG. 1, the basic configuration of an operational amplifier having a class AB output stage will be described.

[0034] FIG. 1 is a circuit diagram of an operational amplifier 100R according to a comparative technique. The operational amplifier 100R receives differential input signals Vp and Vn at differential input terminals INP and INN, and outputs an amplified output signal from an output terminal OUT. The operational amplifier 100R may be a voltage output type or a current output type transconductance amplifier. A power supply voltage V is applied to a power supply terminal VDD of the operational amplifier 100R. DD is supplied to the ground terminal GND, and the ground terminal GND is grounded.

[0035] The operational amplifier 100R includes a power supply line 102, a ground line 104, a differential input stage 110, and an amplifier stage 130. The power supply line 102 is connected to a power supply terminal VDD, and the ground line 104 is connected to a ground terminal GND.

[0036] The differential input stage 110 amplifies the differential input signals Vp and Vn to generate an intermediate signal Vb.

[0037] The amplifier stage 130 includes a high-side transistor MH and a low-side transistor ML which are output transistors, capacitors C1 and C2, and a bias circuit 140. The high-side transistor MH is a P-type (PMOS) transistor provided between the output terminal OUT and a power supply line 102 which is a fixed voltage line, and the low-side transistor ML is an N-type (NMOS) transistor provided between the output terminal OUT and a ground line 104 which is also a fixed voltage line.

[0038] The high-side transistor MH and the low-side transistor ML are driven in response to the intermediate signal Vb.

[0039] In FIG. 1, an intermediate signal Vb is applied to the gate of the low-side transistor ML. That is, in this configuration, the gate voltage Vg of the low-side transistor ML L is equal to the intermediate signal Vb.

[0040] The bias circuit 140 includes, for example, current sources CS1 and CS2 and transistors M1 to M4. The gate of the transistor M1 receives an intermediate signal Vb, i.e., a gate voltage Vg of the low-side transistor ML. L is applied. The transistors M2 and M3 form a current mirror circuit, which mirrors back the current flowing through the transistor M1. The gate and drain of the transistor M4 are connected to the gate of the high-side transistor MH.

[0041] The above is the configuration of the operational amplifier 100R. Next, its operation will be explained, and problems that arise in the operational amplifier 100R according to the comparative technology will be explained.

[0042] 2 is a diagram illustrating the steady state of the operational amplifier 100R. In this specification, the steady state refers to a state in which both the high-side transistor MH and the low-side transistor ML are on and a current is flowing. For ease of understanding, the steady state is shown here as the current I flowing through the output terminal OUT of the operational amplifier 100R. OUT Considering a state where is zero, a state where an equal bias current Ib flows through the high-side transistor MH and the low-side transistor ML will be described.

[0043] The operational amplifier 100R forms a feedback system together with an external circuit of the operational amplifier 100R, and the voltage and current of each node are stabilized.

[0044] The currents of the current sources CS1 and CS2 are I1 and I2. The gate-source voltage Vgs of the low-side transistor ML L is the intermediate signal Vb. If the voltage across the current source CS1 is Vs1, the gate-source voltage Vgs1 of the transistor M1 is Vgs1=Vb-Vs1 In other words, the bias current Ib flowing through the low-side transistor ML is determined by the voltage of the intermediate signal Vb. Ib=β n / 2×(Vb-V thn ) 2 …(1) β n =μ n C ox W / L V thn : Threshold voltage of NMOS transistor μ n : Mobility of NMOS transistor C ox : Unit capacitance of oxide film of NMOS transistor L: NMOS transistor channel length W: NMOS transistor channel width

[0045] The current I3 flowing through the transistor M1 is expressed by the formula (2). I3=β n / 2×(Vgs2-V thn ) 2 =β n / 2×(Vb-Vs1-V thn ) 2 …(2) However, the capability I1 of the current source CS1 is sufficiently larger than I3, and I3<<I1 holds.

[0046] The current I3 controlled by the transistor M1 is mirrored by the current mirror circuit including the transistors M2 and M3, and a current I4 flows through the transistor M4. Equation (3) holds between the gate-source voltage Vgs4 of the transistor M4 and the current I4. I4=β p / 2×(Vgs4-V thp ) 2 …(3) β p =μ p C ox W / L V thp : Threshold voltage of PMOS transistor μ p : Mobility of PMOS transistor C ox : Unit capacitance of oxide film of PMOS transistor L: PMOS transistor channel length W: PMOS transistor channel width

[0047] The capacity I2 of the current source CS2 connected to the drain of the transistor M4 is sufficiently larger than the current I4, and I4<<I2 holds. The gate-source voltage Vgs4 of the transistor M4 can be found by modifying equation (3). Vgs4=√(2I4 / β p )+V thp …(4)

[0048] This voltage Vgs4 reduces the gate-source voltage Vgs of the high-side transistor MH His determined, and a current Ib also flows through the high-side transistor MH. From equation (1), the current Ib flowing through the low-side transistor ML is determined by the W / L ratio of the low-side transistor ML.

[0049] 3 is a diagram illustrating the sink mode of the operational amplifier 100R. In this specification, the sink mode refers to a state in which the high-side transistor MH is substantially off and the low-side transistor ML draws an output current I from the load connected to the output terminal OUT. OUT On the other hand, source mode refers to the state in which the low-side transistor ML is substantially off and the high-side transistor MH supplies the output current I to the load connected to the output terminal OUT. OUT This refers to the state of sourcing (spitting out).

[0050] When the intermediate signal Vb rises, the output current I OUT The gate-source voltage Vgs of the low-side transistor ML becomes large. L When the output current I OUT is called the maximum sink current. Output current I OUT As the current I3 increases, the current I3 flowing through transistor M1 also increases. The current I3 is mirrored by the current mirror circuit consisting of transistors M2 and M3, and a current I4 is supplied to transistor M4. A current source CS2 is connected to the drain of transistor M4, but the current capacity is I2<I1, so the source potential of transistor M4 is equal to the power supply voltage V DD At this time, the gate-source voltage Vgs of the high-side transistor MH H becomes small, and the device is essentially in an OFF state, entering the sink mode.

[0051] Like the bias current Ib, the maximum sink current in sink mode is determined by the size ratio W / L of the low-side transistor ML. In other words, in the compared technology, both the maximum sink current and the bias current are determined according to the size ratio W / L of the transistor ML. Therefore, if the maximum sink current is increased, the bias current also increases, resulting in a larger circuit area.

[0052] Conversely, the maximum source current is determined by the size ratio W / L of the high-side transistor MH. In other words, in the compared technology, both the maximum source current and bias current are determined according to the size W / L of the transistor MH. Therefore, if the maximum source current is increased, the bias current also increases, resulting in a larger circuit area.

[0053] Below, we will explain a technique for achieving both a large maximum sink current and / or a large maximum source current and a small circuit area and / or a small bias current.

[0054] (Embodiment 1) 4 is a circuit diagram of an operational amplifier 100A according to embodiment 1. The operational amplifier 100A includes a differential input stage 110, an amplifier stage 130, and an assist circuit 150A, which are integrated on a single semiconductor substrate.

[0055] The assist circuit 150A is active when the operational amplifier 100A is in sink mode, and outputs an auxiliary current I AUX The assist circuit 150A includes a first transistor M11 and a drive circuit 152A.

[0056] The first transistor M11 is an NMOS transistor of the same type as the low-side transistor ML, and the first transistor M11 is connected in parallel with the low-side transistor ML.

[0057] The driving circuit 152A drives the first transistor M11 in response to the gate voltage Vg of the low-side transistor ML, i.e., the intermediate signal Vb. Specifically, the driving circuit 152A drives the first transistor M11 in response to the gate voltage Vg of the low-side transistor ML. L is low, that is, the gate-source voltage Vgs of the low-side transistor ML L When the gate voltage Vg is small, the first transistor M11 is turned off. L When the voltage Vgs of the low-side transistor ML increases,L When the voltage Vcc increases, the first transistor M11 is turned on, and the sink current is increased by using the first transistor M11.

[0058] For example, the drive circuit 152A includes a first current source CS11 and a second current source CS12. The first current source CS11 supplies a gate voltage Vg L The first current I according to A to the gate of the first transistor M11. The second current source CS12 sources a second current I B is sunk from the gate of the first transistor M11.

[0059] The above is the configuration of the operational amplifier 100A. With this operational amplifier 100A, the gate voltage Vg L When I rises and operates in sink mode, A >I B As a result, the gate voltage Vg of the first transistor M11 11 rises, and the first transistor M11 turns on. At this time, a current flows from the output terminal OUT to the low-side transistor ML and a current (called auxiliary current) I AUX In other words, by adding an assist circuit of 150A, the maximum sink current can be increased.

[0060] The first transistor M11 is turned on when operating in sink mode, but is turned on in a region where the sink current is not so large and in a region where it operates in source mode, in other words, when the gate voltage Vg L It is preferable that the gate voltage Vg is turned off when the gate voltage Vg is lower than a certain voltage level (Vm). L and the first current I A and the dependence of the second current I B It can be designed based on the amount of current.

[0061] 1st current I A is the gate voltage Vg L (Gate-source voltage Vgs L) is expressed as equation (5). I A =f(Vg L ) Vg L >When Vm, I A >I B holds, and Vg L <Vmのとき、I A B It is preferable to design the drive circuit 152A so that the gate voltage Vg L When the voltage Vg of the first transistor M11 decreases, 11 decreases, the first transistor M11 turns off, and the auxiliary current I AUX decreases and becomes zero.

[0062] Fig. 5 is a circuit diagram showing a specific example of the configuration of the assist circuit 150A of Fig. 4. Fig. 5 shows only the amplifier stage 130 and the assist circuit 150A.

[0063] The first current source CS11 includes a second transistor M12, a third transistor M13, and a current mirror circuit 154. The source of the second transistor M12 is connected to the ground line 104 and is biased so that a constant current flows. Specifically, the second transistor M12 and the transistor M19 form a current mirror circuit, and the reference current I REF Current I according to C is biased to allow

[0064] The third transistor M13 has a gate connected to the gate of the low-side transistor ML and a source connected to the drain of the second transistor M12. The state of the third transistor M13 is determined by the gate voltage Vg L The current I flowing through the third transistor M13 changes depending on D When the third transistor M13 is fully on, I D ≒I C When the third transistor M13 is turned off, I D ≒0. ​

[0065] The current mirror circuit 154 controls the current I D The folded current is called the first current I A The current mirror circuit 154 includes PMOS transistors M17 and M18.

[0066] The second current source CS12 includes a fourth transistor M14. The fourth transistor M14 has a source connected to the ground line 104 and a drain connected to the gate of the first transistor M11, and outputs a constant second current I B Specifically, the fourth transistor M14 and the transistor M19 form a current mirror circuit, and the reference current I REF Current I according to B is biased to allow

[0067] The configurations of the first current source CS11 and the second current source CS12 shown in FIG. 5 are merely examples, and those skilled in the art will understand that other configurations are possible.

[0068] (Embodiment 2) 6 is a circuit diagram of an operational amplifier 100B according to embodiment 2. The operational amplifier 100B includes a differential input stage 110, an amplifier stage 130, and an assist circuit 150B. The assist circuit 150B includes a first transistor M11 and a drive circuit 152B. The drive circuit 152B includes a clamp circuit 158 ​​in addition to the drive circuit 152A of FIG.

[0069] The clamp circuit 158 ​​controls the gate voltage Vg of the low-side transistor ML. L is low, that is, in the region where the operational amplifier 100A does not operate in the sink mode (steady state or source mode), the gate voltage Vg of the first transistor M11 11 is forcibly reduced, and the gate-source voltage Vgs of the first transistor M11 11 is the threshold voltage V thnFor example, the clamp circuit 158 ​​is configured to set the gate voltage Vg L may be shifted to the lower voltage side by a predetermined voltage width ΔV and applied to the gate of the first transistor M11.

[0070] By adding the clamp circuit 158, the gate voltage Vg L When the voltage Vgs between the gate and source of the first transistor M11 is low (steady state or source mode), 11 is the threshold voltage V thn Therefore, the auxiliary current I flows through the first transistor M11. AUX can be blocked.

[0071] The gate voltage Vg of the first transistor M11 11 is the voltage across the second current source CS12. Therefore, by adding the clamp circuit 158, the gate voltage Vg L When the voltage across the second current source CS12 is set to a value lower than the minimum operating voltage of the second current source CS12 in a low state (steady state or source mode), the second current I B can be reduced to zero, further reducing the circuit current.

[0072] Fig. 7 is a circuit diagram showing a specific configuration example of the assist circuit 150B of Fig. 6. The clamp circuit 158 ​​of the drive circuit 152B includes a fifth transistor M15 and a sixth transistor M16.

[0073] The fifth transistor M15 and the sixth transistor M16 operate as a source follower circuit. L When the voltage Vgs of the first transistor M11 decreases, the source voltage of the transistor M15 decreases. 11 As a result, the gate-source voltage Vgs of the first transistor M11 11 is the threshold voltage V thn becomes smaller, and the first transistor M11 can be turned off.

[0074] 8 is a diagram showing the sink current (simulation results) of the operational amplifier 100B according to the second embodiment (FIG. 7) and the operational amplifier of the comparative technique. DD is 2.7V, and the output voltage V OUT was swept between 0 and 2.7 V. In the second embodiment, the maximum sink current is increased from −10 mA to −30 mA, approximately three times as large as that of the comparative technology.

[0075] FIG. 9 shows the gate voltage Vg of the low-side transistor ML of the operational amplifier 100B according to the second embodiment (FIG. 7) and the operational amplifier of the comparative technique. L 10 is a diagram showing the simulation results. OUT In the PMOS operating region where is positive, the high-side transistor, which is a PMOS transistor, dominates and the output current I OUT In the NMOS operating region where is negative, the low-side transistor, which is an NMOS transistor, dominates.

[0076] In the comparative technology, in the PMOS operating region, the gate voltage Vg of the low-side transistor ML L does not drop completely to zero, and therefore a small amount of current flows through the low-side transistor ML. In contrast, in the second embodiment, in the PMOS operation region, the gate voltage Vg L drops to zero, which turns off the low-side transistor ML completely, reducing the current.

[0077] (Embodiment 3) 10 is a circuit diagram of an operational amplifier 100C according to embodiment 3. The operational amplifier 100C includes an assist circuit 150C in addition to a differential input stage 110 and an amplifier stage 130, and is integrated on a single semiconductor substrate.

[0078] The assist circuit 150C is active when the operational amplifier 100C is in source mode, and outputs an auxiliary current IAUX The assist circuit 150C includes a first transistor M21 and a drive circuit 152C. The assist circuit 150C has a configuration obtained by inverting the assist circuit 150A in FIG.

[0079] The first transistor M21 is a PMOS transistor of the same type as the high-side transistor MH, and the first transistor M21 is connected in parallel with the high-side transistor MH.

[0080] The drive circuit 152C controls the gate voltage Vg of the high-side transistor MH. H Specifically, the drive circuit 152C drives the first transistor M21 in response to the gate voltage Vg H is high, in other words, the gate-source voltage Vgs of the high-side transistor MH H When is small, the first transistor M21 is turned off, and the gate voltage Vg of the high-side transistor MH H In other words, the gate-source voltage Vgs of the high-side transistor MH H When becomes large, the first transistor M21 is turned on, and the source current is increased using the first transistor M21.

[0081] For example, the drive circuit 152C includes a first current source CS21 and a second current source CS22. The first current source CS21 supplies a gate voltage Vg H The first current I according to A The first current I is sunk from the gate of the first transistor M21. A is the gate-source voltage Vgs of the high-side transistor MH H and therefore the gate voltage Vg of the high-side transistor MH H The second current source CS12 has a negative correlation with the gate voltage Vg H The second current I, which is independent of B is sourced to the gate of the first transistor M21.

[0082] The above is the configuration of the operational amplifier 100C. With this operational amplifier 100C, the gate voltage Vg H When the voltage drops and the device operates in source mode, I A >I B As a result, the gate voltage Vg of the first transistor M21 21 At this time, a current flows from the output terminal OUT to the high-side transistor MH and a current (called auxiliary current) I AUX That is, by adding the assist circuit 150C, the maximum source current can be increased.

[0083] Fig. 11 is a circuit diagram showing a specific configuration example of the assist circuit 150C of Fig. 10. Only the amplifier stage 130 and the assist circuit 150C are shown in Fig. 11. The assist circuit 150C is obtained by inverting the conductivity types of the transistors that make up the assist circuit 150A of Fig. 5.

[0084] The first current source CS21 includes a second transistor M22, a third transistor M23, and a current mirror circuit 154. The source of the second transistor M22 is connected to the power supply line 102 and is biased so that a constant current flows. Specifically, the second transistor M22 and the transistor M29 form a current mirror circuit, and the reference current I REF Current I according to C is biased to allow

[0085] The third transistor M23 has a gate connected to the gate of the high-side transistor MH and a source connected to the drain of the second transistor M22. The state of the third transistor M23 is determined by the gate voltage Vg H The current I flowing through the third transistor M23 changes depending on D When the third transistor M23 is fully on, I D ≒I C When the third transistor M23 is turned off, ID ≒0.

[0086] The current mirror circuit 154 controls the current I D The folded current is called the first current I A The current mirror circuit 154 includes PMOS transistors M27 and M28.

[0087] The second current source CS22 includes a fourth transistor M24. The fourth transistor M24 has a source connected to the power supply line 102 and a drain connected to the gate of the first transistor M21, and outputs a constant second current I B Specifically, the fourth transistor M24 and the transistor M29 form a current mirror circuit, and the reference current I REF Current I according to B is biased to allow

[0088] The configurations of the first current source CS21 and the second current source CS22 shown in FIG. 11 are merely examples, and those skilled in the art will understand that other configurations are possible.

[0089] (Embodiment 4) 12 is a circuit diagram of an operational amplifier 100D according to embodiment 4. The operational amplifier 100D includes a differential input stage 110, an amplifier stage 130, and an assist circuit 150D. The assist circuit 150D includes a first transistor M21 and a drive circuit 152D. The drive circuit 152D includes a clamp circuit 158 ​​in addition to the drive circuit 152C of FIG. 11.

[0090] The clamp circuit 158 ​​controls the gate voltage Vg of the high-side transistor MH. H is high, that is, in the region where the operational amplifier 100D does not operate in source mode (steady state or sink mode), the gate voltage Vg of the first transistor M21 21 is forcibly increased, and the gate-source voltage Vgs of the first transistor M21 His the threshold voltage V thp It is assumed to be in a lower state.

[0091] For example, the clamp circuit 158 ​​controls the gate voltage Vg H may be shifted to the high voltage side by a predetermined voltage width ΔV and applied to the gate of the first transistor M21.

[0092] By adding the clamp circuit 158, the gate voltage Vg H When the voltage Vgs between the gate and source of the first transistor M21 is high (steady state or sink mode), 21 is the threshold voltage V thp Since the output of the first transistor M21 is kept lower than the reference voltage, the auxiliary current I AUX can be blocked.

[0093] The gate voltage Vg of the first transistor M21 21 is the voltage across the second current source CS22. Therefore, by adding the clamp circuit 158, the gate voltage Vg H When the voltage across the second current source CS22 is set to a value lower than the minimum operating voltage of the second current source CS22 in a state where the voltage across the second current source CS22 is high (steady state or sink mode), the second current I B can be reduced to zero, further reducing the circuit current.

[0094] Fig. 13 is a circuit diagram showing a specific configuration example of the assist circuit 150D of Fig. 12. The clamp circuit 158 ​​of the drive circuit 152D includes a fifth transistor M25 and a sixth transistor M26.

[0095] The fifth transistor M25 and the sixth transistor M26 operate as a source follower circuit. H When the voltage Vgs of the first transistor M21 decreases, the source voltage of the transistor M25 decreases. 21 As a result, the gate-source voltage Vgs of the first transistor M21 21 is the threshold voltage Vthp becomes smaller, and the first transistor M21 can be turned off.

[0096] 14 is a diagram showing the source current (simulation results) of the operational amplifier 100D according to the fourth embodiment (FIG. 12) and the operational amplifier of the comparative technique. DD is 2.7V, and the output voltage V OUT was swept between 0 and 2.7 V. In the fourth embodiment, the maximum source current is increased from 6 mA to 50 mA, approximately eight times as large as that of the comparative technology.

[0097] FIG. 15 shows the gate voltage Vg of the high-side transistor MH of the operational amplifier 100D according to the fourth embodiment (FIG. 12) and the operational amplifier of the comparative technique. H (Simulation results). In the PMOS operating region, the high-side transistor, which is a PMOS transistor, is dominant, and the output current I OUT In the NMOS operating region where is negative, the low-side transistor, which is an NMOS transistor, dominates.

[0098] In the comparison technique, the output current I OUT In the NMOS operating region where is negative, the gate voltage Vg of the high-side transistor MH H rises only to about 1.6 to 1.8 V, and the gate-source voltage Vgs of the high-side transistor MH H Therefore, a small amount of current flows through the high-side transistor MH. In contrast, in the fourth embodiment, in the NMOS operation region, the gate voltage Vg H is the power supply voltage V DD This causes the high-side transistor MH to turn off completely, reducing the current.

[0099] (Embodiment 5) 16 is a circuit diagram of an operational amplifier 100E according to embodiment 5. The operational amplifier 100E is a low current consumption operational amplifier, and includes both the assist circuit 150B described in embodiment 2 and the assist circuit 150D described in embodiment 4.

[0100] The differential input stage 110E includes a differential transistor pair M31, M32, a tail current source CS31, and a folded cascode amplifier circuit 112E. The folded cascode amplifier circuit 112E is an active load for the differential transistor pair M31, M32, and includes transistors M41 to M49, voltage sources VS41, VS42, and a current source CS41.

[0101] FIG. 17 is a diagram showing the load regulation (simulation results) of the operational amplifier 100E of FIG. 16. Components are connected to the operational amplifier 100E so as to form a constant voltage regulator with a target voltage of 1.35V. The horizontal axis represents the load current, and the vertical axis represents the output voltage V OUT In the comparative technology without the assist circuits 150B and 150D, when the source current or sink current increases, the output voltage V OUT will not be able to maintain the target level.

[0102] In contrast to this, in the fifth embodiment, the addition of the assist circuit 150B can improve load regulation in a region where the source current is large, and the addition of the assist circuit 150D can improve load regulation in a region where the sink current is large.

[0103] Fig. 18 is a diagram showing the relationship between the power supply voltage and the circuit current in the no-load state of the operational amplifier 100E of Fig. 16. Fig. 18 shows the characteristics of the operational amplifier 100E of Fig. 16 and the characteristics of an operational amplifier according to a comparative technique. It can be seen that the addition of the assist circuits 150B and 150D does not increase the circuit current in the no-load state.

[0104] (Embodiment 6) 19 is a circuit diagram of an operational amplifier 100F according to embodiment 6. The operational amplifier 100F is a feed-forward high-speed operational amplifier, and includes both the assist circuit 150B described in embodiment 2 and the assist circuit 150D described in embodiment 4. In embodiment 6, the configurations of the differential input stage 110F and the amplifier stage 130F are different from those in embodiment 5.

[0105] The differential input stage 110F includes a differential transistor pair M31, M32, a tail current source CS31, and a folded cascode amplifier circuit 112F. The folded cascode amplifier circuit 112F includes transistors M51 to M63 and voltage sources VS51 to VS54. The differential input stage 110F supplies two intermediate signals Vb1, Vb2 corresponding to the input voltage to the amplifier stage 130F.

[0106] The amplifier stage 130F includes a high-side transistor MH, a low-side transistor ML, capacitors C71 and C72, and resistors R71 and R72.

[0107] The above-described embodiment is merely an example, and it will be understood by those skilled in the art that various modifications are possible in the combination of the components and the processing steps. Such modifications will be described below.

[0108] (Variation 1) There are no particular limitations on the configuration of the differential input stage 110 or the amplifier stage 130. For example, although the differential input stage 110 having an NMOS input is shown in Figures 16 and 19, it may have a PMOS input, or may have a rail-to-rail input having an NMOS input and a PMOS input.

[0109] (Variation 2) The configuration of the amplifier stage 130 is also not limited to those shown in FIG. 16 or FIG. 19, and the present disclosure can be applied to any known or future available configuration.

[0110] (Variation 3) In the configurations of FIGS. 4 and 6, the first current source CS11 is connected to the gate voltage Vg Lcurrent I independent of A The second current source CS12 may source a gate voltage Vg of the low-side transistor ML to the gate of the transistor M11. L Current I, which has a negative correlation with B may be sunk from the gate of transistor M11. B is the gate voltage Vg L When I A and the gate voltage Vg L decreases as increases.

[0111] (Variation 4) In the configurations of FIGS. 5 and 7, the transistor M13 may be provided between the drain of the transistor M18 and the gate of the transistor M11.

[0112] (Variation 5) In the configurations of FIGS. 10 and 12, the first current source CS21 is connected to the gate voltage Vg H current I independent of A The second current source CS22 may sink the gate-source voltage Vgs of the high-side transistor MH. H In other words, the gate voltage Vg of the high-side transistor MH H Current I, which has a positive correlation with B may be sourced into the gate of transistor M21. Current I B is the gate-source voltage Vgs of the high-side transistor MH H When is 0, I A and the gate-source voltage Vgs H decreases as increases.

[0113] (Variation 6) In the configurations of FIGS. 11 and 13, the transistor M23 may be provided between the drain of the transistor M28 and the gate of the transistor M21.

[0114] The embodiments merely illustrate the principles and applications of the present invention, and many modifications and changes in arrangement are permitted to the embodiments as long as they do not deviate from the spirit of the present invention as defined in the claims. [Explanation of symbols]

[0115] 100 Op-Amps 102 Power Line 104 Ground Line 110 Differential Input Stage 130 Amplification stage MH high-side transistor ML low-side transistor 140 Bias Circuit 150 Assist Circuit M11 First transistor M12 Second transistor M13 Third transistor M14 4th transistor M15 5th transistor M16 6th transistor 152 Drive circuit 154 Current mirror circuit 156 Reference current source 158 Clamp Circuit CS11 1st current source CS12 2nd current source

Claims

1. a differential input stage that amplifies the differential input signal and generates an intermediate signal; an amplifier stage including an output transistor connected between an output terminal and a fixed voltage line and driven in response to the intermediate signal; an assist circuit; The assist circuit is a first transistor connected in parallel with the output transistor; a drive circuit that drives the first transistor in response to a gate voltage of the output transistor; Including, the output transistor is a low-side transistor of an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and the fixed voltage line is a ground line; The drive circuit a first current source that sources a first current corresponding to the gate voltage of the output transistor to the gate of the first transistor; a second current source that sinks a second current from the gate of the first transistor; a fifth transistor having a gate connected to the gate of the low-side transistor and a source connected to the gate of the first transistor; Including, operational amplifiers.

2. The first current source is a second transistor having a source connected to a ground line and biased to pass a constant current; a third transistor having a gate connected to the gate of the low-side transistor and a source connected to the drain of the second transistor; a current mirror circuit that mirrors the current flowing through the third transistor and sources it to the gate of the first transistor; 10. The operational amplifier of claim 1, comprising:

3. The second current source is 3. The operational amplifier according to claim 1, further comprising a fourth transistor having a source connected to a ground line and a drain connected to the gate of said first transistor, said fourth transistor being biased so as to pass a constant current.

4. The drive circuit 2. The operational amplifier according to claim 1, further comprising a sixth transistor having a gate and a drain connected to the drain of said fifth transistor and a source connected to a power supply line.

5. A differential input stage that amplifies a differential input signal and generates an intermediate signal; an amplifier stage including an output transistor connected between an output terminal and a fixed voltage line and driven in response to the intermediate signal; an assist circuit; The assist circuit is a first transistor connected in parallel with the output transistor; a drive circuit that drives the first transistor in response to a gate voltage of the output transistor; Including, the output transistor is a P-type high-side transistor, the fixed voltage line is a power supply line, The drive circuit a first current source that sinks a first current from the gate of the first transistor according to the gate voltage of the output transistor; a second current source that sources a second current to the gate of the first transistor; a fifth transistor having a gate connected to the gate of the high-side transistor and a source connected to the gate of the first transistor; Including, operational amplifiers.

6. The first current source is a second transistor having a source connected to a power supply line and biased to pass a constant current; a third transistor having a gate connected to the gate of the high-side transistor and a source connected to the drain of the second transistor; a current mirror circuit that mirrors the current flowing through the third transistor and sinks it from the gate of the first transistor; 6. The operational amplifier of claim 5, comprising:

7. The second current source is 7. The operational amplifier according to claim 5, further comprising a fourth transistor having a source connected to a power supply line and a drain connected to the gate of said first transistor, said fourth transistor being biased so as to pass a constant current.

8. The drive circuit 6. The operational amplifier according to claim 5, further comprising a sixth transistor having a gate and a drain connected to the drain of said fifth transistor and a source connected to a ground line.

9. a differential input stage that amplifies the differential input signal and generates an intermediate signal; an amplifier stage including a low-side transistor connected between an output terminal and a ground line and driven in response to the intermediate signal; an assist circuit; The assist circuit is a first transistor connected in parallel with the low-side transistor; a second transistor having a source connected to a ground line and biased to pass a constant current; a third transistor having a gate connected to the gate of the low-side transistor and a source connected to the drain of the second transistor; a current mirror circuit that mirrors the current flowing through the third transistor and sources it to the gate of the first transistor; a fourth transistor having a source connected to a ground line and a drain connected to the gate of the first transistor and biased to pass a constant current; a fifth transistor having a gate connected to the gate of the low-side transistor and a source connected to the gate of the first transistor; a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to a power supply line; Including, operational amplifiers.

10. a differential input stage that amplifies the differential input signal and generates an intermediate signal; an amplifier stage including a high-side transistor connected between an output terminal and a power supply line and driven in response to the intermediate signal; an assist circuit; The assist circuit is a first transistor connected in parallel with the high-side transistor; a second transistor having a source connected to a power supply line and biased to pass a constant current; a third transistor having a gate connected to the gate of the high-side transistor and a source connected to the drain of the second transistor; a current mirror circuit that mirrors the current flowing through the third transistor and sinks it from the gate of the first transistor; a fourth transistor having a source connected to a power supply line and a drain connected to the gate of the first transistor, the fourth transistor being biased so as to pass a constant current; a fifth transistor having a gate connected to the gate of the high-side transistor and a source connected to the gate of the first transistor; a sixth transistor having a gate and a drain connected to the drain of the fifth transistor and a source connected to a ground line; Including, operational amplifiers.

11. 11. The operational amplifier according to claim 1, which is monolithically integrated on a single semiconductor substrate.

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