Semiconductor device manufacturing method

Abstract

To provide a method for manufacturing a semiconductor device capable of achieving both relaxation of electric field concentration and rise in capacity.SOLUTION: A method for manufacturing a semiconductor device includes the steps of: forming a semiconductor layer (laminate of buffer layer 12, electron transit layer 14, electron supply layer 16, and gap layer 18) on a substrate 10; forming a source electrode 32 and a drain electrode 42; forming a first insulation layer 21; forming a second insulation film 22; forming a mask including an opening 110 between the source electrode and the drain electrode in a plan view from a direction perpendicular to an upper surface 10A of the substrate; forming a first gate opening 50 on the first insulation film and forming a second gate opening 60 on the second insulation film by etching the first insulation film and the second insulation film through the opening; and forming a gate electrode through the first gate opening and the second gate opening. An angle formed by a first side surface 112 and an upper surface of the opening is larger than an angle formed by a second side surface 114 and the upper surface of the opening. In etching, an etching rate of the second insulation film is higher than an etching rate of the first insulation film.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] For high electron mobility transistors (HEMTs), a structure has been proposed in which the portion of the gate electrode that extends toward the drain electrode on the insulating film is larger than the portion that extends toward the source electrode in order to alleviate electric field concentration. However, if the portion of the gate electrode that extends toward the source electrode on the insulating film is made larger, the electrostatic capacitance between the gate electrode and the channel (two-dimensional electron gas) increases. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-77621 [Patent Document 2] Japanese Patent Application Laid-Open No. 2016-157983 [Patent Document 3] Japanese Patent Application Laid-Open No. 2007-88371 [Patent Document 4] U.S. Patent No. 7,501,669 [Patent Document 5] U.S. Patent No. 7,812,369 Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional semiconductor device manufacturing methods, it is difficult to simultaneously alleviate electric field concentration and suppress an increase in capacitance.

[0005] An object of the present disclosure is to provide a method for manufacturing a semiconductor device that can simultaneously alleviate electric field concentration and suppress an increase in capacitance. [Means for solving the problem]

[0006] a first insulating film covering a surface of the semiconductor layer between the source electrode and the drain electrode; a second insulating film on the first insulating film; a mask on the second insulating film, the mask having an opening between the source electrode and the drain electrode in a plan view perpendicular to an upper surface of the substrate; etching the first insulating film and the second insulating film through the opening to form a first gate opening in the first insulating film and a second gate opening in the second insulating film; and forming a gate electrode on the first insulating film and the second insulating film, the gate electrode being in Schottky contact with the semiconductor layer through the first gate opening and the second gate opening, the opening having a first side surface and a second side surface closer to the drain electrode than the first side surface, the angle between the first side surface and the upper surface being larger than the angle between the second side surface and the upper surface, and the etching rate of the second insulating film being higher than the etching rate of the first insulating film. [Effects of the Invention]

[0007] According to the present disclosure, it is possible to both alleviate electric field concentration and suppress an increase in capacitance. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a cross-sectional view (part 1) illustrating the method for manufacturing a semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 3] FIG. 3 is a cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view (part 4) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 5]FIG. 5 is a cross-sectional view (part 5) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a cross-sectional view (part 6) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a cross-sectional view (part 7) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a cross-sectional view (part 8) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 9] FIG. 9 is a ninth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 10] FIG. 10 is a cross-sectional view (part 10) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view (part 11) illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 12] FIG. 12 is a twelfth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 13] FIG. 13 is a thirteenth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment. [Figure 14] FIG. 14 is a diagram showing an outline of the finger gate structure. [Figure 15] FIG. 15 is a cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 16] FIG. 16 is a cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 17] FIG. 17 is a cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 18] FIG. 18 is a cross-sectional view (part 4) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 19] FIG. 19 is a cross-sectional view (part 5) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 20] FIG. 20 is a cross-sectional view (part 6) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 21] FIG. 21 is a cross-sectional view (part 7) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 22] FIG. 22 is a cross-sectional view (part 8) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 23] FIG. 23 is a ninth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 24] FIG. 24 is a cross-sectional view (part 10) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 25] FIG. 25 is a cross-sectional view (part 11) illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 26] FIG. 26 is a twelfth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 27] FIG. 27 is a thirteenth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment. [Figure 28] FIG. 28 is a cross-sectional view (part 1) showing a first example of a method for forming a mold. [Figure 29] FIG. 29 is a cross-sectional view (part 2) showing a first example of a method for forming a mold. [Figure 30] FIG. 30 is a cross-sectional view (part 3) showing a first example of a method for forming a mold. [Figure 31] FIG. 31 is a cross-sectional view (part 4) showing a first example of a method for forming a mold. [Figure 32] FIG. 32 is a cross-sectional view (part 5) showing a first example of a method for forming a mold. [Figure 33] FIG. 33 is a cross-sectional view (part 6) showing a first example of a method for forming a mold. [Figure 34] FIG. 34 is a cross-sectional view (part 7) showing a first example of a method for forming a mold. [Figure 35] FIG. 35 is a cross-sectional view (part 1) showing a second example of a method for forming a mold. [Figure 36] FIG. 36 is a cross-sectional view (part 2) showing a second example of a method for forming a mold. [Figure 37] FIG. 37 is a cross-sectional view (part 3) showing a second example of the mold forming method. [Figure 38] FIG. 38 is a cross-sectional view (part 4) showing a second example of the mold forming method. [Figure 39] FIG. 39 is a cross-sectional view (part 5) showing a second example of the mold forming method. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.

[0010] [1] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes the steps of: forming a semiconductor layer above a substrate; forming a source electrode and a drain electrode on the semiconductor layer; forming a first insulating film between the source electrode and the drain electrode to cover a surface of the semiconductor layer; forming a second insulating film on the first insulating film; forming a mask on the second insulating film, the mask having an opening between the source electrode and the drain electrode in a plan view perpendicular to an upper surface of the substrate; etching the first insulating film and the second insulating film through the opening to form a first gate opening in the first insulating film and a second gate opening in the second insulating film; and forming a gate electrode on the first insulating film and the second insulating film, the gate electrode being in Schottky contact with the semiconductor layer through the first gate opening and the second gate opening, the opening having a first side surface and a second side surface closer to the drain electrode than the first side surface; an angle formed between the first side surface and the upper surface is larger than an angle formed between the second side surface and the upper surface; and

[0011] In the opening formed in the mask, the angle between the first side surface on the source electrode side and the top surface of the substrate is larger than the angle between the second side surface on the drain electrode side and the top surface of the substrate. Therefore, during etching, the mask opening is more likely to widen on the drain electrode side than on the source electrode side. Furthermore, during etching, the etching rate of the second insulating film is higher than that of the first insulating film. Therefore, the second gate opening formed in the second insulating film is more susceptible to the shape of the mask opening than the first gate opening formed in the first insulating film. Therefore, the portion of the first insulating film exposed from the second insulating film is more likely to be wider on the drain electrode side than on the source electrode side. Therefore, the portion of the gate electrode on the first insulating film that widens toward the drain electrode is more likely to be larger than the portion on the first insulating film that widens toward the source electrode. In this way, it is possible to achieve both mitigation of electric field concentration and suppression of an increase in capacitance.

[0012] [2] In [1], a distance between the first gate opening and the second gate opening on the drain electrode side of the first gate opening may be longer than a distance between the first gate opening and the second gate opening on the source electrode side of the first gate opening. In this case, it is easy to achieve both mitigation of electric field concentration and suppression of an increase in capacitance.

[0013] [3] In [1] or [2], the angle between the first side surface and the top surface may be 85° or more and 90° or less, and the angle between the second side surface and the top surface may be 45° or more and 60° or less. In this case, during etching, the opening of the mask is particularly likely to widen on the drain electrode side more than on the source electrode side.

[0014] [4] In any of [1] to [3], the first insulating film may be a first silicon nitride film having a first refractive index, and the second insulating film may be a second silicon nitride film having a second refractive index lower than the first refractive index. In this case, the etching rate of the second insulating film can be made higher than the etching rate of the first insulating film.

[0015] [5] In any of [1] to [4], the step of forming the mask may include the steps of forming a positive photosensitive film on the second insulating film, exposing the photosensitive film to light to form photosensitive regions in the portions of the photosensitive film where the openings are to be formed, and developing the photosensitive film to remove the photosensitive regions, and the exposing the photosensitive film may include exposure from a direction parallel to the first side surface and exposure from a direction parallel to the second side surface. In this case, the openings can be easily formed with high precision.

[0016] [6] In any one of [1] to [4], the step of forming the mask includes a step of forming a positive photosensitive film on the second insulating film, and a step of forming a photosensitive film on the second insulating film. Re The method may further include a step of forming a photosensitive region in a portion of the photosensitive film where the opening is to be formed by exposing the photosensitive film once with the centric optical system shifted, and a step of removing the photosensitive region by developing the photosensitive film. In this case, the opening can be easily formed with particularly high precision.

[0017] [7] In any one of [1] to [4], the step of forming the mask may include a step of planarizing the upper surface of the second insulating film, a step of forming an uncured resin film on the planarized second insulating film, a step of curing the uncured film while pressing a mold against the uncured film to form a cured film, and a step of removing the mold from the cured film, wherein the mold may have a base and a protrusion protruding from the base and having a shape corresponding to the opening. In this case, the mask may be easily formed with high precision.

[0018] [8] In [7], the resin is an ultraviolet curable resin, and the step of forming the cured film includes the step of applying the resin through the mold. Not yet A step of irradiating the cured film with ultraviolet light may be included, in which case the mask can be easily formed with high precision.

[0019] [9] In [7] or [8], the source electrode and the drain electrode may extend in a first direction parallel to the upper surface, and may be alternately formed in a plurality of electrodes in a second direction parallel to the upper surface and perpendicular to the first direction, and the gate electrode may be formed one between each of the source electrode and the drain electrode adjacent to each other in the second direction. In this case, a transistor having a finger gate structure can also be easily formed.

[0020]

[10] In any of [1] to [9], the etching rate of the second insulating film may be four or more times faster than the etching rate of the first insulating film, in which case the portion of the first insulating film exposed from the second insulating film is more likely to be wider on the drain electrode side than on the source electrode side.

[0021] [Details of the embodiments of the present disclosure] Hereinafter, embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto. In this specification and drawings, components having substantially the same functional configurations may be designated by the same reference numerals to avoid redundant description.

[0022] (First embodiment) A first embodiment will be described. The first embodiment relates to a method for manufacturing a semiconductor device including a GaN-HEMT whose main constituent material is a nitride semiconductor. Figures 1 to 13 are cross-sectional views showing a method for manufacturing a semiconductor device according to the first embodiment.

[0023] First, as shown in FIG. 1 , a buffer layer 12, an electron transit layer 14, an electron supply layer 16, and a cap layer 18 are formed on a substrate 10. The substrate 10 is, for example, a silicon carbide (SiC) substrate whose upper surface has a (0001) plane orientation. The buffer layer 12 is, for example, an AlN layer having a thickness of 5 nm to 100 nm. The electron transit layer 14 is, for example, an undoped GaN layer having a thickness of approximately 1000 nm. The electron supply layer 16 is, for example, an n-type AlGaN layer having a thickness of approximately 20 nm. The cap layer 18 is, for example, an n-type GaN layer having a thickness of approximately 5 nm. The n-type impurity used in this embodiment is, for example, silicon (Si) or germanium (Ge). The stacking direction of the buffer layer 12, the electron transit layer 14, the electron supply layer 16, and the cap layer 18 is, for example, the

[0001] direction. The buffer layer 12, the electron transit layer 14, the electron supply layer 16, and the cap layer 18 are formed by, for example, metal organic chemical vapor deposition (MOCVD). A two-dimensional electron gas (2DEG) 72 exists near the top surface of the electron transit layer 14. The stack of the buffer layer 12, the electron transit layer 14, the electron supply layer 16, and the cap layer 18 is an example of a semiconductor layer.

[0024] Next, a first insulating film 21 is formed on the cap layer 18. The first insulating film 21 is, for example, a silicon nitride (SiN) film. The thickness of the first insulating film 21 is, for example, 10 nm or more and 20 nm or less. The silicon nitride film (an example of a first silicon nitride film) used for the first insulating film 21 is preferably a film whose composition formula is Si2N3. The refractive index of Si2N3 is 2.0. The first insulating film 21 can be formed, for example, by chemical vapor deposition (CVD).

[0025] 2, a resist mask 80 is formed on the first insulating film 21. The resist mask 80 has an opening 81 that exposes a part of the first insulating film 21 and an opening 82 that exposes another part of the first insulating film 21.

[0026] 3, openings 31 and 41 are formed in the first insulating film 21, the cap layer 18, and the electron supply layer 16 by reactive ion etching (RIE). The opening 31 is connected to the opening 81, and the opening 41 is connected to the opening 82. A reactive gas containing fluorine (F) may be used to etch the first insulating film 21. A reactive gas containing chlorine (Cl) may be used to etch the cap layer 18 and the electron supply layer 16. The openings 31 and 41 are formed to a depth that allows a portion of the electron supply layer 16 to remain, for example.

[0027] Next, as shown in FIG. 4 , a source electrode 32 is formed in the opening 31, and a drain electrode 42 is formed in the opening 41. To form the source electrode 32 and the drain electrode 42, a metal film is formed by vacuum deposition while leaving the resist mask 80 in place, and then the resist mask 80 is removed. The metal film is formed not only inside the openings 31 and 41 but also on the resist mask 80. However, the metal film on the resist mask 80 is also removed when the resist mask 80 is removed. In other words, lift-off is performed. The resist mask 80 can be removed using, for example, an organic solvent. After the resist mask 80 is removed, an alloying heat treatment is performed. The source electrode 32 and the drain electrode 42 include, for example, a Ta film and an Al film. The source electrode 32 and the drain electrode 42 are in ohmic contact with the 2DEG 72.

[0028] Next, as shown in FIG. 5, a second insulating film 22 is formed on the first insulating film 21, the source electrode 32, and the drain electrode 42. The second insulating film 22 is, for example, a silicon nitride (SiN) film. The second insulating film 22 may be thicker than the first insulating film 21. The thickness of the second insulating film 22 is, for example, 30 nm to 40 nm. The density of the second insulating film 22 is preferably lower than the density of the first insulating film 21. Furthermore, the refractive index of the second insulating film 22 (an example of the second refractive index) is preferably lower than the refractive index of the first insulating film 21 (an example of the first refractive index). The refractive index of the silicon nitride film (an example of the second silicon nitride film) used for the second insulating film 22 is, for example, 1.85. The second insulating film 22 can be formed by, for example, a CVD method.

[0029] 6, a positive photoresist film 101 is formed on the second insulating film 22. The photoresist film 101 is an example of a photosensitive film.

[0030] Next, as shown in FIG. 7, a photosensitive region 121 is formed by exposure in a portion of the photoresist film 101 between the source electrode 32 and the drain electrode 42. The exposure is performed, for example, by a reduction exposure method. During exposure, light 150 is irradiated from a direction inclined toward the drain electrode 42 from a direction perpendicular to the upper surface 10A of the substrate 10. The photosensitive region 121 has side surfaces 151 and 152 that are parallel to each other in a cross-sectional view. The side surface 151 is closer to the source electrode 32 than the side surface 152. The angle formed between the upper surface 10A and the side surfaces 151 and 152 may be, for example, 45° or more and 60° or less. The photosensitive region 121 has a parallelogram-shaped cross section.

[0031] Next, as shown in FIG. 8 , a photosensitive region 122 that partially overlaps the photosensitive region 121 is formed by exposure in a portion of the photoresist film 101 between the source electrode 32 and the drain electrode 42. The exposure is performed, for example, by a reduction exposure method. During the exposure, light 160 is irradiated from a direction perpendicular to the upper surface 10A of the substrate 10. The photosensitive region 122 is formed so that the side surface 152 remains and the side surface 151 is incorporated into the photosensitive region 122. The photosensitive region 122 has a side surface 161 closer to the source electrode 32 than the position where the side surface 151 was located. The upper surface 10A and the side surface 161 are perpendicular to each other, but the side surface 161 may be slightly inclined toward the source electrode 32 or the drain electrode 42 from the direction perpendicular to the upper surface 10A of the substrate 10. The angle between the upper surface 10A and the side surface 161 is, for example, 85° or more and 90° or less. The photosensitive region 122 has a rectangular cross-sectional shape.

[0032] Photosensitive regions 121 and 122 that partially overlap each other form a photosensitive region 120. The photosensitive region 120 has side surfaces 152 and 161. The photosensitive region 120 has a trapezoidal cross section with two adjacent vertices forming an angle of 90°.

[0033] Next, as shown in FIG. 9 , the photoresist film 101 is developed to remove the exposed region 120. As a result, an opening 110 having side surfaces 112 and 114 is formed in the photoresist film 101. The side surface 112 is formed at the position of a side surface 161 of the exposed region 120, and the side surface 114 is formed at the position of a side surface 152 of the exposed region 120. Therefore, the side surface 112 is closer to the source electrode 32 than the side surface 114. In the opening 110, the angle formed between the side surface 112 on the source electrode 32 side and the top surface 10A of the substrate 10 is larger than the angle formed between the side surface 114 on the drain electrode 42 side and the top surface 10A of the substrate 10. The angle formed between the top surface 10A and the side surface 112 may be, for example, 85° or more and 90° or less, and the angle formed between the top surface 10A and the side surface 114 may be, for example, 45° or more and 60° or less. For example, an alkaline developer is used to develop the photoresist film 101. The photoresist film 101 with the opening 110 formed therein is an example of a mask.

[0034] Next, as shown in FIG. 10 , the first insulating film 21 and the second insulating film 22 are etched through the opening 110 to form a first gate opening 50 in the first insulating film 21 and a second gate opening 60 in the second insulating film 22. This etching is, for example, RIE. The first gate opening 50 has side surfaces 52 and 54 in a cross-sectional view. The side surface 52 is closer to the source electrode 32 than the side surface 54. The second gate opening 60 has side surfaces 62 and 64 in a cross-sectional view. The side surface 62 is closer to the source electrode 32 than the side surface 64. A reactive gas containing fluorine (F) may be used to etch the first insulating film 21 and the second insulating film 22. This etching is performed under conditions such that the etching rate of the second insulating film 22 is higher than the etching rate of the first insulating film 21. For example, the etching rate of the second insulating film 22 is set to be approximately four times the etching rate of the first insulating film 21. For example, the etching rate of the first insulating film 21 is 1 nm / min or more and 3 nm / min or less, and the etching rate of the second insulating film 22 is 4 nm / min or more and 12 nm / min or less.

[0035] During this etching, opening 110 in photoresist film 101 expands while maintaining the shapes of side surfaces 112 and 114. Side surface 112 is perpendicular to top surface 10A, while side surface 114 is inclined relative to side surface 112. Therefore, side surface 114 is more easily etched than side surface 112, and the amount of movement of side surface 114 is greater than the amount of movement of side surface 112. Second gate opening 60 in second insulating film 22 is formed following the shape of opening 110. Therefore, side surface 62 of second gate opening 60 is continuous with side surface 112, and side surface 64 of second gate opening 60 is continuous with side surface 114. For example, the angle between top surface 10A and side surface 62 may be, for example, 85° or more and 90° or less, and the angle between top surface 10A and side surface 64 may be, for example, 45° or more and 60° or less.

[0036] On the other hand, because first insulating film 21 is etched at a speed about one-fourth that of second insulating film 22, even if opening 110 widens, first gate opening 50 is less affected by the widening of opening 110. Therefore, first gate opening 50 is formed mainly below the portion of second insulating film 22 that was exposed in opening 110 at the start of etching. Therefore, side surface 52 of first gate opening 50 is discontinuous from side surface 62, and side surface 54 of first gate opening 50 is discontinuous from side surface 64. Side surfaces 52 and 54 may be surfaces perpendicular to top surface 10A, or may be surfaces inclined from a surface perpendicular to top surface 10A.

[0037] Since the first gate opening 50 and the second gate opening 60 are formed by such a mechanism, the distance Ls between the side surface 52 of the first gate opening 50 and the side surface 62 of the second gate opening 60 is smaller than the distance Ld between the side surface 54 of the first gate opening 50 and the side surface 64 of the second gate opening 60.

[0038] After the first gate opening 50 and the second gate opening 60 are formed, the photoresist film 101 is removed as shown in Fig. 11. The photoresist film 101 can be removed using, for example, an organic solvent or oxygen plasma.

[0039] 12, a gate electrode 71 is formed on the first insulating film 21 and the second insulating film 22. The gate electrode 71 can be formed by, for example, evaporation and lift-off. The gate electrode 71 includes, for example, a Ni film and an Au film. The gate electrode 71 makes Schottky contact with the cap layer 18 through the first gate opening 50 and the second gate opening 60.

[0040] 13, a third insulating film 23 is formed to cover the gate electrode 71, the source electrode 32, and the drain electrode 42. The third insulating film 23 is, for example, a silicon nitride (SiN) film. The silicon nitride film can be formed by, for example, a CVD method. Next, an opening 33 exposing a portion of the source electrode 32 and an opening 43 exposing a portion of the drain electrode 42 are formed in the third insulating film 23 and the second insulating film 22. The openings 33 and 43 are formed by, for example, RIE using a resist mask (not shown).

[0041] Thereafter, wiring and the like are formed as necessary. In this manner, the semiconductor device 100 including the GaN-HEMT can be manufactured.

[0042] In the first embodiment, in the opening 110 formed in the photoresist film 101, the angle between the side surface 112 on the source electrode 32 side and the top surface 10A of the substrate 10 is larger than the angle between the side surface 114 on the drain electrode 42 side and the top surface 10A of the substrate 10. Therefore, as described above, the opening 110 is more likely to widen on the drain electrode side than on the source electrode side during etching. Furthermore, the etching rate of the second insulating film 22 is higher than that of the first insulating film 21 during etching. Therefore, the second gate opening 60 is more susceptible to the shape of the opening 110 than the first gate opening 50. Therefore, the portion of the first insulating film 21 exposed from the second insulating film 22 is more likely to be wider on the drain electrode 42 side than on the source electrode 32 side. Therefore, the portion of the gate electrode 71 on the first insulating film 21 that widens toward the drain electrode 42 is more likely to be larger than the portion on the first insulating film 21 that widens toward the source electrode 32. In this way, it is possible to achieve both mitigation of electric field concentration and suppression of an increase in capacitance.

[0043] Furthermore, when forming the opening 110, two exposures are performed with different light irradiation directions, so that the opening 110 can be easily formed with high precision. Re The photosensitive region 120 may be formed by a single exposure with the centric optical system shifted. In this case, too, the opening 110 can be easily formed with high precision.

[0044] When the angle between top surface 10A and side surface 112 is 85° or more and 90° or less, and the angle between top surface 10A and side surface 114 is 45° or more and 60° or less, opening 110 is particularly likely to widen on the drain electrode 42 side more than on the source electrode 32 side during etching. More preferably, the angle between top surface 10A and side surface 112 is 87° or more and 90° or less, and the angle between top surface 10A and side surface 114 is 45° or more and 55° or less.

[0045] When the first insulating film 21 is a first silicon nitride film having a first refractive index (e.g., 2.00) and the second insulating film 22 is a second silicon nitride film having a second refractive index (e.g., 1.85) lower than the first refractive index, the etching rate of the second insulating film 22 is easily made higher than the etching rate of the first insulating film 21. The refractive index of a silicon nitride film can be measured using a spectroscopic ellipsometer or a reflectance spectroscopic film thickness measuring device. Silicon nitride films also have wavelength dispersion. In this disclosure, the refractive index of a silicon nitride film is defined as the refractive index at a wavelength of 632.8 nm (HeNe laser).

[0046] When the etching rate of the second insulating film 22 is four or more times the etching rate of the first insulating film 21, the portion of the first insulating film 21 that is exposed from the second insulating film 22 is more likely to be wider on the drain electrode 42 side than on the source electrode 32 side. More preferably, the etching rate of the second insulating film 22 is five or more times the etching rate of the first insulating film 21.

[0047] (Second embodiment) Next, a second embodiment will be described. The second embodiment relates to a method for manufacturing a semiconductor device including a GaN-HEMT whose main constituent material is a nitride semiconductor. The second embodiment is particularly suitable for a GaN-HEMT having a finger gate structure. FIG. 14 is a diagram showing an outline of the finger gate structure. FIGS. 15 to 27 are cross-sectional views showing a method for manufacturing a semiconductor device according to the second embodiment.

[0048] 14, in the finger gate structure, a gate electrode 71, a source electrode 32, and a drain electrode 42 extend in a first direction parallel to the upper surface of the substrate. A plurality of source electrodes 32 and drain electrodes 42 are alternately formed in a second direction parallel to the upper surface of the substrate and perpendicular to the first direction. One gate electrode 71 is formed between each source electrode 32 and drain electrode 42 adjacent to each other in the second direction.

[0049] 15, in the second embodiment, first, as in the first embodiment, a buffer layer 12, an electron transit layer 14, an electron supply layer 16, and a cap layer 18 are formed on a substrate 10. Next, a first insulating film 21 is formed on the cap layer 18.

[0050] 16, a resist mask 80 is formed on the first insulating film 21. The resist mask 80 has a plurality of openings 81 and a plurality of openings 82. The openings 81 and the openings 82 are arranged alternately in the second direction.

[0051] 17, similarly to the first embodiment, openings 31 and 41 are formed in the first insulating film 21, the cap layer 18, and the electron supply layer 16 by RIE. At this time, the openings 31 and 41 are formed so as to extend in a first direction parallel to the upper surface 10A of the substrate 10. Furthermore, a plurality of openings 31 and 41 are formed alternately in a second direction parallel to the upper surface 10A and perpendicular to the first direction.

[0052] 18, similarly to the first embodiment, a source electrode 32 is formed in the opening 31, and a drain electrode 42 is formed in the opening 41. At this time, the source electrode 32 and the drain electrode 42 are formed so as to extend in a first direction. Furthermore, a plurality of source electrodes 32 and a plurality of drain electrodes 42 are formed alternately in a second direction.

[0053] Next, as shown in FIG. 19, the second insulating film 22 is formed on the first insulating film 21, the source electrode 32, and the drain electrode 42, in the same manner as in the first embodiment.

[0054] 20, the upper surface of the second insulating film 22 is planarized. The upper surface of the second insulating film 22 may be made flush with the upper surfaces of the source electrode 32 and the drain electrode 42. For example, the second insulating film 22 is polished until the upper surfaces of the source electrode 32 and the drain electrode 42 are exposed. For example, chemical mechanical polishing (CMP) is performed as the polishing. The source electrode 32 and the drain electrode 42 may also be polished.

[0055] Next, as shown in FIG. 21, an uncured film 201A of an ultraviolet (UV) curable resin is formed on the second insulating film 22.

[0056] Also, as shown in FIG. 22, a mold 230 that transmits ultraviolet light is prepared. The mold 230 has a flat base 235 and multiple protrusions 236 protruding from the base 235. The protrusions 236 protrude from one surface 235A of the base 235, for example, the lower surface. The protrusions 236 extend in a first direction and are arranged side by side in a second direction. The protrusions 236 are used to form openings corresponding to the openings 110 in the first embodiment in a mask formed from the uncured film 201A. The protrusions 236 have a surface 233 parallel to the surface 235A, a side surface 232, and a side surface 234. The side surface 232 is perpendicular to the surfaces 233 and 235A and connects the surface 233 to the surface 235A. The side surface 234 is inclined from the side surface 232 and connects the surface 233 to the surface 235A. The side surfaces 232 and 234 are alternately arranged for each protrusion 236 in the second direction. There are two types of inclination directions for the side surfaces 234. The mold 230 is, for example, a quartz mold. A method for forming the mold 230 will be described later.

[0057] After the uncured film 201A is formed, a mold 230 is pressed against the uncured film 201A, as shown in FIG. 23 . Then, ultraviolet rays 170 are irradiated onto the uncured film 201A through the mold 230. As a result, a cured UV-curable resin film 201 is formed. The UV-curable resin film 201 has an opening 210 with side surfaces 212 and 214. The side surface 212 is formed at the position of the side surface 232 of the protrusion 236, and the side surface 214 is formed at the position of the side surface 234 of the protrusion 236. The side surface 212 is closer to the source electrode 32 than the side surface 214. In the opening 210, the angle formed between the side surface 212 on the source electrode 32 side and the top surface 10A of the substrate 10 is larger than the angle formed between the side surface 214 on the drain electrode 42 side and the top surface 10A of the substrate 10. For example, the angle formed between the top surface 10A and the side surface 212 may be, for example, 85° or more and 90° or less, and the angle formed between the top surface 10A and the side surface 214 may be, for example, 45° or more and 60° or less.

[0058] Next, as shown in FIG. 24, the mold 230 is removed. The UV-curable resin film 201 after the mold 230 is removed is an example of a mask. After the mold 230 is removed, it is preferable to perform a residual film treatment. It is inevitable that the protrusion 236 and the second insulating film 22 cannot be completely adhered to each other, and the UV-curable resin may remain at the bottom of the opening 210. Even if there is residual UV-curable resin like this, it can be removed by the residual film treatment. The residual film treatment involves, for example, irradiation with oxygen plasma.

[0059] 25 , similarly to the first embodiment, a second gate opening 60 is formed in the second insulating film 22, and a first gate opening 50 is formed in the first insulating film 21 by RIE. Similar to the first embodiment, the distance between the side surface 52 of the first gate opening 50 and the side surface 62 of the second gate opening 60 is smaller than the distance between the side surface 54 of the first gate opening 50 and the side surface 64 of the second gate opening 60.

[0060] 26, the UV-curable resin film 201 is removed. The UV-curable resin film 201 can be removed using, for example, an organic solvent or oxygen plasma.

[0061] Next, as shown in FIG. 27, similarly to the first embodiment, a gate electrode 71 is formed on the first insulating film 21 and the second insulating film 22, a third insulating film 23 is formed to cover the gate electrode 71, the source electrode 32, and the drain electrode 42, and a third insulating film 23 is formed. 3 Openings 33 and 43 are formed.

[0062] Thereafter, wiring and the like are formed as necessary. In this manner, the semiconductor device 200 including the GaN-HEMT can be manufactured.

[0063] According to the second embodiment, it is possible to alleviate electric field concentration and suppress an increase in capacitance, similar to the first embodiment. Furthermore, since UV irradiation is performed while pressing the mold 230 against the uncured UV-curable resin film 201A, it is easy to form the opening 210 with high precision.

[0064] The semiconductor device 200 including a GaN-HEMT with a finger gate structure can also be manufactured by exposing the photoresist film 101 three times as a modification of the first embodiment. That is, the semiconductor device 200 can be manufactured by adding one exposure to form side surfaces 214 with different inclination directions.

[0065] In contrast, in the second embodiment, the mold 230 is used, so that the opening 210 can be formed by a single UV irradiation. Therefore, according to the second embodiment, a GaN-HEMT having a finger gate structure can be easily formed with a small number of steps. The method of forming the opening 210 as in the second embodiment is sometimes called a nanoimprint method.

[0066] Next, we will explain an example of a method for forming the mold 230. Figures 28 to 34 are cross-sectional views showing a first example of a method for forming the mold 230. In this example, the mold 230 is made of quartz.

[0067] First, as shown in FIG. 28, a flat quartz plate 251 is prepared, and a positive photoresist film 252 is formed on one surface 251A of the quartz plate 251.

[0068] Next, as shown in FIG. 29, a photosensitive region 261 is formed in the photoresist film 252 by exposure. The exposure is performed, for example, by a reduction exposure method. During exposure, light 270 is irradiated from a direction tilted from the direction perpendicular to the surface 251A of the quartz plate 251. The photosensitive region 261 has side surfaces 271 and 272 that are parallel to each other in a cross-sectional view. As described above, there are two types of inclination directions for the side surface 234 of the protrusion 236. The side surface 271 is formed to correspond to the side surface 234 having one of the inclination directions. The side surface 272 is formed at a position closer to the side surface 271 than the side surface 234 having the other inclination direction.

[0069] Next, as shown in FIG. 30 , a photosensitive region 262 that partially overlaps the photosensitive region 261 is formed in the photoresist film 252 by exposure. The exposure is performed, for example, by a reduction exposure method. During exposure, light 280 is irradiated from a direction that is perpendicular to the surface 251A of the quartz plate 251 and tilted opposite to the light 270. The photosensitive region 262 is formed so that the side surface 271 remains and the side surface 272 is incorporated into the photosensitive region 262. The photosensitive region 262 has a side surface 281 that is located outside the position of the side surface 272 outside the photosensitive region 261. The side surface 281 is formed to correspond to the other inclined side surface 234.

[0070] The photosensitive region 260 is formed by the photosensitive regions 261 and 262, which partially overlap each other. The photosensitive region 260 has side surfaces 271 and 281. The photosensitive region 260 has a cross-sectional shape of an isosceles trapezoid.

[0071] Next, as shown in FIG. 31 , a photosensitive region 265 is formed by exposure in a portion between adjacent photosensitive regions 260 of the photoresist film 252. The exposure is performed, for example, by a reduction exposure method. During exposure, light 290 is irradiated from a direction perpendicular to the surface 251A of the quartz plate 251. The photosensitive region 265 has side surfaces 291 and 292 that are parallel to each other in a cross-sectional view. The side surfaces 291 and 292 are perpendicular to the surface 251A. The side surfaces 291 and 292 are formed to correspond to the side surfaces 232 of the protrusions 236. For example, the side surface 291 is formed so as to leave an unexposed region of the photoresist film 252 between the side surface 271 and the side surface 292, and the side surface 281 is formed so as to leave an unexposed region of the photoresist film 252 between the side surface 271 and the side surface 292. The photosensitive region 265 has a rectangular cross-sectional shape.

[0072] Next, as shown in FIG. 32 , the photoresist film 252 is developed to remove the exposed regions 260 and 265. As a result, an opening 243 having side surfaces 241 and 242 and an opening 248 having side surfaces 246 and 247 are formed in the photoresist film 252. The side surface 241 is formed at the position of the side surface 281 of the exposed region 260, and the side surface 242 is formed at the position of the side surface 271 of the exposed region 260. The side surface 246 is formed at the position of the side surface 291 of the exposed region 265, and the side surface 247 is formed at the position of the side surface 292 of the exposed region 265. For example, the angle between the surface 251A and the side surfaces 241 and 242 may be, for example, 45° or more and 60° or less, and the angle between the surface 251A and the side surfaces 246 and 247 may be, for example, 85° or more and 90° or less. For example, an alkaline developer is used to develop the photoresist film 252.

[0073] 33, the quartz plate 251 is etched through the openings 243 and 248 to form a base 235 and a plurality of protrusions 236 on the quartz plate 251. The protrusions 236 have a side surface 232 that is continuous with the side surface 246 or 247, and a side surface 234 that is continuous with the side surface 241 or 242. This etching is, for example, RIE.

[0074] 34, the photoresist film 252 is removed. The photoresist film 252 can be removed using, for example, an organic solvent or oxygen plasma, etc. In this way, the quartz mold 230 can be formed.

[0075] Next, we will explain another example of a method for forming the mold 230. Figures 35 to 39 are cross-sectional views showing a second example of a method for forming the mold 230. In this example, the mold 230 is formed from resin.

[0076] First, as shown in FIG. 35, a master mold 330 made of quartz is formed. The master mold 330 has a flat base 335 and a plurality of protrusions 336 protruding from the base 335. The protrusions 336 protrude from one surface 335A of the base 335. The base 335 and the protrusions 336 have the same shapes as the base 235 and the protrusions 236, respectively. The protrusions 336 have a surface 333 parallel to the surface 335A, a side surface 332, and a side surface 334. The master mold 330 has a shape corresponding to a repeating unit in the mold 230 that includes two protrusions 236 adjacent to each other in the second direction.

[0077] Next, as shown in Fig. 36, a transfer member 340 is formed on the master mold 330. The transfer member 340 is, for example, a nickel (Ni) film. The transfer member 340 can be formed by nickel electroforming. The transfer member 340 has a surface 341 formed thereon that has projections and depressions corresponding to the protrusions 336 of the master mold 330.

[0078] Next, as shown in FIG. 37, the transfer member 340 is released from the master mold 330.

[0079] Next, as shown in Figure 38, an uncured resin film 237 is prepared, and a transfer member 340 is pressed against one surface 237A of the resin film 237. As a result, concaves and convexes that imitate the surface 341 of the transfer member 340 are formed on the surface 237A. In other words, the concaves and convexes associated with the protrusions 336 of the master mold 330 are transferred to the surface 237A. The resin film 237 is, for example, a thermoplastic resin film or a UV-curable resin film. The resin film 237 may contain, for example, a fluororesin.

[0080] 39, the transfer of the concaves and convexes associated with the protrusions 336 of the master mold 330 using a transfer member 340 is repeated. Then, after all of the convex portions that will become the protrusions 236 have been formed, the resin film 237 is hardened. If the resin film 237 is a thermoplastic resin film, the resin film 237 is heated, and if the resin film 237 is a UV-curable resin film, UV irradiation is performed. In this manner, the resin mold 230 can be formed.

[0081] Although the embodiments have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims. [Explanation of symbols]

[0082] 10: Circuit board 10A:Top surface 12: Buffer layer 14: Electron transit layer 16:Electron supply layer 18: Cap layer 21: First insulating film 22: Second insulating film 23: Third insulating film 31, 33, 41, 43: Opening 32: Source electrode 42: Drain electrode 50: First gate opening 52, 54, 62, 64: Side 60: Second gate opening 71: Gate electrode 72: Two-dimensional electron gas 80: Resist mask 81, 82: Opening 100, 200: Semiconductor device 101, 252: Photoresist film 110:Aperture 112, 114: Side 120, 121, 122, 260, 261, 262, 265: Photosensitive area 150, 160, 270, 280, 290: light 151, 152, 161, 271, 272, 281, 291, 292: Side 170:Ultraviolet rays 201:UV curable resin film 201A: Uncured film 210:Aperture 212, 214: Side 230: Mold 232, 234, 332, 334: Side 233, 235A, 333, 335A: Surface 235, 335: Base 236, 336:Protrusion 237: Resin film 237A: Surface 241, 242: Side 243, 248: Aperture 246, 247: Side 251:Quartz plate 251A: Surface 330: Master Mold 340: Transfer member 341: Face

Claims

1. forming a semiconductor layer over a substrate; forming a source electrode and a drain electrode on the semiconductor layer; forming a first insulating film covering a surface of the semiconductor layer between the source electrode and the drain electrode; forming a second insulating film on the first insulating film; forming a mask on the second insulating film, the mask having an opening between the source electrode and the drain electrode in a plan view from a direction perpendicular to the upper surface of the substrate; forming a first gate opening in the first insulating film and a second gate opening in the second insulating film by etching the first insulating film and the second insulating film through the openings; forming a gate electrode on the first insulating film and the second insulating film, the gate electrode being in Schottky contact with the semiconductor layer through the first gate opening and the second gate opening; and The opening is A first aspect; a second side surface closer to the drain electrode than the first side surface; and an angle formed between the first side surface and the top surface is larger than an angle formed between the second side surface and the top surface; In the etching, the etching rate of the second insulating film is higher than the etching rate of the first insulating film.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein a distance between the first gate opening and the second gate opening on the drain electrode side of the first gate opening is longer than a distance between the first gate opening and the second gate opening on the source electrode side of the first gate opening.

3. an angle between the first side surface and the top surface is equal to or greater than 85° and equal to or less than 90°; 3. The method for manufacturing a semiconductor device according to claim 1, wherein the angle formed between the second side surface and the top surface is 45 degrees or more and 60 degrees or less.

4. the first insulating film is a first silicon nitride film having a first refractive index; 4. The method for manufacturing a semiconductor device according to claim 1, wherein the second insulating film is a second silicon nitride film having a second refractive index lower than the first refractive index.

5. The step of forming the mask includes: forming a positive photosensitive film on the second insulating film; forming a photosensitive region in a portion of the photosensitive film where the opening is to be formed by exposing the photosensitive film; developing the photosensitive film to remove the photosensitive areas; and 5. The method for manufacturing a semiconductor device according to claim 1, wherein the exposure of the photosensitive film includes exposure from a direction parallel to the first side surface and exposure from a direction parallel to the second side surface.

6. The step of forming the mask includes: forming a positive photosensitive film on the second insulating film; forming a photosensitive region in a portion of the photosensitive film where the opening is to be formed by exposing the photosensitive film once with a telecentric optical system shifted; developing the photosensitive film to remove the photosensitive areas; The method for manufacturing a semiconductor device according to any one of claims 1 to 4, comprising:

7. The step of forming the mask includes: planarizing an upper surface of the second insulating film; forming an uncured resin film on the planarized second insulating film; forming a cured film by curing the uncured film while pressing a mold against the uncured film; removing the mold from the cured film; and The mold is A base and a protrusion protruding from the base and having a shape corresponding to the opening; The method for manufacturing a semiconductor device according to any one of claims 1 to 4, comprising:

8. the resin is an ultraviolet curable resin, The method for manufacturing a semiconductor device according to claim 7 , wherein the step of forming the cured film includes a step of irradiating the uncured film with ultraviolet light through the mold.

9. the source electrode and the drain electrode extend in a first direction parallel to the top surface, and are alternately formed in a plurality of rows in a second direction parallel to the top surface and perpendicular to the first direction; 9. The method for manufacturing a semiconductor device according to claim 7, wherein the gate electrode is formed between the source electrode and the drain electrode adjacent to each other in the second direction.

10. 10. The method for manufacturing a semiconductor device according to claim 1, wherein the etching rate of the second insulating film is four times or more the etching rate of the first insulating film.

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