Multilayer capacitor and its mounting substrate

Abstract

To provide a laminated capacitor capable of reducing an ESR while preventing cracks, and a mounting substrate for the same.SOLUTION: A laminated capacitor includes: a capacitor main body that includes a plurality of dielectric layers and a plurality of internal electrodes alternately arranged between the dielectric layers; and an external electrode arranged on the capacitor main body so as to be coupled with the internal electrodes. At least one intermetallic compound layer is formed at portions where the plurality of internal electrodes and the external electrode are coupled. A percentage of the intermetallic compound layers formed is equal to or more than 55% and less than 100% of the total number of the internal electrodes. Also provided is a mounting substrate for the laminated capacitor.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a multilayer capacitor and a mounting substrate thereof. [Background technology]

[0002] Multi-layer ceramic capacitors (MLCCs) are passive components that control electrical signals in circuits.

[0003] Such a multilayer capacitor has the advantages of being small in size, yet ensuring high capacitance, and being easy to mount.

[0004] Recently, as demand expands not only in the IT sector but also in industry and electrical equipment, there is a growing need to develop products with stable electrical and mechanical properties and high reliability.

[0005] Cracks may occur in the multilayer capacitor due to temperature changes, deformation of the substrate, and moisture resistance factors after mounting, and such cracks may cause product defects.

[0006] As a method for ensuring high reliability of such a multilayer capacitor, a technique of applying a conductive resin layer to the external electrodes has been disclosed to absorb tensile stress generated in a mechanical or thermal environment and prevent cracks caused by the stress.

[0007] The conductive resin layer serves to electrically and mechanically bond the sintered electrode layer and the plating layer of the external electrode of the multilayer capacitor, and also serves to protect the multilayer capacitor from mechanical and thermal stresses due to process temperatures and bending impacts of the board during mounting on the circuit board.

[0008] However, to fulfill this role, the conductive resin layer must have low resistance, excellent adhesion between the electrode layer and the plating layer, and be able to prevent peeling of the external electrodes, which can occur during the manufacturing process.

[0009] However, conventional conductive resin layers have high resistance, and have the problem of having a higher ESR (equivalent series resistance) than products without a conductive resin layer. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Korean Patent Publication No. 2011-0072398 [Patent Document 2] Korean Patent Publication No. 2016-0110123 Summary of the Invention [Problem to be solved by the invention]

[0011] An object of the present invention is to provide a multilayer capacitor and a mounting substrate thereof that can reduce ESR while preventing cracks. [Means for solving the problem]

[0012] One aspect of the present invention provides a multilayer capacitor including: a capacitor body including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged with the dielectric layers sandwiched therebetween; and external electrodes arranged on the capacitor body to be connected to the internal electrodes, wherein at least one intermetallic compound layer is formed at a portion where the plurality of internal electrodes and the external electrode are connected, and the proportion of the intermetallic compound layer formed is 55% or more but less than 100% of the total number of the internal electrodes.

[0013] In an embodiment of the present invention, the ratio of the intermetallic compound layer formed may be 55 to 99% of the total number of the internal electrodes.

[0014] In one embodiment of the present invention, the ratio of the average thickness of the intermetallic compound layer to the average thickness of the internal electrodes may be 50% or more.

[0015] In one embodiment of the present invention, the capacitor body may include first and second surfaces facing each other in a first direction, third and fourth surfaces facing each other in a second direction perpendicular to the first direction, and fifth and sixth surfaces facing each other in a third direction perpendicular to the first and second directions, and a plurality of grooves may be formed between the dielectric layers arranged in the first direction on the third and fourth surfaces, and the at least one intermetallic compound layer may be disposed in the grooves.

[0016] In one embodiment of the present invention, the average depth of the portion where the external electrode diffuses into the internal electrode at the connection portion between the internal electrode and the external electrode may be 30 μm or more.

[0017] In one embodiment of the present invention, the grooves may have an average depth of 30 μm or more.

[0018] In one embodiment of the present invention, the external electrode may include: an electrode layer disposed on the capacitor body and in contact with the intermetallic compound layer; and a conductive resin layer disposed on the electrode layer and including a plurality of metal particles, a conductive connector surrounding the plurality of metal particles and in contact with the electrode layer, and a base resin.

[0019] In one embodiment of the present invention, the internal electrodes may include nickel, and the intermetallic compound layers may include nickel-copper (Ni-Cu).

[0020] In one embodiment of the present invention, the metal particles of the conductive resin layer may include at least one of copper, nickel, silver, silver-coated copper, and tin-coated copper.

[0021] In one embodiment of the present invention, the metal particles of the conductive resin layer may be in any one of a spherical shape, a flake shape, and a mixture of a spherical shape and a flake shape.

[0022] In an embodiment of the present invention, the external electrodes may further include a plating layer disposed on the conductive resin layer.

[0023] In an embodiment of the present invention, the plating layer may include a nickel plating layer and a tin plating layer sequentially stacked on the conductive resin layer.

[0024] Another aspect of the present invention provides a multilayer capacitor mounting substrate including: a substrate having a plurality of electrode pads on one surface; and a multilayer capacitor mounted on the substrate, the multilayer capacitor having external electrodes connected to the electrode pads. [Effects of the Invention]

[0025] According to the embodiment of the present invention, it is possible to prevent cracks in the multilayer capacitor and reduce the ESR. [Brief explanation of the drawings]

[0026] [Figure 1] 1 is a perspective view schematically illustrating a multilayer capacitor according to an embodiment of the present invention; [Figure 2] 2(a) and 2(b) are plan views showing the first and second internal electrodes of FIG. 1. [Figure 3] FIG. 2 is a cross-sectional view taken along line II' in FIG. [Figure 4] 10 is a SEM photograph for explaining the ratio of the thickness of the connection portion between the internal electrode and the external electrode to the thickness of the internal electrode. [Figure 5] 1 is a perspective view schematically showing a mounting structure of a multilayer capacitor and a substrate according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0027] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into several other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, the embodiments of the present invention are provided to more completely explain the present invention to those having average knowledge in the art. Therefore, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0028] Also, throughout the specification, unless specifically stated to the contrary, "comprising" an element means that it can further include other elements, rather than excluding other elements.

[0029] Hereinafter, to clearly explain the embodiments of the present invention, the directions of the capacitor body will be defined, and X, Y, and Z shown in the drawings respectively indicate the length direction, width direction, and thickness direction of the capacitor body.

[0030] In this embodiment, the Z direction can be used as the same concept as the stacking direction in which the dielectric layers are stacked.

[0031] FIG. 1 is a perspective view schematically showing a multilayer capacitor according to one embodiment of the present invention, FIGS. 2(a) and 2(b) are plan views showing first and second internal electrodes of FIG. 1, and FIG. 3 is a cross-sectional view taken along line II' of FIG.

[0032] 1 to 3, a multilayer capacitor 100 according to this embodiment includes a capacitor body 110 and first and second external electrodes 130 and 140. As shown in FIG.

[0033] The capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of first internal electrodes 121 and second internal electrodes 122 that are alternately arranged in the Z direction with the dielectric layers 111 sandwiched therebetween.

[0034] The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 in the Z direction and then firing them, and the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can be so integrated that they are difficult to see without using a scanning electron microscope (SEM).

[0035] In this case, the capacitor body 110 may have an approximately hexahedral shape, but the present invention is not limited thereto. Furthermore, the shape and dimensions of the capacitor body 110 and the number of laminated dielectric layers 111 are not limited to those shown in the drawings of this embodiment.

[0036] In this embodiment, for ease of explanation, the two surfaces of the capacitor body 110 facing each other in the Z direction are defined as the first and second surfaces 1 and 2, and are connected to the first and second surfaces 1 and 2; the two surfaces facing each other in the X direction are defined as the third and fourth surfaces 3 and 4; and the two surfaces connected to the first and second surfaces 1 and 2 and the third and fourth surfaces 3 and 4 and facing each other in the Y direction are defined as the fifth and sixth surfaces 5 and 6.

[0037] In this embodiment, the mounting surface of the multilayer capacitor 100 may be the first surface 1 of the capacitor body 110.

[0038] The dielectric layer 111 may include a ceramic material with a high dielectric constant, such as a barium titanate (BaTiO3)-based or strontium titanate (SrTiO3)-based ceramic powder, but the present invention is not limited thereto as long as sufficient capacitance can be obtained.

[0039] In addition to the ceramic powder, the dielectric layer 111 may further contain a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like.

[0040] The ceramic additive may be, for example, a transition metal oxide or transition metal carbide, a rare earth element, magnesium (Mg), or aluminum (Al).

[0041] The capacitor body 110 may include an active region that contributes to forming the capacitance of the capacitor, and upper and lower covers 112 and 113 that are formed on the upper and lower surfaces of the active region in the Z direction as upper and lower margins.

[0042] The upper and lower covers 112 and 113 may have the same material and structure as the dielectric layer 111, except that they do not include internal electrodes.

[0043] The upper and lower covers 112 and 113 may be formed by stacking a single dielectric layer or two or more dielectric layers in the Z direction on the upper and lower surfaces of the active region, respectively, and may essentially serve to prevent damage to the first and second internal electrodes 121 and 122 due to physical or chemical stress.

[0044] The first and second internal electrodes 121, 122 are electrodes to which different polarities are applied, and are alternately arranged along the Z direction with the dielectric layer 111 sandwiched therebetween, and one end can be exposed through the third and fourth surfaces 3, 4 of the capacitor body 110, respectively.

[0045] At this time, the first and second internal electrodes 121 and 122 can be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

[0046] In this manner, the ends of the first and second internal electrodes 121, 122 alternately exposed through the third and fourth surfaces 3, 4 of the capacitor body 110 can be electrically connected to the first and second external electrodes 130, 140, respectively, which are disposed on the third and fourth surfaces 3, 4 of the capacitor body 110, as described below.

[0047] With the above configuration, when a predetermined voltage is applied to the first and second external electrodes 130 and 140, charges are accumulated between the first and second internal electrodes 121 and 122.

[0048] At this time, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area of ​​the first and second internal electrodes 121 and 122 that overlap each other along the Z direction in the active region of the capacitor body 110.

[0049] Furthermore, the material for forming the first and second internal electrodes 121, 122 is not particularly limited, and may be formed using a conductive paste made of one or more of precious metal materials such as platinum (Pt), palladium (Pd), and palladium-silver (Pd-Ag) alloy, nickel (Ni), and copper (Cu).

[0050] In this case, the conductive paste may be printed by a screen printing method or a gravure printing method, but the present invention is not limited thereto.

[0051] The first and second external electrodes 130 and 140 are provided with voltages of different polarities, are disposed at both ends of the capacitor body 110 in the X direction, and are electrically connected to the exposed portions of the first and second internal electrodes 121 and 122, respectively.

[0052] The first external electrode 130 may include a first connection portion and a first band portion.

[0053] The first connection portion is formed on the third surface 3 of the capacitor body 110 and is connected to the exposed portion of the first internal electrode 121, and the first band portion is extended from the first connection portion to a portion of the first surface 1 of the capacitor body 110.

[0054] At this time, the first band portion may be further extended to a part of the fifth and sixth surfaces 5 and 6 of the capacitor body 110 and a part of the second surface 2 in order to improve the bonding strength.

[0055] The second external electrode 140 may include a second connection portion and a second band portion.

[0056] The second connection portion is formed on the fourth surface 4 of the capacitor body 110 and is connected to the exposed portion of the second internal electrode 122, and the second band portion is extended from the second connection portion to a portion of the first surface 1 of the capacitor body 110.

[0057] At this time, the second band portion may be further extended to a part of the fifth and sixth surfaces 5 and 6 of the capacitor body 110 and a part of the second surface 2 in order to improve the fixing strength.

[0058] A first intermetallic compound layer 135 is formed where the first internal electrode 121 and the first external electrode 130 are connected, and a second intermetallic compound layer 145 is formed where the second internal electrode 122 and the second external electrode 140 are connected.

[0059] In addition, the first internal electrode 121 may contain nickel, and in this case, the first intermetallic compound layer 135 may contain nickel-copper (Ni-Cu).

[0060] The second internal electrode 122 may include nickel, and in this case, the second intermetallic compound layer 145 may include nickel-copper (Ni-Cu).

[0061] The ratio of the first intermetallic compound layers 135 formed is 55% or more and less than 100%, more preferably 55 to 99%, of the total number of first internal electrodes 121. The ratio of the second intermetallic compound layers 145 formed is 55% or more and less than 100%, more preferably 55 to 99%, of the total number of second internal electrodes 122.

[0062] In addition, the capacitor body 110 may have a plurality of first and second grooves formed between the dielectric layers 111 arranged in the Z direction on the third and fourth surfaces 3 and 4, respectively, and first and second intermetallic compound layers 135 and 145 may be arranged in the first and second grooves, respectively.

[0063] Furthermore, at the connection portion between the first internal electrode 121 and the first external electrode 130, the depth of the portion where the first external electrode 130 diffuses into the first internal electrode 121 may be 30 μm or more, and at the connection portion between the second internal electrode 122 and the second external electrode 140, the depth of the portion where the second external electrode diffuses into the second internal electrode may be 30 μm or more.

[0064] That is, the depth of each of the first and second groove portions in the X direction may be 30 μm or more, which means that the length of each of the first and second intermetallic compound layers 135 and 145 in the X direction is 30 μm or more.

[0065] Furthermore, if the depth to which Cu of the external electrode is diffused into Ni of the internal electrode is 30 μm or more at the end face of the portion where the internal electrode and external electrode are connected, the ESR of the multilayer capacitor can be stably ensured.

[0066] Here, the "depth" of the first groove portion and the "depth" of the second groove portion can refer to the average depth of the plurality of first groove portions and the average depth of the plurality of second groove portions, respectively.

[0067] The first external electrode 130 includes a first electrode layer 131 disposed on the first conductive resin layer 132 and the capacitor body 110 and connected to the first intermetallic compound layer 135 .

[0068] The first conductive resin layer 132 may include a plurality of metal particles, a conductive connector surrounding the plurality of metal particles, and a base resin.

[0069] The metal particles can be at least one of copper, nickel, silver, silver-coated copper, and tin-coated copper.

[0070] The metal particles may be in any one of a spherical shape, a flake shape, and a mixture of a spherical shape and a flake shape.

[0071] The first conductive resin layer 132 is disposed on the first electrode layer 131 , and the first electrode layer 131 contacts the conductive connecting portion of the first conductive resin layer 132 .

[0072] In addition, the first external electrode 130 may further include a first plating layer disposed on the first conductive resin layer 132.

[0073] The first plating layer may include a first nickel plating layer 133 and a first tin plating layer 134 that are sequentially stacked on the first conductive resin layer 132 .

[0074] The second external electrode 140 is disposed on the second conductive resin layer 142 and the capacitor body 110 and includes a second electrode layer 141 connected to the second intermetallic compound layer 145 .

[0075] The second conductive resin layer 142 may include a plurality of metal particles, a conductive connector surrounding the plurality of metal particles, and a base resin.

[0076] The metal particles can be at least one of copper, nickel, silver, silver-coated copper, and tin-coated copper.

[0077] The metal particles may be in any one of a spherical shape, a flake shape, and a mixture of a spherical shape and a flake shape.

[0078] The second conductive resin layer 142 is disposed on the second electrode layer 141, and the second electrode layer 141 contacts the conductive connecting portion of the second conductive resin layer 142.

[0079] In addition, the second external electrode 140 may further include a second plating layer disposed on the second conductive resin layer 142.

[0080] The second plating layer may include a second nickel plating layer 143 and a second tin plating layer 144 that are sequentially stacked on the second conductive resin layer 142 .

[0081] A typical multilayer capacitor consists of an internal electrode containing nickel and an external electrode containing copper, and a Ni-Cu IMC (Intermetallic Compound) is formed at the connection between the internal and external electrodes during electrode firing, achieving the electrical characteristics of the multilayer capacitor, such as capacitance, DF, and ESR.

[0082] At this time, the capacitance, DF, and ESR of the multilayer capacitor may change depending on the connectivity between the external and internal electrodes.

[0083] In particular, as the size and capacitance of a multilayer capacitor become smaller, the area of ​​the electrodes becomes thinner and the number of layers of the internal electrodes becomes fewer, which may further reduce the contact between the internal electrodes and the external electrodes.

[0084] In addition, in the case of stacked capacitors for electrical equipment, a copper electrode is applied to the primary electrode and an epoxy-copper electrode is applied to the secondary electrode to ensure bending strength, but such secondary electrodes have low conductivity, which can further weaken the connectivity between the internal and external electrodes.

[0085] In one embodiment of the present invention, the degree of connectivity between the internal and external electrodes is quantified for small, low-capacity products with low electrode connectivity, particularly for small chip products for electrical equipment with a size of 1.0 mm x 0.5 mm or less (length in X direction x width in Y direction), and the predictive effectiveness of ESR, an electrical characteristic, is described based on the quantified degree of connectivity between the internal and external electrodes.

[0086] In the following experiment, the oxidizing and reducing atmospheres were adjusted by changing the wetter conditions (water supply) of the electrode baking furnace, and then the degree of IMC formation in the stacked capacitor was correlated with the ESR to determine the desirable values ​​for IMC formation that are effective for predicting ESR.

[0087] [Table 1]

[0088] In this test, the number of Cu-Ni IMCs formed is counted and measured by counting three or more on small-sized (length in the X direction x width in the Y direction of 1.0 mm or less) samples according to the conditions in the SEM image of the center of the x1500 cross section. At this time, the ESR is measured using a measuring instrument for each capacitance range, according to the frequency as shown in Table 1.

[0089] [Table 2]

[0090] Referring to Table 2, it can be seen that the ESR of the multilayer capacitor can be stably secured in #3 to #11, where the ratio of the number of connections between the internal electrodes and the external electrodes to the number of internal electrodes, i.e., the ratio of the intermetallic compound layer formation (the ratio of the total intermetallic compound layer to the total internal electrodes) is 55% or more at 3 points of SEM x1500 cross section of the part where the internal electrodes and the external electrodes are connected.

[0091] [Table 3]

[0092] Referring to Table 3 and FIG. 4, it can be seen that the ESR of the multilayer capacitor can be stably secured when the average thickness of the connected portion between the internal and external electrodes is 50% or more in the cross section of the portion where the internal and external electrodes are connected, as measured at 3 points with a SEM x3000.

[0093] As used herein, the term "thickness" refers to a value measured in a direction perpendicular to the surface of a corresponding component, and "average thickness" may refer to an average value of thicknesses measured at a predetermined number of points.

[0094] For example, the Y-axis in Fig. 3 passes through the center of the stacked capacitor, but the measurement of the average thickness is not limited to this example, and an ordinary engineer can select the number of measurement points, the interval between measurement points, etc. as needed.

[0095] For example, when measuring the thickness of an internal electrode, three, five, or ten measurement points can be set.

[0096] Furthermore, at each measurement point, the thickness can be measured using an image from a scanning electron microscope (SEM), but the measurement method is not limited to this.

[0097] FIG. 5 is a perspective view schematically showing a mounting structure of a multilayer capacitor and a substrate according to one embodiment of the present invention.

[0098] Referring to FIG. 5, the mounting substrate of the multilayer capacitor according to this embodiment includes a substrate 210 on which the multilayer capacitor 100 is mounted, and first and second electrode pads 221 and 222 arranged spaced apart from each other on the upper surface of the substrate 210.

[0099] The multilayer capacitor 100 is mounted on the substrate 210 with the first and second external electrodes 130 and 140 connected to the first and second electrode pads 221 and 222 in a state where they are in contact with each other.

[0100] At this time, the first external electrode 130 can be joined to the first electrode pad 221 by solder 231, thereby electrically and physically connected, and the second external electrode 140 can be joined to the second electrode pad 222 by solder 232, thereby electrically and physically connected.

[0101] Here, the multilayer capacitor 100 is the multilayer capacitor according to the embodiment of the present invention described above, and detailed description thereof will be omitted below to avoid duplication.

[0102] Although the embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that the scope of the present invention is not limited thereto, and that various modifications and variations are possible within the scope that does not deviate from the technical idea of ​​the present invention described in the claims. [Explanation of symbols]

[0103] 100 Multilayer Capacitor 110 Capacitor body 111 Dielectric layer 112, 113 Upper and lower covers 121, 122 First and second internal electrodes 130, 140 First and second external electrodes 131 1st electrode layer 141 Second electrode layer 132 First conductive resin layer 142 Second conductive resin layer 133 First nickel plating layer 143 Second nickel plating layer 134 First tin plating layer 144 Second tin plating layer 135, 145 First and second intermetallic compound layers 210 Substrate 221, 222 First and second electrode pads 231, 232 Solder

Claims

1. a capacitor body including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged with the plurality of dielectric layers sandwiched therebetween; external electrodes disposed on the capacitor body to be connected to the plurality of internal electrodes; At least one intermetallic compound layer is formed at a portion where the plurality of internal electrodes and the external electrodes are connected, The ratio of the intermetallic compound layer formed is 55% or more and less than 100% of the total number of the plurality of internal electrodes, A multilayer capacitor, wherein the ratio of the average thickness of the intermetallic compound layer to the average thickness of the plurality of internal electrodes is 50% or more.

2. 2. The multilayer capacitor of claim 1, wherein the intermetallic compound layer is formed at a ratio of 55 to 99% of the total number of the internal electrodes.

3. the capacitor body includes first and second surfaces facing each other in a first direction, third and fourth surfaces facing each other in a second direction perpendicular to the first direction, and fifth and sixth surfaces facing each other in a third direction perpendicular to the first and second directions, a plurality of grooves are formed between the dielectric layers arranged in the first direction on the third and fourth surfaces; The stacked capacitor of claim 1 , wherein the at least one intermetallic compound layer is disposed within the plurality of trenches.

4. 4. The multilayer capacitor according to claim 3, wherein the average depth of the plurality of grooves is 30 [mu]m or more.

5. 2. The multilayer capacitor according to claim 1, wherein the average depth of the portion where the external electrodes diffuse into the plurality of internal electrodes at the connection portion between the plurality of internal electrodes and the external electrodes is 30 [mu]m or more.

6. The external electrode is an electrode layer disposed on the capacitor body and in contact with the intermetallic compound layer; 2. The multilayer capacitor according to claim 1, further comprising: a conductive resin layer disposed on the electrode layer, the conductive resin layer including a plurality of metal particles, a conductive connector surrounding the plurality of metal particles and in contact with the electrode layer, and a base resin.

7. 7. The multilayer capacitor according to claim 6, wherein the metal particles of the conductive resin layer include at least one of copper, nickel, silver, silver-coated copper, and tin-coated copper.

8. 7. The multilayer capacitor according to claim 6, wherein the metal particles of the conductive resin layer are in any one of a spherical shape, a flake shape, and a mixed shape of a spherical shape and a flake shape.

9. The multilayer capacitor according to claim 6 , wherein the external electrodes further include a plating layer disposed on the conductive resin layer.

10. The multilayer capacitor according to claim 9 , wherein the plating layer includes a nickel plating layer and a tin plating layer that are sequentially stacked on the conductive resin layer.

11. 2. The multilayer capacitor according to claim 1, wherein the internal electrodes include nickel, and the intermetallic compound layer includes nickel-copper (Ni--Cu).

12. the external electrode includes an electrode layer disposed on the capacitor body and in contact with the intermetallic compound layer; 2. The multilayer capacitor according to claim 1, wherein the electrode layer includes copper and the intermetallic compound layer includes nickel-copper (Ni--Cu).

13. a substrate having a plurality of electrode pads on one surface; 13. A mounting substrate for a multilayer capacitor, comprising: the multilayer capacitor according to claim 1, which is mounted on the substrate and has external electrodes connected to the plurality of electrode pads.

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