Apparatus and method for providing multiple waveform signals during plasma processing - Patents.com

Abstract

SUMMARY OF THE DISCLOSURE Embodiments of the present disclosure generally relate to systems used in semiconductor device manufacturing processes. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of RF bias voltage signals and pulsed voltage waveforms to one or more electrodes within a plasma processing chamber. Embodiments of the present disclosure include methods and apparatus for synchronizing a pulsed radio frequency (RF) waveform to a pulsed voltage (PV) waveform such that the pulsed RF waveform is on during a first phase of the PV waveform and off during a second phase. The first phase of the PV waveform includes a sheath collapse phase. The second phase of the PV waveform includes an ion current phase.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to systems and methods used in semiconductor device manufacturing. More specifically, embodiments provided herein generally include systems and methods for synchronizing a radio frequency (RF) pulse waveform with a pulse voltage (PV) waveform on one or more electrodes within a processing chamber. [Background technology]

[0002] Reliable fabrication of high-aspect ratio features is one of the key technological challenges for next-generation semiconductor devices. One method for forming high-aspect ratio features uses a plasma-assisted etching process (e.g., a reactive ion etching (RIE) plasma process) to form high-aspect ratio openings in a material layer (e.g., a dielectric layer) of a substrate. In a typical RIE plasma process, a plasma is formed in a processing chamber, and ions from the plasma are accelerated toward the surface of the substrate to form openings in a material layer disposed below a mask layer formed on the surface of the substrate.

[0003] A typical reactive ion etching (RIE) plasma processing chamber includes a radio frequency (RF) bias generator that supplies an RF voltage to a powered electrode. In a capacitively coupled gas discharge, the plasma is generated using a radio frequency (RF) generator connected to a powered electrode located inside an electrostatic chuck (ESC) assembly or another part of the processing chamber. Typically, an RF matching network ("RF match") adjusts the RF waveform supplied by the RF generator to deliver RF power to an apparent 50 Ω load, minimizing reflected power and maximizing power delivery efficiency. If the load impedance is not properly matched to the impedance of the source (e.g., RF generator), a portion of the RF waveform supplied in the forward direction may be reflected back in the opposite direction along the same transmission line.

[0004] Many plasma processes also utilize DC voltage pulsing to control the plasma sheath disposed above the substrate being processed. During operation, the DC voltage pulsing causes the generated plasma sheath to switch between a state including a thick plasma sheath and a state without a plasma sheath. Typically, DC pulsing techniques are configured to supply voltage pulses at frequencies greater than 50 kHz (e.g., greater than 400 kHz). The switching of the plasma sheath by the supplied DC pulse voltage waveform causes the plasma load to have different impedance values ​​over time. It has been found that the interaction between the RF waveform and the DC pulse voltage waveform simultaneously supplied during plasma processing can result in different plasma processing results because the RF matching portion of the RF power supply system cannot adjust the RF match point to account for the rapidly changing plasma load impedance value over time. Conventional impedance matching components and matching processes cannot track rapid changes in the magnitude of the plasma load impedance, resulting in undesirable match points and fluctuations in the amount of RF power actually delivered to the plasma load, typically due to 1) intermodulation distortion (IMD) of the RF signal and 2) undesirable high reflected RF power found at harmonics of the driving RF frequency. Intermodulation distortion caused by the interaction between the RF pulse waveform and the DC pulse voltage waveform causes at least the amplitude of the RF signal to vary over time. The interaction or intermodulation between the RF pulse waveform and the DC pulse voltage waveform creates additional undesirable waveform components at frequencies other than just the harmonic frequencies (i.e., integer multiples) of the interacting signals, such as either the RF pulse waveform or the DC pulse waveform. The creation of IMD components in the power delivery system reduces the actual forward RF power delivered to the plasma load.Due to at least unavoidable differences in processing chamber power supply configurations and differences in power supply components, rapidly changing plasma load impedance values ​​cause undesirable differences in plasma processing results seen across a single plasma processing chamber, across similarly configured processing chambers on a single processing system, and across similarly configured plasma processing chambers in different plasma processing systems within a semiconductor manufacturing site. Furthermore, the generated IMD components are not easily accounted for in most power delivery systems due to the wide range of frequencies that may occur during plasma processing in the same or different processing chambers, thus causing unpredictable variations in the power actually delivered to the plasma load during plasma processing.

[0005] Therefore, there is a need in the art for a plasma processing device and biasing method that can address at least the above-mentioned problems. Summary of the Invention

[0006] The present disclosure generally relates to a method for plasma processing that includes applying a voltage waveform to an electrode disposed in a substrate support, the voltage waveform having a first phase and a second phase, the first phase including a sheath collapse phase and the second phase including an ion current phase. The method further includes applying a pulsed radio frequency (RF) waveform to reactive species to generate a plasma within a processing region of a processing chamber, and synchronizing the pulsed RF waveform to the voltage waveform such that the pulsed RF waveform is provided during one of the phases and not during the other phase. In one embodiment, the pulsed RF waveform is provided during the second phase and not during the first phase. In another embodiment, the pulsed RF waveform is provided during the first phase and not during the second phase.

[0007] The present disclosure generally relates to a method for plasma processing that includes applying a voltage waveform to an electrode disposed in a substrate support, the voltage waveform having a first phase and a second phase, the first phase including a sheath collapse phase and the second phase including an ion current phase. The method further includes applying a pulsed radio frequency (RF) waveform to reactive species to generate a plasma within a processing region of a processing chamber, and synchronizing the pulsed RF waveform to the voltage waveform such that the pulsed RF waveform is provided during one phase and not during other phases.

[0008] The present disclosure further includes a plasma processing system comprising: a PV waveform generator connected to a first electrode; an RF waveform generator connected to a second electrode of the plasma processing system, the RF waveform generator configured to generate a plasma within the processing region; an impedance matching circuit; and a controller having a processor configured to execute computer readable instructions that cause the system to apply a PV waveform generated by the PV waveform generator, apply an RF waveform generated by the RF waveform generator, and synchronize the PV waveform to the RF waveform.

[0009] Embodiments of the present disclosure provide a method for plasma processing, the method including applying a pulsed voltage waveform to one or more electrodes disposed within a substrate support, the voltage waveform having a first phase and a second phase; applying a pulsed radio frequency (RF) waveform to the one or more electrodes to generate a plasma in a processing region of a processing chamber; and synchronizing the pulsed RF waveform with each pulse of the pulsed voltage waveform such that the RF waveform of the pulsed radio frequency (RF) waveform is supplied only during at least a portion of the second phase of each pulse of the pulsed voltage waveform.

[0010] Embodiments of the present disclosure provide a method for plasma processing, the method including applying a pulsed voltage waveform to one or more electrodes disposed within a substrate support, the voltage waveform having a first phase and a second phase; applying a pulsed radio frequency (RF) waveform to the one or more electrodes to generate a plasma in a processing region of a processing chamber; and synchronizing the pulsed RF waveform with each pulse of the pulsed voltage waveform such that the RF waveform of the pulsed radio frequency (RF) waveform is supplied only during at least a portion of the first phase of each pulse of the pulsed voltage waveform.

[0011] An embodiment of the present disclosure provides a plasma processing system including: a pulsed voltage waveform generator connected to a first electrode; a radio frequency waveform generator connected to a second electrode, the radio frequency waveform generator configured to generate a plasma within a process volume of the plasma processing system; an impedance matching circuit connected between the radio frequency waveform generator and the second electrode; and a controller having a processor configured to execute computer-readable instructions stored within a memory that causes the system to: apply a pulsed voltage waveform to the first electrode using the pulsed voltage waveform generator, the pulsed voltage waveform including a series of voltage pulses, each voltage pulse having a first phase and a second phase; apply a pulsed radio frequency waveform to the second electrode using the radio frequency waveform generator to generate a plasma within a process volume of a processing chamber; and synchronize the pulsed RF waveform with each pulse of the pulsed voltage waveform such that the RF waveform of the pulsed radio frequency (RF) waveform is provided only during at least a portion of the second phase of each pulse of the pulsed voltage waveform.

[0012] In order that the above-described features of the present disclosure may be understood in detail, a more particular description of the present disclosure briefly summarized above will be obtained by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings illustrate only exemplary embodiments and therefore should not be considered as limiting the scope of the present disclosure, which may also admit of other equally effective embodiments. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a schematic cross-sectional view of a processing system according to one or more embodiments configured to perform methods described herein. [Figure 2] 1 illustrates two separate voltage waveforms established at a substrate positioned on a substrate support assembly of a processing chamber by supplying a pulsed voltage waveform to one or more electrodes inside the processing chamber, according to one or more embodiments. [Figure 3A] 1 is a plot of a forward RF bias voltage signal and an intermodulation distortion (IMD) signal measured along a transmission line connected to one or more electrodes of a processing chamber, according to one embodiment. [Figure 3B] 1 illustrates an RF bias voltage signal applied to a pulsed voltage waveform supplied through a transmission line connected to one or more electrodes of a processing chamber, according to one embodiment. [Figure 4] 1 is a chart illustrating the percentage of broadband reflection seen in two different conventional plasma processing chambers, according to one embodiment. [Figure 5A] 1 illustrates a pulsed RF bias voltage signal applied to an electrode in a processing chamber according to one embodiment. [Figure 5B] 5B illustrates a combination of the pulsed RF bias voltage signal shown in FIG. 5A and a pulsed voltage waveform and a pulsed RF bias voltage signal formed by applying the pulsed voltage waveform to one or more electrodes of a processing chamber, according to one embodiment. [Figure 6]FIG. 1 is a flow diagram illustrating a method for synchronizing a PV waveform and an RF bias voltage waveform in a plasma processing system, according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] For ease of understanding, where possible, the same reference numerals have been used to designate identical elements that are common to multiple figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0015] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to systems used in semiconductor device manufacturing processes. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of RF bias voltage signals and pulsed voltage waveforms to one or more electrodes within a plasma processing chamber.

[0016] FIG. 1 is a schematic cross-sectional view of a plasma processing chamber assembly 10 configured to perform one or more of the plasma processing methods described herein. In some embodiments, the plasma processing chamber assembly 10 is configured for plasma-assisted etching processes, such as reactive ion etching (RIE) plasma processing. The plasma processing chamber assembly 10 can also be used for other plasma-assisted processes, such as plasma-enhanced deposition processes (e.g., plasma-enhanced chemical vapor deposition (PECVD) processes, plasma-enhanced physical vapor deposition (PEPVD) processes, plasma-enhanced atomic layer deposition (PEALD) processes), plasma treatment processes, plasma-based ion implantation processes, or plasma doping (PLAD) processes. In one configuration, as shown in FIG. 1, the plasma processing chamber assembly 10 is configured to form a capacitively coupled plasma (CPP). However, in some embodiments, the plasma may be generated by an inductively coupled source positioned above the processing region of the plasma processing chamber assembly 10. In this configuration, a coil may be mounted on top of the ceramic lid (vacuum boundary) of the plasma processing chamber assembly 10.

[0017] The plasma processing chamber assembly 10 includes a processing chamber 100, a substrate support assembly 136, a gas supply system 182, a DC power system 183, an RF power system 189, and a system controller 126. The processing chamber 100 includes a chamber body 113 including a chamber lid 123, one or more sidewalls 122, and a chamber base 124. The chamber lid 123, the one or more sidewalls 122, and the chamber base 124 collectively define a processing space 129. The one or more sidewalls 122 and the chamber base 124 are generally sized and shaped to provide structural support for the elements of the processing chamber 100 and comprise a material (such as aluminum, an aluminum alloy, or a stainless steel alloy) configured to withstand the pressure and additional energy applied to those elements while a plasma 101 is generated within the vacuum environment maintained within the processing space 129 of the processing chamber 100 during processing. The substrate 103 is loaded into and removed from the processing space 129 through an opening (not shown) in one of the sidewalls 122. The opening is sealed with a slit valve (not shown) during plasma processing of the substrate 103. A gas supply system 182 connected to the processing space 129 of the processing chamber 100 includes a process gas source 119 and a gas inlet 128 disposed through the chamber lid 123. The gas inlet 128 is configured to supply one or more process gases from the multiple process gas sources 119 to the processing space 129.

[0018] The processing chamber 100 further includes an upper electrode (e.g., chamber lid 123) and a lower electrode (e.g., substrate support assembly 136) disposed within the processing space 129. The upper electrode and the lower electrode are positioned facing each other. As seen in FIG. 1 , in one embodiment, a radio frequency (RF) source (e.g., RF power system 189) is electrically connected to the lower electrode. The RF source is configured to provide an RF signal to ignite and maintain a plasma (e.g., plasma 101) between the upper electrode and the lower electrode. In some alternative configurations, the RF source (e.g., RF power system 189) can also be electrically connected to the upper electrode, as shown in FIG. 1 .

[0019] The substrate support assembly 136 includes a substrate support 105, a substrate support base 107, an insulator plate 111, a ground plate 112, a plurality of lift pins 186, one or more substrate potential sensing assemblies 184, and a bias electrode 104. Each of the lift pins 186 is disposed through a through-hole 185 formed in the substrate support assembly 136 and is used to facilitate movement of the substrate 103 to and from the substrate receiving surface 105A of the substrate support 105. The substrate support 105 is formed of a dielectric material. The dielectric material may include a bulk sintered ceramic material, a corrosion-resistant metal oxide (e.g., aluminum oxide (AlO), titanium oxide (TiO), yttrium oxide (YO)), a metal nitride material (e.g., aluminum nitride (AlN), titanium nitride (TiN)), a mixture thereof, or a combination thereof.

[0020] The substrate support base 107 is formed of an electrically conductive material (e.g., aluminum, an aluminum alloy, or a stainless steel alloy). The substrate support base 107 is electrically insulated from the chamber base 124 by an insulator plate 111 and a ground plate 112 interposed between the insulator plate 111 and the chamber base 124. In some embodiments, the substrate support base 107 is configured to regulate the temperature of both the substrate support 105 and the substrate 103 disposed on the substrate support 105 during substrate processing. In some embodiments, the substrate support base 107 includes one or more cooling channels (not shown) disposed therein that are fluidly connected to a coolant source (not shown), such as a refrigerant source or a substrate source having a relatively high electrical resistance. In other embodiments, the substrate support 105 includes a heater (not shown) for heating the substrate support 105 and the substrate 103 disposed on the substrate support 105.

[0021] The bias electrode 104 is embedded in the dielectric material of the substrate support 105. Typically, the bias electrode 104 is formed of one or more conductive components. The conductive components typically include a mesh, a foil, a plate, or a combination thereof. Here, the bias electrode 104 functions as a chuck pole (i.e., an electrostatic chuck electrode) used to secure (e.g., electrostatically chuck) the substrate 103 to the substrate receiving surface 105A of the substrate support 105. Generally, a parallel plate-like structure is formed by the bias electrode 104 and a layer of dielectric material disposed between the bias electrode 104 and the substrate receiving surface 105A. The dielectric material may typically have an effective capacitance CE of between about 5 nF and about 50 nF. Typically, the layer of dielectric material (e.g., aluminum nitride (AlN), aluminum oxide (Al2O3), etc.) has a thickness between about 0.03 mm and about 5 mm, such as between about 0.1 mm and about 3 mm, such as between about 0.1 mm and about 1 mm, or even between about 0.1 mm and about 0.5 mm. The bias electrode 104 is electrically connected to a clamping network to provide a chucking voltage. The clamping network includes a DC voltage supply 173 (e.g., a high-voltage DC supply) that is connected to a filter 178A of a filter assembly 178 disposed between the DC voltage supply 173 and the bias electrode 104. In one embodiment, the filter 178A is a low-pass filter configured to block RF frequencies and pulsed voltage (PV) waveform signals provided by other bias components found in the processing chamber 100 during plasma processing from reaching the DC voltage supply 173. In one configuration, the static DC voltage is between about −5000 V and about 5000 V and is supplied using an electrical conductor, such as a coaxial power supply line 160. In some embodiments, the bias electrode 104 may also bias the substrate 103 relative to the plasma 101 using one or more of the pulsed voltage biasing schemes described in more detail below.

[0022] In some configurations, the substrate support assembly 136 further includes an edge control electrode 115. The edge control electrode 115 is formed of one or more conductive components. The conductive components typically include a mesh, a foil, a plate, or a combination thereof. The edge control electrode 115 is positioned below the edge ring 114 and surrounds and / or is spaced apart from the center of the bias electrode 104. Generally, in a processing chamber 100 configured to process a circuit substrate, the edge control electrode 115 is ring-shaped, made of a conductive material, and configured to surround at least a portion of the bias electrode 104. In one configuration, when the substrate support surface of the substrate support assembly 136 is viewed in plan view, the bias electrode 104 is surrounded or circumscribed by the edge control electrode 115 and is not in direct electrical contact with the edge control electrode 115. As seen in FIG. 1 , the edge control electrode 115 is positioned within the region of the substrate support 105 and is biased using a pulsed voltage (PV) waveform generator 175. In one configuration, as shown schematically in Figure 1, edge control electrode 115 is biased by splitting off a portion of the signal provided to bias electrode 104 from PV waveform generator 175. In another configuration, edge control electrode 115 is connected to and biased using a PV waveform generator 175 (not shown in Figure 1) that is different from the PV waveform generator 175 used for bias electrode 104. In this configuration, the voltage waveform signals provided from PV waveform generator 175 can be adjusted separately and therefore have different waveform characteristics, but at the same time, can be synchronized using a synchronization signal provided by system controller 126 or one of the RF or PV waveform generators, allowing the RF waveforms to be provided at the same stage within the synchronized PV waveform pulses provided by each of PV waveform generators 175.

[0023] The DC power system 183 includes a DC voltage supply 173, a PV waveform generator 175, and a current source 177. The RF power system 189 includes a radio frequency (RF) waveform generator 171, an impedance matching circuit 172, and an RF filter 174. In one example, as shown in FIG. 1 , a power supply line 163 electrically connects the output of the RF waveform generator 171 to the impedance matching circuit 172, the RF filter 174, and the substrate support base 107. As described above, during plasma processing, the DC voltage supply 173 provides a constant chucking voltage, while the RF waveform generator 171 provides an RF signal to the processing region and the PV waveform generator 175 establishes a PV waveform at the bias electrode 104. A sufficient amount of RF power in the RF bias voltage signal, also referred to herein as an RF waveform, is applied to the electrode (e.g., the substrate support base 107) to form a plasma 101 in the processing space 129 of the processing chamber 100. In one configuration, the RF waveform has a frequency range between about 1 MHz and about 200 MHz, for example, between 2 MHz and 40 MHz.

[0024] In some embodiments, DC power system 183 further includes a filter assembly 178 for electrically isolating one or more components contained within DC power system 183. Power supply line 160 electrically connects the output of DC voltage supply 173 to filter assembly 178. Power supply line 161 electrically connects the output of PV waveform generator 175 to filter assembly 178. Power supply line 162 connects the output of current source 177 to filter assembly 178. In some embodiments, current source 177 is selectively connected to bias electrode 104 using a switch (not shown) disposed in power supply line 162 so that current source 177 can supply a desired current to bias electrode 104 during one or more phases (e.g., ionic current phases) of the voltage waveform generated by PV waveform generator 175. As seen in FIG. 1 , filter assembly 178 includes multiple separate filtering components (i.e., individual filters 178A-178C) each electrically connected to an output node via power supply line 164. In an alternative configuration, filter assembly 178 includes one common filter electrically connected to the output node via power supply line 164. Power supply lines 160-164 include electrical conductors that may take the form of flexible coaxial cable connected in series with rigid coaxial cable, insulated high voltage corona resistant hook-up wire, bare wire, metal rod, electrical connectors, or any combination of the above.

[0025] The system controller 126, also referred to herein as a processing chamber controller, includes a central processing unit (CPU) 133, memory 134, and support circuits 135. The system controller 126 is used to control the process sequence used to process the substrate 103. The CPU is a general-purpose computer processor configured for use in an industrial environment to control the processing chamber and its associated sub-processors. The memory 134, as described herein, is generally non-volatile memory and may include random access memory, read-only memory, a hard disk drive, or other suitable forms of local or remote digital storage. The support circuits 135 are conventionally connected to the CPU 133 and include cache, clock circuits, input / output subsystems, power supplies, etc., and combinations thereof. Software instructions (programs) and data may be coded and stored within the memory 134 to instruct the processor within the CPU 133. Software programs (or computer instructions) readable by the CPU 133 in the system controller 126 determine which tasks are executable by components within the plasma processing chamber assembly 10.

[0026] Typically, a program readable by CPU 133 in system controller 126 includes code that, when executed by CPU 133, performs tasks related to the plasma processing methods described herein. The program may include instructions used to control various hardware and electrical components within plasma processing chamber assembly 10 to perform various process tasks and various process sequences used to carry out the methods described herein. In one embodiment, the program includes instructions used to perform one or more of the steps described below in connection with FIGS. 9 and 10.

[0027] 2 illustrates two distinct voltage waveforms established at a substrate 103 disposed on a substrate receiving surface 105A of a substrate support assembly 136 of a processing chamber by supplying pulsed voltage waveforms to the bias electrode 104 of the processing chamber, in accordance with one or more embodiments. Waveform 225 is an example of an uncompensated pulsed voltage (PV) waveform established at the substrate 103 during plasma processing. Waveform 230 is an example of a compensated pulsed voltage (PV) waveform established at the substrate 103 by applying a negative ramp waveform to the bias electrode 104 of the processing chamber during the "ion current phase" portion of the PV waveform cycle using current source 177. Alternatively, a compensated pulsed voltage (PV) waveform can be established by applying a negative voltage ramp during the ion current phase of a pulsed voltage waveform generated by PV waveform generator 175.

[0028] In FIG. 2 , waveforms 225 and 230 include two main phases: an ion current phase and a sheath collapse phase. Both portions of waveforms 225 and 230 (the ion current phase and the sheath collapse phase) can be established alternately and / or separately at substrate 103 during plasma processing. At the beginning of the ion current phase, the negative portion (e.g., the ion current portion) of the PV waveform supplied by PV waveform generator 175 to bias electrode 104 reduces the voltage at substrate 103, creating a high-voltage sheath above substrate 103. The high-voltage sheath accelerates positive ions generated by plasma during the ion current phase toward the biased substrate, which, in the case of an RIE process, can control the amount and characteristics of the etching process occurring at the substrate surface during plasma processing. In some embodiments, the ion current phase desirably includes a region of the pulsed voltage waveform where the voltage at the substrate is stable or exhibits minimal fluctuations throughout the phase, as shown by waveform 230 in FIG. 2 . It should be noted that significant variations in the voltage established at the substrate during the ion current phase, as indicated by the positive slope of waveform 225, can undesirably cause variations in the ion energy distribution (IED) and, therefore, undesirable characteristics of the etched features formed in the substrate during the RIE process.

[0029] 3A is a plot 301 of a forward RF voltage waveform 331 and an intermodulation distortion (IMD)-generated RF voltage waveform 326 measured along a transmission line, such as transmission line 163 or 166 in FIG. 1. In one example, plot 301 was generated from measurements made at a frequency of 40 MHz ± 400 kHz at a node internal to RF power system 189 due to the feed and interaction that occurs between RF voltage waveform 326, supplied at a frequency of approximately 40.68 MHz from RF power system 189, and a pulsed voltage waveform supplied from DC power system 183 (both of which are shown in FIG. 3B). Plot 301 includes an envelope 370 of forward RF voltage waveform 331 and an envelope 376 of IMD-generated RF voltage waveform 326, all of which are generated by the interaction between the feed of an RF bias voltage waveform supplied from components internal to RF power system 189 and a pulsed voltage waveform supplied from a PV waveform generator in DC power system 183.

[0030] During processing, a forward RF voltage waveform 331 is applied to a load (e.g., a gas) in the process space 129 of the process chamber 100 through a transmission line, such as transmission line 165 (FIG. 1). If the impedance of the load is not properly matched to the impedance of the source (e.g., an RF signal generator), a portion of the waveform may be reflected back along the same transmission line. Therefore, to prevent a substantial portion of the waveform from being reflected back along the transmission line, a matching impedance must be found by adjusting one or more components of the impedance matching circuit 172 and / or adjusting the frequency of the RF bias waveform provided by the RF waveform generator 171 to match the impedance of the load to the source during plasma processing. To properly match the impedance, the forward RF voltage and the reflected RF voltage are measured at a node within the RF power system 189 at the driving RF frequency. Measurements made using a conventional RF power delivery system using conventional RF power delivery methods can produce an envelope 370 of the forward RF voltage waveform 331 and an envelope 376 of the IMD-generated RF voltage waveform 326 that is not at one of the harmonic frequencies of the driving RF frequency. As shown in FIG. 3A , the magnitude of the envelope 376 of the IMD-generated RF voltage waveform 326 undesirably varies over time, from a point near the magnitude of the envelope 370 of the forward RF voltage waveform 331 to a magnitude of the envelope 376 of the IMD-generated RF voltage waveform 326 near zero RF power.

[0031] FIG. 3B illustrates an example in which both the pulsed voltage waveform 321 supplied to the bias electrode 104 (FIG. 1) and the pulsed voltage waveform 322 supplied to the edge control electrode 115 (FIG. 1) further include a high-frequency RF voltage waveform 326 (e.g., a 40 MHz RF signal) applied on top of the pulsed voltage waveforms 321 and 322. As described above in connection with FIG. 2, the pulsed voltage waveform includes two main phases: an ion current phase and a sheath collapse phase. Both portions of the pulsed voltage waveform (the ion current phase and the sheath collapse phase) are established at the substrate 103 during plasma processing. As described above, in an RIE process, the etching process occurs primarily during the second phase (e.g., the ion current phase) of the pulsed voltage waveform. During both phases of the pulsed voltage waveform, variations in IMD-generating RF power components, as seen in FIG. 3A, can cause variations in process results between substrates and / or chambers and can result in damage to hardware components within the chamber and RF power system 189.

[0032] FIG. 4 is a chart showing the percentage of broadband reflections observed in two different conventional plasma processing chambers. The percentage of broadband reflections is used to measure the amount of reflected power (i.e., the amount of power not delivered to the load) due to IMD and harmonic reflections observed in a plasma processing system versus the amount of forward RF power delivered from the RF source. Curve 405 shows the percentage of reflected RF power as a function of the magnitude of the pulse voltage waveform applied to the electrode in the first processing chamber 460. Curve 410 shows the percentage of reflected RF power as a function of the magnitude of the pulse voltage waveform applied to the electrode in the second processing chamber 470. Note that the first and second processing chambers are configured substantially similarly, and the plotted results were generated by running the same plasma processing recipe in each processing chamber. As shown in chart 400, using a conventional RF power delivery system utilizing conventional RF power delivery methods, the percentage of RF power delivered to the load varies from chamber to chamber, especially at higher pulse waveform voltages. As can be seen in FIG. 4, the percentage of energy loss due to IMD increases as the voltage level of the pulse voltage waveform increases. This is determined by the magnitude of the voltage established at the substrate during the ion current phase of the pulse voltage waveform. Both curves 405 and 410 increase to a maximum percentage between approximately 4 kV and 8 kV. In this example, for a plasma process involving the delivery of approximately 1500 W of RF power, a chamber pressure of 9 mTorr, a pulse voltage repetition frequency of 1000 Hz, and a DC power duty cycle of 59%, the percentage of energy loss due to IMD seen in the RF power supply components in the first processing chamber 460 increases from approximately 2 kV to a peak of approximately 4.5 kV, and then begins to decrease at voltages above 4.5 kV. Alternatively, when the same process recipe is performed in the second processing chamber 470, the percentage of reflected RF power generated in the second processing chamber 470 increases from approximately 2 kV to approximately 6 kV, and then decreases at approximately 7 kV. In this example, the difference in reflected RF power between the first processing chamber 460 and the second processing chamber 470 can be approximately 8 percent at the more desirable higher pulse waveform voltage levels.

[0033] 5A shows a pulsed RF waveform 501 applied to an electrode disposed in a processing chamber. The pulsed RF waveform 501 has RF power applied for a first period (T ON ) RF power supply stage 512, in which RF power is supplied to an electrode inside the processing chamber, and RF power is supplied for a second period (T OFF 3B ) and an "off" phase 517 in which no RF power is supplied to the electrodes. Figure 5B shows a plot of the combined pulsed voltage waveforms and pulsed RF bias voltage signals resulting from the application of the pulsed RF bias voltage signal illustrated in Figure 5A and the application of pulsed voltage waveforms 521 and 522, according to one embodiment. As similarly described in connection with pulsed voltage waveforms 321 and 322 of Figure 3B , in one example, pulsed voltage waveforms 521 and 522 are supplied to one or more electrodes within the processing chamber, such as bias electrode 104 and edge control electrode 115, respectively.

[0034] As shown in FIGS. 5A and 5B , the pulsed RF waveform 501 is synchronized with the delivery of at least one of the pulsed voltage waveforms 521 and 522 and overlaps with at least a portion of the pulsed voltage waveform during the ion current phase. As shown, the RF power delivery phase 512, and therefore the impedance matching circuit 172, is utilized to deliver RF power from the RF waveform generator 171 only during the stable portion of the delivered pulsed voltage waveform. Delivering RF power during the stable, critical phase where the majority of the etching occurs from an RIE etching perspective, prevents the impedance matching circuit 172 from attempting to find a match point when the load impedance changes rapidly between and during different phases of the delivery of the pulsed voltage waveform. Pulsing the RF waveform on during the ion current phase and off during the sheath collapse phase is believed to improve the performance of the impedance matching circuit by limiting the amount of impedance variation seen by the impedance matching circuit 172 as RF power is delivered to the electrode in the process chamber 100. Thus, if the RF power is not pulsed and maintained at a constant power as shown in FIG. 3B, the measured reflected RF power varies in magnitude between the sheath collapse phase 327 and the ion current phase, as seen in FIG. 3A. Thus, in one embodiment of the disclosure provided herein, the pulsed RF waveform 501 includes an RF signal provided during a significant portion of the ion current phase of the pulsed voltage waveform. In some embodiments, the duration of the RF power supply phase 512 is configured to span the entire length of the ion current phase. In one configuration, the RF power supplied during the RF power supply phase 512 is synchronized using the system controller 126 so that the RF power is supplied within the region of the pulsed voltage waveform extending between the ion current phase start 332 and the ion current phase end 333. In one configuration, the PV waveform generator and the RF power supply operate in a master-slave relationship, where the master provides a timing signal (e.g., a square wave TTL signal) that triggers the slave to supply the waveform at the desired time.For example, the PV waveform generator is the master and the RF power supply is the slave so that the RF waveform is delivered during the desired portion of the PV waveform.For example, the RF power supply is the master and the PV waveform generator is the slave so that the PV waveform signal is delivered during the desired portion of the RF waveform.

[0035] In some embodiments where the RF waveform is applied only during the sheath collapse phase, the ion energy distribution function (IEDF) is narrower than when the RF waveform is applied during the ion current phase. This is because the energy broadening effect that the RF waveform has on ions in the plasma does not occur during sheath formation (the phase in which plasma-generated ions are accelerated toward the substrate surface). This RF waveform delivery method allows for more precise control of ion energy during the ion current phase of the waveform pulse.

[0036] In an alternative configuration, the pulsed RF waveform 501 is synchronized with the delivery of at least one of the pulsed voltage waveforms 521 and 522 and overlaps with at least a portion of the pulsed voltage waveform during the sheath collapse phase. Pulsing the RF waveform on during the sheath collapse phase and off during the ion current phase may improve the performance of the impedance match circuit 172 by limiting the amount of impedance variation seen by the impedance match circuit 172 as RF power is delivered to the electrodes in the process chamber 100. Thus, in one embodiment of the disclosure provided herein, the pulsed RF waveform 501 includes an RF signal that is provided during a substantial portion of the sheath collapse phase of the pulsed voltage waveform.

[0037] In some embodiments, the duration of the RF power delivery phase 512 is configured to include only a portion of the duration of the ion current phase, as shown in FIG. 5B. In this case, the RF power delivery phase 512 is synchronized by use of the system controller 126 and is initiated from the ion current phase start 332 by a first time delay (T DELAY) has elapsed, RF power is delivered, and a second time delay (T PD ), i.e., the time delay after RF power application, is allowed to expire and stop. DELAY ) may vary from about 1% to about 20% of the total length of the ion current phase of the pulsed voltage waveform and may help reduce fluctuations in IMD-generated reflected power that occur during delivery of the RF waveform due to natural fluctuations (i.e., "ringing") found in the pulsed voltage waveform during the transition from the sheath collapse phase to the ion current phase. PD ) may be varied from about 0% to about 10% of the total length of the ion current phase of the pulsed voltage waveform and may help reduce variations in IMD-generated reflected power due to variations in the onset of the transition from the ion current phase to the sheath collapse phase. In one example, the second time delay (T PD ) is between 0.1% and 10% of the total length of the ionic current phase of the pulsed voltage waveform. In some embodiments, the ionic current phase is between 0.1% and 10% of the total period of the pulsed voltage waveform (T TP ) and typically occupies between about 30% and about 95% of the entire period of the pulsed voltage waveform. The pulsed voltage waveform may include a series of voltage pulses delivered at a repetition frequency of 100 kHz or greater, e.g., 200 kHz or greater, or 400 kHz or greater, or in the range between 100 kHz and 500 kHz. In one example, the pulsed voltage waveform occupies between about 30% and about 95% of the entire period (T TP ) is approximately 2.5 microseconds (μs). Whether the RF waveform is delivered during the sheath collapse phase or the ion current phase, the IMD power returning to the generator can be significantly reduced, e.g., by a factor of 5 or more, allowing the generator to reach higher delivered power before stressing the output amplifier components within the generator.

[0038] Figure 6 illustrates a method for synchronizing a PV waveform and an RF waveform in a plasma processing chamber, such as processing chamber 100 of Figure 1. Method 600 includes a method for processing a substrate by applying a PV waveform to an electrode, applying a pulsed RF waveform to the electrode, and synchronizing the pulsed RF waveform to the PV waveform.

[0039] In step 602, the method 600 includes applying a PV waveform to an electrode, such as the bias electrode 104. The PV waveform can include a series of voltage pulses. Each pulse in the series includes a first phase and a second phase. The first phase includes a sheath collapse phase, and the second phase includes an ion current phase, which are established at the substrate during processing. As shown in FIG. 5B and described above, the sheath collapse phase includes a large capacitance measured at the substrate, while the ion current phase includes a small capacitance measured at the substrate.

[0040] In step 604, the method 600 includes generating a plasma within the processing space of the processing chamber. In some embodiments, a pulsed RF waveform is used to ignite one or more gas species flowed within the processing space 129 of the processing chamber 100 to form a plasma on a substrate disposed on a support surface of a substrate support by supplying an RF signal to one or more electrodes within the processing chamber 100. In some cases, the RF waveform 501 includes an RF signal having a frequency between 1 MHz and 60 MHz. In one example, the RF waveform 501 includes an RF signal having a frequency of 40 MHz. Steps 602 and 604 can be completed substantially simultaneously or in any desired order.

[0041] In step 606, method 600 includes synchronizing the pulsed RF waveform with the PV waveform. As described above, the pulsed RF waveform is pulsed such that the RF power delivery phase 512 of the pulsed RF waveform is synchronized with at least one phase of the PV waveform. In one embodiment, to perform the task of synchronizing the pulsed RF waveform with the pulsed voltage waveform, system controller 126 provides one or more control signals to RF waveform generator 171 and PV waveform generator 175 to synchronize the delivery timing of each of the waveforms generated by these components, such as similarly described above with reference to FIGS. 5A-5B . Alternatively, in another embodiment, RF waveform generator 171 functions as a master device and therefore provides control signals to PV waveform generator 175 to synchronize the delivery timing of each of the waveforms generated by these components. In another embodiment, PV waveform generator 175 functions as a master device and therefore provides control signals to RF waveform generator 171 to synchronize the delivery timing of each of the waveforms generated by these components.

[0042] The steps performed in method 600 may be performed for a period of time such that a desired plasma process can be performed on a substrate disposed within the plasma processing chamber.

[0043] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is determined by the claims that follow.

Claims

1. 1. A method for plasma processing, comprising: applying a pulsed voltage waveform to one or more electrodes disposed within a substrate support, the pulsed voltage waveform comprising a series of voltage pulses each comprising a sheath collapse phase and an ion current phase; applying a pulsed radio frequency (RF) waveform to the one or more electrodes to generate a plasma within a processing region of the processing chamber; synchronizing the pulsed RF waveform with each pulse of the pulsed voltage waveform such that the RF waveform of the pulsed radio frequency (RF) waveform is provided during at least a portion of the ion current phase of each pulse of the pulsed voltage waveform; Including, applying the pulsed voltage waveform to one or more electrodes; applying a first pulsed voltage waveform to a first electrode disposed within the substrate support; applying a second pulsed voltage waveform to a second electrode disposed on the substrate support, the first pulsed voltage waveform and the second pulsed voltage waveform each having a sheath collapse phase and an ion current phase; synchronizing the application of the sheath collapse phase and the ion current phase of the first pulsed voltage waveform and the second pulsed voltage waveform to the first electrode and the second electrode, respectively; Further comprising: synchronizing the pulsed RF waveform with each pulse of the pulsed voltage waveform further comprises synchronizing the pulsed RF waveform with each pulse of the first pulsed voltage waveform and synchronizing the pulsed RF waveform with each pulse of the second pulsed voltage waveform. method.

2. 10. The method of claim 1, wherein the series of voltage pulses is applied at a frequency of 100 kHz or greater.

3. 3. The method of claim 2, wherein the pulsed RF waveform comprises a series of RF pulses delivered at a frequency equal to the frequency of the series of voltage pulses.

4. The method of claim 1 , wherein the first electrode is surrounded by the second electrode.

5. 2. The method of claim 1, wherein the RF waveform of the pulsed RF waveform is delivered after a first time delay has elapsed, the first time delay beginning at the end of the sheath collapse phase of each pulse of the pulsed voltage waveform.

6. 6. The method of claim 5, wherein the first time delay has a length between 1% and 20% of the total length of the ion current stage of the pulsed voltage waveform.

7. 2. The method of claim 1, wherein the sheath collapse phase of each pulse of the pulsed voltage waveform begins after a second time delay has elapsed, the initiation of the second time delay beginning at the end of a period of time during which the RF waveform of the pulsed radio frequency (RF) waveform is delivered during at least a portion of the ion current phase.

8. 8. The method of claim 7, wherein the second time delay has a length between 0.1% and 10% of the total length of the ion current stage of the pulsed voltage waveform.

9. 1. A plasma processing system comprising: a pulse voltage waveform generator connected to the first electrode; a radio frequency waveform generator connected to a second electrode, the radio frequency waveform generator configured to generate a plasma within a process volume of the plasma processing system; an impedance matching circuit connected between the radio frequency waveform generator and the second electrode; a controller having a processor configured to execute computer-readable instructions stored within the memory; wherein the computer readable instructions are configured to: applying a pulsed voltage waveform to the first electrode using the pulsed voltage waveform generator, the pulsed voltage waveform including a series of voltage pulses each including a sheath collapse phase and an ion current phase; applying a pulsed radio frequency waveform to the second electrode using the radio frequency waveform generator to generate a plasma within a processing region of a processing chamber; synchronizing a pulsed radio frequency (RF) waveform with each pulse of the pulsed voltage waveform such that the RF waveform of the pulsed RF waveform is provided during at least a portion of the ion current phase of each pulse of the pulsed voltage waveform; Execute the first electrode and the second electrode are disposed within a substrate support; The first electrode is surrounded by the second electrode. Plasma treatment system.

10. 10. The plasma processing system of claim 9, wherein the series of voltage pulses is applied at a frequency of 100 kHz or greater.

11. 11. The plasma processing system of claim 10, wherein the pulsed RF waveform comprises a series of RF pulses delivered at a frequency equal to the frequency of the series of voltage pulses.

12. 10. The plasma processing system of claim 9, wherein the RF waveform of the pulsed RF waveform is executed after a first time delay has elapsed, the first time delay beginning at the end of the sheath collapse phase of each pulse of the pulsed voltage waveform.

13. 13. The plasma processing system of claim 12, wherein the first time delay has a length between 1% and 20% of the total length of the ion current stage of the pulsed voltage waveform.

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