Power converter

Abstract

To obtain a power converter in which an increase of the cost for adding a cooling structure to a substrate is suppressed, the filtering performance of the substrate is maintained, and further, the size and the cost of the substrate are reduced.SOLUTION: A power converter includes a substrate that is connected to a power source, and a power conversion circuit that is connected to the substrate and has a plurality of semiconductor elements. A first surface which is one surface of the substrate is connected to the positive electrode side of the power source, and has a positive electrode-side solid pattern electrically connected to the positive electrode side of the power conversion circuit. A second surface which is the other surface of the substrate is connected to a negative electrode side of the power source, and has a negative electrode-side solid pattern electrically connected to the negative electrode side of the power conversion circuit.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] This application relates to a power converter.

Background Art

[0002] In an electrified vehicle in which a motor is used as a drive source, such as an electric vehicle or a hybrid vehicle, generally, a plurality of power converters are mounted. Examples of the power converter include a charger that converts commercial AC power into DC power to charge a high-voltage battery, a DC / DC converter that converts the DC power of the high-voltage battery into the voltage of a battery for auxiliary devices (e.g., 12V), an inverter that converts DC power from the battery into AC power for the motor, and the like. In recent years, due to the spread of electrified vehicles and the expansion of the vehicle interior space, miniaturization and cost reduction of these power converters have been demanded.

[0003] A double-sided or multi-layer printed circuit board is provided in the power converter. When a main circuit current flows through the pattern provided on the board, an allowable current corresponding to the board pattern width is determined for each board according to the glass transition temperature of the board and the heat-resistant temperature of the electronic components mounted on the board. When the board is miniaturized, the pattern width on the board becomes narrower, so it is likely that a main circuit current exceeding the allowable current will flow. When a main circuit current exceeding the allowable current flows through the board, there is a risk that the temperature of the pattern and the surrounding electronic components will exceed the allowable value. Therefore, generally, it is necessary to suppress the temperature rise of the board by increasing the copper foil thickness of the board or increasing the wiring layers of the board to reduce the impedance of the pattern and the loss of the wiring layers. Alternatively, it is necessary to suppress the temperature rise of the board by additionally providing a structure for cooling the board.

[0004] On the other hand, it is common practice to arrange noise suppression components such as across-the-line capacitors (hereinafter referred to as X capacitors) and line capacitors (hereinafter referred to as Y capacitors) on the circuit board to counter normal-mode and common-mode noise. As power converters become smaller, noise is more likely to be superimposed within the power converter, so it is necessary to reduce the impedance between the noise suppression components, X capacitors and Y capacitors, and their connection points. Therefore, in order to miniaturize multilayer circuit boards, it is necessary to suppress the temperature rise of the circuit board to ensure thermal stability and to maintain noise filtering performance at or above the level before miniaturization.

[0005] A power conversion device that reduces the impedance between capacitors and their connection points has been disclosed (see, for example, Patent Document 1). In the structure disclosed in Patent Document 1, a conductive support is placed on the heatsink to connect a Y capacitor mounted on a substrate to a heatsink that is at GND potential, and the support and the Y capacitor are connected on the substrate. This configuration reduces the impedance between the Y capacitor and GND. Furthermore, by placing a Y capacitor connected to the positive side of the power supply and GND, and a Y capacitor connected to the negative side of the power supply and GND on a single support, a balance is maintained between the positive and negative Y capacitors, achieving good noise attenuation. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Patent No. 5909664 [Overview of the project] [Problems that the invention aims to solve]

[0007] In the above-mentioned Patent Document 1, the support and the Y capacitor are connected on the substrate, thus reducing the impedance between the Y capacitor and GND. However, since the connection between the positive and negative Y capacitors and GND is made between the positive and negative patterns, creepage distances for insulation are ensured between the positive pattern and the GND pattern, and between the negative pattern and the GND pattern. Furthermore, since the positive and negative patterns are arranged on the same plane on the substrate, creepage distances for insulation are also ensured between the positive and negative patterns. The areas where creepage distances are ensured for insulation are dead spaces where patterns cannot be placed. In the configuration of Patent Document 1, there are many such dead spaces. In addition to these dead spaces, the positive and negative patterns need to have the pattern width necessary for thermal establishment, which increases the size of the substrate. If the temperature rise of the substrate is significant, it becomes necessary to add a cooling structure to cool the substrate. If a cooling structure is added, the cost of the power converter increases.

[0008] Therefore, the present invention aims to provide a power converter that achieves miniaturization and cost reduction of the substrate while suppressing the increase in cost of adding a cooling structure to the substrate and maintaining the filter performance of the substrate. [Means for solving the problem]

[0009] The power converter disclosed herein comprises a substrate connected to a power supply and a power conversion circuit connected to the substrate and having a plurality of semiconductor elements, wherein one side of the substrate, the first surface, is connected to the positive side of the power supply and has a positive-side solid pattern electrically connected to the positive side of the power conversion circuit, and the other side of the substrate, the second surface, is connected to the negative side of the power supply and has a negative-side solid pattern electrically connected to the negative side of the power conversion circuit. The positive electrode side solid pattern is a solid pattern provided only on the first surface, and the negative electrode side solid pattern is a solid pattern provided only on the second surface. That is the case. [Effects of the Invention]

[0010] The power converter disclosed in this application comprises a substrate connected to a power supply and a power conversion circuit connected to the substrate and having a plurality of semiconductor elements. One side of the substrate, the first side, is connected to the positive electrode side of the power supply and has a positive electrode side solid pattern electrically connected to the positive electrode side of the power conversion circuit. The other side of the substrate, the second side, is connected to the negative electrode side of the power supply and has a negative electrode side solid pattern electrically connected to the negative electrode side of the power conversion circuit. Since the positive electrode side solid pattern and the negative electrode side solid pattern are provided on only one side of the substrate, the creepage distance required for insulation between the positive and negative patterns is not necessary on each side of the substrate, and the area of ​​the solid pattern can be expanded into the area where the creepage distance was previously provided. As a result, localized temperature rise in the solid pattern does not occur, the increase in cost of adding a cooling structure to the substrate can be suppressed, and the filter performance of the substrate can be maintained. In addition, since the area of ​​the solid pattern is expanded, the impedance and loss of the positive electrode side pattern and the negative electrode side pattern can be reduced, so the required area of ​​the substrate pattern is reduced, and the substrate can be miniaturized. Furthermore, since the dead space required to ensure creepage distance is eliminated, the substrate can be miniaturized. Because the substrate can be miniaturized, the cost of the substrate can be reduced. [Brief explanation of the drawing]

[0011] [Figure 1] This figure shows the circuit configuration of the power converter according to Embodiment 1. [Figure 2] This is a plan view showing the pattern of the substrate of the power converter according to Embodiment 1. [Figure 3] This is a plan view showing the pattern of another substrate of the power converter according to Embodiment 1. [Figure 4] This is a plan view showing the pattern of another substrate of the power converter according to Embodiment 1. [Figure 5] This is a plan view showing the pattern of another substrate of the power converter according to Embodiment 1. [Figure 6] This is a plan view showing the pattern of another substrate of the power converter according to Embodiment 1. [Figure 7]It is a side view of the power converter according to Embodiment 1. [Figure 8] It is a plan view showing the pattern of the substrate of the power converter of the comparative example. [Figure 9] It is a diagram showing the circuit configuration of the power converter according to Embodiment 2. [Figure 10] It is a plan view showing the pattern of the substrate of the power converter according to Embodiment 2. [Figure 11] It is a diagram showing the circuit configuration of the power converter according to Embodiment 3. [Figure 12] It is a plan view showing the pattern of the substrate of the power converter according to Embodiment 3. [Figure 13] It is a side view showing the schematic of the substrate of the power converter according to Embodiment 3. [Figure 14] It is a plan view showing the pattern of the substrate of the power converter of the comparative example.

Mode for Carrying Out the Invention

[0012] Hereinafter, the power converter according to the embodiment of the present application will be described based on the drawings. In each figure, the same or corresponding members and parts will be described with the same reference numerals.

[0013] [[ID=,33]]Embodiment 1. FIG. 1 is a diagram showing the circuit configuration of the power converter 1 according to Embodiment 1, FIGS. 2 to 6 are plan views showing the pattern of the substrate 400 of the power converter 1, FIG. 7 is a side view of the power converter 1, and FIG. 8 is a plan view showing the pattern of the substrate 400a of the power converter of the comparative example. The power converter 1 is a device that converts an input current from DC to AC, from AC to DC, or converts an input voltage to a different voltage. In the present embodiment, the power converter 1 will be described by taking an isolated DC / DC converter as an example, but the power converter 1 is not limited to a DC / DC converter.

[0014] <Power Converter 1> An example of the circuit configuration of the power converter 1 is explained with reference to Figure 1. The power converter 1 is a device that converts the input voltage Vin of a DC power supply 200, which is a power source, into a secondary DC voltage isolated by an isolation transformer 113, and outputs an output voltage Vout to a load 110 such as a battery. In Figure 1, the left side is the input side and the right side is the output side. The power converter 1 comprises a circuit board 400 connected to the DC power supply 200, a power conversion circuit 100 connected to the circuit board 400 and having multiple semiconductor elements, an isolation transformer 113, and a rectifier circuit 114.

[0015] An isolation transformer 113 is connected to the output side of the power conversion circuit 100, opposite to the side connected to the circuit board 400. The power conversion circuit 100 is connected to the primary winding 113a of the isolation transformer 113 and converts the input voltage Vin from the DC power supply 200 into an AC voltage for output. The power conversion circuit 100 has switching elements 101 to 104, which are semiconductor elements, connected in a bridge configuration. The isolation transformer 113 converts the voltage of the AC power output from the power conversion circuit 100 for output. The rectifier circuit 114 is connected to the secondary winding 113b of the isolation transformer 113 and rectifies the output of the isolation transformer 113 into a DC pulse voltage. The rectifier circuit 114 consists of diodes 115 and 116 as rectifying elements. A smoothing reactor 108 and an output capacitor 109 are connected to the output side of the rectifier circuit 114. The smoothing reactor 108 and output capacitor 109 smooth the DC pulse voltage and output the output voltage Vout to the load 110. The configuration of the rectifier circuit 114 is not limited to diodes; the rectifier circuit 114 may also be configured using switching elements.

[0016] X capacitor 401 and Y capacitors 402 and 403 are connected between the DC power supply 200 and the power conversion circuit 100. These capacitors are noise suppression components for normal mode and common mode noise suppression. X capacitor 401 and Y capacitors 402 and 403 are placed on the circuit board 400.

[0017] X capacitor 401 is connected between the positive electrode pattern 300 and the negative electrode pattern 301 between the DC power supply 200 and the power conversion circuit 100. Y capacitor 402 is connected between the positive electrode pattern 300 and the GND pattern 302 between the DC power supply 200 and the power conversion circuit 100. Y capacitor 403 is connected between the negative electrode pattern 301 and the GND pattern 302 between the DC power supply 200 and the power conversion circuit 100. On the circuit board 400, the connection point to the positive electrode side of the DC power supply 200 is designated as the positive electrode power supply connection point 500, and the connection point to the negative electrode side of the DC power supply 200 is designated as the negative electrode power supply connection point 501. On the circuit board 400, the connection point to the positive electrode side of the power conversion circuit 100 is designated as the positive electrode circuit connection point 502, and the connection point to the negative electrode side of the power conversion circuit 100 is designated as the negative electrode circuit connection point 503.

[0018] Switching elements 101, 102, 103, and 104 are MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) made of silicon (Si), which are self-extinguishing semiconductor switching elements with a diode built into the source-drain junction. The switching elements are not limited to MOSFETs; other switching elements such as IGBTs (Insulated Gate Bipolar Transistors) with diodes connected in antiparallel may also be used. The material of the switching elements is not limited to silicon (Si); they may be made from wide-bandgap semiconductor materials such as silicon carbide (SiC) or gallium nitride (GaN), or diamond-based semiconductor materials.

[0019] <Comparative Example> Prior to describing the essential parts of the present invention, the configuration of the comparative example will be described using Figure 8. Figure 8 is a plan view of the first surface 420a, which is one side of the substrate 400a of the comparative example power converter. In the comparative example, the configuration of the second surface, which is the other side of the substrate 400a, is the same as the configuration of the first surface 420a, so the other side is omitted. Also, the X capacitor and Y capacitor placed on the substrate 400a are omitted. The substrate 400a has screw holes 504 at three corners. The substrate 400a is fixed to a cooler, for example, by screws that pass through the screw holes 504. The substrate 400a is a double-sided substrate or a multilayer substrate.

[0020] The substrate 400a has a positive electrode side solid pattern 300a and a negative electrode side solid pattern 301a on both its first surface 420a and second surface. A solid pattern is a foil-like conductive pattern provided in a contiguous area, and is made of, for example, copper foil. The positive electrode side solid pattern is electrically connected to the positive electrode side of the DC power supply 200 at the positive electrode side power supply connection part 500, and is also electrically connected to the positive electrode side of the power conversion circuit 100 at the positive electrode side circuit connection part 502. The negative electrode side solid pattern is electrically connected to the negative electrode side of the DC power supply 200 at the negative electrode side power supply connection part 501, and is also electrically connected to the negative electrode side of the power conversion circuit 100 at the negative electrode side circuit connection part 503. The hatched areas shown in the figure indicate the required insulation distance.

[0021] Thus, when the positive electrode solid pattern and the negative electrode solid pattern are placed on the same plane, it is necessary to ensure a creepage distance between the positive and negative patterns for insulation. Since conductive patterns cannot be placed in the area where the creepage distance is ensured, this area becomes dead space. Because the comparative example substrate 400a has dead space, substrate 400a becomes larger and more expensive. In addition, because the area of ​​the positive electrode solid pattern is smaller than the area of ​​the negative electrode solid pattern in substrate 400a, there is a concern about a localized temperature rise on the positive electrode solid pattern side. If a localized temperature rise occurs in substrate 400a, it will be necessary to add a cooling structure to cool substrate 400a. Adding a cooling structure will increase the cost of the power converter.

[0022] <Substrate 400> The arrangement of the positive and negative patterns on the substrate 400, which is the essential part of this invention, will be explained using Figure 2. Figure 2(a) is a plan view showing the pattern of the first surface 420, which is one side of the substrate 400 of the power converter 1, and Figure 2(b) is a plan view showing the pattern of the second surface 421, which is the other side of the substrate 400 of the power converter 1. Figure 2(b) is a view of the second surface 421 from the side of the first surface 420. The substrate 400 is a double-sided substrate or a multilayer substrate. The first surface 420 has a positive-side solid pattern, which is a positive-side pattern 300 that is connected to the positive side of the DC power supply 200 by a positive-side power supply connection part 500 and is electrically connected to the positive side of the power conversion circuit 100 by a positive-side circuit connection part 502. The second surface 421 has a negative-side solid pattern, which is a negative-side pattern 301 that is connected to the negative side of the DC power supply 200 via a negative-side power supply connection part 501 and electrically connected to the negative side of the power conversion circuit 100 via a negative-side circuit connection part 503. The solid pattern is a pattern of foil-like conductive material provided in a consolidated area, and is made of copper foil, for example. The hatched areas shown in the figure indicate the required insulation distance. In this case, X capacitors and Y capacitors are not placed on the substrate 400.

[0023] In this way, by providing a solid ground pattern with the positive electrode pattern 300 and the negative electrode pattern 301 on only one side, the creepage distance required for insulation between the positive and negative patterns as shown in the comparative example is not needed on each side of the substrate, so the area of ​​the solid ground pattern can be expanded into the area where the creepage distance was previously provided. As the area of ​​the solid ground pattern is expanded, localized temperature rises do not occur in the solid ground pattern, thus suppressing the increase in cost of adding a cooling structure to the substrate 400. Furthermore, as the area of ​​the solid ground pattern is expanded, the impedance and losses of the positive electrode pattern 300 and the negative electrode pattern 301 can be reduced, so the required area of ​​the substrate pattern is reduced, and the substrate 400 can be miniaturized. In addition, since the dead space required to ensure creepage distance is not needed, the substrate 400 can be miniaturized. As the substrate 400 can be miniaturized, the cost of the substrate 400 can be reduced.

[0024] Viewed in the direction normal to the first surface 420, the positive electrode solid pattern and the negative electrode solid pattern are arranged with at least a portion of their surfaces overlapping. In Figures 2(a) and 2(b), the area enclosed by the dashed line is the overlapping area of ​​the positive electrode solid pattern and the negative electrode solid pattern. In this embodiment, a large area excluding the area connected to the DC power supply 200 and the power conversion circuit 100 overlaps. Therefore, if a temperature difference occurs between the positive electrode solid pattern and the negative electrode solid pattern, for example, if the temperature of the positive electrode solid pattern is higher than the temperature of the negative electrode solid pattern, heat diffuses through the insulating layer, reducing the temperature difference between each solid pattern, thereby allowing the positive electrode solid pattern to be cooled more effectively by the negative electrode solid pattern.

[0025] Furthermore, when viewed in the normal direction of the first surface 420, if patterns of different layers overlap, a capacitive component (parasitic capacitance) will be generated at the overlapping area. The capacitance value of the parasitic capacitance can be calculated using Equation 1. Here, C is the parasitic capacitance [F], ε is the relative permittivity, ε0 ​​is the permittivity [F / m], and S is the overlapping area of ​​the patterns [m²]. 2 Let d be the distance between patterns [m].

number

[0026] Another example of the pattern arrangement on substrate 400 will be explained using Figure 3. Substrate 400 is a multilayer substrate. Figure 3(a) is a plan view showing the pattern on the first surface 420 of substrate 400 of power converter 1, Figure 3(b) is a plan view showing the pattern on the second surface 421 of substrate 400 of power converter 1, and Figure 3(c) is a plan view showing the GND pattern 302 of the inner layer of substrate 400 of power converter 1. Figure 3(b) is a view of the second surface 421 from the side of the first surface 420. Figure 3(c) is a view of the inner layer from the side of the first surface 420. Figures 3(a) and 3(b) are the same as Figures 2(a) and 2(b). At least one layer of the inner layer of the multilayer substrate is a GND plane pattern as a GND pattern 302 insulated from the positive electrode side plane pattern and the negative electrode side plane pattern. The multilayer substrate in this embodiment is a 4-layer substrate, and the GND plane pattern is provided on each of the two inner layers. The shape of the ground plane patterns provided on each of the two inner layers is the same. The layers on which the ground plane pattern is provided are not limited to these, and it may be provided on any one of the layers. Furthermore, the multilayer substrate is not limited to four layers, but may have six layers, and in multilayer substrates with four or more layers, ground plane patterns may be provided on even more inner layers.

[0027] Unlike the positive and negative electrode ground planes, the GND ground plane does not carry the large current associated with power conversion, resulting in significantly lower losses in the pattern compared to the positive and negative electrode ground planes. Therefore, the GND ground plane has a lower temperature than the positive and negative electrode ground planes. By placing the GND ground plane in the inner layers, the positive and negative electrode ground planes on the surface can be cooled by the GND ground plane. In this embodiment, if the multilayer substrate is a 4-layer substrate and the GND ground plane is placed in two of the inner layers of the 4-layer substrate, the substrate 400 has two layers of GND ground planes, allowing for more effective cooling of the positive and negative electrode ground planes by the GND ground plane.

[0028] In this embodiment, when viewed in the direction normal to the first surface 420, the positive electrode side solid pattern and the GND solid pattern overlap in at least a portion, and the negative electrode side solid pattern and the GND solid pattern overlap in at least a portion. In Figures 3(a) to 3(c), the area enclosed by the dashed line is the overlapping area of ​​the positive electrode side solid pattern, the negative electrode side solid pattern, and the GND solid pattern. The positive electrode side pattern 300, the negative electrode side pattern 301, and the GND pattern 302 are each solid patterns, and in this embodiment, the positive electrode side solid pattern, the negative electrode side solid pattern, and the GND solid pattern overlap in a large area when viewed in the direction normal to the first surface 420. Therefore, the positive electrode side solid pattern and the negative electrode side solid pattern can be more effectively cooled by the GND pattern 302. This cooling reduces the temperature of the positive electrode and negative electrode patterns, thereby reducing the pattern area on the substrate required for the positive and negative electrode patterns, and thus the substrate 400 can be miniaturized.

[0029] As mentioned above, when different layer patterns overlap when viewed in the normal direction of the first surface 420, a capacitive component (parasitic capacitance) that can be calculated using Equation 1 is generated. The parasitic capacitance caused by the overlap of the positive electrode side solid pattern, the negative electrode side solid pattern and the GND solid pattern increases the capacitance of the Y capacitor shown in Figure 1, thereby improving filter performance. Alternatively, the capacitance of the Y capacitor can be reduced or eliminated due to the substantial increase in capacitance of the Y capacitor caused by the overlap of the solid patterns. Since the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated, the substrate 400 can be made smaller and less expensive.

[0030] Another example of the pattern arrangement on the substrate 400 will be explained using Figure 4, and a configuration with a cooler 111 will be explained using Figure 7. The substrate 400 is a multilayer substrate. Figure 4(a) is a plan view showing the pattern on the first surface 420 of the substrate 400 of the power converter 1, Figure 4(b) is a plan view showing the pattern on the second surface 421 of the substrate 400 of the power converter 1, and Figure 4(c) is a plan view showing the GND pattern 302 of the inner layer of the substrate 400 of the power converter 1. The multilayer substrate in this embodiment is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 4(b) is a view of the second surface 421 from the side of the first surface 420. Figure 4(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same.

[0031] As shown in Figure 7, the power converter 1 includes a multilayer substrate 400 and a cooler 111 for cooling the power conversion circuit 100. The GND plane is thermally and electrically connected to the cooler 111. The cooler 111 is a heat sink made of a metal material such as aluminum. The heat sink has cooling fins (not shown). The cooler 111 is not limited to a heat sink, but may be a cooler equipped with a flow path for a coolant. The power conversion circuit 100 is sealed with a resin material, for example, and is thermally connected to the cooling surface of the cooler 111. An example of a configuration for thermally connecting the GND plane and the cooler 111 will be described later.

[0032] The cooler 111 has a significantly larger heat capacity than the substrate 400 and is cooled, so its temperature is lower than that of the GND plane pattern. With this configuration, the cooler 111 and the GND plane pattern are thermally connected, and the GND pattern can be cooled by the cooler 111, which further suppresses the temperature rise of the positive and negative plane patterns that are cooled by the GND plane pattern. Since the temperature rise of the positive and negative plane patterns is suppressed, the pattern area required for the positive and negative plane patterns can be reduced. Since the pattern area required for the positive and negative plane patterns is reduced, the substrate 400 can be miniaturized.

[0033] An example of a configuration for thermally connecting the GND plane pattern and the cooler 111 will be described. As shown in Figure 4(a), the multilayer substrate has screw holes 504 and first through-holes 505 that penetrate the multilayer substrate in an area that does not overlap with the positive electrode plane pattern and the negative electrode plane pattern when viewed in the direction normal to the first surface 420. The first through-holes 505 are arranged around the screw holes 504. In this embodiment, a plurality of first through-holes 505 are provided. As shown in Figure 7, the multilayer substrate is fixed to the cooler 111 via a spacer 411 having thermal and electrical conductivity, by screws 410 that penetrate the screw holes 504. The spacer 411 may be a component integrated with the cooler 111. The GND plane pattern is thermally and electrically connected to the cooler 111 by the screws 410 and the first through-holes 505. Furthermore, since a conductive pattern is added to the portion where the first through-hole 505 is provided around the screw hole 504, the screw 410 and the first through-hole 505 are efficiently thermally and electrically connected to the cooler 111.

[0034] With this configuration, the first through-hole 505 connects all layers, so when the multilayer substrate is fixed to the cooler 111 with screws 410 at the screw holes 504, the cooler 111 and the GND plane pattern can be easily connected electrically and thermally. Note that the configuration for thermally connecting the GND plane pattern and the cooler 111 is not limited to the configuration using screw holes; the GND plane pattern and the cooler 111 may also be thermally connected using solder or the like by utilizing the side surface of the substrate 400.

[0035] In this embodiment, the multilayer substrate has a plurality of screw holes 504. The multilayer substrate shown in Figure 4(a) has screw holes 504 at three corners. The number of screw holes 504 is not limited to this, and there may be one or four, but the more screw holes 504 there are, the more points where the GND plane pattern and the cooler 111 are thermally connected, thereby improving the cooling performance of the positive-side plane pattern and the negative-side plane pattern. With one screw hole 504, the temperature gradient on the plane pattern becomes large, so by arranging at least two or more screw holes 504 around the placement area of ​​the positive-side plane pattern and the negative-side plane pattern, the entire plane pattern area can be effectively cooled.

[0036] Another example of the pattern arrangement on substrate 400 will be explained using Figure 5. Substrate 400 is a multilayer substrate. Figure 5(a) is a plan view showing the pattern on the first surface 420 of substrate 400 of power converter 1, Figure 5(b) is a plan view showing the pattern on the second surface 421 of substrate 400 of power converter 1, and Figure 5(c) is a plan view showing the GND pattern 302 of the inner layer of substrate 400 of power converter 1. The multilayer substrate in this embodiment is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 5(b) is a view of the second surface 421 from the side of the first surface 420. Figure 5(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same.

[0037] The substrate 400 has Y capacitors 402, 403 and X capacitor 401 as shown in Figure 1. The multilayer substrate has at least one first capacitor, Y capacitor 402, which is arranged on one or both of the first surface 420 and the second surface 421 and electrically connects the positive electrode side solid pattern and the GND solid pattern, and at least one second capacitor, Y capacitor 403, which is arranged on one or both of the first surface 420 and the second surface 421 and connects the negative electrode side solid pattern and the GND solid pattern. The multilayer substrate has at least one third capacitor, X capacitor 401, which is arranged on one or both of the first surface 420 and the second surface 421 and electrically connects the positive electrode side solid pattern and the negative electrode side solid pattern.

[0038] In this embodiment, Y capacitors 402, 403 and X capacitor 401 are assumed to be leaded types, and two of each are mounted in parallel only on the second surface 421. The number of Y capacitors 402, 403 and X capacitor 401 and the surface on which they are placed are not limited to this. On the first surface 420 and the inner layers where these capacitors are not mounted, the outlines of these capacitors are shown with dashed lines. Since these capacitors are leaded types, insertion holes are provided on the substrate 400 for inserting the lead portions. Therefore, creepage distances are ensured around the insertion holes in areas where electrical insulation is required to guarantee insulation. In this embodiment, the first surface 420 and the second surface 421 have a surface GND pattern 303 connected to a GND plane pattern. One end of the Y capacitors 402 and 403 is connected to the GND plane pattern via an insertion hole provided in the surface GND pattern 303. In this way, even when the filter components Y capacitors 402 and 403 and X capacitor 401 are mounted, the plane pattern area for each layer can be secured by placing the positive side plane pattern, the negative side plane pattern, and the GND plane pattern on different layers of the substrate 400.

[0039] In this embodiment, the Y capacitors 402 and 403 are positioned adjacent to the screw holes 504. As shown in Figure 5(c), a ground plane pattern and a first through-hole 505 are provided adjacent to the screw holes 504. By positioning the Y capacitors 402 and 403 adjacent to the screw holes 504, the first through-hole 505, which is thermally connected to the cooler 111, is adjacent to the Y capacitors 402 and 403. As a result, the impedance between the Y capacitors 402 and 403 and the cooler 111 becomes very small, enabling the Y capacitors 402 and 403 to achieve good filtering performance.

[0040] The positive electrode side solid pattern is positioned inside the edge of the first surface 420, and the negative electrode side solid pattern is positioned inside the edge of the second surface 421. The Y capacitors 402 and 403 are positioned to extend from the edge of the positive electrode side solid pattern or the negative electrode side solid pattern to the edge of the first surface 420 or the second surface 421. By positioning the Y capacitors at the edges of the substrate in this way, larger positive electrode side solid patterns and negative electrode side solid patterns can be secured on the substrate 400. Therefore, the positive electrode side solid pattern, the negative electrode side solid pattern, and the GND solid pattern overlap over a large area when viewed in the direction normal to the first surface 420, so the GND solid pattern can effectively cool the positive electrode side solid pattern and the negative electrode side solid pattern. Because the positive electrode side solid pattern and the negative electrode side solid pattern are effectively cooled, the area of ​​the substrate pattern required for the positive electrode side pattern 300 and the negative electrode side pattern 301 can be reduced, thus allowing the substrate 400 to be miniaturized.

[0041] Similarly, by placing the X capacitor at the edge of the substrate, larger positive and negative solid planes can be secured on the substrate 400, achieving a similar effect. Also, as mentioned above, if there is a large overlap between the positive and negative solid planes and the GND solid plane, parasitic capacitance is further formed, increasing the capacitance of the Y capacitor, thus improving the filtering performance of the Y capacitor. Alternatively, the effective increase in the capacitance of the Y capacitor due to the overlap of the solid planes allows for a reduction in the capacitance of the Y capacitor or even elimination of the Y capacitor. Since the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated, the substrate 400 can be made smaller and less expensive. Furthermore, by making the positive side pattern 300 and the negative side pattern 301 solid planes, the impedance between the X capacitor and the positive side pattern 300, and between the X capacitor and the negative side pattern 301, is reduced, thus achieving good filtering performance in the X capacitor. Similarly, the impedance between the Y capacitor and the positive side pattern 300, and between the Y capacitor and the negative side pattern 301, is also reduced.

[0042] Another example of the pattern arrangement on substrate 400 will be explained using Figure 6. Substrate 400 is a multilayer substrate. Figure 6(a) is a plan view showing the pattern on the first surface 420 of substrate 400 of power converter 1, Figure 6(b) is a plan view showing the pattern on the second surface 421 of substrate 400 of power converter 1, and Figure 6(c) is a plan view showing the GND pattern 302 of the inner layer of substrate 400 of power converter 1. The multilayer substrate in this embodiment is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 6(b) is a view of the second surface 421 from the side of the first surface 420. Figure 6(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same. In this embodiment, the Y capacitors 402, 403 and the X capacitor 401 are surface mount devices (SMD).

[0043] At least one of the Y capacitors 402, 403 and X capacitor 401 is located on the first surface 420, and at least one of the Y capacitors 402, 403 and X capacitor 401 is located on the second surface 421. In this embodiment, the Y capacitor 402 is located on the first surface 420, and the Y capacitor 403 is located on the second surface 421. The X capacitor 401 is located on both the first surface 420 and the second surface 421. Also in this embodiment, when viewed in the direction normal to the first surface 420, at least a portion of the Y capacitors 402, 403 and X capacitor 401 are located overlapping.

[0044] By making the Y capacitors 402, 403 and X capacitor 401 surface-mount components, the insertion holes and surrounding creepage distances required for fixing each capacitor are eliminated, allowing for wider areas for the positive electrode ground plane, negative electrode ground plane, and GND ground plane. Furthermore, by distributing the Y capacitors 402, 403 and X capacitor 401 across both sides of the multilayer substrate, wider areas for the positive electrode ground plane and negative electrode ground plane can be secured. Additionally, as in this embodiment, when the Y capacitor 402 is placed on the first surface 420 and the Y capacitor 403 is placed on the second surface 421, the Y capacitors 402 and 403 are evenly distributed across both sides of the multilayer substrate, allowing for wider and more evenly distributed areas for the positive electrode ground plane and negative electrode ground plane. Furthermore, if at least a portion of the Y capacitors 402, 403 and the X capacitor 401 are arranged in overlapping configurations, the areas of the positive-side solid plane pattern and the negative-side solid plane pattern can be made even wider.

[0045] In this way, by securing a wider area for each of the positive electrode side solid pattern and the negative electrode side solid pattern, the positive electrode side solid pattern and the negative electrode side solid pattern and the GND solid pattern will overlap over a larger area when viewed in the direction normal to the first surface 420. Since the positive electrode side solid pattern and the negative electrode side solid pattern and the GND solid pattern overlap over a large area when viewed in the direction normal to the first surface 420, the positive electrode side solid pattern and the negative electrode side solid pattern can be more effectively cooled by the GND pattern 302. This cooling reduces the temperature of the positive electrode side solid pattern and the negative electrode side solid pattern, so the pattern area on the substrate required for the positive electrode side pattern and the negative electrode side pattern is reduced, and the substrate 400 can be miniaturized. Furthermore, if the areas of the positive electrode ground pattern and the negative electrode ground pattern are equally and more widely provided, temperature differences between the positive electrode ground pattern and the negative electrode ground pattern become less likely, allowing the positive electrode ground pattern and the negative electrode ground pattern to be cooled more effectively by the GND pattern 302.

[0046] Furthermore, by securing a wider area for the positive electrode side solid pattern and the negative electrode side solid pattern, a large parasitic capacitance is formed between the positive electrode side solid pattern, the negative electrode side solid pattern and the GND solid pattern, thereby increasing the capacitance of the Y capacitor and improving the filtering performance of the Y capacitor. Alternatively, the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated due to the substantial increase in capacitance of the Y capacitor caused by the overlap of the solid patterns. Since the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated, the substrate 400 can be made smaller and less expensive. In this embodiment, the Y capacitor 402 is placed on the first surface 420 and the Y capacitor 403 is placed on the second surface 421, but the arrangement of the Y capacitors 402 and 403 is not limited to this configuration. Depending on the arrangement of other electrical components, one of the Y capacitors 402 may be placed on the first surface 420 and the other Y capacitor 403 may be placed on the second surface 421.

[0047] As described above, the power converter 1 according to Embodiment 1 comprises a substrate 400 connected to a DC power supply 200 and a power conversion circuit 100 connected to the substrate 400 and having a plurality of semiconductor elements. The first surface 420 of the substrate 400 is connected to the positive side of the DC power supply 200 and has a positive-side solid pattern electrically connected to the positive side of the power conversion circuit 100. The second surface 421 of the substrate 400 is connected to the negative side of the DC power supply 200 and has a negative-side solid pattern electrically connected to the negative side of the power conversion circuit 100. Since the positive-side solid pattern and the negative-side solid pattern are provided on only one side of the substrate 400, the creepage distance required for insulation between the positive and negative patterns is not necessary on each surface of the substrate, and the area of ​​the solid pattern can be expanded to the area where the creepage distance was previously provided. As a result, localized temperature rise in the solid pattern does not occur, the increase in cost of adding a cooling structure to the substrate 400 can be suppressed, and the filter performance of the substrate 400 can be maintained. Furthermore, because the area of ​​the solid pattern is expanded, the impedance and losses of the positive electrode pattern 300 and the negative electrode pattern 301 can be reduced, thus decreasing the required area of ​​the substrate pattern and allowing the substrate 400 to be miniaturized. In addition, since the dead space required to ensure creepage distance is eliminated, the substrate 400 can be miniaturized. As the substrate 400 can be miniaturized, the cost of the substrate 400 can be reduced.

[0048] When the positive electrode side solid pattern is a foil-like conductor provided in a consolidated area on the first surface 420, and the negative electrode side solid pattern is a foil-like conductor provided in a consolidated area on the second surface 421, since the positive electrode side solid pattern and the negative electrode side solid pattern are provided in a consolidated area, it is possible to reliably suppress the increase in cost of adding a cooling structure to the substrate 400, and the filter performance of the substrate can also be maintained.

[0049] When viewed in the direction normal to the first surface 420, if at least a portion of the positive electrode solid pattern and the negative electrode solid pattern overlap, a temperature difference is less likely to occur between the positive electrode solid pattern and the negative electrode solid pattern, and the temperature difference between each solid pattern becomes smaller, allowing each solid pattern to be cooled more effectively.

[0050] If the substrate 400 is a multilayer substrate, and at least one layer of the inner layers of the multilayer substrate is a GND plane insulated from the positive electrode plane and the negative electrode plane, then by placing the GND plane, which has a lower temperature than the positive electrode plane and the negative electrode plane, in the inner layers, the positive electrode plane and the negative electrode plane on the surface can be cooled by the GND plane. Furthermore, if, viewed in the direction normal to the first surface 420, at least a portion of the positive electrode plane and the GND plane overlap, and at least a portion of the negative electrode plane and the GND plane overlap, then the positive electrode plane and the negative electrode plane can be cooled by the GND plane more effectively.

[0051] If a cooler 111 is provided to cool the multilayer substrate and power conversion circuit 100, and the GND plane pattern is thermally and electrically connected to the cooler 111, the GND pattern can be cooled by the cooler 111, thereby further suppressing the temperature rise of the positive and negative plane patterns that are cooled by the GND plane pattern. Furthermore, if the multilayer substrate has screw holes 504 and first through-holes 505, and the first through-holes 505 are arranged around the screw holes 504, and the multilayer substrate is fixed to the cooler 111 by screws 410 that pass through the screw holes 504, and the GND plane pattern is thermally and electrically connected to the cooler 111 by screws 410 and first through-holes 505, then since the first through-holes 505 connect all layers, when fixing the multilayer substrate to the cooler 111 with screws 410 at the locations of the screw holes 504, the cooler 111 and the GND plane pattern can be easily connected electrically and thermally.

[0052] If the multilayer substrate has multiple screw holes 504, the number of thermal connections between the GND plane pattern and the cooler 111 increases, thereby improving the cooling performance of the positive and negative plane patterns. Furthermore, if the multilayer substrate has Y capacitors 402 and 403, and the Y capacitors 402 and 403 are located adjacent to the screw holes 504, the first through-hole 505 thermally connected to the cooler 111 is adjacent to the Y capacitors 402 and 403. As a result, the impedance between the Y capacitors 402 and 403 and the cooler 111 becomes very small, allowing the Y capacitors 402 and 403 to achieve good filtering performance.

[0053] When the positive electrode side solid pattern is positioned inside the edge of the first surface 420, and the negative electrode side solid pattern is positioned inside the edge of the second surface 421, and the Y capacitors 402 and 403 are positioned so as to extend from the edge of the positive electrode side solid pattern or the negative electrode side solid pattern to the edge of the first surface 420 or the second surface 421, a larger positive electrode side solid pattern and a larger negative electrode side solid pattern can be secured on the substrate 400. As a result, the positive electrode side solid pattern, the negative electrode side solid pattern, and the GND solid pattern overlap over a large area when viewed in the direction normal to the first surface 420, and the GND solid pattern can be effectively cooled by the GND solid pattern.

[0054] If the Y capacitors 402 and 403 are surface-mount components, the area that previously required creepage distance around the insertion holes necessary for fixing the capacitors becomes unnecessary, allowing for wider areas for the positive electrode ground plane, negative electrode ground plane, and GND ground plane. Furthermore, if at least one of the Y capacitors 402 and 403 is placed on the first surface 420 and at least one of the Y capacitors 402 and 403 is placed on the second surface 421, distributing the Y capacitors 402 and 403 across both sides of the multilayer substrate allows for wider areas for both the positive electrode ground plane and the negative electrode ground plane.

[0055] When the Y capacitor 402 is placed on the first surface 420 and the Y capacitor 403 is placed on the second surface 421, the Y capacitors 402 and 403 are evenly distributed on both sides of the multilayer substrate, so that the areas of the positive electrode solid pattern and the negative electrode solid pattern can be secured more evenly. Furthermore, when viewed in the direction normal to the first surface 420, if at least a portion of the Y capacitors 402 and 403 are placed on the same surface, the areas of the positive electrode solid pattern and the negative electrode solid pattern can be secured even more evenly.

[0056] When a multilayer substrate has multiple surface-mount X capacitors 401 arranged on both the first surface 420 and the second surface 421, with the positive-side solid pattern and the negative-side solid pattern electrically connected, the respective areas of the positive-side solid pattern and the negative-side solid pattern can be made wider. Furthermore, when an isolation transformer 113 is connected to the output side of the power conversion circuit 100 opposite to the side connected to the substrate 400, the creepage distance required to ensure insulation between the positive and negative patterns and the GND pattern is larger, thus further enhancing the effects of the present invention described above.

[0057] Embodiment 2. A power converter 1 according to Embodiment 2 will now be described. Figure 9 is a diagram showing the circuit configuration of the power converter 1 according to Embodiment 2, and Figure 10 is a plan view showing the pattern of the circuit board 400 of the power converter 1. The power converter 1 according to Embodiment 2 has a configuration in which X capacitors 408 and 409 are connected in series.

[0058] As shown in Figure 9, power converter 1 differs from power converter 1 shown in Figure 1 of Embodiment 1 in that it has a configuration in which X capacitors 408 and 409 are connected in series. When surface-mount ceramic capacitors are selected as capacitors connected in parallel with the DC power supply 200, the failure mode of the capacitors is short circuit failure. Therefore, in order to prevent a short circuit of the power supply when a capacitor shorts out, capacitors are generally provided in a configuration in which they are connected in series.

[0059] The arrangement of the patterns on the substrate 400 will be explained using Figure 10. The substrate 400 is a multilayer substrate. Figure 10(a) is a plan view showing the pattern of the first surface 420 of the substrate 400 of the power converter 1, Figure 10(b) is a plan view showing the pattern of the second surface 421 of the substrate 400 of the power converter 1, and Figure 10(c) is a plan view showing the GND pattern 302 of the inner layer of the substrate 400 of the power converter 1. The multilayer substrate in this embodiment is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 10(b) is a view of the second surface 421 from the side of the first surface 420. Figure 10(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same. In this embodiment, the Y capacitors 402, 403 and the X capacitors 408, 409 are surface-mount components.

[0060] Viewed in the direction normal to the first surface 420, the X capacitors 408, which are one or more fourth capacitors and are located on the first surface 420, and the X capacitors 409, which are one or more fifth capacitors and are located on the second surface 421, are arranged with at least some overlap. In this embodiment, three of each of the X capacitors 408 and 409 are provided. The number of each of the X capacitors 408 and 409 is not limited to this. By distributing the X capacitors 408 and 409 on both sides of the multilayer substrate, the areas of the positive electrode side solid pattern and the negative electrode side solid pattern can be made wider. Furthermore, since at least some of the X capacitors 408 and 409 are arranged with overlap, the areas of the positive electrode side solid pattern and the negative electrode side solid pattern can be made even wider.

[0061] One end of X capacitor 408 is electrically connected to the positive electrode side solid pattern, and the other end of X capacitor 409 is electrically connected to the negative electrode side solid pattern. The other end of X capacitor 408 and one end of X capacitor 409 are electrically connected via a second through-hole 506 that penetrates the substrate 400, and X capacitor 408 and X capacitor 409 are connected in series. With this configuration, X capacitors 408 and 409 can be easily placed in overlapping positions, making it easy to secure a wide area for the positive electrode side solid pattern and the negative electrode side solid pattern.

[0062] Viewed in the direction normal to the first surface 420, the X capacitors 408 and 409 are connected to the second through-hole 506 on the opposite side from the direction in which the positive and negative electrode solid planes are located. Specifically, viewed in the direction normal to the first surface 420, the second through-hole 506 is located either or both of the following positions: on the opposite side of the positive electrode solid plane with the X capacitor 408 in between, and on the opposite side of the negative electrode solid plane with the X capacitor 409 in between. This configuration allows for an even wider area to be secured for the positive and negative electrode solid planes. In this embodiment, viewed in the direction normal to the first surface 420, the second through-hole 506 is located at the edge of the substrate 400, and the X capacitors 408 and 409 are located further inside the substrate 400 than the second through-hole 506; therefore, the second through-hole 506 is located at both of the above-mentioned positions.

[0063] In this way, by securing a wider area for each of the positive electrode side solid pattern and the negative electrode side solid pattern, the positive electrode side solid pattern and the negative electrode side solid pattern and the GND solid pattern overlap over a larger area when viewed in the direction normal to the first surface 420. Since the positive electrode side solid pattern and the negative electrode side solid pattern and the GND solid pattern overlap over a large area when viewed in the direction normal to the first surface 420, the positive electrode side solid pattern and the negative electrode side solid pattern can be more effectively cooled by the GND pattern 302. This cooling reduces the temperature of the positive electrode side solid pattern and the negative electrode side solid pattern, so the pattern area on the substrate required for the positive electrode side pattern and the negative electrode side pattern is reduced, and the substrate 400 can be miniaturized.

[0064] Furthermore, by securing wider areas for the positive and negative electrode solid patterns, a large parasitic capacitance is formed between the positive and negative electrode solid patterns and the GND solid pattern, thereby increasing the capacitance of the Y capacitor and improving its filtering performance. Alternatively, the capacitance of the Y capacitor can be reduced or eliminated due to the substantial increase in capacitance caused by the overlapping of the solid patterns. Since the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated, the substrate 400 can be made smaller and less expensive.

[0065] Embodiment 3. A power converter 1 according to Embodiment 3 will now be described. Figure 11 is a diagram showing the circuit configuration of the power converter 1 according to Embodiment 3, Figure 12 is a plan view showing the pattern of the substrate 400 of the power converter 1, Figure 13 is a side view showing a schematic of the substrate 400 of the power converter 1, and Figure 14 is a plan view showing the pattern of the substrate 400a of the power converter of the comparative example. The power converter 1 according to Embodiment 3 has a configuration that includes a current transformer 404, a fuse 405, and inductors 406 and 407 in addition to the configuration of Embodiment 2.

[0066] As shown in Figure 11, the power converter 1 differs from the power converter 1 shown in Figure 9 of Embodiment 2. In this embodiment, an inductor 406 and a current transformer 404, which is a current detector, are connected in series between the positive-side power supply connection part 500 and the positive-side circuit connection part 502 of the substrate 400. Furthermore, a fuse 405 and an inductor 407 are connected in series between the negative-side power supply connection part 501 and the negative-side circuit connection part 503 of the substrate 400.

[0067] <Comparative Example> The configuration of the comparative example will be explained using Figure 14. The substrate 400a of the comparative example is a multilayer substrate. Figure 14(a) is a plan view showing the pattern of the first surface 420a of the substrate 400a of the power converter of the comparative example, Figure 14(b) is a plan view showing the pattern of the second surface 421a of the substrate 400a of the power converter of the comparative example, and Figure 14(c) is a plan view showing the GND pattern 302a of the inner layer of the substrate 400a of the power converter of the comparative example. The multilayer substrate of the comparative example is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 14(b) is a view of the second surface 421 from the side of the first surface 420. Figure 14(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same.

[0068] The substrate 400a has a positive electrode side solid pattern, which is the positive electrode side pattern 300a, and a negative electrode side solid pattern, which is the negative electrode side pattern 301a, on both the first surface 420a and the second surface 421a. Because the positive electrode side solid pattern and the negative electrode side solid pattern are arranged on both sides of the multilayer substrate, the routing of the positive and negative patterns and the placement of components are complicated by the added components, such as the fuse 405, inductors 406 and 407, and current transformer 404, as shown in Figures 14(a) and 14(b). As a result, the size of the substrate 400a has increased by 15% compared to the size of the substrate 400 shown in Embodiment 2 (for example, the size of the substrate in Figure 10(a)). In Figure 14(a), the area enclosed by the dashed line is the size of the substrate 400 shown in Embodiment 2, and the area indicated by arrow A is the 15% increase.

[0069] Furthermore, because the positive and negative ground planes are placed on both sides of the multilayer substrate, additional components such as inductors need to be directly connected to the positive and negative ground planes, which must be connected between layers. This increases the number of through-holes for interlayer connections on substrate 400a. As a result, in the inner layers where the GND ground plane is provided, the area requiring creepage distance for insulation around the through-holes increases, significantly reducing the area of ​​the GND ground plane. Consequently, when viewed in the direction normal to the first surface 420a, the overlapping area between the positive and negative ground planes and the GND ground plane becomes significantly smaller, worsening the cooling performance of the GND ground plane and potentially requiring additional Y capacitors due to reduced parasitic capacitance.

[0070] <Substrate 400> The arrangement of positive and negative patterns on the substrate 400 will be explained using Figure 12. The substrate 400 is a multilayer substrate. Figure 12(a) is a plan view showing the pattern of the first surface 420 of the substrate 400 of the power converter 1, Figure 12(b) is a plan view showing the pattern of the second surface 421 of the substrate 400 of the power converter 1, and Figure 12(c) is a plan view showing the GND pattern 302 of the inner layer of the substrate 400 of the power converter 1. The multilayer substrate in this embodiment is a four-layer substrate, and a GND plane pattern is provided on each of the two inner layers. Figure 12(b) is a view of the second surface 421 from the side of the first surface 420. Figure 12(c) is a view of one of the inner layers from the side of the first surface 420. The shape of the GND plane pattern provided on each of the two inner layers is the same. In this embodiment, the Y capacitors 402, 403 and the X capacitors 408, 409 are surface-mount components.

[0071] The substrate 400 has a current transformer located on the first surface 420 or the second surface 421. The portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the current transformer is located is divided into two parts, and the current transformer electrically connects the two divided parts and detects the current flowing through the connected part. In this embodiment, the current transformer 404 is located on the first surface 420, and the portion of the positive electrode side solid pattern adjacent to the location where the current transformer 404 is located is divided into two parts, and the current transformer 404 electrically connects the two divided parts. Even with the addition of the current transformer 404, since the positive electrode side pattern 300 and the negative electrode side pattern 301 are solid patterns provided on only one side, the routing of the positive and negative patterns and the placement of components do not become complicated, and the substrate 400 can be miniaturized.

[0072] The current detector is not limited to a current transformer; it may also be a current sensor or shunt resistor made of an IC. When the current detector is a current transformer, it is possible to simultaneously isolate the positive and negative potentials from the GND potential and detect the current, thus allowing for a larger area of ​​positive and negative solid patterns. The current detector may also be a surface-mount component. When the current detector is a surface-mount component, the insertion hole required for fixing the current detector and the area around the insertion hole for creepage distance are not necessary, thus allowing for a larger area of ​​positive-side solid pattern, negative-side solid pattern, and GND solid pattern.

[0073] The substrate 400 has a fuse located on the first surface 420 or the second surface 421. The portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the fuse is located is divided into two parts, and the fuse electrically connects the two divided parts. In this embodiment, the fuse 405 is located on the first surface 420, and the portion of the negative electrode side solid pattern adjacent to the location where the fuse 405 is located is divided into two parts, and the fuse 405 electrically connects the two divided parts. In this embodiment, the surface on which the fuse 405 is located and the surface on which the fuse 405 is electrically connected to the solid pattern are different. Even with the addition of the fuse 405, since the positive electrode side pattern 300 and the negative electrode side pattern 301 are solid patterns provided on only one side, the routing of the positive and negative patterns and the placement of components do not become complicated, and the substrate 400 can be miniaturized.

[0074] The substrate 400 has inductors arranged on one or both of the first surface 420 and the second surface 421. The portion of the positive-side solid pattern or negative-side solid pattern adjacent to the location where the inductor is placed is divided into two, and the inductor electrically connects the two divided portions. In this embodiment, inductor 406 is placed on the first surface 420, the portion of the positive-side solid pattern adjacent to the location where the inductor 406 is placed is divided into two, and the inductor 406 electrically connects the two divided portions. Inductor 407 is placed on the second surface 421, the portion of the negative-side solid pattern adjacent to the location where the inductor 407 is placed is divided into two, and the inductor 407 electrically connects the two divided portions. Even with the addition of inductors 406 and 407, since the positive electrode pattern 300 and the negative electrode pattern 301 are solid ground patterns provided on only one side, the routing of the positive and negative patterns and the placement of components do not become complicated, allowing the substrate 400 to be miniaturized.

[0075] Thus, the positive electrode side solid plane has two divided parts and is composed of three solid planes: the part from the positive electrode side power supply connection part 500 to the inductor 406, the part from the inductor 406 to the current transformer 404, and the part from the current transformer 404 to the positive electrode side circuit connection part 502. The negative electrode side solid plane has two divided parts and is composed of three solid planes: the part from the negative electrode side power supply connection part 501 to the fuse 405, the part from the fuse 405 to the inductor 407, and the part from the inductor 407 to the negative electrode side circuit connection part 503.

[0076] Even when the positive and negative electrode ground planes are divided into multiple sections in this way, the number of through-holes for interlayer connections is reduced, and the reduction in the area of ​​the GND ground plane is suppressed. As a result, the positive and negative electrode ground planes and the GND ground plane overlap over a larger area when viewed in the direction normal to the first surface 420. Because the positive and negative electrode ground planes and the GND ground plane overlap over a large area when viewed in the direction normal to the first surface 420, the positive and negative electrode ground planes can be more effectively cooled by the GND pattern 302. This cooling reduces the temperature of the positive and negative electrode ground planes, thus reducing the pattern area on the substrate required for the positive and negative electrode patterns, and thus allowing the substrate 400 to be miniaturized.

[0077] Furthermore, since the positive electrode plane pattern, the negative electrode plane pattern, and the GND plane pattern overlap over a larger area, a large parasitic capacitance is formed between the positive electrode plane pattern, the negative electrode plane pattern, and the GND plane pattern. The formation of a large parasitic capacitance increases the capacitance of the Y capacitor, thereby improving the filtering performance of the Y capacitor. Alternatively, the effective increase in the capacitance of the Y capacitor due to the overlap of the plane patterns allows for a reduction in the capacitance of the Y capacitor or even the elimination of the Y capacitor. Since the capacitance of the Y capacitor can be reduced or the Y capacitor can be eliminated, the substrate 400 can be made smaller and less expensive. Since the substrate 400 can be made smaller and less expensive, the power converter 1 can be made smaller and less expensive.

[0078] <Example of a 6-layer substrate configuration> In the embodiments described above, the number of layers in the multilayer substrate was set to four, but the number of layers in a multilayer substrate is not limited to four. Three configuration examples for a six-layer multilayer substrate will be explained. In the six-layer substrate shown in Figure 13, the four inner layers are designated as the first inner layer 423, the second inner layer 424, the third inner layer 425, and the fourth inner layer 426, in order from the layer on the first surface 420 side.

[0079] In the first example, the four inner layers of the multilayer substrate are arranged in the following order from the layer on the first surface 420 side: the positive electrode side solid pattern (first inner layer 423), the GND solid pattern (second inner layer 424), the GND solid pattern (third inner layer 425), and the negative electrode side solid pattern (fourth inner layer 426). The positive electrode side solid pattern of the inner layer is electrically connected to the positive electrode side solid pattern of the first surface 420, and the negative electrode side solid pattern of the inner layer is electrically connected to the negative electrode side solid pattern of the second surface 421. Through-holes, for example, are used for electrical connections between different layers. With this configuration, the positive and negative electrode sides each have a 1-layer to 2-layer structure, which reduces losses on the positive and negative electrode sides, allowing for further miniaturization of the substrate 400.

[0080] In the second example, all four inner layers of the multilayer substrate have ground plane patterns. This configuration adds a ground layer and further improves the cooling performance of the positive and negative ground plane patterns. As a result, the required area for the positive and negative ground plane patterns becomes even smaller, allowing for further miniaturization of the multilayer substrate.

[0081] In the inner four layers of the multilayer substrate, the following are arranged in order from the layer on the first surface 420 side: a GND plane pattern (first inner layer 423), a positive-side plane pattern (second inner layer 424), a negative-side plane pattern (third inner layer 425), and a GND plane pattern (fourth inner layer 426). The positive-side plane pattern of the inner layer is electrically connected to the positive-side plane pattern of the first surface 420, and the negative-side plane pattern of the inner layer is electrically connected to the negative-side plane pattern of the second surface 421. Through-holes, for example, are used for electrical connections between different layers. With this configuration, the number of opposing surfaces between the positive-side and GND, the negative-side and GND, and the positive-side and negative-side increases compared to a four-layer substrate, resulting in the formation of large parasitic capacitance. The formation of large parasitic capacitance increases the capacitance of the X capacitor and Y capacitor, thereby improving the filtering performance of the X capacitor and Y capacitor. Alternatively, the X and Y capacitors can be eliminated by effectively increasing their capacitance due to the increase in the number of opposing surfaces. Since the X and Y capacitors can be eliminated, the substrate 400 can be made smaller and less expensive.

[0082] In the above description, the circuit board 400 is provided only with patterns and components located between the DC power supply 200 and the power conversion circuit 100, but it is not limited to this. Patterns and components other than those connecting the DC power supply 200 to the power conversion circuit 100 may also be mounted on the circuit board 400.

[0083] Furthermore, although this application describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but can be applied individually or in various combinations to the embodiments. Accordingly, countless variations not illustrated are conceivable within the scope of the technology disclosed herein. These include, for example, modifying, adding or omitting at least one component, or even extracting at least one component and combining it with components of other embodiments.

[0084] The various aspects of this disclosure are summarized below as an appendix.

[0085] (Note 1) A circuit board connected to the power supply, The circuit comprises a power conversion circuit connected to the substrate and having a plurality of semiconductor elements, The first surface, which is one side of the substrate, has a positive-side solid pattern that is connected to the positive electrode side of the power supply and is electrically connected to the positive electrode side of the power conversion circuit. The power converter has a negative-side solid pattern on the other side of the substrate, which is the second side, connected to the negative electrode side of the power supply and electrically connected to the negative electrode side of the power conversion circuit. (Note 2) The power converter described in Appendix 1, wherein, when viewed in the direction normal to the first surface, the positive electrode side solid pattern and the negative electrode side solid pattern are arranged to overlap in at least a portion. (Note 3) The aforementioned substrate is a multilayer substrate, The power converter according to Appendix 1 or 2, wherein at least one inner layer of the multilayer substrate is a GND plane insulated from the positive electrode plane and the negative electrode plane. (Note 4) Viewed in the direction normal to the first surface, The power converter according to Appendix 3, wherein the positive electrode side solid pattern and the GND solid pattern are arranged to overlap in at least a portion, and the negative electrode side solid pattern and the GND solid pattern are arranged to overlap in at least a portion. (Note 5) The multilayer substrate and the power conversion circuit are provided with a cooler, The GND plane is thermally and electrically connected to the cooler in the power converter described in Appendix 3 or 4. (Note 6) The multilayer substrate has screw holes and first through-holes that penetrate the multilayer substrate in a region that does not overlap with the positive electrode side solid pattern and the negative electrode side solid pattern when viewed in the direction normal to the first surface. The first through-hole is arranged around the screw hole, The multilayer substrate is fixed to the cooler by screws that pass through the screw holes. The power converter according to any one of the appendices 3 to 5, wherein the GND plane pattern is thermally and electrically connected to the cooler by the screw and the first through-hole. (Note 7) The multilayer substrate is a power converter as described in Appendix 6, having a plurality of screw holes. (Note 8) The multilayer substrate has at least one first capacitor arranged on one or both of the first and second surfaces, electrically connecting the positive electrode side solid pattern and the GND solid pattern, and at least one second capacitor arranged on one or both of the first and second surfaces, connecting the negative electrode side solid pattern and the GND solid pattern. The first capacitor and the second capacitor are arranged adjacent to the screw hole in the power converter according to any one of the appendices 3 to 7. (Note 9) The positive electrode side solid pattern is positioned inward from the edge of the first surface. The negative electrode side solid pattern is positioned inside the edge of the second surface. The power converter according to Appendix 8, wherein the first capacitor and the second capacitor are arranged to extend from the end of the positive electrode side solid pattern or the negative electrode side solid pattern to the end of the first surface or the second surface. (Note 10) The power converter according to Appendix 8 or 9, wherein at least one of the first capacitor and the second capacitor is arranged on the first surface, and at least one of the first capacitor and the second capacitor is arranged on the second surface. (Note 11) The power converter according to appendix 8 or 9, wherein the first capacitor is arranged on the first surface and the second capacitor is arranged on the second surface. (Note 12) The first capacitor and the second capacitor are surface-mount components of the power converter described in any one of the appendices 8 to 11. (Note 13) Viewed in the direction normal to the first surface, The power converter described in Appendix 12, wherein the first capacitor and the second capacitor are arranged in such a way that at least a portion of them overlap. (Note 14) The power converter according to any one of the appendices 1 to 13, wherein the substrate has a plurality of surface-mount third capacitors arranged on both the first and second surfaces, electrically connecting the positive electrode side solid pattern and the negative electrode side solid pattern. (Note 15) Viewed in the direction normal to the first surface, The power converter described in Appendix 14, wherein one or more fourth capacitors which are third capacitors arranged on the first surface and one or more fifth capacitors which are third capacitors arranged on the second surface overlap in at least part. (Note 16) One end of the fourth capacitor is electrically connected to the positive electrode side solid pattern, the other end of the fifth capacitor is electrically connected to the negative electrode side solid pattern, and the other end of the fourth capacitor and one end of the fifth capacitor are electrically connected via a second through-hole that penetrates the substrate. The fourth capacitor and the fifth capacitor are connected in series to the power converter described in Appendix 15. (Note 17) Viewed in the direction normal to the first surface, The power converter described in Appendix 16, wherein the second through-hole is located at one or both of the following positions: on the opposite side of the positive electrode side solid pattern, with the fourth capacitor in between, and on the opposite side of the negative electrode side solid pattern, with the fifth capacitor in between. (Note 18) The substrate has a current detector arranged on the first surface or the second surface, The portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the current detector is placed is divided into two, and the current detector electrically connects the two divided portions and detects the current flowing through the connected portion, as described in any one of Appendix 1 to 17. (Note 19) The current detector is a power converter as described in Appendix 18, which is a current transformer. (Note 20) The current detector is a surface-mount power converter as described in Appendix 18 or 19. (Note 21) The substrate has a fuse arranged on the first surface or the second surface, The portion of the positive electrode-side solid pattern or the negative electrode-side solid pattern adjacent to the location where the fuse is placed is divided into two, and the fuse electrically connects the two divided portions, as described in any one of Appendix 1 to 20 of the power converter. (Note 22) The substrate has an inductor disposed on one or both of the first surface and the second surface. The portion of the positive-side solid pattern or the negative-side solid pattern adjacent to the location where the inductor is placed is divided into two, and the inductor electrically connects the two divided portions, as described in any one of Appendix 1 to 21, for the power converter described in Appendix 1 to 21. (Note 23) The power converter according to any one of the appendices 1 to 22, wherein an isolation transformer is connected to the output side of the power conversion circuit opposite to the side connected to the circuit board. (Note 24) The aforementioned multilayer substrate is a 4-layer substrate, The power converter according to any one of the appendices 3 to 23, wherein the GND plane pattern is arranged in the two inner layers of the multilayer substrate. (Note 25) The aforementioned multilayer substrate is a 6-layer substrate, In the four inner layers of the multilayer substrate, the following are arranged in order from the layer on the first surface side: the GND solid plane pattern, the positive electrode side solid plane pattern of the inner layer, the negative electrode side solid plane pattern of the inner layer, and the GND solid plane pattern. The power converter according to any one of the appendices 3 to 23, wherein the positive electrode side solid pattern of the inner layer is electrically connected to the positive electrode side solid pattern, and the negative electrode side solid pattern of the inner layer is electrically connected to the negative electrode side solid pattern. (Note 26) The aforementioned multilayer substrate is a 6-layer substrate, In the four inner layers of the multilayer substrate, the positive electrode side solid pattern, the GND solid pattern, the GND solid pattern, and the negative electrode side solid pattern are arranged in order from the layer on the first surface side. The power converter according to any one of the appendices 5 to 23, wherein the positive electrode side solid pattern of the inner layer is electrically connected to the positive electrode side solid pattern, and the negative electrode side solid pattern of the inner layer is electrically connected to the negative electrode side solid pattern. (Note 27) The aforementioned multilayer substrate is a 6-layer substrate, The power converter according to any one of the appendices 5 to 23, wherein the GND plane pattern is arranged in the four inner layers of the multilayer substrate. [Explanation of symbols]

[0086] 1 Power converter, 100 Power conversion circuit, 101-104 Switching element, 113 Isolation transformer, 113a Primary winding, 113b Secondary winding, 114 Rectifier circuit, 115, 116 Diode, 108 Smoothing reactor, 109 Output capacitor, 110 Load, 111 Cooler, 200 DC power supply, 400, 400a Circuit board, 401 X capacitor, 402, 403 Y capacitor, 404 Current transformer, 405 Fuse, 406, 407 Inductor, 408, 409 X capacitor, 410 Screw, 411 Spacer, 420, 420a First side, 421, 421a Second side, 300, 300a Positive side pattern, 301, 301a Negative side pattern, 302, 302a GND pattern, 303 Surface GND pattern, 500 Positive side power supply connection, 501 Negative side power supply connection, 502 Positive side circuit connection, 503 Negative side circuit connection, 504 Screw hole, 505 First through hole, 506 Second through hole

Claims

1. A circuit board connected to the power supply, The circuit comprises a power conversion circuit connected to the substrate and having a plurality of semiconductor elements, The first surface, which is one side of the substrate, is connected to the positive electrode side of the power supply and has a positive electrode side solid pattern that is electrically connected to the positive electrode side of the power conversion circuit. The second surface, which is the other surface of the substrate, has a negative-side solid pattern that is connected to the negative electrode side of the power supply and is electrically connected to the negative electrode side of the power conversion circuit. A power converter wherein the positive electrode side solid pattern is a solid pattern provided only on the first surface, and the negative electrode side solid pattern is a solid pattern provided only on the second surface.

2. The power converter according to claim 1, wherein, when viewed in the direction normal to the first surface, the positive electrode side solid pattern and the negative electrode side solid pattern are arranged to overlap in at least a portion.

3. The aforementioned substrate is a multilayer substrate, The power converter according to claim 1, wherein at least one inner layer of the multilayer substrate is a GND solid pattern insulated from the positive electrode side solid pattern and the negative electrode side solid pattern.

4. Viewed in the direction normal to the first surface, The power converter according to claim 3, wherein the positive electrode side solid pattern and the GND solid pattern are arranged to overlap in at least a portion, and the negative electrode side solid pattern and the GND solid pattern are arranged to overlap in at least a portion.

5. The multilayer substrate and the power conversion circuit are provided with a cooler, The power converter according to claim 4, wherein the GND solid pattern is thermally and electrically connected to the cooler.

6. The multilayer substrate has screw holes and first through-holes that penetrate the multilayer substrate in a region that does not overlap with the positive electrode side solid pattern and the negative electrode side solid pattern when viewed in the direction normal to the first surface. The first through-hole is arranged around the screw hole, The multilayer substrate is fixed to the cooler by screws that pass through the screw holes. The power converter according to claim 5, wherein the GND solid pattern is thermally and electrically connected to the cooler by the screws and the first through-holes.

7. The power converter according to claim 6, wherein the multilayer substrate has a plurality of screw holes.

8. The multilayer substrate has at least one first capacitor arranged on one or both of the first and second surfaces, electrically connecting the positive electrode side solid pattern and the GND solid pattern, and at least one second capacitor arranged on one or both of the first and second surfaces, connecting the negative electrode side solid pattern and the GND solid pattern. The power converter according to claim 7, wherein the first capacitor and the second capacitor are arranged adjacent to the screw hole.

9. The positive electrode side solid pattern is positioned inward from the edge of the first surface. The negative electrode side solid pattern is positioned inside the edge of the second surface. The power converter according to claim 8, wherein the first capacitor and the second capacitor are arranged to extend from the end of the positive electrode side solid pattern or the negative electrode side solid pattern to the end of the first surface or the second surface.

10. The power converter according to claim 8 or 9, wherein at least one of the first capacitor and the second capacitor is arranged on the first surface, and at least one of the first capacitor and the second capacitor is arranged on the second surface.

11. The power converter according to claim 8 or 9, wherein the first capacitor is arranged on the first surface and the second capacitor is arranged on the second surface.

12. The power converter according to claim 11, wherein the first capacitor and the second capacitor are surface-mount components.

13. Viewed in the direction normal to the first surface, The power converter according to claim 12, wherein the first capacitor and the second capacitor are arranged to overlap in at least a portion.

14. The power converter according to claim 1 or 3, wherein the substrate has a plurality of surface-mount third capacitors arranged on both the first and second surfaces, electrically connecting the positive electrode side solid pattern and the negative electrode side solid pattern.

15. Viewed in the direction normal to the first surface, The power converter according to claim 14, wherein at least a portion of the one or more fourth capacitors which are the third capacitors arranged on the first surface and the one or more fifth capacitors which are the third capacitors arranged on the second surface overlap.

16. One end of the fourth capacitor is electrically connected to the positive electrode side solid pattern, the other end of the fifth capacitor is electrically connected to the negative electrode side solid pattern, and the other end of the fourth capacitor and one end of the fifth capacitor are electrically connected via a second through-hole that penetrates the substrate. The power converter according to claim 15, wherein the fourth capacitor and the fifth capacitor are connected in series.

17. Viewed in the direction normal to the first surface, The power converter according to claim 16, wherein the second through-hole is located on either or both of the following positions: on the opposite side of the positive electrode side solid pattern, with the fourth capacitor in between, and on the opposite side of the negative electrode side solid pattern, with the fifth capacitor in between.

18. The substrate has a current detector arranged on the first surface or the second surface, The power converter according to claim 1, wherein the portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the current detector is placed is divided into two, the current detector electrically connects the two divided portions, and detects the current flowing through the connected portion.

19. The power converter according to claim 18, wherein the current detector is a current transformer.

20. The power converter according to claim 18 or 19, wherein the current detector is a surface-mount component.

21. The substrate has a fuse arranged on the first surface or the second surface, The power converter according to claim 1, wherein the portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the fuse is placed is divided into two, and the fuse electrically connects the two divided portions.

22. The substrate has an inductor disposed on one or both of the first surface and the second surface. The power converter according to claim 1, wherein the portion of the positive electrode side solid pattern or the negative electrode side solid pattern adjacent to the location where the inductor is placed is divided into two, and the inductor electrically connects the two divided portions.

23. The power converter according to claim 1 or 3, wherein an isolation transformer is connected to the output side of the power conversion circuit opposite to the side connected to the circuit board.

24. The aforementioned multilayer substrate is a four-layer substrate, The power converter according to claim 3, wherein the GND solid pattern is arranged in two inner layers of the multilayer substrate.

25. The aforementioned multilayer substrate is a six-layer substrate, In the four inner layers of the multilayer substrate, the following are arranged in order from the layer on the first surface side: the GND solid pattern, the positive electrode side solid pattern of the inner layer, the negative electrode side solid pattern of the inner layer, and the GND solid pattern. The power converter according to claim 3, wherein the positive electrode side solid pattern of the inner layer is electrically connected to the positive electrode side solid pattern, and the negative electrode side solid pattern of the inner layer is electrically connected to the negative electrode side solid pattern.

26. The aforementioned multilayer substrate is a six-layer substrate, In the four inner layers of the multilayer substrate, the positive electrode side solid pattern, the GND solid pattern, the GND solid pattern, and the negative electrode side solid pattern are arranged in order from the layer on the first surface side. The power converter according to claim 3, wherein the positive electrode side solid pattern of the inner layer is electrically connected to the positive electrode side solid pattern, and the negative electrode side solid pattern of the inner layer is electrically connected to the negative electrode side solid pattern.

27. The aforementioned multilayer substrate is a six-layer substrate, The power converter according to claim 3, wherein the GND solid pattern is arranged in the four inner layers of the multilayer substrate.

Images