semiconductor element
The evaluation system using the Franz-Keldysh effect and relaxation structures addresses the challenge of electric field concentration at semiconductor interfaces, enabling accurate field distribution measurement and improved voltage resistance in semiconductor devices.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- UNIVERSITY OF FUKUI
- Filing Date
- 2025-02-27
- Publication Date
- 2026-04-24
AI Technical Summary
Existing technologies face challenges in accurately calculating and mitigating electric field concentration at the interface between electrodes and semiconductors, particularly in wide-bandgap semiconductor devices like Schottky diodes, due to discontinuous boundary conditions and the difficulty in simulating electric field distribution.
An evaluation system utilizing the Franz-Keldysh effect to measure electric field distribution by scanning the interface with laser light and measuring photocurrent, allowing for accurate determination of field concentration points, and a relaxation structure like a base portion to alleviate field concentration.
Enables precise evaluation of electric field distribution and facilitates the design of semiconductor elements with reduced field concentration, enhancing voltage resistance and durability.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to 、 semiconductor devices Regarding .
Background Art
[0002] Patent Document 1 discloses a method for evaluating the interface of a semiconductor crystal growth layer by the surface potential photoresponse method. The surface potential photoresponse method is a method for non-destructively evaluating the interface between a metal / semiconductor and the interface between semiconductors. The surface potential photoresponse method is, for example, in a sample in which a metal (Schottky electrode) is formed on the surface of a semiconductor, when laser light below the bandgap is irradiated from the semiconductor side to the interface between the metal (Schottky electrode) and the semiconductor, a phenomenon in which a photocurrent is generated between the metal (Schottky electrode) and the electrode (ohmic electrode) on the back surface of the semiconductor due to the internal photoelectron emission effect is utilized.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] The present invention aims to Semiconductor elements that make it easier to avoid electric field concentration at the interface between the electrode and the semiconductor. provide
Means for Solving the Problems
[0008] above To achieve the above object, a semiconductor device according to one embodiment of the present invention includes a semiconductor and an electrode provided on one surface of the semiconductor. The electrode protrudes from a side surface of the electrode and contacts the one surface of the semiconductor, and has a relaxation portion that relaxes the concentration of an electric field.
Effects of the Invention
[0009] According to the present invention, Semiconductor elements that make it easier to avoid electric field concentration at the interface between the electrode and the semiconductor. It will be provided. [Brief explanation of the drawing]
[0010] [Figure 1] Figure 1 is an explanatory diagram of the electric field distribution at the interface between the electrode and the semiconductor when a high voltage is applied. [Figure 2] Figure 2 is a block diagram showing the configuration of the evaluation system according to the embodiment. [Figure 3] Figure 3 is a schematic diagram showing the overall configuration, including the evaluation system according to the embodiment. [Figure 4] Figure 4 is an explanatory diagram of the Franz Keldisch effect. [Figure 5] Figure 5 shows the photocurrent pattern when red light is irradiated onto the interface between the electrode and the semiconductor. [Figure 6] Figure 6 shows the line profile when red light is irradiated onto the interface between the electrode and the semiconductor. [Figure 7] Figure 7 shows the photocurrent pattern when violet light is irradiated onto the interface between the electrode and the semiconductor. [Figure 8] Figure 8 shows the line profile when violet light is irradiated onto the interface between the electrode and the semiconductor. [Figure 9] Figure 9 is a flowchart showing an example of the operation of the evaluation system according to the embodiment. [Figure 10] Figure 10 is a flowchart showing another example of operation of the evaluation system according to the embodiment. [Figure 11] Figure 11 is a flowchart showing an example of a method for manufacturing a semiconductor device according to an embodiment. [Figure 12] Figure 12 is a cross-sectional view showing the main part of a semiconductor device according to an embodiment. [Figure 13] Figure 13 shows the photocurrent image when violet light is irradiated onto the interface between an electrode with a relaxation zone and a semiconductor. [Modes for carrying out the invention]
[0011] (Knowledge that formed the basis of this invention) First, the inventor's perspective is explained below.
[0012] In recent years, research and development of wide-bandgap semiconductors such as gallium nitride (GaN), silicon carbide (SiC), or gallium oxide (Ga2O3) has been actively pursued in order to increase the voltage resistance of semiconductor devices such as Schottky diodes. In the case of Schottky diodes, for example, increasing the voltage resistance requires not only the use of wide-bandgap semiconductors but also the increased voltage resistance of the electrodes (Schottky electrodes). The necessity of increasing the voltage resistance of the electrodes will be explained below.
[0013] Figure 1 is an explanatory diagram of the electric field distribution at the interface 5A between electrode 4A (Schottky electrode 41A) and semiconductor 3A when a high voltage is applied. In the example shown in Figure 1, Schottky electrode 41A is formed on the upper surface of semiconductor 3A, and ohmic electrode 42A is formed on the lower surface of semiconductor 3A. In the example shown in Figure 1, a reverse-biased DC voltage of approximately 100V is applied to Schottky electrode 41A and ohmic electrode 42A. Note that the electric field lines A1 shown in Figure 1 are imaginary lines used to visually represent the electric force.
[0014] As shown in Figure 1, at the center of the interface 5A between the Schottky electrode 41A and the semiconductor 3A, the electric field lines A1 are uniformly distributed, meaning the electric field is uniformly distributed. On the other hand, at the periphery of the interface 5A (i.e., the end of electrode 4A), the electric field lines A1 are concentrated, meaning the electric field is concentrated. Therefore, the concentration of the electric field at the periphery of the interface 5A can cause dielectric breakdown of the Schottky electrode 41A.
[0015] To prevent the above-mentioned phenomena, that is, to increase the voltage resistance of electrode 4A (Schottky electrode 41A), it is conceivable to provide a relaxation structure to alleviate the concentration of the electric field around interface 5A. Examples of relaxation structures include a field plate electrode or a guard ring structure. Another example of a relaxation structure is a structure in which the area around interface 5A is etched.
[0016] Incidentally, when providing the relaxation structure as described above, it is important to identify the locations where the electric field concentrates at the interface 5A. Generally, the electric field distribution at the interface 5A has been calculated by using two-dimensional electromagnetic field simulation. However, the peripheral portion of the interface 5A in a state where a high voltage is applied basically has discontinuous boundary conditions such as unevenness. For this reason, there is a problem that it is very difficult to accurately calculate the electric field distribution of the interface 5A by the above-described simulation.
[0017] In view of the above, the inventor has created the present invention.
[0018] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that each of the embodiments described below shows a specific example of the present invention. The numerical values, shapes, methods, components, connection forms of the components, steps, order of steps, etc. shown in the following embodiments are examples and are not intended to limit the present invention. Also, in each figure, substantially the same configuration is denoted by the same reference numeral, and duplicate descriptions may be omitted or simplified.
[0019] [Configuration] FIG. 2 is a block diagram showing the configuration of an evaluation system 100 according to an embodiment. FIG. 3 is a schematic diagram showing the overall configuration including the evaluation system 100 according to the embodiment. The evaluation system 100 (evaluation method) according to the embodiment is a system (method) for evaluating the interface 5 between the electrode 4 (in the embodiment, the Schottky electrode 41) and the semiconductor 3 in the semiconductor element 2, particularly for evaluating the electric field distribution at the interface 5.
[0020] First, the semiconductor element 2 which is an evaluation target by the evaluation system 100 (evaluation method) will be described. The semiconductor element 2 is an element in which an electrode 4 is provided on the surface of a semiconductor 3, and is an element that exhibits a function by flowing a current through the electrode 4 or applying a voltage to the electrode 4. In the embodiment, the semiconductor element 2 is a Schottky diode.
[0021] In this embodiment, the semiconductor 3 of the semiconductor element 2 is formed by growing an n-GaN layer 32 with a thickness of approximately 2 μm that is doped with silicon (Si) on the upper surface of a gallium nitride (GaN) substrate 31, for example using MOCVD (Metal Organic Chemical Vapor Deposition), and growing an n-GaN layer 33 with a thickness of approximately 12 μm that is doped with silicon (Si) on the upper surface of the n-GaN layer 32.
[0022] In this embodiment, the electrode 4 of the semiconductor element 2 includes a Schottky electrode 41 with a diameter of approximately 200 μm and a thickness of approximately 100 nm, and an ohmic electrode 42. The Schottky electrode 41 is made of nickel (Ni) and is formed on the upper surface of the n-GaN layer 33, for example, by electron beam deposition. The ohmic electrode 42 is made of an InGa (indium-gallium) alloy and is formed on the lower surface of the n-GaN substrate 31, for example, by coating. The ohmic electrode 42 may also be made of an Al / Ti (aluminum-titanium) alloy. In this case, the ohmic electrode 42 may be formed by depositing it on the lower surface of the n-GaN substrate 31, for example, by electron beam deposition, followed by heat treatment at a high temperature of about 900 degrees Celsius.
[0023] Next, an evaluation system 100 (evaluation method) according to an embodiment will be described. As shown in Figure 2, the evaluation system 100 includes an electric field application unit 11, a scanning unit 12, and an evaluation unit 13. In other words, the evaluation method includes an electric field application step ST1, a scanning step ST2, and a first evaluation step ST3 (see Figure 9).
[0024] In the electric field application step ST1, the electric field application unit 11 applies an electric field capable of exhibiting the Franz-Keldysh effect to the interface 5 between the electrode 4 (Schottky electrode 41) in the semiconductor element 2 and the semiconductor 3.
[0025] Here, we will briefly explain the Franz-Keldisch effect using Figure 4. Figure 4 is an explanatory diagram of the Franz-Keldisch effect. The Franz-Keldisch effect is a phenomenon in which the wavelength corresponding to the band gap (fundamental absorption edge) shifts to the longer wave side when a relatively high electric field is applied to a semiconductor from the outside. Figure 4 shows the energy bands of a semiconductor when an electric field is applied. As shown in Figure 4, when an electric field is applied, the valence band and conduction band are tilted in accordance with the electric field, causing the wave function of electrons in the semiconductor to spill out into the band gap, and the effective band gap Eg' becomes smaller than the band gap Eg under normal conditions (i.e., when no electric field is applied).
[0026] Therefore, it is known that when a relatively high electric field is applied to semiconductor 3, and light with a photon energy slightly smaller than the band gap Eg is irradiated onto interface 5, a relatively large photocurrent is generated due to the Franz-Keldysh effect (see, for example, Franz-Keldysh effect in n-type GaN Schottky barrier diode under high reverse bias voltage, Applied Physics Express, Volume 9, Number 9).
[0027] As will be described in detail later, the evaluation system 100 (evaluation method) according to the embodiment utilizes the Franz-Keldisch effect to evaluate the electric field distribution at the interface 5. In this embodiment, the electric field application unit 11 applies a reverse-biased DC voltage of several tens to 100 V from the DC power supply 111 between the Schottky electrode 41 and the ohmic electrode 42 so that an electric field of sufficient magnitude to produce the Franz-Keldisch effect is applied. Note that this voltage is smaller than the voltage that causes dielectric breakdown of the electrode 4 (Schottky electrode 41).
[0028] The scanning unit 12, although not shown, includes a laser light source, a lens, and a moving table. The laser light source emits laser light (a predetermined light) L1 from below upward (i.e., from the semiconductor 3 towards the electrode 4 (Schottky electrode 41)). The laser light source is also configured to allow the wavelength of the emitted laser light L1 to be variable.
[0029] In this embodiment, the scanning unit 12 is capable of outputting laser light L1 having an energy slightly smaller than the band gap Eg of the semiconductor 3 (here, about 3 eV) (i.e., an energy slightly greater than the effective band gap Eg' due to the Franz-Keldisch effect). Specifically, the scanning unit 12 is capable of outputting laser light L1 such as violet light (wavelength about 403 nm) or near-ultraviolet light (wavelength about 375 nm).
[0030] The lens is positioned opposite the laser light source and focuses the laser beam L1 output by the laser light source toward the interface 5. Therefore, the interface 5 is illuminated with focused laser beam L1 having a beam diameter smaller than the diameter of the electrode 4 (Schottky electrode 41).
[0031] The movable table is a table on which the semiconductor element 2 is placed, and is configured to be movable by control of an actuator. Therefore, the semiconductor element 2 can move along the movable table along the XY plane. The XY plane referred to here is a plane that is perpendicular (or approximately perpendicular) to the thickness direction (vertical direction) of the semiconductor element 2.
[0032] In this embodiment, the scanning unit 12 scans the interface 5 by driving the laser light source with the electric field application unit 11 applying an electric field, thereby aligning the focus with the interface 5 and irradiating it with laser light L1, and by driving the moving table to move the semiconductor element 2 along the XY plane.
[0033] In other words, in the first scanning step ST2, the scanning unit 12 scans the interface 5 at least in one dimension while applying an electric field and irradiating the interface 5 with a predetermined light (laser light) L1 having an energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than the electrode 4 (Schottky electrode 41). In this embodiment, the interface 5 is scanned by moving the semiconductor element 2 along the XY plane, so in the first scanning step ST2, the scanning unit 12 scans the interface 5 in two dimensions.
[0034] In this embodiment, the laser light L1 irradiated onto the interface 5 in the first scanning step ST2 is violet light or near-ultraviolet light, etc. In other words, the predetermined light (laser light) L1 is either light with a shorter wavelength than visible light, or visible light with a relatively short wavelength. The wavelength of the laser light L1 should be such that the photon energy is smaller than the band gap Eg of the semiconductor 3 (here, 3.4 eV) and larger than the effective band gap Eg' (i.e., a photon energy large enough to cause a large increase in photocurrent due to the Franz-Keldisch effect).
[0035] The evaluation unit 13 has an ammeter 131 connected in series with the DC power supply 111. The ammeter 131 measures the photocurrent generated when the interface 5 is irradiated with laser light L1 by measuring the current flowing through the Schottky electrode 41, the semiconductor 3, and the ohmic electrode 42. In this embodiment, the evaluation unit 13 measures the photoelectron yield (Y), which indicates the photocurrent per unit number of photons.
[0036] Here, if the electric field strength at the interface 5 where the laser beam L1 is irradiated is high (i.e., the electric field is concentrated), the Franz-Keldisch effect occurs, causing the laser beam L1 to be absorbed and the photocurrent to increase significantly. On the other hand, if the electric field strength at the interface 5 where the laser beam L1 is irradiated is low (i.e., the electric field is not concentrated), the depletion layer expands due to the application of a reverse voltage, so although the laser beam L1 is absorbed by the amount its width increases, the Franz-Keldisch effect does not occur, and the photocurrent increases only slightly. In this way, the degree of electric field concentration at interface 5 corresponds to the increase in photocurrent, so by scanning interface 5 while irradiating it with laser beam L1 and measuring the photocurrent, it is possible to measure the electric field distribution at interface 5.
[0037] In other words, the evaluation unit 13 (in the first evaluation step ST3) evaluates the electric field distribution at the interface 5 by measuring the photocurrent flowing through the semiconductor element 2 while performing scanning by the scanning unit 12 (first scanning step ST2). In this embodiment, the evaluation unit 13 evaluates the electric field distribution at the interface 5 by outputting a photocurrent image (or line profile) of the interface 5.
[0038] The following shows the evaluation results when red light (predetermined light) L1 is irradiated onto the interface 5, and the evaluation results when violet light (predetermined light) L1 is irradiated onto the interface 5.
[0039] Figure 5 shows the photocurrent image when red light is irradiated onto the interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Figure 6 shows the line profile when red light is irradiated onto the interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Figure 7 shows the photocurrent image when violet light is irradiated onto the interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3. Figure 8 shows the line profile when violet light is irradiated onto the interface 5 between electrode 4 (Schottky electrode 41) and semiconductor 3.
[0040] The circular regions in Figures 5 and 7 represent interface 5. The brightness and darkness in Figures 5 and 7 correspond to the magnitude of the photocurrent (photoelectron yield Y), with brighter areas indicating a larger photocurrent and darker areas indicating a smaller photocurrent. The magnitude of the photocurrent (photoelectron yield Y) is expressed in arbitrary units. Furthermore, in Figures 5 and 7, (a) shows the result when the DC voltage applied between the Schottky electrode 41 and the ohmic electrode 42 (hereinafter referred to as "inter-electrode voltage") is 0V, (b) shows the result when the inter-electrode voltage is -41V, and (c) shows the result when the inter-electrode voltage is -82V.
[0041] Figures 6 and 8 both show the distribution of photocurrent along a straight line in the Y direction (horizontal direction) passing through the center of interface 5. The vertical axis represents the magnitude of the photocurrent (unit is arbitrary), and the horizontal axis represents the distance from the reference point (left end in Figures 5 and 7) (unit is μm).
[0042] As shown in Figures 5 and 7, when red light was irradiated onto interface 5, the photocurrent distribution at interface 5 was almost uniform, and there was hardly any significant increase in photocurrent due to the Franz-Keldisch effect. In other words, in this case, it was confirmed that the photocurrent image and line profile did not represent the electric field distribution at interface 5. Although the case of irradiating interface 5 with red light is given here as an example, it was also confirmed that the photocurrent image and line profile did not represent the electric field distribution at interface 5 when irradiated with green light, blue-green light, and blue light.
[0043] On the other hand, as shown in Figures 6 and 8, when the interface 5 was irradiated with violet light and the inter-electrode voltage was relatively large (i.e., a relatively high electric field was applied to the interface 5), there was almost no significant increase in photocurrent due to the Franz-Keldisch effect in the central part of the interface 5, while a significant increase in photocurrent due to the Franz-Keldisch effect was clearly observed in the peripheral part of the interface 5. In other words, in this case, it was confirmed that the photocurrent image and line profile represent the electric field distribution at the interface 5. Although the case of irradiating the interface 5 with violet light is given as an example here, it was also confirmed that the photocurrent image and line profile represent the electric field distribution at the interface 5 when the interface 5 was irradiated with near-ultraviolet light.
[0044] [Operation] The following describes an example of the operation (evaluation method) of the evaluation system 100 according to the embodiment. Figure 9 is a flowchart showing an example of the operation of the evaluation system 100 according to the embodiment. First, the electric field application unit 11 applies a reverse-biased DC voltage from the DC power supply 111 between the Schottky electrode 41 and the ohmic electrode 42 (S101). Process S101 corresponds to the electric field application step ST1 in the evaluation method.
[0045] Next, the scanning unit 12 scans the interface 5 by driving the laser light source with the electric field application unit 11 applying an electric field, aligning the focus to the interface 5 and irradiating it with laser light L1, and by driving the moving table to move the semiconductor element 2 along the XY plane (S102). Processing S102 corresponds to the first scanning step ST2 in the evaluation method.
[0046] Then, the evaluation unit 13 measures the photocurrent flowing through the semiconductor element 2 using the ammeter 131 while scanning with the scanning unit 12, and evaluates the electric field distribution at the interface 5 by outputting a photocurrent image (or line profile) of the interface 5 (S103). Processing S103 corresponds to the first evaluation step ST3 in the evaluation method.
[0047] [advantage] As described above, the evaluation system 100 (evaluation method) according to the embodiment makes it possible to indirectly measure the actual electric field distribution at interface 5 by utilizing the large increase in photocurrent due to the Franz-Keldisch effect. For this reason, while it is difficult to accurately calculate the electric field strength at locations where the electric field is concentrated, such as the periphery of interface 5, in two-dimensional electromagnetic field simulations, the evaluation system 100 (evaluation method) according to the embodiment has the advantage of making it easier to accurately determine the electric field strength at locations where the electric field is concentrated at interface 5. In other words, the evaluation system 100 (evaluation method) according to the embodiment has the advantage of making it easier to accurately evaluate the electric field distribution at interface 5 between electrode 4 and semiconductor 3 in semiconductor element 2.
[0048] (Other embodiments) Although the evaluation system 100 and evaluation method of the present invention have been described above based on embodiments, the present invention is not limited to these embodiments. As long as they do not depart from the spirit of the present invention, various modifications to these embodiments that can be conceived by those skilled in the art, as well as other forms constructed by combining some of the components of these embodiments, are also included within the scope of the present invention.
[0049] In the above-described embodiment, the evaluation system 100 (in the evaluation method) may further evaluate the non-uniformity of the interface 5. The non-uniformity of the interface 5 may be caused by strain in the semiconductor 3, grain boundaries, or crystal defects. Specifically, the scanning unit 12 may further perform the second scanning step ST4, and the evaluation unit 13 may further perform the second evaluation step ST5 and the third evaluation step ST6.
[0050] Figure 10 is a flowchart showing another example of operation of the evaluation system 100 according to the embodiment. The example of operation (evaluation method) of the evaluation system 100 shown in Figure 10 is an example of operation when further evaluating the non-uniformity of the interface 5 described above. In the example shown in Figure 10, processes S203 to S205 are executed after processes S201 and S202 are executed, but the order of processing may be reversed.
[0051] First, the evaluation system 100 (in the evaluation method) performs the second scanning step ST4 (S201) while simultaneously performing the second evaluation step ST5 (S202). In the second scanning step ST4, the scanning unit 12 drives the laser light source while the electric field application unit 11 is not applying an electric field, focusing the laser light L1, which is visible light, onto the interface 5, and also drives the moving table to move the semiconductor element 2 along the XY plane, thereby scanning the interface 5. In other words, in the second scanning step ST4, the interface 5 is scanned at least in one dimension by irradiating it with visible light while no electric field is applied. Here, the scanning unit 12 scans the interface 5 two-dimensionally, similar to the first scanning step ST2.
[0052] In the second evaluation step ST5, the evaluation unit 13 measures the photocurrent flowing through the semiconductor element 2 using the ammeter 131 while performing scanning by the scanning unit 12 (second scanning step ST4). The variation in the measured photocurrent corresponds to the non-uniformity at the interface 5. In other words, in the second evaluation step ST5, the non-uniformity at the interface 5 is evaluated by measuring the photocurrent flowing through the semiconductor element 2 while performing the second scanning step ST4. Here, the evaluation unit 13 evaluates the non-uniformity at the interface 5 by outputting a photocurrent image (or line profile) of the interface 5.
[0053] Next, the evaluation system 100 (in the evaluation method) performs the voltage application step ST1 (S203), the first scanning step ST2 (S204), and the first evaluation step ST3 (S205). The voltage application step ST1, the first scanning step ST2, and the first evaluation step ST3 have already been explained, so their explanation is omitted here.
[0054] Then, the evaluation system 100 (in the evaluation method) executes the third evaluation step ST6 (S206). In the third evaluation step ST6, the evaluation unit 13 calculates the difference between the photocurrent image (or line profile) obtained in the second evaluation step ST5 and the photocurrent image (or line profile) obtained in the first evaluation step ST3, thereby evaluating the electric field distribution at interface 5 with non-uniformity at interface 5 eliminated. In other words, in the third evaluation step ST6, the non-uniformity at interface 5 and the electric field distribution are evaluated in relation to each other based on the evaluation in the first evaluation step ST3 and the evaluation in the second evaluation step ST5.
[0055] The above-described embodiment has the advantage of being able to exclude non-uniformity at interface 5 and to determine the electric field distribution at interface 5 with greater accuracy.
[0056] Furthermore, in the above-described embodiment, the evaluation system 100 (in the evaluation method) may perform a degradation test of the semiconductor element 2. Specifically, the first scanning step ST2 is performed after, or while, the application of the electric field by the electric field application step ST1 has been continued for a predetermined time of at least one hour or more, thereby enabling the performance test of the semiconductor element 2. From the viewpoint of accurately estimating the period during which the semiconductor element 2 can withstand use, the predetermined time is preferably, for example, several tens of hours or more.
[0057] The above-described embodiment has the advantage that it is possible to test the degradation of the semiconductor element 2 due to the application of voltage for a long period of time, and that it becomes easier to identify vulnerable parts of the semiconductor element 2.
[0058] [Manufacturing method for semiconductor element] Furthermore, by using the evaluation of the electric field distribution of the interface 5 by the evaluation system 100 (evaluation method) according to the above embodiment (evaluation by the first evaluation step ST3, or evaluation by the third evaluation step ST6), it is expected that it will become easier to design a semiconductor element 2 that has a relaxation section 6 (see Figure 12) to alleviate the concentration of the electric field in the peripheral part of the interface 5. That is, the method for manufacturing the semiconductor element 2 is a method for manufacturing the semiconductor element 2 by providing electrodes 4 on a semiconductor 3, and may include a step of providing relaxation sections 6 to alleviate the concentration of the electric field in locations at the interface 5 that show an electric field strength of a predetermined magnitude or greater, based on the evaluation by the evaluation method according to the embodiment. By using the above evaluation of the electric field distribution of the interface 5, it is possible to greatly contribute to research and development aimed at increasing the withstand voltage of electrodes 4 in semiconductor elements 2, such as Schottky electrodes 41.
[0059] Figure 11 is a flowchart showing an example of a method for manufacturing a semiconductor device 2 according to an embodiment. Although not shown in Figure 11, the method for manufacturing the semiconductor device 2 also includes a step of forming an electrode 4 (ohmic electrode 42). In the example shown in Figure 11, an electrode 4 (Schottky electrode 41) having a relaxation portion 6 is formed based on the first evaluation (evaluation by the first evaluation step ST3), but an electrode 4 (Schottky electrode 41) having a relaxation portion 6 may also be formed based on the third evaluation (evaluation by the third evaluation step ST6).
[0060] First, semiconductor 3 is fabricated (S301). In step S301, a silicon (Si)-doped n-GaN layer 32 with a thickness of approximately 2 μm is grown on the upper surface of the GaN substrate 31, for example using MOCVD, and a silicon (Si)-doped n-GaN layer 33 with a thickness of approximately 12 μm is grown on the upper surface of the n-GaN layer 32 to fabricate semiconductor 3.
[0061] Next, based on the first evaluation, an electrode 4 (Schottky electrode 41) having a relaxation section 6 is formed (S302). In step S302, for example, the electrode 4 (Schottky electrode 41) is formed on the upper surface of the n-GaN layer 33 by electron beam deposition. Then, in step S302, by referring to the first evaluation, a relaxation section 6 is provided in the electrode 4 (Schottky electrode 41) at a location where the electric field is concentrated. The relaxation section 6 may be, for example, a field plate electrode or a guard ring structure.
[0062] Here, the inventors of the present application have found a relaxation structure different from the field plate electrode or guard ring structure described above. Figure 12 is a cross-sectional view showing the main part of the semiconductor element 2 according to the embodiment. In the example shown in Figure 12, the relaxation portion 6 as a relaxation structure is the base portion 61.
[0063] The base portion 61 is annular in plan view (i.e., viewed from above the semiconductor element 2). The base portion 61 protrudes in a direction intersecting the side surface 400 of the electrode 4 (Schottky electrode 41), and the protruding portion is in contact with the surface 300 of the semiconductor 3 on which the electrode 4 (Schottky electrode 41) is provided. Furthermore, the base portion 61 begins to protrude from the middle of the side surface 400 in the vertical direction, and the protruding length d1 gradually increases as it approaches the surface 300 of the semiconductor 3. Here, the protruding length d1 of the base portion 61 is approximately 10 nm or less. The thickness of the base portion 61 is approximately a few nm.
[0064] The following will explain the effect of the tail portion 61 in mitigating electric field concentration, using evaluation results when violet light is irradiated onto the interface 5 as laser light (predetermined light) L1. Figure 13 shows the photocurrent image when violet light is irradiated onto the interface 5 between the electrode 4 (Schottky electrode 41) provided with the mitigation portion 6 (tail portion 61) and the semiconductor 3.
[0065] The circular region in Figure 13 represents interface 5. The brightness in Figure 13 corresponds to the magnitude of the photocurrent (photoelectron yield Y), with brighter areas indicating a larger photocurrent and darker areas indicating a smaller photocurrent. The magnitude of the photocurrent (photoelectron yield Y) is expressed in arbitrary units. Furthermore, in Figure 13, (a) shows the result when the inter-electrode voltage is 0V, and (b) shows the result when the inter-electrode voltage is -45V.
[0066] As shown in Figure 6, the evaluation results already described, the electric field distribution at the interface 5 between electrode 4 and semiconductor 3 without the relaxation section 6 confirmed that the electric field was concentrated in the peripheral area of interface 5. In contrast, as shown in Figure 13, the evaluation results, the electric field distribution at the interface 5 between electrode 4 and semiconductor 3 with the relaxation section 6, showed almost no significant increase in photocurrent due to the Franz-Keldisch effect, even when the inter-electrode voltage was relatively large (i.e., a relatively high electric field was applied to interface 5). Thus, it was confirmed that the relaxation section 6 mitigated the concentration of the electric field at interface 5.
[0067] Therefore, in the method for manufacturing the semiconductor device 2, in step S302, it is preferable to provide a base portion 61 as a relaxation portion 6 that protrudes from the side surface 400 of the electrode 4 (Schottky electrode 41), and whose protruding length d1 increases as it approaches the surface 300 on which the electrode 4 (Schottky electrode 41) of the semiconductor 3 is provided.
[0068] [Semiconductor element] Below, we will briefly describe the semiconductor element 2 manufactured using the semiconductor element 2 manufacturing method described above.
[0069] The semiconductor element 2 comprises a semiconductor 3 and an electrode 4 (Schottky electrode 41) provided on one surface 300 of the semiconductor 3. The electrode 4 (Schottky electrode 41) protrudes from the side surface 400 of the electrode 4 (Schottky electrode 41) and is in contact with one surface 300 of the semiconductor 3, and has a relaxation portion 6 that alleviates the concentration of the electric field.
[0070] In particular, the relaxation portion 6 is preferably a base portion 61 whose protruding length d1 increases as it approaches one surface 300 of the semiconductor 3.
[0071] Such a semiconductor element 2 has the advantage of making it easier to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even without having an electrode 4 with a complex structure such as a field plate electrode or a guard ring structure.
[0072] (summary) As described above, the evaluation method according to the embodiment includes an electric field application step ST1, a first scanning step ST2, and a first evaluation step ST3. In the electric field application step ST1, an electric field capable of exhibiting the Franz-Keldisch effect is applied to the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor element 2. In the first scanning step ST2, with the electric field applied, the interface 5 is scanned at least in one dimension while irradiating it with a predetermined light L1 having an energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than the diameter of the electrode 4. In the first evaluation step ST3, the electric field distribution at the interface 5 is evaluated by measuring the photocurrent flowing through the semiconductor element 2 while performing the first scanning step ST2.
[0073] This evaluation method has the advantage of making it easier to accurately determine the electric field strength at points where the electric field is concentrated, such as the periphery of interface 5, whereas in two-dimensional electromagnetic field simulations, it is difficult to accurately calculate the electric field strength at points where the electric field is concentrated at interface 5. In other words, it has the advantage of making it easier to accurately evaluate the electric field distribution at interface 5 between electrode 4 and semiconductor 3 in semiconductor device 2.
[0074] Furthermore, in the evaluation method, for example, the first scanning step ST2 scans the interface 5 in two dimensions.
[0075] This evaluation method has the advantage of allowing us to determine the electric field distribution at interface 5 in two dimensions.
[0076] Furthermore, for example, in the evaluation method, the specified light L1 is light with a shorter wavelength than visible light.
[0077] This evaluation method has the advantage that, compared to the case where the given light L1 is visible light, the photocurrent is more likely to increase significantly due to the Franz-Keldisch effect.
[0078] Furthermore, the evaluation method further includes, for example, a second scanning step ST4, a second evaluation step ST5, and a third evaluation step ST6. In the second scanning step ST4, the interface 5 is scanned at least one-dimensionally by irradiating it with visible light without applying an electric field. In the second evaluation step ST5, the non-uniformity at the interface 5 is evaluated by measuring the photocurrent flowing through the semiconductor element 2 while performing the second scanning step ST4. In the third evaluation step ST6, the non-uniformity at the interface 5 and the electric field distribution are evaluated in relation to each other based on the evaluation by the first evaluation step ST3 and the evaluation by the second evaluation step ST5.
[0079] This evaluation method has the advantage of making it easier to determine the electric field distribution at interface 5 with greater accuracy, for example, by excluding non-uniformity at interface 5.
[0080] Furthermore, in the evaluation method, for example, the first scanning step ST2 is performed after, or while, the application of the electric field by the electric field application step ST1 has been continued for a predetermined period of time, which is at least one hour.
[0081] This evaluation method has the advantage of allowing testing for the degradation of semiconductor element 2 due to prolonged voltage application, making it easier to identify vulnerable parts of semiconductor element 2.
[0082] Furthermore, for example, in the evaluation method, semiconductor element 2 is a Schottky diode.
[0083] This evaluation method has the advantage of making it easier to accurately determine areas where the electric field is concentrated at the interface 5, such as the peripheral area of the interface 5 between the Schottky electrode 41 and the semiconductor 3, compared to analysis using two-dimensional electromagnetic field simulation.
[0084] Furthermore, the evaluation system 100 according to the embodiment comprises an electric field application unit 11, a scanning unit 12, and an evaluation unit 13. The electric field application unit 11 applies an electric field capable of exhibiting the Franz-Keldisch effect to the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor element 2. The scanning unit 12, while the electric field is applied, scans the interface 5 at least in one dimension while irradiating it with a predetermined light L1 having an energy smaller than the band gap Eg of the semiconductor 3 and a beam diameter smaller than the diameter of the electrode 4. The evaluation unit 13 evaluates the electric field distribution at the interface 5 by measuring the photocurrent flowing through the semiconductor element 2 while the scanning by the scanning unit 12 is performed.
[0085] According to this evaluation system 100, while it is difficult to accurately calculate the electric field strength at points where the electric field is concentrated, such as the periphery of the interface 5, in two-dimensional electromagnetic field simulations, this system has the advantage of being able to accurately determine the electric field strength at points where the electric field is concentrated at the interface 5. In other words, it has the advantage of being able to accurately evaluate the electric field distribution at the interface 5 between the electrode 4 and the semiconductor 3 in the semiconductor device 2.
[0086] Furthermore, the method for manufacturing the semiconductor element 2 according to the embodiment is a method for manufacturing the semiconductor element 2 by providing electrodes 4 on a semiconductor 3, and includes step S302 of providing a relaxation section 6 that alleviates the concentration of the electric field at locations where the electric field strength at the interface 5 is greater than or equal to a predetermined size, based on the evaluation by the evaluation method described above.
[0087] This method for manufacturing the semiconductor element 2 makes it easier to manufacture a semiconductor element 2 in which the electric field is less likely to concentrate at the interface 5 between the electrode 4 and the semiconductor 3, and has the advantage of making it easier to increase the voltage resistance of the semiconductor element 2.
[0088] Furthermore, for example, in the manufacturing method of the semiconductor element 2, in step S302, a relaxation portion 6 is provided, which protrudes from the side surface 400 of the electrode 4, and the length of the protrusion d1 increases as it approaches the surface 300 on which the electrode 4 of the semiconductor 3 is provided.
[0089] This method for manufacturing the semiconductor device 2 has the advantage of being able to produce a semiconductor device 2 that avoids electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, without having to form an electrode 4 having a complex structure such as a field plate electrode or a guard ring structure.
[0090] Furthermore, for example, in the manufacturing method of semiconductor element 2, semiconductor element 2 is a Schottky diode.
[0091] This method for manufacturing the semiconductor element 2 makes it easier to manufacture a Schottky diode in which the electric field is less likely to concentrate at the interface 5 between the electrode 4 and the semiconductor 3, and has the advantage of making it easier to increase the voltage rating of the Schottky diode.
[0092] Furthermore, the semiconductor element 2 according to the embodiment comprises a semiconductor 3 and an electrode 4 provided on one surface 300 of the semiconductor 3. The electrode 4 protrudes from the side surface 400 of the electrode 4 and is in contact with one surface 300 of the semiconductor 3, and has a relaxation portion 6 that reduces the concentration of the electric field.
[0093] Such a semiconductor element 2 has the advantage of making it easier to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even without having an electrode 4 with a complex structure such as a field plate electrode or a guard ring structure.
[0094] Furthermore, for example, in the semiconductor element 2, the relaxation portion 6 is a base portion 61 whose protruding length d1 increases as it approaches one surface 300 of the semiconductor 3.
[0095] Such a semiconductor element 2 has the advantage of making it easier to avoid electric field concentration at the interface 5 between the electrode 4 and the semiconductor 3, even without having an electrode 4 with a complex structure such as a field plate electrode or a guard ring structure. [Industrial applicability]
[0096] The present invention can be used, for example, as a method for evaluating the interface between an electrode and a semiconductor in a semiconductor device such as a Schottky diode. [Explanation of Symbols]
[0097] 100 Evaluation System 11. Electric field application section 111 DC power supply 12 Scanning Unit 13 Evaluation Department 131 Ammeter 2 Semiconductor elements 3,3A Semiconductor 31 GaN substrate 32,33 n-GaN layer 300 side 4,4A electrode 41,41A Schottky electrode 42,42A Ohmic Electrode 400 Side view 5 Interface 6 Relaxation part 61 Hem A1 Electric field lines d1 projection length Eg band gap Eg' Effective band gap L1 Laser light (predetermined light) Processing S101-S103, S201-S206 S301,S302 process ST1 Electric field application step ST2 First Scanning Step ST3 First Evaluation Step ST4 Second Scanning Step ST5 Second Evaluation Step ST6 Third Evaluation Step
Claims
1. Semiconductors and, The semiconductor comprises an electrode provided on one surface of the semiconductor, The electrode protrudes from its side surface and is in contact with the one surface of the semiconductor, and has a relaxation portion that reduces the concentration of the electric field. The relaxation portion is a base portion of the semiconductor whose protruding length increases towards the one surface of the semiconductor, The aforementioned base portion is convex toward the one surface of the semiconductor and has an arc-shaped cross-section that extends from the side surface of the electrode to the one surface of the semiconductor. Semiconductor element.
2. The thickness of the relaxation portion is less than 10 nm. The semiconductor device according to claim 1.
3. The thickness of the relaxation portion decreases continuously as it approaches the surface of the semiconductor. The semiconductor device according to claim 1.
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