CD-dependent gap filling and conformal film

Abstract

Methods for depositing silicon-containing materials are disclosed. Some embodiments of the present disclosure provide films that fill narrow CD features without seams or voids. Some embodiments of the present disclosure provide films that conformally form over features with wider CDs. Embodiments of the present disclosure also provide superior quality films with low roughness, low defects, and advantageously low deposition rates.

Description

Technical Field

[0001]

[0001] Embodiments of the present disclosure generally relate to methods for gap filling and forming conformal films. In particular, embodiments of the present disclosure relate to methods that enable gap filling and conformal films that depend on the critical dimension (CD) of features on a substrate.

Background Art

[0002]

[0002] Next-generation SiGe finFETs and gate-all-around (GAA) transistors require high-quality films that can be deposited at lower deposition temperatures. The relatively low deposition temperature prevents or minimizes the outward diffusion of SiGe.

[0003]

[0003] Atomic layer deposition (ALD) processes and conventional "flowable" CVD have been evaluated at low deposition temperatures for shallow trench isolation (STI) gap filling. However, ALD provides poor-quality films with seams or voids at narrow trench dimensions, while conventional "flowable" CVD with low annealing temperatures provides films with high wet etching rates at wide trench dimensions due to film stress and high volume shrinkage.

[0004]

[0004] Therefore, there is a need for a deposition method that provides gap filling without seams or voids at smaller dimensions and high-quality conformal films at larger dimensions.

Summary of the Invention

[0005]

[0005] One or more embodiments of the present disclosure relate to a method for depositing a silicon-containing material. The method includes exposing a substrate surface having at least one feature formed internally to a silicon precursor and a plasma-based reactant in order to deposit a fluid polysilazane material. The fluid polysilazane material is exposed to UV radiation to cure the fluid polysilazane material to form a SiNH film. The SiNH film is annealed in an annealing environment to form a silicon-containing material.

[0006]

[0006] Further embodiments of the present disclosure relate to a method for forming a silicon oxide material. The method includes exposing a substrate surface having at least one feature formed internally to a plasma-based reactant containing trisilylamine and water and / or oxygen in order to deposit a fluid polysilazane material. The fluid polysilazane material is exposed to UV radiation to cure the fluid polysilazane material to form a SiNH film. The substrate surface is exposed to oxygen or ozone before or during exposure to UV radiation. To form a silicon oxide material, the SiNH film is annealed in an annealing environment containing water. The silicon oxide material laterally fills at least one feature without substantial seams or voids when the aperture width of at least one feature is 10 nm or less, and the silicon oxide material conformally forms on the surface of at least one feature when the aperture width of at least one feature is in the range of 20 nm to 40 nm.

[0007]

[0007] Further embodiments of the present disclosure relate to a method for forming a silicon nitride material. The method includes exposing a substrate surface having at least one feature formed internally to a plasma-based reactant comprising trisilylamine and ammonia in order to deposit a fluid polysilazane material. The fluid polysilazane material is exposed to UV radiation to cure the fluid polysilazane material to form a SiNH film. The substrate surface is exposed to ammonia before or during exposure to UV radiation. The SiNH film is annealed in a dry annealing environment to form a silicon nitride material. The silicon nitride material laterally fills at least one feature without substantial seams or voids when the aperture width of at least one feature is 10 nm or less, and the silicon nitride material conformally forms on the surface of at least one feature when the aperture width of at least one feature is in the range of 20 nm to 40 nm.

[0008]

[0008] To enable a detailed understanding of the features of the present disclosure described above, a more specific description of the present disclosure, which has been briefly summarized above, can be obtained by referring to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings illustrate only typical embodiments of the present disclosure, and since the present disclosure may also permit other equally valid embodiments, the accompanying drawings should not be considered to limit the scope of the present disclosure. [Brief explanation of the drawing]

[0009] [Figure 1]

[0009] An exemplary substrate having features before processing according to one or more embodiments of the present disclosure is shown. [Figure 2]

[0010] An exemplary substrate having a narrow CD after processing according to one or more embodiments of the present disclosure is shown. [Figure 3]

[0011] The following are exemplary substrates having a wide CD after processing according to one or more embodiments of the present disclosure. [Figure 4]

[0012] The following are exemplary processing methods according to one or more embodiments of this disclosure. [Figure 5]

[0013] The present disclosure illustrates exemplary processing methods for bottom-up filling according to one or more embodiments thereof. [Figure 6]

[0014] An exemplary processing system according to one or more embodiments of this disclosure is shown. [Modes for carrying out the invention]

[0010] Before describing some exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the configuration or process details described in the following specification. Other embodiments of this disclosure are possible and can be implemented or performed in various ways.

[0011]

[0015] As used herein and in the appended claims, the term “substrate” refers to a surface or portion of a surface on which a process is performed. As will be obvious to those skilled in the art, when a substrate is mentioned, it may refer only to a portion of the substrate unless otherwise explicitly stated in the context. Furthermore, when a deposition on a substrate is mentioned, it may mean both a bare substrate and a substrate on which one or more films or features are deposited or formed.

[0012]

[0016] As used herein, “substrate” refers to any substrate or material surface formed on a substrate on which a film treatment is performed during the manufacturing process. For example, substrate surfaces on which treatment may be performed include, depending on the application, materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials. A substrate includes, but is not limited to, a semiconductor wafer. A substrate may undergo pretreatment processes to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, electron beam (e-beam) cure, and / or bake the substrate surface. In addition to performing film treatment directly on the substrate surface itself, in this disclosure any of the disclosed film treatment steps may also be performed on underlying layers formed on the substrate, as will be described in more detail later. The term “substrate surface” is intended to include such underlying layers, as the context indicates. Therefore, for example, if a film / layer or partial film / layer is deposited on the substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0013]

[0017] One or more embodiments of this disclosure relate to methods for depositing silicon-containing materials. In some embodiments, the method advantageously deposits a fluid film on a narrow CD and a conformal film on an intermediate or wide CD. In some embodiments, the method advantageously provides seam / void-free gap filling for narrow features (e.g., trenches).

[0014]

[0018] In some embodiments, the method advantageously provides excellent film quality for films deposited on broad features. Without being constrained by theory, the excellent film quality is thought to be due to reduced film stress as a result of conformal deposition, reduced impurities, and / or reduced volume shrinkage due to reactive curing and / or plasma post-treatment.

[0015]

[0019] In some embodiments, the method advantageously provides better integration of silicon-based barrier films (e.g., SiC, SiCO, SiCN, SiCON, SiN, and / or Si) with subsequent ALD. In some embodiments, the method advantageously provides silicon-containing films with reduced roughness and / or defects. In some embodiments, the method enables periodic deposition / etching and / or deposition / curing processes.

[0016]

[0020] Referring to the drawings, Method 400 begins in Operation 410 by exposing a substrate 100, in which at least one feature 110 is formed internally, to a silicon precursor and a plasma-based reactant in order to deposit a fluid polysilazane material 210. When used in this regard, the fluid material is such that, under appropriate conditions, it flows by gravity to lower points on the substrate surface and / or by capillary action into narrow CD spaces of trenches or other features. In some embodiments, the fluid polysilazane material has a relatively high viscosity and flows slowly. In some embodiments, the fluid polysilazane material has a lower viscosity and flows more easily.

[0017]

[0021] In some embodiments, the silicon precursor comprises a compound that can be polymerized by a plasma-based reactant to produce short oligomers. In some embodiments, the silicon precursor comprises or is essentially composed of trisilylamine (TSA).

[0018]

[0022] In some embodiments, the plasma-based reactants are ignited within a region separated from the main processing region. Stated another way, in some embodiments, the plasma-based reactants are remote plasmas or are remotely ignited. In some embodiments, the plasma-based reactants include plasma reactants and an inert gas. In some embodiments, the plasma reactants include or consist essentially of one or more of ammonia (NH3), oxygen (O2), or water (H2O). In some embodiments, the inert gas includes or consists essentially of noble gases (e.g., helium, neon, argon, xenon).

[0019]

[0023] FIG. 1 shows a cross-sectional view of a substrate 100 having a feature 110. The present disclosure relates to a substrate and a substrate surface including at least one feature. Although FIG. 1 shows a substrate 100 having a single feature 110 for illustrative purposes, those skilled in the art will understand that two or more features 110 may be present. The shape of feature 110 can be any suitable shape including, but not limited to, trenches, cylindrical vias, or rectangular vias.

[0020]

[0024] As used herein, the term "feature" means any intentional surface irregularity. Suitable examples of features include, without limitation, trenches having a top, two sidewalls, and a bottom, and peaks having a top and two sidewalls without another bottom. As described below, the feature can have any suitable aspect ratio (the ratio of the depth of the feature to the width of the feature).

[0021]

[0025] The substrate 100 has a substrate surface 120. At least one feature 110 forms an opening within the substrate surface 120. The feature 110 extends a depth D from the substrate surface 120 (also referred to as the top surface) to the bottom surface 112. The feature 110 has a first sidewall 114 and a second sidewall 116. The feature shown in FIG. 1 has parallel sidewalls 114, 116, although the width of the feature is most often defined by the width W of the feature at the upper opening of the feature 110. This measurement may also be referred to as the opening width. The open area formed by the sidewalls 114, 116 and the bottom surface 112 is also referred to as the gap.

[0022]

[0026] Referring to FIG. 2, in some embodiments, at least one feature has a narrow opening width (10 nm or less) and a flowable polysilazane material 210 fills the at least one feature 110 laterally without substantial seams or voids. In some embodiments, at least one feature has a narrow opening width (10 nm or less) and a silicon-containing material fills the at least one feature 110 laterally without substantial seams or voids.

[0023]

[0027] As used herein and in the appended claims, a seam is a gap or crack formed within a feature between the sidewalls of the feature 110, although it is not necessarily centered between the two sidewalls. Without being bound by theory, a seam may be formed when the lattice structure of a film grown from the sidewalls of the feature does not harmonize when meeting near the center of the feature.

[0024]

[0028] As used herein and in the appended claims, a void is an empty area where the gap filling material 210 did not deposit within the feature 110. Without being bound by theory, voids are often formed when the material deposits faster near the top of the feature and closes the opening of the feature before the gap filling material can completely fill the feature. The remaining unfilled space is the void.

[0025]

[0029] When used in this context, the terms “substantially seam-free” or “substantially void-free” mean that any crystalline irregular or closed spaces, in which no material is formed within the space between the sidewalls of the feature, constitute less than approximately 1% of the cross-sectional area of ​​the feature.

[0026]

[0030] Without being constrained by theory, it is thought that a relatively narrow opening width promotes the flow of fluid polysilazane material into features through capillary action. Because fluid materials do not have a fixed crystalline structure, seams and voids are less likely to form within features. Therefore, silicon-containing materials formed from fluid polysilazane material are also less likely to have seams and voids.

[0027]

[0031] Referring to Figure 3, in some embodiments, at least one feature has a wider aperture width (ranging from 20 nm to 40 nm), and the silicon-containing material is conformally formed on the surface of at least one feature 110. When used in this regard, the conformally formed material on the substrate has an average thickness T on the sidewalls. S , thickness T at the bottom and top B , with a thickness T on the top surface T These have values ​​within ±10%, ±5%, or ±2%. As previously mentioned, it is possible to control the relative flow rate of the fluid polysilazane material. Therefore, even if the material is fluid, it is possible to perform the curing and annealing processes described below before the material has a chance to flow out of the top and side walls. This is especially true when there is little capillary force drawing the fluid polysilazane material into feature 110.

[0028]

[0032] Method 400 continues in operation 420 by exposing the fluid polysilazane material 210 to UV radiation in order to cure the fluid polysilazane material 210 and form a SiNH film 220. In some embodiments, the substrate surface is optionally exposed to a cure reactant before or concurrently with the exposure of the fluid polysilazane material 210 to UV radiation.

[0029]

[0033] In some embodiments, the cured reaction product determines the final composition of the silicon-containing material 240. In some embodiments, the silicon-containing material 240 contains silicon oxide, and the cured reaction product contains oxygen (O2) or ozone (O3). In some embodiments, the silicon-containing material contains silicon nitride, and the cured reaction product contains ammonia (NH3). In this regard, the SiNH film 220 in some embodiments may also be described as a SiNOH film. In this disclosure, the term “SiNH film 220” is intended to refer to either a SiNH film or a SiNOH film.

[0030]

[0034] In operation 430, the SiNH film 220 is annealed in an annealing environment to form the silicon-containing material 240. In some embodiments, the annealing environment includes a temperature higher than the process temperature used in operation 410 or operation 420. In some embodiments, the temperature of the annealing environment is in the range of 300°C to 700°C, 300°C to 500°C, 500°C to 700°C, 300°C to 400°C, 400°C to 500°C, 500°C to 600°C, or 600°C to 700°C. In some embodiments, the annealing environment includes water or steam.

[0031]

[0035] In some embodiments, operations 410 and 420 are repeated to form a predetermined thickness of the SiNH film 220 before proceeding to operation 430. This process may be called the deposition-curing cycle before the annealing step. In some embodiments, operations 410, 420, and 430 are repeated sequentially to form a predetermined thickness of the silicon-containing material 240. This process may be called the deposition-curing-annealing cycle.

[0032]

[0036] In some embodiments, in operation 440, the silicon-containing material 240 is optionally exposed to a plasma treatment to improve one or more film properties. In some embodiments, the improved film property is a reduced wet etching rate or wet etching rate ratio compared to a thermally deposited SiO2 film. In some embodiments, the plasma treatment includes one or more of RF plasma, DC plasma, or microwave plasma. In some embodiments, the plasma treatment is performed at a relatively low temperature. In some embodiments, the temperature during the plasma treatment is 700°C or less, 600°C or less, or 500°C or less. In some embodiments, the plasma treatment includes a plasma generated from one or more inert gases, non-limited to He, Ne, Ar, or Xe. In some embodiments, the plasma includes a plasma generated from one or more reactive gases, non-limited to O2, H2, H2O, H2O2, or a combination of H2 and O2.

[0033]

[0037] Referring to Figure 5, in some embodiments, a method 500 for forming a silicon-containing material in a bottom-up manner begins with a previously disclosed method 400 to form a silicon-containing material 240. In operation 550, the silicon-containing material 240 is etched to remove it from the upper portion of the sidewalls 114, 116 of at least one feature 110. Then, in operation 560, methods 400 and operation 550 are repeated to deposit and etch the silicon-containing material 240 to form a silicon-containing material in at least one feature in a bottom-up manner.

[0034]

[0038] Similarly, in some embodiments not shown, operation 550 may be inserted into method 400 to form silicon-containing material 240 in at least one feature in a bottom-up manner, and the resulting method is repeated. For example, operation 550 may be performed on the fluid polysilazane material 210 before curing the fluid polysilazane material 210 in operation 420. Alternatively, operation 550 may be performed on the SiNH film 220 before annealing the SiNH film 220 in operation 430.

[0035]

[0039] In some embodiments, the formation rate of the silicon-containing material 240 may be controlled. Without being constrained by theory, it is thought that a slower deposition rate results in a relatively lower flow rate of the fluid polysilazane material 210. This lower flow rate is thought to enable conformal deposition for wider features and seam / void-free deposition for narrower features. In some embodiments, the deposition rate of the fluid polysilazane material 210 or the SiNH film 220 is 10 Å / sec or less, 8 Å / sec or less, or 5 Å / sec or less.

[0036]

[0040] In some embodiments, the film properties of the silicon-containing material are superior to those of silicon-containing materials deposited by other methods. For example, in some embodiments, the root mean square roughness (R) of the silicon-containing material 240 q ) is 0.3 or less.

[0037]

[0041] As mentioned above, several process parameters may be controlled to adjust the flow rate of the fluid polysilazane material. The effect of the formation rate of the fluid polysilazane material is as described above.

[0038]

[0042] Furthermore, the substrate temperature may be controlled during the method for forming the silicon-containing material 240. In some embodiments, the substrate is maintained at a temperature in the range of 50°C to 200°C, or 50°C to 150°C, or 50°C to 100°C, or 50°C to 75°C, or 100°C to 200°C, or 150°C to 200°C, or 60°C to 150°C. Without being bound by theory, it is thought that relatively high processing temperatures provide a film with reduced roughness, reduced defects, slower flow rates, and higher conformality on wider features.

[0039]

[0043] Furthermore, the pressure of the processing environment may be controlled during the method of forming the silicon-containing material. In some embodiments, the processing chamber is maintained at a pressure in the range of 1 mTorr to 100 Torr, 10 mTorr to 10 Torr, 10 mTorr to 1.0 Torr, or 0.1 Torr to 1.0 Torr. Without being bound by theory, it is thought that relatively low processing pressures provide films with reduced roughness, reduced defects, slower flow rates, and higher conformability on wider features.

[0040]

[0044] Referring to Figure 6, further embodiments of the present disclosure relate to a processing system 900 for performing the methods described herein. Figure 6 shows a system 900 that may be used to process substrates according to one or more embodiments of the present disclosure. The system 900 may be referred to as a cluster tool. The system 900 includes a central transfer station 910 having a robot 912 inside. The robot 912 is shown as a single-blade robot, but those skilled in the art will recognize that other robot 912 configurations are within the scope of the present disclosure. The robot 912 is configured to move one or more substrates between chambers connected to the central transfer station 910.

[0041]

[0045] At least one pre-cleaning / buffering chamber 920 is connected to the central transfer station 910. The pre-cleaning / buffering chamber 920 may include one or more of a heater, a radical source, or a plasma source. The pre-cleaning / buffering chamber 920 may be used as a holding area for individual semiconductor substrates or for wafer cassettes for processing. The pre-cleaning / buffering chamber 920 may perform a pre-cleaning process, or preheat substrates for processing, or simply be a staging area for processing sequences. In one embodiment, there are two pre-cleaning / buffering chambers 920 connected to the central transfer station 910.

[0042]

[0046] In the embodiment shown in Figure 6, the pre-cleaning chamber 920 may function as a transit chamber between the factory interface 905 and the central transfer station 910. The factory interface 905 may include one or more robots 906 for moving substrates from the cassette to the pre-cleaning / buffering chamber 920. Robot 912 may then move the substrates from the pre-cleaning / buffering chamber 920 to other chambers in the system 900.

[0043]

[0047] The first processing chamber 930 may be connected to the central transfer station 910. The first processing chamber 930 may be configured as a plasma deposition chamber and may be in fluid communication with one or more reaction gas sources to supply one or more flows of reaction gases to the first processing chamber 930. The substrate may be moved by a robot 912 to and from the processing chamber 930, passing through a shut-off valve 914.

[0044]

[0048] The processing chamber 940 may also be connected to the central transfer station 910. In some embodiments, the processing chamber 940 is equipped with a UV curing chamber and is in fluid communication with one or more reaction gas sources to supply a flow of reaction gas to the processing chamber 940 in order to perform an isotropic etching process. The substrate may be moved by a robot 912 in and out of the processing chamber 940, passing through a shut-off valve 914.

[0045]

[0049] The processing chamber 945 may also be connected to the central transfer station 910. In one embodiment, the processing chamber 945 is of the same type as the processing chamber 940, configured to perform the same processes as the processing chamber 940. This arrangement would be useful if the processes performed in the processing chamber 940 take considerably longer than the processes performed in the processing chamber 930.

[0046]

[0050] In some embodiments, the processing chamber 960 is connected to a central transfer station 910 and configured to function as an annealing chamber. The processing chamber 960 may be configured to perform one or more different epitaxial growth processes.

[0047]

[0051] In some embodiments, each of the processing chambers 930, 940, 945, and 960 is configured to perform various parts of a processing method. For example, processing chamber 930 may be configured to perform a plasma deposition process, processing chamber 940 may be configured to perform a UV curing process, and processing chamber 960 may be configured to perform an annealing process. The number and arrangement of the individual processing chambers on the tool can be changed, and those skilled in the art will recognize that the embodiment shown in Figure 6 represents only one possible configuration.

[0048]

[0052] In one embodiment, the processing system 900 includes one or more measurement stations. For example, the measurement stations may be located within the pre-wash / buffering chamber 920, the central transfer station 910, or within any of the individual processing chambers. The measurement stations may be located at any position within the system 900 that allows for the measurement of recess distances without exposing the substrate to an oxidizing environment.

[0049]

[0053] At least one controller 950 is connected to one or more of the central transfer station 910, pre-wash / buffer chamber 920, and processing chambers 930, 940, 945, or 960. In some embodiments, there are two or more controllers 950 connected to individual chambers or stations, and a main control processor is connected to each of the individual processors to control the system 900. The controller 950 may be one of any form of general-purpose computer processor, microcontroller, microprocessor, etc., which can be used in industrial environments to control various chambers and subprocessors.

[0050]

[0054] At least one controller 950 may have a processor 952, a memory 954 connected to the processor 952, an input / output device 956 connected to the processor 952, and support circuits 958 for communication between various electronic components. The memory 954 may include one or more transient memory (e.g., random access memory) and non-transient memory (e.g., storage device).

[0051]

[0055] The processor's memory 954 or computer-readable medium may be one or more readily available memories, such as random access memory (RAM), read-only memory (ROM), floppy disks, hard disks, or any other form of local or remote digital storage. Memory 954 may hold a set of instructions executable by the processor 952 to control the parameters and components of the system 900. Support circuitry 958 is connected to the processor 952 to support the processor in a conventional manner. For example, the circuitry may include a cache, power supply, clock circuitry, input / output circuitry, subsystems, and the like.

[0052]

[0056] The process can generally be stored in memory as a software routine. When executed by a processor, the software routine causes a process chamber to execute the process of the disclosure. The software routine may also be stored and / or executed by a second processor (not shown) located remotely from the hardware controlled by the processor. Some or all of the methods of the disclosure can also be executed in hardware. Thus, the process may be implemented in software and executed in hardware using a computer system, for example, as an application-specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. When executed by a processor, the software routine transforms a general-purpose computer into a dedicated computer (controller) that controls the chamber operation so that the process can be executed.

[0053]

[0057] In one embodiment, the controller 950 has one or more configurations for executing individual processes or subprocesses to carry out the method. The controller 950 may be connected to or configured to operate intermediate components to perform the functions of the method. For example, the controller 950 may be connected to and configured to control one or more of the following: gas valves, actuators, motors, slit valves, pressure reducing controls, etc.

[0054]

[0058] In several embodiments, the controller 950 has one or more configurations selected from: a configuration for moving a substrate on a robot between a plurality of processing chambers and a measurement station; a configuration for loading a plurality of substrates into and / or unloading them from the system; a configuration for depositing a fluid polysilazane material; a configuration for curing the fluid polysilazane material to form a SiNH film; and a configuration for annealing the SiNH film to form a silicon-containing material.

[0055]

[0059] Throughout this specification, any reference to “one embodiment,” “certain embodiments,” “one or more embodiments,” or “an embodiment” means that a particular feature, structure, material, or property described in relation to an embodiment is included in at least one embodiment of this disclosure. Therefore, expressions such as “in one or more embodiments,” “in a particular embodiment,” “in one embodiment,” or “in an embodiment” in various parts of this specification do not necessarily refer to the same embodiment of this disclosure. Furthermore, particular features, structures, materials, or properties may be combined in any suitable manner in one or more embodiments.

[0056]

[0060] While the disclosure herein is described with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and uses of the disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatus of the disclosure without departing from the spirit and scope of the disclosure. Therefore, the present invention is intended to include modifications and variations contained in the accompanying claims and equivalents.

Claims

1. A method for depositing silicon-containing material, To deposit a fluid polysilazane material, the substrate surface in which at least one feature is formed internally is exposed to a silicon precursor and a plasma-based reactant. In order to cure the fluid polysilazane material and form a SiNH film, the fluid polysilazane material is exposed to UV radiation, and A method comprising annealing the SiNH film in an annealing environment in order to form a silicon-containing material.

2. A method for depositing a silicon-containing material, To deposit a fluid polysilazane material, the substrate surface in which at least one feature is formed internally is exposed to a silicon precursor and a plasma-based reactant. In order to cure the fluid polysilazane material and form a SiNH film, the fluid polysilazane material is exposed to UV radiation, and To form a silicon-containing material, the SiNH film is annealed in an annealing environment. A method comprising the following steps: the at least one feature having an aperture width of 10 nm or less, and the silicon-containing material filling the at least one feature laterally without substantial seams or voids.

3. The method according to claim 1, wherein the at least one feature has an aperture width in the range of 20 nm to 40 nm, and the silicon-containing material is conformally formed on the surface of the at least one feature.

4. To remove the silicon-containing material from the upper part of the side wall of at least one feature, the silicon-containing material is etched, and The method according to claim 1, further comprising repeatedly depositing additional silicon-containing material to form the silicon-containing material within the at least one feature in a bottom-up manner, and etching the silicon-containing material from the upper part of the side wall.

5. The method according to claim 1, further comprising repeatedly depositing the fluid polysilazane material to form a predetermined thickness of the SiNH film before annealing the SiNH film, and curing the fluid polysilazane material.

6. The method according to claim 1, wherein the silicon-containing material is formed at a rate of 10 Å or less per second.

7. The root mean square roughness (R) of the silicon-containing material ｑ The method according to claim 1, wherein ) is 0.3 or less.

8. The method according to claim 1, wherein the substrate surface is maintained at a temperature in the range of 50°C to 100°C.

9. The method according to claim 1, wherein the silicon precursor essentially consists of trisilylamine (TSA).

10. The method according to claim 1, wherein the plasma-based reactant is ignited remotely.

11. The method according to claim 1, wherein the plasma-based reactant comprises a plasma reactant and an inert gas.

12. The plasma reactant is ammonia (NH₃). 3 ), oxygen (O 2 ), or water (H 2 The method according to claim 11, comprising one or more of O).

13. The method according to claim 11, wherein the inert gas includes a noble gas (He, Ne, Ar, Xe).

14. The method according to claim 1, further comprising exposing the substrate surface to a cured reaction product before or simultaneously with exposing the fluid polysilazane material to UV radiation.

15. The silicon-containing material contains silicon dioxide, and the curing reaction product is oxygen (O 2 ) or ozone (O 3 The method according to claim 14, including )

16. The silicon-containing material comprises silicon nitride, and the curing reaction product is ammonia (NH₃). 3 The method according to claim 14, including )

17. The method according to claim 1, wherein the annealing environment includes water.

18. The method according to claim 1, further comprising exposing the silicon-containing material to plasma treatment at a low temperature, wherein the plasma treatment includes one or more of RF plasma, DC plasma, or microwave plasma.

19. A method for forming a silicon dioxide material, To deposit a fluid polysilazane material, the substrate surface in which at least one feature is formed internally is exposed to a plasma-based reactant containing trisilylamine and water and / or oxygen. The fluid polysilazane material is exposed to UV radiation in order to cure the fluid polysilazane material and form a SiNH film, wherein the substrate surface is exposed to oxygen or ozone before or during exposure to UV radiation, and A method for forming a silicon oxide material, comprising annealing the SiNH film in an annealing environment containing water, wherein the silicon oxide material laterally fills the at least one feature without substantial seams or voids when the aperture width of the at least one feature is 10 nm or less, and conformally forms on the surface of the at least one feature when the aperture width of the at least one feature is in the range of 20 nm to 40 nm.

20. A method for forming a silicon nitride material, To deposit a fluid polysilazane material, the substrate surface in which at least one feature is formed is exposed to a plasma-based reactant containing trisilylamine and ammonia. The fluid polysilazane material is exposed to UV radiation in order to cure the fluid polysilazane material and form a SiNH film, wherein the substrate surface is exposed to ammonia before or during exposure to UV radiation, and A method for forming a silicon nitride material, comprising annealing the SiNH film in a dry annealing environment, wherein the silicon nitride material laterally fills the at least one feature without substantial seams or voids when the aperture width of the at least one feature is 10 nm or less, and conformally forms on the surface of the at least one feature when the aperture width of the at least one feature is in the range of 20 nm to 40 nm.

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