Safe data wiping of solid-state drives for reuse and recycling

Abstract

The process for securely erasing data from a solid-state drive (SSD) involves first generating a restoration image of the information stored on the drive, such as a factory image, that characterizes the restored state of the drive before user data is stored on the drive. Next, energy is applied to the drive, such as by applying thermal energy or high-energy electromagnetic radiation, to encourage electrons representing bits in corresponding memory cells to leave the cells. Generating a set of quantitative data to present to the user to verify the erasure of the data also helps ensure confidence in the data wipe process. The drive may also be electrically erased before energizing the SSD to provide another level of confidence in the data wipe process. The restoration image may then be loaded into the desired location on the wiped drive to restore drive functionality.

Description

Technical Field

[0001] (Cross - reference to Related Applications) This application claims the priority of U.S. Provisional Patent Application No. 63 / 523,889, filed on June 28, 2023, and incorporates by reference in its entirety the U.S. Non - Provisional Patent Application No. 18 / 230,145, titled "SOLID - STATE DRIVE SECURE DATA WIPING FOR REUSE AND RECYCLING", filed on August 3, 2023, for all purposes.

[0002] Embodiments of the present invention generally relate to data storage systems, and more particularly, may relate to a method for securely wiping a solid - state drive.

Background Art

[0003] An SSD (Solid - State Drive) is a type of data storage device configured to permanently store data on interconnected non - volatile solid - state flash memory chips and can be electrically erased and reprogrammed. There are mainly two types of flash memory: NAND (NOT - AND) flash and NOR flash, which are named after NAND logic gates and NOR logic gates, respectively. Both types of flash generally use floating - gate transistors (FGT) containing charge - trap cells to hold a charge representing a single - bit of data, e.g., a charged cell represents "1" and a cell without charge represents "0". SSDs can typically use single - level cells, multi - level cells, and / or triple - level cells. For example, a single - level cell (SLC) can hold 1 bit of data at a time, a multi - level cell (MLC or alternatively double - level cell) can hold 2 bits of data per cell, and a triple - level cell (TLC) can hold 3 bits of data per cell.

[0004] With the proliferation of robust digital data storage, robust and reliable data erasure (or "wiping") of data storage devices is desired. The certainty and reliability of digital data erasure are particularly important in the context of storage device reuse and recycling, where protecting one's data from others is paramount. In the case of magnetic hard disk drives (HDDs), when a customer demagnetizes a standard HDD, the data is undoubtedly erased from the drive. This allows for recycling with the confidence that the drive leaves the data center without data. However, while this level of reliability may exist with SSDs, it may not be worthwhile in some cases.

[0005] Any technique described in this section is a technique that may be pursued, but not necessarily a technique that has been previously conceived or pursued. Therefore, unless otherwise indicated, none of the techniques described in this section should be assumed to be prior art simply because they are included in this section. [Brief explanation of the drawing]

[0006] Embodiments are shown in the accompanying drawings as examples and are not limited thereto; similar reference numerals refer to similar elements. [Figure 1] This is a block diagram of a solid-state drive (SSD) according to one embodiment of the present invention. [Figure 2] This is a flowchart illustrating a method for erasing data from a solid-state drive (SSD) according to one embodiment of the present invention. [Modes for carrying out the invention]

[0007] This document describes a method for reliably erasing data from a solid-state drive (SSD) in a trustworthy manner. The following description includes numerous specific details to enable a full understanding of the embodiments of the invention described herein for illustrative purposes. However, it will be apparent that the embodiments of the invention described herein can be carried out without these specific details. In other instances, well-known structures and devices are shown in block diagram form to avoid unnecessarily obscuring the embodiments of the invention described herein.

[0008] Introduction term References to “one embodiment,” “one embodiment,” etc., in this specification are intended to mean that certain features, structures, or characteristics described are included in at least one embodiment of the present invention. However, examples of such phrases do not necessarily all refer to the same embodiment.

[0009] As used herein, the term “substantially” is understood to describe features such as being largely or nearly structured, composed, and dimensioned, but manufacturing tolerances and other factors may result in situations where the structure, composition, dimensions, etc., are not always or necessarily described precisely. For example, describing a structure as “substantially vertical” is a simplified interpretation of the term, meaning that the sidewalls are practically vertical, but not necessarily exactly 90 degrees throughout.

[0010] Terms such as “optimal,” “optimized,” “minimized,” “minimized,” “maximized,” and “maximized” do not necessarily have specific values ​​associated with them, and where such terms are used herein, it is intended that those skilled in the art will understand that such terms include affecting values, parameters, metrics, etc., in a beneficial direction consistent with the whole of this disclosure. For example, describing a value as “minimized” should be understood in a practical sense that the value does not actually have to be equal to some theoretical minimum (e.g., 0), but the corresponding goal is to move the value in a beneficial direction toward the theoretical minimum.

[0011] situation It should be noted that in the context of reusing and recycling storage devices, where protecting one's data from others is paramount, certainty and reliability of digital data erasure are considered crucial. Known techniques for erasing or "wiping" solid-state drives (SSDs) include erasing encryption keys corresponding to data stored in encrypted form on the SSD, and "electrical wiping," which electrically erases or overwrites the stored data. Regarding encryption key wiping, this methodology is declining in use and popularity as computing power advances and technologies like quantum computing emerge, making it increasingly likely that wiping the key will not completely protect the stored data to the desired level of confidence. Regarding electrical wiping, while this is considered a fairly secure method, one problem is that the data erasure is performed by the device itself, thus requiring trust in the device firmware to successfully wipe all the data, but trust in data security situations is susceptible to one party's mistakes. For example, the firmware's erasure algorithm may also exclude certain storage areas, such as logs, bad blocks, and metadata locations that may contain sensitive information. Furthermore, erasure may not be complete; for example, even if erasure is performed by overwriting or electrical erasure, some of the original data may remain on the device in some form. In addition, there may be hardware problems such as physical defects that prevent erasure from occurring, such as NAND pump failure or block selection gate problems. Both of these methods maintain the functionality of the device, but the reliability and functionality of the device are required. As a result, many facilities and users resort to destructive methods such as drilling out ASICs and / or memory packages. While this method is very safe when performed properly, it is clearly destructive and not very effective in terms of reusing the device or its subcomponents.

[0012] Secure and reliable erasure of solid-state drives Figure 2 is a flowchart illustrating a method for erasing data from a solid-state drive (SSD) according to one embodiment of the present invention. Erasing data from an SSD (or “device” or “drive”) may generally be referred to as wiping the device, wiping, etc.

[0013] In block 202, before user data is saved to the SSD, a restored image of the information stored on the SSD is generated, characterizing the restored state of the SSD. According to one embodiment, the restored image includes a "backup" factory image of essential information, i.e., a snapshot generated by the manufacturer at the manufacturing plant to restore the SSD to its factory condition or state. Such an image may include, in non-limiting examples, firmware, bad block maps, configuration data, NAND ROM, etc. Furthermore, this restored image may have the additional advantage of being able to restore the functionality of a storage device that has become unrecoverable.

[0014] According to one embodiment, this information, represented in the recovered image, is provided to the customer / user via a web portal, allowing the device to be re-imaged after all data has been completely wiped. For example, a simple portal can be built to allow anyone to easily retrieve the image at any time by providing a request for the image based on the model number or serial number (and possibly other unique information on the label). Additionally and / or alternatively, if the device is formatted, this recovered image (and, for example, a recovery utility) can be shipped with the device by being stored on the device. The recovered image can then be extracted by a downloadable utility in conjunction with the device deployment. Furthermore, the recovered image may be sent in bulk to the data center customer, or otherwise provided or shared. Whatever means of providing this information to the customer, the image only needs to exist before the customer loads sensitive user data onto the device.

[0015] In optional block 204 (shown with a dashed box to indicate optionality), the SSD is electrically erased. For example, one technique for electrically erasing an SSD is to set the voltage level on the memory cells to a level higher than the standard operating voltage (e.g., to the highest state of NAND, or slightly higher), and then, once all the memory cells are at this high level / state (with a dense distribution), lower the voltage to 0 or nearly 0 (e.g., an erase state where all bits read "0"). Alternatively, all bits can be set to "1" to effectively erase the stored data. Performing this electrical wipe provides confidence that even if something goes wrong in a subsequent process (e.g., thermal firing or X-ray processing), the data is likely to have already been erased anyway. Performing this electrical wipe is expected to eliminate any remaining distribution in the NAND that might reveal to some extent what data was previously stored in the device. Note that the above is more likely to apply to SLC than to other types of NAND (voltage) distributions.

[0016] According to one embodiment, the electrical wiping procedure may employ small gate steps and verify after each pulse (and before the first pulse) to ensure minimal diffusion of the NAND distribution. Furthermore, this procedure can be accelerated by starting with block-level or multi-block pulses to rapidly move the data to a range close to the top. The deeper this electrical erase (block 204), the more energy efficient the subsequent wiping process can be. However, for reliability regarding what inputs are needed in the subsequent process (block 206) (e.g., firing time and temperature in the case of thermal wiping, frequency / energy level and duration in the case of electromagnetic energy wiping), shallower erases are more likely to be electrically achievable and easier to verify.

[0017] According to one embodiment, information (e.g., quantitative data) about or relating to the electrical wipe of the SSD's memory cells (block 204) can be collected and used to present verification of the erasure of user data from the SSD. As a non-limiting example, the number of stacked bits (e.g., bits that failed to erase) across multiple blocks (e.g., equidistant blocks) can be counted, averaged across the device, and presented as a "stacked bit" metric or signature for the device. This metric can then provide the user with a level of confidence that the electrical wipe was effective. Furthermore, a particular density of stacked bits across several distributions of blocks may indicate areas where actual data storage was not possible / certain in the first place.

[0018] In block 206, energy is imparted to the SSD to facilitate the departure of electrons representing bits in the corresponding memory cells of the SSD from the cells. According to one embodiment, in block 206, thermal energy is imparted to the SSD, for example, thereby firing the device (generally, the device is "processed"). While imparting thermal effects to NAND is known in the context of characterization processes such as collecting activation energy, sector failure rate, VT (threshold voltage) shift, etc., and data retention firing tests are known in the context of ensuring the ability of memory cell floating gates to retain data, in block 206, the SSD is effectively "overfired" at temperatures and / or durations exceeding those that can be normally used for device characterization and / or data retention tests.

[0019] In electrically erasable devices such as NAND memory, floating cells are programmed by tunneling electrons through the tunnel oxide to the floating gate. Since the average energy of a solid and its components (atoms, electrons, etc.) is directly related to its temperature, temperature has a significant impact on the energy state of electrons in semiconductors, and similarly, on the behavior of electronic devices. Generally, the higher the temperature, the more thermal energy available for use by atoms and electrons, and the more electrons are propelled from lower to higher states. More specifically, on one side of the energy barrier of a floating gate memory cell, there are electrons with an energy distribution. Some have enough energy to escape over the top of the barrier, and as the temperature rises, more electrons gain the energy needed to overcome the tunnel oxide barrier. Here, in block 206, the energy imparted to the SSD is intended to deliberately propel the captured electrons to an energy state high enough to leave the memory cell by overcoming, leaving, or essentially "jumping over" the tunnel oxide barrier, thereby effectively erasing the memory cell. Furthermore, the SSD can be processed (iteratively) as in block 206 to determine, verify, or confirm the current erase level, and then, in response to the SSD not having reached the desired erase level, the processing in block 206 can be repeated as needed until the desired (specific) erase level is achieved.

[0020] Another form of non-volatile memory is phase-change memory (PCM), which stores data by changing the state of the material used between an amorphous state and a crystalline state. The amorphous state corresponds to a disordered phase, thereby giving the material relatively high electrical resistance, while the crystalline state corresponds to a ordered phase, thereby giving the material relatively low resistance. Thus, the techniques described throughout this specification are further intended to thermally treat data storage devices that include and utilize phase-change memory, and to erase such memory.

[0021] According to one embodiment, a thermal profile corresponding to the SSD is provided (for example, to the party performing the process in Figure 2), and the thermal profile characterizes or specifies the temperature versus duration (e.g., each range) that facilitates electrons leaving the cells for thermal erasure purposes. For example, the user can select the activation energy for the corresponding temperature range based on which temperature they wish to utilize, and predict the duration required for sintering. Such a thermal profile can allow for the input or correlation with various factors such as the age of the NAND, the conditions of electrical wiping, previous sintering, and the desired erasure level, including the lowest threshold voltage to which the flash device can advance.

[0022] In real-world situations, users may prefer to process multiple SSDs at once rather than individually. As a non-limiting example, multiple devices can be placed in a chamber within the exhaust path of a data center (e.g., for environmental efficiency purposes), where the amount of heat applied to each device can vary considerably, and therefore the processing time can also vary. Further variables include the possibility that each NAND has different inherent characteristics, and that different devices may have different associated wear levels, all of which can affect the processing time. Therefore, the aforementioned iterative processing technique may be particularly beneficial in such SSD group treatment situations.

[0023] In another embodiment, block 206 is subjected to high-energy electromagnetic radiation to the SSD, promoting the departure of electrons representing bits in the corresponding memory cells of the SSD from the cells. In one embodiment, X-rays are applied to the SSD for this purpose. One way to characterize the electromagnetic (EM) spectrum is based on the corresponding photon energy measured in electron volts (eV), and X-ray photons are generally considered to have energies in the range of 100 eV to 100,000 eV (or 100 keV), wavelengths in the range of 0.01 to 10 nm (nanometers), and therefore frequencies in the range of 3 × 10¹⁹ to 3 × 10¹⁶ Hz (i.e., 30 petahertz to 30 exahertz). Similar to thermal energy, X-rays also significantly affect the energy state of electrons in semiconductors, thereby promoting electrons to higher energy states and obtaining the energy necessary to overcome the tunnel oxide barrier and effectively erase the memory cells. Similar to thermal profiles, according to one embodiment, an electromagnetic (EM) radiation profile corresponding to an SSD is provided, the EM radiation profile characterizes or specifies EM energy levels versus durations (e.g., each range) to facilitate the emission of electrons from the cell for EM erasure purposes.

[0024] In any kind of processing (e.g., heat and high-energy EM), there are certain cells, such as cells containing NAND parameters and manufacturing dates (non-user data), that may not want to be erased. The recovery information (block 202) corresponding to the restored image can be useful for NAND parameters, but according to one embodiment, these cells may be pre-adjusted or raised to a higher voltage so that there is a high possibility that information still remains (e.g., not cycled) while withstanding further processing while the user data is completely wiped. This may function as an alternative implementation for generating the restored image in block 202. Further, in response to using the aforementioned iterative process, these cells can be "touched up" in each erase verification activity. Touch-up generally includes reading (i.e., sensing) their threshold voltages and then applying an appropriate voltage to program them to the target verification, which is substantially the same as the normal program but with more stringent requirements and finer stepping. Similarly, there are select gates present on all blocks that do not contain information but have thresholds set by charges in the NAND charge trap layer (e.g., these are effectively NAND cells with different voltages but do not convey information), and these need to be restored to appropriate threshold voltages to function properly.

[0025] Block 208 generates a set of quantitative data (generally, information) for verifying the erasure of user data from the SSD. As described, the reliability of digital data erasure is considered important, particularly in the context of reuse and recycling of storage devices (e.g., SSDs). Therefore, robust statistical verification of data erasure can help instill confidence that the erasure process was properly successful. For example, as described elsewhere in this specification, according to one embodiment, quantitative data can be collected for, or relating to, an optional electrical wipe of the memory cells of the SSD (block 204), and this can be used to present verification of the erasure of user data from the SSD. Further, according to one embodiment, quantitative data can be collected for, or relating to, a thermal and / or high-energy radiation wipe of the memory cells of the SSD (block 206), and this can be used to present verification of the erasure of user data from the SSD. In each case, generating quantitative data for verifying erasure in block 208 may include generating such quantitative data for either or both of the electronic wipe and / or thermal and / or high-energy radiation wipe, if implemented.

[0026] According to an embodiment, such quantitative data can include, as non-limiting examples, (i) how many cells out of all cells failed to be erased (the number of "stack bits" that were very likely to have been stacked even during data programming and thus nothing was transmitted about their intended values), (ii) the distribution of sectors having cells containing non-erased data, (iii) the count of stack cells / columns that can be detected by looking for the same cells stacked on multiple word lines / columns, (iv) the count of stack word lines / blocks that can be detected by looking at word lines or blocks that were not erased, (v) the distinction between cells in defective blocks at factory shipment that have never held user data and blocks that have held user data, and (vi) the distinction between cells that were erased but failed to be read due to block / column / word line failures. Such cells are actually erased in response to being properly baked / zapped but cannot be read as erased. Further, "before and after" data (e.g., a bitmap representing the distribution of stack bits) for either or both of electrical erasure (block 204) and thermal / EM erasure (block 206) can be valuable in convincing a customer of the success of erasure, such as when a user desires additional data to judge for themselves whether the data has been sufficiently erased if the "before and after" data exceeds a user-specified threshold. For example, if statistics regarding bits are collected at the start of a process, after moving all bits electrically to an elevated state, after moving all bits electrically to a low state, and / or after heat / X-ray wiping the drive, the user can gain confidence by seeing that the actual programmed data (e.g., excluding stack bits) has indeed been erased by this process.

[0027] Finally, after the aforementioned data wipe process has ended, the restored image from block 202 can be loaded to the necessary location on the wiped SSD to restore functionality.

[0028] Since reliable and secure data erasure of SSDs is largely guaranteed through the aforementioned process, wiped SSDs can be reused / repurposed / remanufactured by the same user, or by additional users if the device is resold or otherwise transferred. Furthermore, such wiped SSDs can be recycled so that valuable components such as NAND and DRAM can find new uses in other products.

[0029] Solid State Drive Configuration As described, the embodiments can be used in the context of a solid-state drive (SSD). Accordingly, Figure 1 is a block diagram illustrating an exemplary operating situation in which embodiments of the present invention may be implemented. Figure 1 shows a general-purpose SSD architecture 150, which has an SSD 152 coupled to a host 154 via a primary communication interface 156 ("primary interface 156"). The embodiments are not limited to the configuration shown in Figure 1, and rather, embodiments may be implemented using SSD configurations other than those shown in Figure 1. For example, embodiments may be implemented to operate in other environments that rely on non-volatile memory storage components for writing and reading data.

[0030] Host 154 broadly represents any kind of computing hardware, software, or firmware (or any combination thereof) that makes data I / O requests or calls to one or more memory devices. For example, Host 154 may be embodied in a hardware machine on which executeable code is performed (such as a computer or hardware server, in a non-limited example) or as software instructions that can be executed by one or more processors (such as a software server, such as a database server, application server, or media server, in a non-limited example). Host 154 interacts with SSD 152 via a primary interface 156 (e.g., physical and electrical I / O interfaces) to transfer data to and from SSD 152, such as via a network such as Ethernet or Wi-Fi, or via a communication bus standard such as Serial Advanced Technology Attachment (SATA), PCI (Peripheral Interconnection) Express (PCIe), Small Computer System Interface (SCSI), or Serial Attached SCSI (SAS), in a non-limited example. The host 154 may be a computer, tablet, mobile phone, or any type of computing device that generally contains or interacts with memory, running an operating system. In that case, the primary interface 156 connecting the host 154 to the SSD 152 may be, for example, the internal bus of the storage system, or a communication cable, or a wireless communication link.

[0031] The exemplary SSD 152 shown in Figure 1 includes an interface 160, a controller 162 (for example, a controller having firmware logic internally), an addressing function block 164, a data buffer cache 166, and one or more non-volatile memory components 170a, 170b-170n.

[0032] Interface 160 is the point of interaction between components, namely between SSD 152 and host 154 in this context, and is applicable at both hardware and software levels. This allows components to communicate with other components via input / output (I / O) systems and associated protocols. Hardware interfaces are typically described by the mechanical, electrical, and logical signals at the interface and the protocols for ordering them, such as the aforementioned common and standard interfaces including SATA, PCIe, SCSI, and SAS.

[0033] The SSD 152 includes a controller 162 that incorporates electronic components that connect non-volatile memory components to the host, such as connecting non-volatile memories 170a, 170b, and 170n to the host 154. The controller is typically an embedded processor that executes firmware-level code and is a critical element in SSD performance. Processes, functions, procedures, operations, method steps, etc., described herein as being performed or executable by a storage device controller such as the controller 162 include execution by executing one or more instruction sequences stored in one or more memory units, and such execution is triggered when executed by one or more processors. For example, according to one embodiment, the controller 162 may comprise an application-specific integrated circuit (ASIC) having at least one memory unit for storing such instructions (such as firmware, in a non-limiting example) and at least one processor for executing such instructions. More broadly, the SSD controller 162 can be embodied in any form and / or combination of software, hardware, and firmware. In this context, the electronic controller typically includes one or more processors or other circuits for executing instructions and may be implemented as a system-on-chip (SoC) electronic circuit that may include, in non-limiting examples, memory, microcontrollers, digital signal processors (DSPs), ASICs, field-programmable gate arrays (FPGAs), hardwired logic, analog circuits, and / or combinations thereof. The firmware, i.e., executeable logic (e.g., programming code) stored in or read from the SSD volatile memory 171, includes machine-executable instructions that are executed by the controller 162 when operating each SSD 152.

[0034] The controller 162 interfaces with the non-volatile memories 170a, 170b, and 170n via the addressing 164 function block. The addressing 164 function operates to manage the mapping between, for example, logical block addresses (LBAs) from the host 154 and the corresponding physical block addresses on the SSD 152, i.e., on the SSD 152's non-volatile memories 170a, 170b, and 170n. Because non-volatile memory pages and host sectors are of different sizes, the SSD must construct and maintain a data structure that can be translated between the host writing data to or reading data from sectors and the physical non-volatile memory pages where that data actually resides. This table structure or "mapping" can be constructed and maintained for a session in the SSD's volatile memory 171, such as DRAM (Dynamic Random Access Memory), or in some other local volatile memory component accessible by the controller 162 and addressing 164. Alternatively, the table structure can be more persistently maintained across sessions within the non-volatile memory of the SSD, such as non-volatile memory 170a, 170b, and 170n.

[0035] Addressing 164 interacts with the data buffer cache 166 in addition to the non-volatile memory 170a, 170b-170n. The SSD 152's data buffer cache 166 typically uses DRAM as a cache, similar to the cache in a hard disk drive. The data buffer cache 166 functions as a buffer or staging area for data transmission between the non-volatile memory 170a, 170b-170n components, and also functions as a cache to speed up future requests for cached data. Since the data buffer cache 166 is typically implemented using volatile memory, data stored there is not permanently stored in the cache; in other words, the data is not persistent.

[0036] Finally, the SSD152 includes one or more non-volatile memory components 170a, 170b-170n. As a non-limiting example, the non-volatile memory components 170a, 170b-170n may be implemented as flash memory (e.g., NAND (NOT-AND) or NOR flash) or other types of solid-state memory currently or in the future. The non-volatile memory components 170a, 170b-170n are actual memory electronic components where data is permanently stored. The non-volatile memory components 170a, 170b-170n of the SSD152 can be thought of as analogous to magnetic recording media disks in a hard disk drive (HDD) storage device.

[0037] Furthermore, references to data storage devices in this specification may encompass multimedia storage devices (or “multimedia devices,” sometimes referred to as “multilayer devices” or “hybrid drives”). A multimedia storage device generally refers to a storage device that possesses the functionality of both a conventional HDD and an SSD (see, e.g., SSD152) combined with non-volatile memory such as electrically erasable and programmable flash or other solid-state (e.g., integrated circuit) memory. Because the operation, management, and control of different types of storage media generally differ, the solid-state portion of a hybrid drive may include the functionality of its own corresponding controller, or it may be integrated with the HDD functionality into a single controller. A multimedia storage device may be designed and configured to operate and utilize its solid-state portion in many ways, such as using solid-state memory as cache memory to store frequently accessed data, to store I / O-intensive data, or to store metadata corresponding to payload data (e.g., to assist in decrypting payload data), etc. Furthermore, a multimedia storage device may essentially be designed and configured as two storage devices in a single enclosure, namely a conventional HDD and an SSD, with one or more interfaces for host connectivity.

[0038] Expansion and Alternative In the foregoing description, embodiments of the present invention have been described with reference to numerous specific details that may vary from implementation to implementation. Therefore, various modifications and changes can be made without departing from the broader spirit and scope of the embodiments. Accordingly, the sole and exclusive indicator of what constitutes the present invention and what the applicant intends to be the present invention is the set of claims issued in this application, having the specific form issued by such claims, including any subsequent amendments. Any definitions expressly set forth herein for terms included in the claims shall govern the meaning of such terms as used in the claims. Accordingly, no limitations, elements, characteristics, features, advantages, or attributes not expressly stated in the claims shall be intended to limit the claims in any way. Accordingly, this specification and the drawings should be considered illustrative rather than restrictive.

[0039] In addition, this description may describe certain process steps in a specific order, and may use alphabetical and alphanumeric labels to identify certain steps. Unless otherwise specifically stated in the description, embodiments are not necessarily limited to a particular order in which such steps are performed. In particular, labels are used simply for convenient identification of steps and are not intended to specify or require a particular order in which such steps are performed.

Claims

1. A method for erasing data from a solid-state drive (SSD), Before user data is saved to the SSD, a restored image of the information stored on the SSD is generated, which characterizes the restored state of the SSD. To facilitate the departure of electrons representing bits in the corresponding memory cells of the SSD from the memory cells, energy is supplied to the SSD. Before supplying energy to the SSD, the SSD is pre-adjusted by raising the voltage of specific memory cells to a higher level, thereby making it difficult for electrons corresponding to these specific memory cells to be emitted. After supplying energy to the SSD, the specific memory cell is returned to a desired threshold voltage. To generate a set of quantitative data for verifying the erasure of user data from the SSD, Methods that include...

2. Before supplying energy to the SSD, the voltage level of the memory cell is set to a level higher than the standard operating voltage, and then the SSD is electrically erased by setting the voltage to approximately zero. The method according to claim 1, further comprising:

3. To collect quantitative data regarding the electrical erasure of the memory cell, Generating the set of quantitative data includes including the quantitative data relating to the electrical erasure in the set of quantitative data. The method according to claim 2, further comprising:

4. To provide the restored image to the user of the SSD. The method according to claim 1, further comprising:

5. The method according to claim 1, wherein the provision of energy to the SSD in order to promote the electrons includes providing thermal energy to the SSD.

6. To provide a thermal profile corresponding to the SSD, which characterizes the temperature versus duration for promoting the departure of the electrons from the memory cell. The method according to claim 5, further comprising:

7. The method according to claim 1, wherein imparting energy to the SSD in order to promote the electrons includes imparting high-energy electromagnetic radiation waves to the SSD.

8. To provide an electromagnetic radiation profile corresponding to the SSD, characterizing the electromagnetic energy level versus duration for facilitating the emission of the electrons from the memory cell. The method according to claim 7, further comprising:

9. The purpose is to collect quantitative data relating to the application of energy to the memory cells of the SSD, Generating the set of quantitative data includes including the quantitative data relating to imparting the energy in the set of quantitative data. The method according to claim 1, further comprising:

10. To promote the electrons, energy is supplied to the SSD, To facilitate the departure of electrons representing bits in the corresponding memory cells of the SSD from the memory cells, energy is supplied to a group of multiple SSDs. Identifying a subset of the group of SSDs that have been determined not to have reached a specific erasure level, To impart increased energy to the subset of SSDs, The method according to claim 1, including the method described in claim 1.

11. A method for erasing data from a solid-state drive (SSD), Before user data is saved to the SSD, a restored image of the information stored on the SSD is generated, which characterizes the restored state of the SSD. The process involves electrically erasing the memory cells of the SSD, To collect quantitative data regarding the electrical erasure of the memory cells of the SSD, In order to promote the departure of electrons representing bits in the corresponding memory cells of the SSD from the memory cells, thermal energy is applied to the SSD, Before applying thermal energy to the SSD, the SSD is pre-adjusted by raising the voltage of specific memory cells to a higher level, thereby making it difficult for electrons corresponding to these specific memory cells to be emitted. After applying thermal energy to the SSD, the specific memory cell is returned to a desired threshold voltage. To collect quantitative data regarding the transfer of thermal energy to the memory cells of the SSD, To generate a set of quantitative data for verifying the erasure of user data from the SSD, Methods that include...

12. The method according to claim 11, wherein generating the set of quantitative data includes including the quantitative data relating to the electrical erasure and the quantitative data relating to the application of thermal energy in the set of quantitative data.

13. To provide a thermal profile corresponding to the SSD, which characterizes the temperature versus duration for promoting the departure of the electrons from the memory cell. The method according to claim 11, further comprising:

14. The method according to claim 11, wherein generating the set of quantitative data includes generating a number of memory cells whose bit values ​​did not change from the application of thermal energy.

15. A method for erasing data from a solid-state drive (SSD), Before user data is saved to the SSD, a restored image of the information stored on the SSD is generated, which characterizes the restored state of the SSD. The process involves electrically erasing the memory cells of the SSD, To collect quantitative data regarding the electrical erasure of the memory cells of the SSD, In order to promote the emission of electrons representing bits in the corresponding memory cells of the SSD from the memory cells, high-energy electromagnetic radiation waves are applied to the SSD, Before applying high-energy electromagnetic radiation waves to the SSD, the SSD is pre-adjusted by raising the voltage of specific memory cells to a higher level, thereby reducing the emission of electrons corresponding to these specific memory cells. After applying high-energy electromagnetic radiation waves to the SSD, the specific memory cell is returned to a desired threshold voltage. To collect quantitative data regarding the application of the high-energy electromagnetic radiation waves to the memory cells of the SSD, To generate a set of quantitative data for verifying the erasure of user data from the SSD, Methods that include...

16. The method according to claim 15, wherein generating the set of quantitative data includes including the quantitative data relating to the electrical erasure and the quantitative data relating to the application of high-energy electromagnetic radiation waves in the set of quantitative data.

17. The method according to claim 15, wherein the application of the high-energy electromagnetic radiation wave includes applying X-rays to the SSD.

18. To provide an electromagnetic radiation profile corresponding to the SSD, characterizing the electromagnetic energy level versus duration for facilitating the emission of the electrons from the memory cell. The method according to claim 15, further comprising:

19. The method according to claim 15, wherein generating the set of quantitative data includes generating a number of memory cells whose bit values ​​did not change from the application of high-energy electromagnetic radiation.

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