Semiconductor device, method for manufacturing a semiconductor device, and electronic device.

Abstract

Provided are: a semiconductor device configured to be able to suppress a temperature increase of a semiconductor element and to suppress warping; a semiconductor device manufacturing method comprising a cooling medium enclosing step; and an electronic apparatus including the semiconductor device.　The semiconductor device comprises a semiconductor element, a substrate to which the semiconductor element is adhered, and a cooling medium filled in a gap which is formed when the semiconductor element and the substrate are adhered to each other using an adhesive. The cooling medium comprises a liquid metal, metal-coated globules, or a liquid metal and metal-coated globules. The semiconductor device is configured to suppress the temperature increase by means of the cooling media transmitting heat generated by the semiconductor element to the outside.

Description

[Technical Field]

[0001] This disclosure relates to a semiconductor device having a heat dissipation structure using a cooling medium in a semiconductor package, a method for manufacturing a semiconductor device having a step of encapsulating a cooling medium, and an electronic device having the semiconductor device. [Background technology]

[0002] Conventionally, with the advancement of semiconductor process miniaturization and the increase in semiconductor device speed, the power consumption of semiconductor devices has increased, and consequently, the amount of heat generated has also increased. This increase in heat generation in semiconductor devices leads to problems such as characteristic fluctuations and reliability degradation. Therefore, semiconductor packages are required to efficiently cool the semiconductor devices.

[0003] In semiconductor packaging, when semiconductor elements are laminated onto a substrate using adhesive, silver (Ag) paste, which has low thermal resistance, is used to efficiently cool the semiconductor elements. However, after hardening, silver paste becomes a metallic body with a high modulus of elasticity, and because there is a difference in the coefficient of thermal expansion between it and the semiconductor elements, warping of the semiconductor elements can occur. Such warping affects the characteristics of the semiconductor device.

[0004] Therefore, to suppress warping of semiconductor devices, resins with low elastic modulus and that can be cured at low temperatures are used. However, because resins have high thermal resistance, they cannot efficiently transfer the heat generated by the semiconductor device to the substrate or heat dissipation device. For this reason, it was necessary to suppress the temperature rise of the semiconductor device by implementing measures such as designing ventilation paths, installing heat sinks, or using cooling fans for forced cooling.

[0005] Patent Document 1 discloses a solid-state imaging device having a hollow package body and a concave chip storage section provided on the upper surface of the package body, with a cross-section formed to be substantially stepped. This chip storage section is a chip storage section in which semiconductor chips of different sizes can be placed on each step, and consists of a connection section that is electrically connected to the semiconductor chip placed on any of these steps, and a lid that is joined to the upper surface of the package body to seal the chip storage section.

[0006] In this structure, when a semiconductor chip is placed on the upper step of the chip housing, a heat conductive plate is placed on the lower step of the chip housing that contacts the bottom surface of the semiconductor chip and the bottom surface of the chip housing. This allows heat from the semiconductor chip to be transferred to the package body, thereby enabling heat dissipation of the semiconductor chip.

[0007] Furthermore, the thermal conductive plate uses defective semiconductor chips that are sized to fit on the lower tier of the chip storage section. This method utilizes defective semiconductor chips that would otherwise be discarded, resulting in lower costs and reduced waste.

[0008] Patent Document 2 discloses a technology that solves the problem in solid-state image sensors where the adhesive layer interposed between each image sensor deforms due to pressure when bonding wires are attached to each image sensor, causing tilting of the image sensor, which in turn causes variations in the distance between the lens and the image sensor, and reduces the light-receiving sensitivity of the image sensor.

[0009] Specifically, the system is configured to fix a signal processing unit onto a substrate, fix an intermediate spacer on top of the signal processing element, and then fix an image sensor on top of that before performing wire bonding. In other words, because an intermediate spacer is interposed between the signal processing element and the image sensor, it is possible to suppress tilting of the signal processing element and the image sensor even when pressure is applied during wire bonding.

[0010] In this case, the signal processing unit is fixed to the substrate using die bond paste. An intermediate spacer is then fixed on top of the signal processing unit using die bond paste such as silver paste. Furthermore, the image sensor is fixed on the intermediate spacer by thermal curing using silver-free low-temperature die bond paste. [Prior art documents] [Patent Documents]

[0011] [Patent Document 1] Japanese Patent Publication No. 2006-339291 [Patent Document 2] Patent No. 3674777 [Overview of the Initiative] [Problems that the invention aims to solve]

[0012] However, in the solid-state imaging device described in Patent Document 1, although a heat conductive plate is placed in contact with the bottom surface of the semiconductor chip and the bottom surface of the chip housing, it is not clear how the heat from the semiconductor chip is transferred from the bottom surface of the chip housing to the heat conductive plate.

[0013] In the solid-state imaging device described in Patent Document 2, paragraph

[0034] states that "the intermediate spacer 21 is fixed onto the signal processing element 3 using a die bond paste such as the aforementioned silver paste," indicating that the signal processing element and the intermediate spacer are bonded together using silver paste. Therefore, it is not possible to fundamentally solve the problems of the conventional method.

[0014] This disclosure has been made in view of the aforementioned problems, and aims to provide a semiconductor device configured to suppress temperature rise of a semiconductor element and suppress warping by using a cooling medium with a low modulus of elasticity and high thermal conductivity, a method for manufacturing a semiconductor device having a step of encapsulating a cooling medium, and an electronic device having the semiconductor device. [Means for solving the problem]

[0015] The present disclosure has been made to solve the above problems, and a first aspect thereof is a semiconductor device including a semiconductor element, a substrate to which the semiconductor element is fixed, and a cooling medium filled in a gap formed when the semiconductor element and the substrate are fixed to each other.

[0016] Also, in this first aspect, the cooling medium may be a liquid metal.

[0017] Also, in this first aspect, the cooling medium may be metal-coated small balls.

[0018] Also, in this first aspect, the cooling medium may be a liquid metal and metal-coated small balls.

[0019] Also, in this first aspect, the cooling medium filled in the gap may be disposed below a heat generation source of the semiconductor element.

[0020] Also, in this first aspect, the gap is formed by an adhesive applied to the entire peripheral edge of the substrate and the semiconductor element to fix them to each other, and a low surface tension material may be coated on the upper surface of the substrate along the inner circumference of the adhesive.

[0021] Also, in this first aspect, the gap is formed by an adhesive applied to the entire peripheral edge of the substrate and the semiconductor element to fix them to each other, and a partition lower than the height of the thickness of the adhesive may project on the upper surface of the substrate along the inner circumference of the adhesive.

[0022] Also, in this first aspect, the lower surface of the substrate may have a waste heat removal mechanism.

[0023] A second aspect thereof is a method for manufacturing a semiconductor device, including a step of applying an adhesive in a manner of surrounding a region where a cooling medium is disposed on a substrate, a step of injecting the cooling medium into the region surrounded by the adhesive, and a step of adhering a semiconductor element on the adhesive.

[0024] In this second embodiment, the cooling medium injected into the enclosed region may be a liquid metal.

[0025] In this second embodiment, the cooling medium injected into the enclosed region may be metal-coated spheres.

[0026] In this second embodiment, the cooling medium injected into the enclosed region may be liquid metal and metal-coated spheres.

[0027] The third aspect is a method for manufacturing a semiconductor device, comprising the steps of: applying an adhesive in a manner that surrounds an area on a substrate where a cooling medium is to be placed; bonding a semiconductor element onto the adhesive; injecting a cooling medium into the gap formed between the substrate, the adhesive, and the semiconductor element; and sealing the gap.

[0028] In this third embodiment, the cooling medium injected into the gap may be a liquid metal.

[0029] In this third embodiment, the cooling medium injected into the gap may be metal-coated spheres.

[0030] In this third embodiment, the cooling medium injected into the gap may be liquid metal and metal-coated spheres.

[0031] The fourth aspect is a method for manufacturing a semiconductor device, comprising the steps of: placing metal-film spheres in a plurality of recesses formed on a substrate; applying an adhesive in a manner that surrounds the arranged metal-film spheres; and bonding a semiconductor element onto the adhesive.

[0032] The fifth aspect is a method for manufacturing a semiconductor device, comprising the steps of: placing metal film spheres on a plurality of soldering pads arranged on a substrate; soldering the metal film spheres placed thereon; applying an adhesive in a manner that surrounds the metal film spheres placed thereon; and bonding a semiconductor element on the adhesive.

[0033] The sixth aspect is a method for manufacturing a semiconductor device, comprising the steps of: placing metal film spheres on a plurality of soldering pads arranged on the lower surface of a semiconductor device; soldering the metal film spheres placed thereon; applying an adhesive to the substrate or the lower surface of the semiconductor device in such a manner that it surrounds the metal film spheres when the surface of the semiconductor device to which the metal film spheres are soldered is placed on the substrate; and bonding the surface of the semiconductor device to which the metal film spheres are soldered onto the adhesive.

[0034] Furthermore, in these fourth to sixth embodiments, there may be a step of injecting liquid metal into the gap formed by the substrate, the semiconductor element, and the adhesive applied in a manner that surrounds the metal film sphere.

[0035] The seventh aspect is an electronic device having a semiconductor device comprising a semiconductor element, a substrate to which the semiconductor element is fixed, and a cooling medium that fills the gap formed when the semiconductor element and the substrate are fixed together.

[0036] By adopting the above embodiment, it is possible to provide a semiconductor device, a method for manufacturing a semiconductor device having a cooling medium sealing step, and an electronic device having the semiconductor device. [Brief explanation of the drawing]

[0037] [Figure 1] These are a cross-sectional view and a plan cross-sectional view of the basic form of the first embodiment of the semiconductor device according to this disclosure. [Figure 2] This is a plan cross-sectional view of a modified example 1 of the first embodiment of the semiconductor device according to this disclosure. [Figure 3]This is a plan cross-sectional view of a modified example 2 of the first embodiment of the semiconductor device according to this disclosure. [Figure 4] This is a plan cross-sectional view of a modified example 3 of the first embodiment of the semiconductor device according to this disclosure. [Figure 5] This is an external perspective view of the cooling medium used in the second embodiment of the semiconductor device according to this disclosure. [Figure 6] These are a cross-sectional view and a plan cross-sectional view of the basic form of the second embodiment of the semiconductor device relating to this disclosure. [Figure 7] This is a plan cross-sectional view of a modified example 1 of the second embodiment of the semiconductor device according to the present disclosure. [Figure 8] This is a plan cross-sectional view of a modified example 2 of the second embodiment of the semiconductor device according to this disclosure. [Figure 9] This is a plan cross-sectional view of a modified example 3 of the second embodiment of the semiconductor device according to this disclosure. [Figure 10] These are a cross-sectional view and a plan cross-sectional view of the basic form of the third embodiment of the semiconductor device according to this disclosure. [Figure 11] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 12] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 13] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 14] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 15] This is a diagram illustrating the process of a second embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 16] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 17]This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 18] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 19] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the first embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 20] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 21] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 22] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 23] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 24] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 25] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 26] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 27] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 28] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 29] This is a diagram illustrating the process of the third embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 30] This is a diagram illustrating the process of the third embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 31] This is a diagram illustrating the process of the third embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 32] This is a diagram illustrating the process of the third embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 33] This is a diagram illustrating the process of the third embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 34] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 35] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 36] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 37] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 38] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 39] This is a diagram illustrating the process of the fourth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 6). [Figure 40] This is a diagram illustrating the fifth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 41] This is a diagram illustrating the fifth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 42] This is a diagram illustrating the fifth embodiment of the cooling medium sealing process in the second embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 43] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 44] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 45] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 46] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 47] This is a diagram illustrating the process of the first embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 48] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (Part 1). [Figure 49] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 2). [Figure 50] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 3). [Figure 51] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 4). [Figure 52] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 5). [Figure 53] This is a diagram illustrating the process of the second embodiment of the cooling medium sealing process in the third embodiment of the semiconductor device according to the present disclosure (part 6). [Figure 54] This is a cross-sectional view of a fourth embodiment of the semiconductor device relating to this disclosure. [Figure 55] This is a diagram (part 1) illustrating the encapsulation structure of the cooling medium for the semiconductor device relating to this disclosure. [Figure 56]This is a diagram (part 2) illustrating the encapsulation structure of the cooling medium for the semiconductor device relating to this disclosure. [Figure 57] This is a diagram (part 3) illustrating the encapsulation structure of the cooling medium for the semiconductor device relating to this disclosure. [Figure 58] This is a block diagram of an electronic device having a semiconductor device related to this disclosure. [Modes for carrying out the invention]

[0038] Next, with reference to the drawings, embodiments for carrying out this disclosure (hereinafter referred to as "embodiments") will be described in the following order. In the following drawings, identical or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic, and the dimensional ratios of each part do not necessarily match those of reality. Furthermore, it goes without saying that there are parts where the dimensional relationships and ratios differ between drawings. 1. First Embodiment of the Semiconductor Device Related to the Disclosure 2. Second Embodiment of the Semiconductor Device According to the Disclosure 3. Third Embodiment of the Semiconductor Device According to the Disclosure 4. Cooling medium sealing process of the first embodiment of the semiconductor device according to the present disclosure 5. Cooling medium sealing process of the second embodiment of the semiconductor device according to the present disclosure 6. Cooling medium sealing process of the third embodiment of the semiconductor device according to the present disclosure 7. Fourth Embodiment of the Semiconductor Device According to the Disclosure 8. Encapsulation structure of the cooling medium for the semiconductor device relating to this disclosure 9. Electronic device having a semiconductor device relating to this disclosure

[0039] <1. First Embodiment of the Semiconductor Device Related to This Disclosure> [Basic form of the first embodiment] Figure 1A is a side cross-sectional view at position YY of the basic form of the first embodiment of the semiconductor device 100 according to this disclosure, and Figure 1B is a plan cross-sectional view at position XX (hereinafter, unless otherwise specified, these are referred to as "cross-sectional view" and "plan view," respectively). In this embodiment, liquid metal 10 is used as a cooling medium for the semiconductor element 1.

[0040] As shown in Figures 1A and 1B, the semiconductor device 100 is constructed by bonding a semiconductor element 1 to a substrate 2 with an adhesive 3. Specifically, the semiconductor element 1 is bonded to the substrate 2 by having the adhesive 3 applied in a roughly rectangular shape to its periphery. Then, as shown in Figure 1, liquid metal 10 is filled into the gap 6 formed between the substrate 2 and the semiconductor element 1, surrounded by the adhesive 3 applied in a roughly rectangular shape.

[0041] In Figures 1A and 1B, semiconductor element 1 is shown as a solid-state image sensor such as a CMOS sensor or CCD. However, semiconductor element 1 is not limited to solid-state image sensors; it can also be logic, memory, or a microcomputer. The following explanation will use a solid-state image sensor as an example.

[0042] Multiple electrode pads 5 are arranged around the periphery of the upper surface of the semiconductor element 1. Additionally, multiple substrate pads 4 are arranged around the outer periphery of the semiconductor element 1 on the substrate 2. These substrate pads 4 may be pads made of copper (Cu) wiring patterns. The electrode pads 5 and substrate pads 4 are connected to each other by bonding wires 7, such as gold (Au) wires. To avoid unnecessary complexity, the bonding wire 7 is only shown in the cross-sectional view of Figure 1A, and is omitted from the plan view of Figure 1B (the same applies hereafter).

[0043] The substrate 2 is used to bond and fix the semiconductor element 1, and also has a wiring layer formed on it to connect the input and output signals of the semiconductor element 1 to the outside. The substrate 2 may be a silicon (Si) substrate or an interposer substrate.

[0044] Mercury (Hg) is widely known as a liquid metal 10 and can be used as a cooling medium. However, from an environmental perspective, it is desirable to use other materials. Galinstan is another known liquid metal 10. Galinstan is a eutectic alloy of gallium (Ga), indium (In), and tin (Sn), and its liquid metal composition at room temperature is 68.5% gallium, 21.5% indium, and 10% tin. Furthermore, it has lower toxicity than other liquid metals at room temperature, has a low vapor pressure, and does not vaporize even when exposed to high heat. In addition, its melting point is -19°C, so it remains in a liquid state at room temperature. It also has a thermal conductivity of 16.5 W / m·K, indicating that it is a heat conductor.

[0045] Because this embodiment is configured as described above, it maintains adhesion between the semiconductor element 1 and the substrate 2, and the liquid metal 10 placed directly beneath the semiconductor element 1 transfers the heat generated by the semiconductor element 1 to the substrate 2. This suppresses the temperature rise associated with the heat generated by the semiconductor element 1. Furthermore, because it is a liquid, it has a low elastic modulus. Therefore, the liquid metal 10 relieves the stress generated by adhesion, thus preventing the warping of the semiconductor element 1 that occurs when using conventional metal paste. The basic configuration and effects of the first embodiment relating to this disclosure are as described above.

[0046] [Modification 1 of the First Embodiment] Figure 2 is a plan view of Modification 1 of the first embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is almost identical to that of Figure 1A and is therefore omitted. Also, to avoid complexity, the description of the metal pad 4 is omitted except for the basic form of each embodiment (the same applies hereinafter). As shown in Figure 2, adhesive 3 is applied in a substantially rectangular shape to the periphery of the bonding surface of the semiconductor element 1 on the substrate 2. Further, adhesive 3 is applied in two substantially small rectangular shapes within the region surrounded by the substantially small rectangular adhesive 3. Liquid metal 10 is sealed in the gap 6, which is the region surrounded by the substantially small rectangular adhesive 3.

[0047] With this configuration, if the heat generation locations on the bonding surface of the semiconductor element 1 are not uniform and there is a heat source at a specific location, the adhesive 3 can be applied in a roughly square shape directly below the heat source, and the liquid metal 10 can be sealed in the gap 6, which is the surrounding region. In other areas, it is not necessary to seal the liquid metal 10. This makes it possible to save on the amount of liquid metal 10 used. In this figure, the locations where the adhesive 3 is applied in a roughly square shape are shown as two, but there may be three or more locations.

[0048] [Modification 2 of the First Embodiment] Figure 3 is a plan view of a modification 2 of the first embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is almost identical to that of Figure 1A and is therefore omitted. As shown in Figure 3, adhesive 3 is applied in a substantially rectangular shape to the periphery of the bonding surface of the semiconductor element 1. Further, adhesive 3 is applied in two substantially small rectangular shapes within the region surrounded by the substantially rectangularly applied adhesive 3. Liquid metal 10 is sealed in the gap 6, which is the region surrounded by the substantially small squarely applied adhesive 3. In addition, the areas where liquid metal 10 has not been injected are bonded by applying adhesive 3 to the entire surface.

[0049] With this configuration, if the heat generation locations on the bonding surface of the semiconductor element 1 are not uniform and there is a heat source at a specific location, the adhesive 3 can be applied in a roughly square shape directly below the heat source, and the liquid metal 10 can be injected into the gap 6, which is the area surrounded by the adhesive. The rest of the device can be bonded by applying the adhesive 3 to the entire surface. This strengthens the bond and saves on the amount of liquid metal 10 used. In this figure, the areas where the adhesive 3 is applied in a roughly square shape are shown as two, but there may be three or more such areas.

[0050] [Modification 3 of the First Embodiment] Figure 4 is a plan view of a modification 3 of the first embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is almost identical to that of Figure 1A and is therefore omitted. As shown in Figure 4, the adhesive 3 is applied to the lower surface of the semiconductor element 1 in a shape in which the peripheral portions are joined together in an approximately x-shape or approximately C-shape. Within the region enclosed by the left and right arcs of the adhesive 3 applied in an approximately x-shape or approximately C-shape, the adhesive 3 is applied in an approximately small rectangular shape. The liquid metal 10 is sealed in the gap 6, which is the region surrounded by the adhesive applied in an approximately small rectangular shape. Furthermore, the region where the adhesive 3 is not applied in an approximately rectangular shape is bonded in such a way that outside air can enter and exit.

[0051] With this configuration, if the heat generation on the bonding surface of the semiconductor element 1 is not uniform and there is a heat source at a specific location, the adhesive 3 can be applied in a roughly rectangular shape directly below the heat source, and liquid metal 10 can be injected into the gap 6, which is the area surrounded by the adhesive. The rest of the bond can be made so that outside air can enter and exit. As a result, outside air can flow into the gap 6 between the bonding surface of the semiconductor element 1 and the substrate 2, and a heat dissipation effect by convection can be expected. In addition, the amount of liquid metal 10 used can be reduced. In this figure, the areas where the adhesive 3 is applied in a roughly rectangular shape are described as two, but there may be three or more.

[0052] <2. Second Embodiment of the Semiconductor Device Related to This Disclosure> [Basic form of the second embodiment] Figure 6 shows a cross-sectional view and a plan view of the basic form of the second embodiment of the semiconductor device 100 according to the present disclosure. In this embodiment, metal film spheres 20 are used as a cooling medium for the semiconductor element 1.

[0053] As shown in Figure 6, the semiconductor device 100 is constructed by bonding a semiconductor element 1 to a substrate 2 with an adhesive 3. Specifically, the semiconductor element 1 is bonded to the substrate 2 by having the adhesive 3 applied in a roughly rectangular shape to its periphery. Then, as shown in Figure 6, a large number of metal-coated spheres 20 are sealed in a gap 6 formed between the substrate 2 and the semiconductor element 1, surrounded by the roughly rectangularly applied adhesive 3.

[0054] In Figure 6, the semiconductor element 1 is shown as an example of a solid-state image sensor such as a CMOS sensor or CCD, as in the first embodiment. However, it is not limited to solid-state image sensors and may also be logic, memory, or a microcomputer.

[0055] In the following description, semiconductor element 1 will be explained using a solid-state image sensor as an example. However, since the basic configuration of semiconductor element 1 is the same as in the first embodiment, the explanation will be omitted, and the differences will be explained.

[0056] As shown in Figure 5, the metal-coated spheres 20 are monodisperse particles with a particle size of 10 to 800 μm, formed in a spherical shape. The core 21 of the metal-coated spheres 20 is the core part and is made of spherical silicone rubber. The surface of the core 21 is covered with a polyimide film 22 to form a shell. Furthermore, the surface of the polyimide film 22 is covered with a metal film 23 that has electrical and thermal conductivity. The metal film 23 is made of metals such as copper (Cu), tin (Sn), silver (Ag), and gold (Au), and has excellent electrical and thermal conductivity. Because of the above structure, the metal-coated spheres 20 are elastic and deform into a roughly flattened shape when subjected to external force.

[0057] Because this embodiment is configured as described above, it maintains adhesion between the semiconductor element 1 and the substrate 2, and the metal film spheres 20 placed directly beneath the semiconductor element 1 transfer the heat generated by the semiconductor element 1 to the substrate 2, thereby suppressing the temperature rise of the semiconductor element 1. Furthermore, since the metal film spheres 20 deform when subjected to external force, the stress generated by adhesion is relieved by the deformation of the metal film spheres 20. Therefore, it is possible to prevent the warping of the semiconductor element 1 that occurs when conventional metal paste is used. In addition, it is not a problem even if the gap between the semiconductor element 1 and the substrate 2 is not formed uniformly. The basic configuration and effects of the second embodiment of this disclosure are as described above.

[0058] [Modification 1 of the second embodiment] Figure 7 is a plan view of Modification 1 of the second embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is substantially the same as that of Figure 6A and is therefore omitted. As shown in Figure 7, adhesive 3 is applied in a substantially rectangular shape to the periphery of the bonding surface of the semiconductor element 1 on the substrate 2. Further, adhesive 3 is applied in two substantially small rectangular shapes within the region surrounded by the substantially rectangular adhesive 3. A metal film sphere 20 is sealed in the gap 6, which is the region surrounded by the substantially small square adhesive 3.

[0059] The effects of Modification 1 of the Second Embodiment are the same as those of Modification 1 of the First Embodiment described above, so their explanation will be omitted.

[0060] [Modification 2 of the second embodiment] Figure 8 is a plan view of a modified example 2 of the second embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is almost identical to that of Figure 6A and is therefore omitted. As shown in Figure 8, adhesive 3 is applied in a substantially rectangular shape to the periphery of the bonding surface of the semiconductor element 1. Further, adhesive 3 is applied in two substantially small rectangular shapes within the region surrounded by the substantially rectangularly applied adhesive 3. Metal film spheres 20 are sealed in the gaps 6, which are the regions surrounded by the substantially small squarely applied adhesive 3. In addition, the areas where metal film spheres 20 are not injected are bonded by applying adhesive 3 to the entire surface.

[0061] The effects of Modification 2 of the Second Embodiment are the same as those of Modification 2 of the First Embodiment described above, so their explanation will be omitted.

[0062] [Modification 3 of the second embodiment] Figure 9 is a plan view of a modification 3 of the second embodiment of the semiconductor device 100 according to the present disclosure. The cross-sectional view is almost identical to that of Figure 6A and is therefore omitted. As shown in Figure 9, the adhesive 3 is applied to the lower surface of the semiconductor element 1 in a shape in which the peripheral portions are joined together in an approximately x-shape or approximately C-shape. Within the region enclosed by the left and right arcs of the adhesive 3 applied in an approximately x-shape or approximately C-shape, the adhesive 3 is applied in an approximately small rectangular shape. The metal film sphere 20 is sealed in the gap 6, which is the region surrounded by the adhesive applied in an approximately small rectangular shape. Furthermore, the region where the adhesive 3 is not applied in an approximately rectangular shape is bonded in such a way that outside air can enter and exit.

[0063] The effects of Modification 3 of the Second Embodiment are the same as those of Modification 3 of the First Embodiment described above, so their explanation will be omitted.

[0064] <3. Third Embodiment of the Semiconductor Device Related to This Disclosure> [Basic form of the third embodiment] Figure 10 shows a cross-sectional view and a plan view of the basic form of the third embodiment of the semiconductor device 100 according to the present disclosure. In this embodiment, both liquid metal 10 and metal film spheres 20 are used as cooling media for the semiconductor element 1.

[0065] As shown in Figure 10, the semiconductor device 100 is constructed by bonding a semiconductor element 1 to a substrate 2 with an adhesive 3. Specifically, the semiconductor element 1 is bonded to the substrate 2 by having the adhesive 3 applied in a roughly rectangular shape to its periphery. Then, as shown in Figure 10, a large number of metal film spheres 20 are sealed in a gap 6 formed between the substrate 2 and the semiconductor element 1, surrounded by the roughly rectangularly applied adhesive 3, and the gaps 6a between the metal film spheres 20 are filled with liquid metal 10.

[0066] The basic configuration of the semiconductor element 1 and the liquid metal 10 other than those described above are the same as in the description of the first embodiment, and the metal film sphere 20 is the same as in the description of the second embodiment, so its description is omitted.

[0067] As described above, this embodiment maintains adhesion between the semiconductor element 1 and the substrate 2, while the metal film spheres 20 positioned directly beneath the semiconductor element 1 transfer the heat generated by the semiconductor element 1 to the substrate 2. Similarly, the liquid metal 10 filling the gaps 6a between the metal film spheres 20 also transfers the heat generated by the semiconductor element 1 to the substrate 2. This suppresses the temperature rise associated with the heat generated by the semiconductor element 1. Furthermore, since the liquid metal 10 and the metal film spheres 20 alleviate the stress generated by adhesion, it is possible to prevent warping of the semiconductor element 1 that occurs when using conventional metal paste. The basic configuration and effects of the third embodiment relating to this disclosure are as described above.

[0068] [Modification 1 of the third embodiment] Modification 1 of the third embodiment of the semiconductor device 100 according to this disclosure is equivalent to the plan view of Modification 1 of the second embodiment shown in Figure 7, in which liquid metal 10 is filled into the gaps 6a between the metal film spheres 20. The cross-sectional view is almost identical to that of Figure 6A and is therefore omitted.

[0069] Furthermore, the effect of Modification 1 of the third embodiment is the same as the effect of Modification 1 of the second embodiment with the effect of liquid metal 10 added, so its explanation will be omitted.

[0070] [Modification 2 of the third embodiment] Modification 2 of the third embodiment of the semiconductor device 100 according to this disclosure is equivalent to the plan view of Modification 2 of the second embodiment shown in Figure 8, in which liquid metal 10 is filled into the gaps 6a between the metal film spheres 20. The cross-sectional view is almost identical to that of Figure 6A and is therefore omitted.

[0071] Furthermore, the effect of Modification 2 of the third embodiment is the same as the effect of Modification 2 of the second embodiment described above, with the effect of the liquid metal 10 added, so its explanation will be omitted.

[0072] [Modification 3 of the third embodiment] Modification 3 of the third embodiment of the semiconductor device 100 according to this disclosure is equivalent to the plan view of Modification 3 of the second embodiment shown in Figure 9, in which liquid metal 10 is filled into the gaps 6a between the metal film spheres 20. The cross-sectional view is almost identical to that of Figure 6A and is therefore omitted.

[0073] Furthermore, the effect of Modification 3 of the third embodiment is the same as the effect of Modification 3 of the second embodiment plus the effect of the liquid metal 10, so its explanation will be omitted.

[0074] <4. Cooling medium sealing process of the first embodiment of the semiconductor device according to this disclosure> [First embodiment of the cooling medium sealing process of the first embodiment] Next, a first embodiment of the cooling medium encapsulation process of the first embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 11 to 14 are process diagrams of the first embodiment of the encapsulation process of the liquid metal 10, which is the cooling medium in this embodiment. This first embodiment of the encapsulation process is common to the basic form and modified examples 1 to 3 of the first embodiment of the semiconductor device 100 described above. The same applies to each of the following embodiments of the cooling medium encapsulation process.

[0075] First, as shown in Figure 11, the adhesive 3 is applied in a roughly rectangular shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31.

[0076] Next, as shown in Figure 12, liquid metal 10 is injected into a roughly rectangular area formed by applying adhesive 3 on the substrate 2 using a liquid metal injection device 32.

[0077] Next, as shown in Figure 13, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded together.

[0078] Next, as shown in Figure 14, the electrode pads 5 formed on the semiconductor element 1 and the substrate pads 4 formed on the substrate 2 are connected by bonding wires 7 such as gold wire (Au). This completes the encapsulation of the liquid metal 10 and the assembly of the semiconductor device 100.

[0079] Through the above process, liquid metal 10 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, thereby suppressing the temperature rise of the semiconductor element 1.

[0080] [Second embodiment of the cooling medium sealing process of the first embodiment] Next, a second embodiment of the cooling medium sealing process of the first embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 15 to 19 are process diagrams illustrating the second embodiment of the cooling medium sealing process in this embodiment.

[0081] First, as shown in Figure 15, the adhesive 3 is applied in a roughly C-shape or U-shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31. That is, as shown in this figure, the adhesive 3 is not applied to one of the longer sides of the semiconductor element 1.

[0082] Next, as shown in the cross-sectional view and the plan view of the external appearance of the semiconductor element 1 and substrate 2 in Figure 16, the semiconductor element 1 is placed on the upper surface of the adhesive 3 and bonded. By bonding in this way, as shown in Figure 16, the three sides to which the adhesive 3 is applied in a roughly U-shape are closed by the semiconductor element 1 and the substrate 2, and an opening 6b of the gap 6 is formed on the long side of the semiconductor element 1 where the adhesive 3 is not applied. Note that in the plan view of the external appearance, the cover glass and other parts placed on the upper surface of the semiconductor element 1, which is a solid-state image sensor, are omitted. The same applies to the front view and subsequent views.

[0083] Next, as shown in Figure 17, the semiconductor element 1 and substrate 2, which are integrated by adhesive, are tilted so that the opening 6b of the gap 6, which is opened on the long side of the semiconductor element 1, is facing upwards. Then, liquid metal 10 is injected into the gap 6 between the semiconductor element 1 and the substrate 2 through the opening 6b of the gap 6 using a liquid metal injection device 32. The tilting angle is usually 90°, but it is not limited to that and can be determined based on the ease of the injection work. For example, it may be 60°. The same applies hereafter.

[0084] Next, sealing adhesive 3a is applied to the opening 6b of the gap 6. This seals the liquid metal 10 within the roughly rectangular gap 6 formed between the substrate 2 and the semiconductor element 1, as shown in the cross-sectional view and the plan view of the exterior in Figure 18.

[0085] Next, in Figure 19, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by making connections with bonding wires 7, similar to what was explained in Figure 14.

[0086] Through the above process, liquid metal 10 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, thereby suppressing the temperature rise of the semiconductor element 1. Furthermore, it is possible to prevent the warping of the semiconductor element 1 that occurs when conventional metal paste is used. Furthermore, since the substrate 2 and semiconductor element 1, which are integrated by adhesive, are tilted and the liquid metal 10 is injected through the opening 6b, the liquid metal 10 is less likely to spill, and it is easy to confirm that the correct amount has been injected. In addition, sealing is easy because the opening 6b can be sealed by applying the sealing adhesive 3a.

[0087] In the second embodiment, an example was described in which the opening 6b of the gap 6 was arranged along the entire long side of the semiconductor element 1. However, the opening 6b does not need to be as large as shown in this figure. For example, the opening 6b may be a small hole, and the injection port of the liquid metal injection device 32 may be formed into a thin, syringe-like shape and inserted into the opening 6b before injecting the liquid metal 10. After the injection is complete, the small hole in the opening 6b can be sealed with sealing adhesive 3a. This configuration makes it easier to handle the liquid metal 10 and further simplifies sealing with the sealing adhesive 3a.

[0088] <5. Cooling medium sealing process in the second embodiment of the semiconductor device according to this disclosure> [First embodiment of the cooling medium sealing process in the second embodiment] Next, a first embodiment of the cooling medium encapsulation process of a second embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 20 to 23 are process diagrams illustrating the first embodiment of the encapsulation process of the metal film spheres 20, which are the cooling medium in this embodiment.

[0089] First, as shown in Figure 20, the adhesive 3 is applied in a roughly rectangular shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31.

[0090] Next, as shown in Figure 21, the metal-coated spheres 20 are injected into a roughly rectangular area formed by the application of adhesive 3 on the substrate 2 using the sphere injection device 33.

[0091] Next, as shown in Figure 22, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded together.

[0092] Next, in Figure 23, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by connecting them with bonding wires 7, similar to the method described in Figure 14.

[0093] Through the above process, metal film spheres 20 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, thereby forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, suppressing the temperature rise of the semiconductor element 1.

[0094] [Second embodiment of the cooling medium sealing process in the second embodiment] Next, a second embodiment of the cooling medium sealing process of the second embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 24 to 28 are process diagrams illustrating the second embodiment of the cooling medium sealing process in this embodiment.

[0095] First, as shown in Figure 24, adhesive 3 is applied in a roughly C-shape or U-shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31. That is, as shown in this figure, adhesive 3 is not applied to one of the longer sides of the semiconductor element 1.

[0096] Next, as shown in Figure 25, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded. By bonding in this way, as shown in Figure 25, the three sides to which the adhesive 3 is applied in a roughly U-shape are closed by the semiconductor element 1 and the substrate 2, and an opening 6b of the gap 6 is formed on the long side of the semiconductor element 1 where the adhesive 3 is not applied.

[0097] Next, as shown in Figure 26, the semiconductor element 1 and substrate 2, which are integrated by adhesive, are tilted so that the opening 6b of the gap 6, which is opened on the long side of the semiconductor element 1, is facing upwards, similar to what was described in Figure 17. Then, metal-coated spheres 20 are injected into the gap 6 between the semiconductor element 1 and the substrate 2 through the opening 6b of the gap 6 using a sphere injection device 33.

[0098] Next, sealing adhesive 3a is applied to the opening 6b of the gap 6. As a result, the metal film sphere 20 is sealed within the roughly rectangular gap 6 formed between the substrate 2 and the semiconductor element 1, as shown in the cross-sectional view and the plan view of the exterior in Figure 27.

[0099] Next, in Figure 28, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by making connections with bonding wires 7, similar to what was explained in Figure 14.

[0100] Through the above process, the metal film spheres 20 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, thereby forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, suppressing the temperature rise of the semiconductor element 1. As for other effects, they are the same as in the second embodiment of the cooling medium sealing process of the first embodiment described above, so their explanation will be omitted.

[0101] [Third embodiment of the cooling medium sealing process in the second embodiment] Next, a third embodiment of the cooling medium encapsulation process of the second embodiment of the semiconductor device 100 according to this disclosure will be described. In the third embodiment, the metal-coated spheres 20 are fixed in place by pre-forming a substantially hemispherical recess 2a at the placement location of the metal-coated spheres 20 on the substrate 2. Figures 29 to 33 are process diagrams illustrating the third embodiment of the cooling medium encapsulation process in this embodiment. The cross-sectional views in Figures 29 to 32 are enlarged views of the portion of the substrate 2 where the metal-coated spheres 20 are placed.

[0102] First, as shown in Figure 29, a predetermined number of approximately hemispherical recesses 2a are made on the upper surface of the substrate 2 in order to pre-fix the positions on which the metal-coated spheres 20 will be placed.

[0103] Next, as shown in Figure 30, a predetermined number of metal-coated spheres 20 are grasped by the sphere-holding jig 34 and placed on the substantially hemispherical recess 2a recessed in the upper surface of the substrate 2.

[0104] Next, as shown in Figure 31, the ball-holding jig 34 releases a predetermined number of metal-coated balls 20 that it is holding and places them on the substantially hemispherical recess 2a recessed in the upper surface of the substrate 2. Then, using the adhesive application device 31, the adhesive 3 is applied in a substantially rectangular shape along the periphery of the metal-coated balls 20 placed on the upper surface of the substrate 2.

[0105] Next, as shown in the cross-sectional view and the plan view of the exterior in Figure 32, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded to it.

[0106] Next, in Figure 33, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by connecting them with bonding wires 7, similar to the method described in Figure 14. In this embodiment, an example was described in which the metal-coated spheres 20 are placed on a substantially hemispherical recess 2a recessed in the upper surface of the substrate 2, but they may also be bonded to the recess 2a.

[0107] Through the above process, metal film spheres 20 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, thereby forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, suppressing the temperature rise of the semiconductor element 1.

[0108] Furthermore, by configuring the metal-coated spheres 20 to be pre-bonded to the substrate 2 as in this embodiment, the required number of metal-coated spheres 20 can be reliably placed directly beneath the heat source. This allows for control of the temperature rise suppression effect, eliminating variations and enabling the acquisition of the optimal effect with the minimum necessary quantity.

[0109] [Fourth embodiment of the cooling medium sealing process in the second embodiment] Next, a fourth embodiment of the cooling medium encapsulation process of the second embodiment of the semiconductor device 100 according to this disclosure will be described. In the fourth embodiment, soldering pads 2b are pre-placed at the placement positions of the metal-coated spheres 20 on the substrate 2, and the spheres are fixed by soldering. Figures 34 to 39 are process diagrams illustrating the fourth embodiment of the cooling medium encapsulation process in this embodiment. Figures 34 to 38 are cross-sectional views, which are enlarged views of the portion of the substrate 2 where the metal-coated spheres 20 are placed.

[0110] First, as shown in Figure 34, a predetermined number of soldering pads 2b are formed on the upper surface of the substrate 2 in order to pre-fix the positions on which the metal-coated spheres 20 will be placed.

[0111] Next, as shown in Figure 35, a metal mask 35 for applying solder paste 40 to the soldering pads 2b is firmly fixed to the upper surface of the substrate 2, aligned with the position of the soldering pads 2b. Then, the solder paste 40 is applied to the soldering pads 2b via the metal mask 35 using a squeegee 36.

[0112] Specifically, the metal mask 35 is a mask (jig) used when performing reflow soldering to apply solder paste to the soldering pads 2b. The metal mask 35 has mask holes 35a drilled in a thin metal plate that match the position and shape of the soldering pads 2b. Then, by applying solder paste 40 to the metal mask 35 using a brush called a squeegee 36, the solder paste 40 that passes through the mask holes 35a is applied to the soldering pads 2b on the substrate 2. For the sake of explanation, this diagram shows the metal mask 35 lifted during the application of the solder paste 40.

[0113] Next, as shown in Figure 36, a predetermined number of metal-coated spheres 20 are grasped by the soldering jig 37 and placed on the soldering pads 2b of the substrate 2 to which solder paste 40 has been applied.

[0114] Next, the soldering jig 37 releases a predetermined number of metal-coated spheres 20 that it is holding and places them on the solder paste 40 applied to the upper surface of the substrate 2, as shown in Figure 37. Then, the metal-coated spheres 20 are soldered to the soldering pads 2b by passing them through a reflow oven (not shown). Note that the soldering jig 37 may be removed before passing through the reflow oven, or it may be left attached before passing through the reflow oven. Once soldering is complete and the substrate 2 has cooled to room temperature, the adhesive 3 is applied in a roughly rectangular shape along the periphery of the metal-coated sphere 20 placed on the upper surface of the substrate 2 using the adhesive application device 31.

[0115] Next, as shown in the cross-sectional view and the plan view of the exterior in Figure 38, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded to it.

[0116] Next, in Figure 39, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by making connections with bonding wires 7, similar to what was explained in Figure 14.

[0117] Through the above process, the metal film spheres 20 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, thereby forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, suppressing the temperature rise of the semiconductor element 1. As for other effects, they are the same as in the third embodiment of the cooling medium sealing process of the second embodiment described above, so their explanation will be omitted.

[0118] [Fifth embodiment of the cooling medium sealing process in the second embodiment] Next, a fifth embodiment of the cooling medium encapsulation process of the second embodiment of the semiconductor device 100 according to this disclosure will be described. In the fifth embodiment, the soldering pad 1b is formed on the lower surface of the semiconductor element 1 side, rather than the substrate 2 side, and the metal-coated sphere 20 is fixed thereby by soldering it. Figures 40 to 42 are process diagrams illustrating the fifth embodiment of the cooling medium encapsulation process in this embodiment. The cross-sectional views in Figures 40 to 42 are enlarged views of the portion of the semiconductor element 1 where the metal-coated sphere 20 is placed.

[0119] First, as shown in Figure 40, a predetermined number of soldering pads 1b are formed on the underside of the semiconductor element 1 to pre-fix the position where the metal film spheres 20 will be placed. Note that in this figure, the semiconductor element 1 is inverted to allow for the application of solder paste 40, so the underside is facing upwards.

[0120] Next, solder paste 40 is applied to the soldering pad 1b using a metal mask 35. The method for applying solder paste 40 is the same as described in Figure 35, so the explanation is omitted here.

[0121] Next, as explained in Figure 36, a predetermined number of metal-coated spheres 20 are grasped by the soldering jig 37 and placed on top of the solder paste 40 applied to the soldering pad 1b of the semiconductor element 1, as shown in Figure 41.

[0122] Next, the semiconductor element 1 on which the metal-coated spheres 20 are placed is passed through a reflow oven (not shown) to solder the metal-coated spheres 20 to the soldering pads 1b. After soldering is complete, the semiconductor element 1 is cooled to room temperature. The reflow soldering process is the same as described in Figures 36 and 37. In parallel with this, when the lower surface of the semiconductor element 1 to which the metal film spheres 20 are soldered is placed on the substrate 2 using the adhesive application device 31, adhesive 3 is applied to the substrate 2 in a roughly rectangular shape so that the metal film spheres 20 are bonded in a manner that surrounds them.

[0123] Next, as shown in Figure 42, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded together.

[0124] Next, as explained in Figure 14, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by connecting them with bonding wires 7.

[0125] Through the above process, the metal film spheres 20 can be sealed in the gap 6 between the semiconductor element 1 and the substrate 2 of the semiconductor device 100, thereby forming a heat conductor. This allows the heat generated by the semiconductor element 1 to be transferred to the substrate 2, suppressing the temperature rise of the semiconductor element 1. As for other effects, they are the same as in the third embodiment of the cooling medium sealing process of the second embodiment described above, so their explanation will be omitted.

[0126] <6. Cooling medium sealing process of the third embodiment of the semiconductor device according to this disclosure> [First embodiment of the cooling medium sealing process of the third embodiment] Next, a first embodiment of the cooling medium encapsulation process of a third embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 43 to 47 are process diagrams illustrating the first embodiment of the encapsulation process of the liquid metal 10 and metal film spheres 20, which are the cooling medium in this embodiment.

[0127] First, as shown in Figure 43, the adhesive 3 is applied in a roughly rectangular shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31.

[0128] Next, as shown in Figure 44, the metal-coated spheres 20 are injected into a roughly rectangular area formed by the application of adhesive 3 on the substrate 2 using the sphere injection device 33.

[0129] Next, as shown in Figure 45, liquid metal 10 is injected into the roughly rectangular area formed by the application of adhesive 3 on the substrate 2 using a liquid metal injection device 32. As a result, numerous metal-coated spheres 20 are sealed within the area surrounded by the roughly rectangular adhesive 3, and the gaps 6a between the metal-coated spheres 20 are filled with liquid metal 10.

[0130] Next, as shown in Figure 46, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded together.

[0131] Next, in Figure 47, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by making connections with bonding wires 7, similar to what was explained in Figure 14.

[0132] Through the above process, the adhesion between the semiconductor element 1 and the substrate 2 is maintained, and the metal film spheres 20 placed directly beneath the semiconductor element 1 transfer the heat generated by the semiconductor element 1 to the substrate 2. Similarly, the liquid metal 10 filled in the gaps 6a between the metal film spheres 20 also transfers the heat generated by the semiconductor element 1 to the substrate 2. This suppresses the temperature rise of the semiconductor element 1. Furthermore, it prevents warping of the semiconductor element 1 that occurs when using conventional metal paste.

[0133] [Second embodiment of the cooling medium sealing process in the third embodiment] Next, a second embodiment of the cooling medium sealing process of the third embodiment of the semiconductor device 100 according to this disclosure will be described. Figures 48 to 53 are process diagrams illustrating the second embodiment of the cooling medium sealing process in this embodiment.

[0134] First, as shown in Figure 48, adhesive 3 is applied in a roughly C-shape or U-shape along the periphery of the upper surface of the substrate 2 using the adhesive application device 31. That is, as shown in this figure, adhesive 3 is not applied to one of the longer sides of the semiconductor element 1.

[0135] Next, as shown in the cross-sectional view and the plan view of the exterior in Figure 49, the semiconductor element 1 is placed on the upper surface of the applied adhesive 3 and bonded. By bonding in this way, as shown in Figure 49, the three sides to which the adhesive 3 is applied in a roughly U-shape are closed by the semiconductor element 1 and the substrate 2, and an opening 6b of the gap 6 is formed on the long side of the semiconductor element 1 where the adhesive 3 is not applied.

[0136] Next, as shown in Figure 50, the semiconductor element 1 and substrate 2, which are integrated by adhesive, are tilted so that the opening 6b of the gap 6, which is opened on the long side of the semiconductor element 1, is facing upwards, similar to the explanation given in Figure 26. Then, metal-coated spheres 20 are injected into the gap 6 between the semiconductor element 1 and the substrate 2 through the opening 6b of the gap 6 using a sphere injection device 33.

[0137] Next, as shown in Figure 51, liquid metal 10 is injected through the opening 6b using the liquid metal injection device 32, similar to the method described in Figure 17. As a result, numerous metal-coated spheres 20 are injected into the gap 6, and the gaps 6a between the metal-coated spheres 20 are filled with liquid metal 10.

[0138] Next, sealing adhesive 3a is applied to the opening 6b of the gap 6 to seal it. As a result, the liquid metal 10 and the metal film spheres 20 are sealed inside the roughly rectangular gap 6 formed between the substrate 2 and the semiconductor element 1, as shown in the cross-sectional view and the plan view of the exterior in Figure 52.

[0139] Next, in Figure 53, the encapsulation of the metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by making connections with bonding wires 7, similar to what was explained in Figure 14.

[0140] Through the above process, the adhesion between the semiconductor element 1 and the substrate 2 is maintained, and the metal film spheres 20 placed directly beneath the semiconductor element 1 transfer the heat generated by the semiconductor element 1 to the substrate 2. Similarly, the liquid metal 10 filled in the gaps 6a between the metal film spheres 20 transfers the heat generated by the semiconductor element 1 to the substrate 2. This suppresses the temperature rise of the semiconductor element 1. Furthermore, other effects are the same as in the second embodiment of the cooling medium sealing process of the first embodiment described above, so a description will be omitted.

[0141] [Third embodiment of the cooling medium sealing process in the third embodiment] Next, a third embodiment of the cooling medium sealing process of the third embodiment of the semiconductor device 100 according to the present disclosure will be described. The third embodiment can be realized by adding a step of injecting liquid metal 10 similar to that described in the step of Figure 51 between the steps of Figure 32 and Figure 33 in the third embodiment of the cooling medium sealing process of the second embodiment.

[0142] Specifically, after the process shown in Figure 32, the semiconductor element 1 and substrate 2, which have been integrated by adhesive, are tilted so that the opening 6b of the gap 6, which is opened on the long side of the semiconductor element 1, is facing upwards. Then, liquid metal 10 is injected through the opening 6b of the gap 6 using a liquid metal injection device 32, and once the injection is complete, sealing adhesive 6a is applied to the opening 6b to seal it. As a result, a large number of metal film spheres 20 are sealed within the roughly rectangular area formed by the application of adhesive 3 on the substrate 2, and the gaps 6a between the metal film spheres 20 are filled with liquid metal 10.

[0143] Furthermore, in the third embodiment of the cooling medium sealing process of the second embodiment described above, this can be achieved by adding a step of injecting the same liquid metal 10 as described in the step of Figure 45 between the step of Figure 31 and the step of Figure 32.

[0144] In the third embodiment of the cooling medium encapsulation process of the second embodiment, as shown in Figure 33, the encapsulation of the liquid metal 10 and metal film spheres 20 and the assembly of the semiconductor device 100 are completed by connecting with bonding wires 7.

[0145] The effects of the third embodiment are the same as those of the third embodiment of the cooling medium sealing process of the second embodiment and the second embodiment of the cooling medium sealing process of the third embodiment, so a description will be omitted.

[0146] [Fourth embodiment of the cooling medium sealing process in the third embodiment] Next, a fourth embodiment of the cooling medium sealing process of the third embodiment of the semiconductor device 100 according to the present disclosure will be described. The fourth embodiment can be realized by adding a step of injecting liquid metal 10 similar to that described in the step of Figure 51 between the steps of Figure 38 and Figure 39 in the fourth embodiment of the cooling medium sealing process of the second embodiment.

[0147] Specifically, after the process shown in Figure 38, the semiconductor element 1 and substrate 2, which have been integrated by adhesive, are tilted so that the opening 6b of the gap 6, which is opened on the long side of the semiconductor element 1, is facing upwards. Then, liquid metal 10 is injected through the opening 6b of the gap 6 using a liquid metal injection device 32, and once the injection is complete, sealing adhesive 6a is applied to the opening 6b to seal it. As a result, a large number of metal film spheres 20 are sealed within the roughly rectangular area formed by the application of adhesive 3 on the substrate 2, and the gaps 6a between the metal film spheres 20 are filled with liquid metal 10.

[0148] Furthermore, in the fourth embodiment of the cooling medium sealing process of the second embodiment described above, this can be achieved by adding a step of injecting the same liquid metal 10 as described in the step of Figure 45 between the step of Figure 37 and the step of Figure 38.

[0149] In the fourth embodiment of the cooling medium sealing process of the second embodiment, as shown in Figure 39, the sealing of the liquid metal 10 and metal-coated spheres 20 and the assembly of the semiconductor device 100 are completed by connecting with bonding wires 7.

[0150] The effects of the fourth embodiment are the same as those of the fourth embodiment of the cooling medium sealing process in the second embodiment and the second embodiment of the cooling medium sealing process in the third embodiment, so a description will be omitted.

[0151] <7. Fourth Embodiment of the Semiconductor Device Related to the Disclosure> Figure 54 is a cross-sectional view of a fourth embodiment of the semiconductor device 100 according to the present disclosure. This embodiment is a semiconductor device 100 described in the first to third embodiments with a heat dissipation mechanism 26 added to it. That is, a semiconductor device 100 that uses liquid metal 10, metal film spheres 20, or liquid metal 10 and metal film spheres 20 as a cooling medium for the semiconductor element 1 has a heat dissipation mechanism 26 added to it.

[0152] Specifically, as shown in Figure 54, a heat dissipation mechanism 26 is provided on the underside of the semiconductor device 100. The heat dissipation mechanism 26 is, for example, a heat slag or a Peltier element. Thermal vias 27 and copper inlays 28 are provided on the substrate 2 directly beneath the heat source of the semiconductor device 1. Then, the liquid metal 10 and metal film spheres 20, etc., transfer the heat from the semiconductor device 1 to the thermal vias 27 and copper inlays 28, which in turn transfer the heat to the heat dissipation mechanism 26. This allows for highly efficient heat transfer, further suppressing the temperature rise of the semiconductor device 1.

[0153] <8. Encapsulation structure of the cooling medium for the semiconductor device relating to this disclosure> The semiconductor device 100 and the process of sealing the cooling medium according to this disclosure are configured as described above. However, when the cooling medium is sealed in the gap 6 between the semiconductor element 1 and the substrate 2, the following problems may occur.

[0154] The first problem is when the amount of cooling medium is too small. In this case, air is interposed in the gap 6 between the semiconductor element 1 and the substrate 2, and since its position cannot be determined, the thermal conductivity decreases or becomes uneven, hindering the effect of suppressing the temperature rise. The second problem is when the amount of cooling medium is too large. In this case, the cooling medium expands due to the rise in ambient temperature and the heat generated by the semiconductor element 1, and the resulting stress may cause the adhesive 3 to peel or crack. The metal film spheres 20 are elastic and deform when subjected to external force, so there is no risk of peeling or cracking, but in the case of liquid metal 10, its volume expands and contracts, which poses a problem.

[0155] Therefore, as a countermeasure to the problems in the case of such liquid metal 10, it is desirable that the gap 6 between the semiconductor element 1 and the substrate 2 be configured as follows. First, as shown in Figure 55, the first method utilizes surface tension. In Figure 55A, an air space 11 is formed between the adhesive 3 and the liquid metal 10 within the gap 6 (the semiconductor element 1 is not shown in this figure). By forming such a space 11, the liquid metal 10 can maintain the height of the adhesive 3 and adhere closely to the lower surface of the semiconductor element 1 disposed above it. This is a countermeasure in the first and third embodiments of the semiconductor device 100 according to this disclosure.

[0156] Here, if the volume of the liquid metal 10 expands due to the rise in temperature, the liquid metal 10 will stretch in the planar direction within the gap 6, compressing the air in the space 11. When air is compressed, its volume decreases and its pressure increases. However, the increase in pressure in the space 11 due to the compression of air is not large enough to cause delamination or cracking of the adhesive 3. On the other hand, if the temperature decreases, the volume of the liquid metal 10 contracts, reducing the pressure of the air in the space 11. Although the air pressure in the space 11 decreases due to the reduced pressure, this does not pose a problem. However, if the surface tension of the liquid metal 10 is too low, a problem may arise in which the space 11 shown in Figure 55A cannot be formed.

[0157] Therefore, the utilization of surface tension will be described in more detail. FIG. 55B is an explanatory diagram of the equilibrium state of surface tension. In this figure, the surface tension of the surface 2c of the substrate 2 on which the liquid metal 10 has been dropped is γ SL , the surface tension of the surface 2d of the substrate 2 on which the liquid metal 10 has not been dropped is γ S , and the surface tension of the liquid metal 10 is γ L . Then, when the liquid metal 10 maintains the state in this figure, γ S = γ L ×cosθ + γ SL Young's equation as shown above holds.

[0158] The condition for this equation to hold is γ L > γ S . That is, the phenomenon that the liquid is repelled and becomes substantially spherical occurs when the surface tension γ S of the solid surface is smaller than the surface tension γ L of the liquid. That is, in order for the surface 2d of the substrate 2 to repel the liquid metal 10 and make it substantially spherical, a liquid metal 10 having a surface tension γ S larger than the surface tension γ L of the surface 2 can be used. For example, mercury has a very large surface tension of 485.5 mN / m and thus becomes substantially spherical. Therefore, the space 11 can be easily formed.

[0159] When using a liquid metal 10 that does not have a high surface tension like mercury, a countermeasure is to make the surface tension of the substrate 2's surface 2d lower than that of the liquid metal 10. For example, it is effective to coat the substrate 2's surface 2d with a fluorine-based material (10-25 mN / m) containing a Teflon®-based material with low surface tension. By performing such a treatment, the liquid metal 10, which has a higher surface tension than the surface 2d, is repelled by the fluorine-based coating, forming a space 11, and adheres closely to the underside of the semiconductor element 1, allowing heat to be transferred. The coating may be applied to the underside of the semiconductor element 1 facing the surface 2d, or to both surfaces 2d of the substrate 2. Furthermore, it may be possible to create a liquid metal 10 with a high surface tension by changing the component ratio of gallium, indium, etc.

[0160] Next, we will describe a measure to form a partition 2e within the gap 6 surrounded by the adhesive 3. Figure 56A is an explanatory diagram showing how a space 11 is formed by providing a partition 2e within the gap 6. In this figure, a substantially convex partition 2e with a height h slightly lower than the height of the adhesive 3 is provided protruding from the inside of the substrate 2 where the adhesive 3 is applied. With this configuration, the liquid metal 10 can be sandwiched between the semiconductor element 1 and the substrate 2, forming a space 11 between it and the adhesive 3.

[0161] Since the liquid metal 10 is sandwiched between the upper surface of the partition 2e and the lower surface of the semiconductor element 1, it will not spill out of the partition 2e due to surface tension. Incidentally, at low temperatures, the liquid metal 10 contracts, so as shown in Figure 56A, the liquid metal 10 is pulled inward of the partition 2e. Also, at high temperatures, the liquid metal 10 expands, so as shown in Figure 56B, the liquid metal 10 comes out of the partition 2e. However, if too much liquid metal 10 is injected, it may overflow into space 11 due to expansion, so it is necessary to use an appropriate amount. Note that when the height h of partition 2e is set to 0 (zero), the space 11 utilizing surface tension is as shown in Figure 55A.

[0162] Furthermore, as shown in Figure 56C, another partition 2f may be provided between the adhesive 3 applied to the substrate 2 and the protruding partition 2e, at approximately the same height as partition 2e or approximately the same height as adhesive 3. With this configuration, the liquid metal 10 can be sandwiched between the semiconductor element 1 and the substrate 2, forming a space 11 between it and the adhesive 3. It goes without saying that the heights and widths of partitions 2e and 2f are not limited to the above-described embodiment, and any combination is possible.

[0163] Next, the second solution to the problems in the case of liquid metal 10 is a configuration in which it is used in combination with metal-coated spheres 20, as shown in Figure 57. This is a solution in the third embodiment of the present disclosure. Specifically, as shown in the figure, the liquid metal 10 should be completely filled into the gaps 6a between the metal-coated spheres 20 that are sealed in the gap 6. With this configuration, the liquid metal 10 can be sandwiched between the semiconductor element 1 and the substrate 2 and form a heat conductor between it and the adhesive 3. Even if the liquid metal 10 expands or contracts due to temperature changes, the metal-coated spheres 20 deform accordingly, so that cracks do not occur in the package due to an increase in the internal pressure of the gap 6. In this way, by combining the liquid metal 10 and the metal-coated spheres 20, the metal-coated spheres 20 mitigate the pressure changes associated with the expansion and contraction of the liquid metal 10, and adjustments due to expansion and contraction can be made automatically. Furthermore, this configuration is the simplest and most reliable, and does not require consideration of surface tension, etc., so its effect is significant.

[0164] The above explains the countermeasures for the problems, but you may combine these as appropriate.

[0165] <9. Electronic equipment having semiconductor devices related to this disclosure> An example of the configuration of an electronic device having a solid-state imaging device 101, which is an example of a semiconductor device 100 according to the first to fourth embodiments described above, will be explained with reference to Figure 58.

[0166] The semiconductor device 100 according to this disclosure can be applied to imaging devices such as digital still cameras and video cameras, portable terminal devices having imaging functions, or imaging equipment that uses a solid-state imaging device 101 in the image reading unit of a copier or the like. Furthermore, its applications are not limited to imaging equipment, but can be broadly applied to electronic equipment in general, including household electrical appliances, industrial equipment, communication equipment, and in-vehicle equipment. The solid-state imaging device 101 may be a CMOS sensor or a CCD sensor. In addition, the solid-state imaging device 101 may be formed as a single chip, or it may be in the form of a module having imaging functions in which the imaging unit and signal processing unit or optical system are packaged together, as long as it has the cooling medium according to this disclosure.

[0167] As shown in Figure 58, the imaging device 200, as an electronic device, comprises an optical unit 202, a solid-state imaging device 101, a DSP (Digital Signal Processor) circuit 203 which is a camera signal processing circuit, a frame memory 204, a display unit 205, a recording unit 206, an operation unit 207, and a power supply unit 208. The DSP circuit 203, frame memory 204, display unit 205, recording unit 206, operation unit 207, and power supply unit 208 are interconnected via a bus line 209.

[0168] The optical unit 202 includes multiple lenses and captures incident light (image light) from the subject and forms an image on the pixel area (not shown) of the solid-state imaging device 101. The solid-state imaging device 101 converts the amount of incident light formed on the pixel area by the optical unit 202 into an electrical signal on a pixel-by-pixel basis and outputs it as a pixel signal.

[0169] The display unit 205 consists of a panel-type display device such as a liquid crystal panel or an organic EL (Electro-Luminescence) panel, and displays video or still images captured by the solid-state imaging device 101. The recording unit 206 records the video or still images captured by the solid-state imaging device 101 onto a recording medium such as a hard disk or semiconductor memory.

[0170] The control unit 207 issues operation commands for various functions of the imaging device 200 under the user's control. The power supply unit 208 appropriately supplies various power sources to the DSP circuit 203, frame memory 204, display unit 205, recording unit 206, and control unit 207.

[0171] Furthermore, the semiconductor device 100 according to this disclosure can be widely applied not only to the solid-state imaging device 101, but also to various semiconductor devices 100 that constitute circuits such as the DSP circuit 203, frame memory 204, recording unit 206, display unit 205, and operation unit 207.

[0172] As described above, according to this disclosure, by using the solid-state imaging device 101, which is the semiconductor device 100 according to this disclosure, a highly reliable imaging device 200 with excellent heat dissipation can be obtained.

[0173] Finally, the descriptions of the embodiments described above are examples of this disclosure, and this disclosure is not limited to the embodiments described above. Therefore, it goes without saying that various modifications are possible depending on the design, etc., even for embodiments other than those described above, as long as they do not depart from the technical concept of this disclosure. Furthermore, the effects described herein are merely illustrative and not limiting, and other effects may also exist.

[0174] Furthermore, this technology can also be configured as follows. (1) Semiconductor elements and A substrate on which the semiconductor element is fixed, The gap formed when the semiconductor element and the substrate are fixed together is filled. Liquid metal and metal-coated spheres and, Semiconductor device. (2) Semiconductor elements and A substrate on which the semiconductor element is fixed, It is composed of the substrate, the semiconductor element, and an adhesive applied to the entire periphery of the semiconductor element to fix them together, and is formed by coating the upper surface of the substrate with a low surface tension material along the inner circumference of the adhesive. A cooling medium is filled into the gap, Semiconductor device. (3) Semiconductor elements and A substrate on which the semiconductor element is fixed, The device is composed of the substrate, the semiconductor element, and an adhesive applied to the entire periphery of the semiconductor element to fix them together, and a partition lower than the thickness of the adhesive is formed protruding from the upper surface of the substrate along the inner circumference of the adhesive. A cooling medium is filled into the gap, Semiconductor device. (4) A step of applying adhesive in a manner that surrounds the area on the substrate where the cooling medium is to be placed, In the area surrounded by the aforementioned adhesive Liquid metal and metal-coated spheres The process of injecting, A step of bonding a semiconductor element onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature]. (5) A step of applying adhesive in a manner that surrounds the area on the substrate where the cooling medium is to be placed, The aforementioned adhesive of The process of bonding a semiconductor element to the top, The aforementioned substrate, The aforementioned Adhesive and The aforementioned A step of injecting a cooling medium into the gap formed between the semiconductor element and the semiconductor element, A step of sealing the gap, A method for manufacturing a semiconductor device having [a certain feature]. (6) Injected into the aforementioned gap The aforementioned The cooling medium is a liquid metal. (5) A method for manufacturing a semiconductor device as described above. (7) Injected into the aforementioned gap The aforementioned The cooling medium is a metal-coated sphere. (5) A method for manufacturing a semiconductor device as described above. (8) Injected into the aforementioned gap The aforementioned The cooling medium is a liquid metal and metal-coated spheres. (5) A method for manufacturing a semiconductor device as described above. (9) A process of placing metal-coated spheres in multiple recesses formed on a substrate, The aforementioned Placed in multiple recesses A step of applying adhesive in such a manner that it surrounds the metal-coated sphere, The aforementioned adhesive of The process of bonding a semiconductor element to the top, A method for manufacturing a semiconductor device having [a certain feature]. (10) The process involves placing metal-coated spheres on multiple soldering pads arranged on a circuit board, The process of soldering the placed metal film sphere, A step of applying adhesive in such a manner that it surrounds the placed metal-coated sphere, A step of bonding a semiconductor element onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature]. (11) A process of placing metal film spheres on multiple soldering pads arranged on the underside of a semiconductor element, The process of soldering the placed metal film sphere, The process involves applying an adhesive to the substrate or the underside of the semiconductor element in such a manner that it surrounds the metal film sphere when the surface of the semiconductor element to which the metal film sphere is soldered is placed on the substrate, A step of bonding the surface on which the metal film sphere of the semiconductor element is soldered onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature]. (12) The process involves injecting liquid metal into the gap formed by the substrate, the semiconductor element, and the adhesive applied in a manner that surrounds the metal film sphere. To Having the aforementioned (9) from (11) A method for manufacturing a semiconductor device as described in any one of the following. (13) Semiconductor elements and A substrate on which the semiconductor element is fixed, The gap formed when the semiconductor element and the substrate are fixed together is filled. Liquid metal and metal-coated spheres and, Alternatively, Semiconductor elements and A substrate on which the semiconductor element is fixed, The system comprises the substrate, the semiconductor element, and an adhesive applied to the entire periphery of the semiconductor element to fix them together, and a cooling medium is filled into a gap formed by covering the upper surface of the substrate with a low surface tension material along the inner circumference of the adhesive. Or, Semiconductor elements and A substrate on which the semiconductor element is fixed, The cooling medium is filled into a gap formed by a partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, which is lower than the thickness of the adhesive, and the substrate is the substrate, the semiconductor element and the adhesive is applied to the entire peripheral edge of the semiconductor element to fix the two together, and the cooling medium is filled into the gap formed by the partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, Electronic equipment having semiconductor devices. [Explanation of Symbols]

[0175] 1. Semiconductor element 1b Soldering pad 2 circuit boards 2a Recess 2b Soldering Pad 2c surface 2d surface 2e partition 2F Partition 3. Adhesive 3a Sealing Adhesive 4 PCB pads 5 electrode pads 6 Gap 6a Gap 6b opening 7 Bonding wire 10 liquid metal 11 Space 20 Metal coated pellets 21 cores 22 Polyimide film 23 Metal coating 26 Heat dissipation mechanism 27 Thermal vias 28 Copper Inlays 31 Adhesive application device 32 Liquid metal injection device 33 Globule injection device 34 Small ball mounting jig 35 Metal Mask 35a Mask holes 36 squeegee 37 Soldering jig 40 Cream Solder 100 Semiconductor Equipment 101 Solid-state imaging device 200 Imaging device

Claims

1. Semiconductor elements and A substrate on which the semiconductor element is fixed, A liquid metal and metal film spheres are filled into the gap formed when the semiconductor element and the substrate are fixed together. Semiconductor device.

2. Semiconductor elements and A substrate on which the semiconductor element is fixed, The system comprises the substrate, the semiconductor element, and an adhesive applied to the entire periphery of the semiconductor element to fix them together, and a cooling medium is filled into a gap formed by covering the upper surface of the substrate with a low surface tension material along the inner circumference of the adhesive. Semiconductor device.

3. Semiconductor elements and A substrate on which the semiconductor element is fixed, The cooling medium is filled into a gap formed by a partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, which is lower than the thickness of the adhesive, and the substrate is the substrate, the semiconductor element and the adhesive is applied to the entire peripheral edge of the semiconductor element to fix the two together, and the cooling medium is filled into the gap formed by the partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, Semiconductor device.

4. A step of applying adhesive in a manner that surrounds the area on the substrate where the cooling medium is to be placed, A step of injecting liquid metal and metal-coated spheres into the area surrounded by the adhesive, A step of bonding a semiconductor element onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature].

5. A step of applying adhesive in a manner that surrounds the area on the substrate where the cooling medium is to be placed, A step of bonding a semiconductor element onto the adhesive, A step of injecting a cooling medium into the gap formed between the substrate, the adhesive, and the semiconductor element, A step of sealing the gap, A method for manufacturing a semiconductor device having [a certain feature].

6. The method for manufacturing a semiconductor device according to claim 5, wherein the cooling medium injected into the gap is a liquid metal.

7. The method for manufacturing a semiconductor device according to claim 5, wherein the cooling medium injected into the gap is a metal-coated sphere.

8. The method for manufacturing a semiconductor device according to claim 5, wherein the cooling medium injected into the gap is a liquid metal and metal-coated spheres.

9. A process of placing metal-coated spheres in multiple recesses formed on a substrate, A step of applying adhesive in such a manner that it surrounds the metal-coated spheres placed in the plurality of recesses, A step of bonding a semiconductor element onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature].

10. The process involves placing metal-coated spheres on multiple soldering pads arranged on a circuit board, The process of soldering the placed metal film sphere, A step of applying adhesive in such a manner that it surrounds the placed metal-coated sphere, A step of bonding a semiconductor element onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature].

11. A process of placing metal film spheres on multiple soldering pads arranged on the underside of a semiconductor element, The process of soldering the placed metal film sphere, The process involves applying an adhesive to the substrate or the underside of the semiconductor element in such a manner that it surrounds the metal film sphere when the surface of the semiconductor element to which the metal film sphere is soldered is placed on the substrate, A step of bonding the surface on which the metal film sphere of the semiconductor element is soldered onto the adhesive, A method for manufacturing a semiconductor device having [a certain feature].

12. A method for manufacturing a semiconductor device according to any one of claims 9 to 11, further comprising the step of injecting liquid metal into a gap formed by the substrate, the semiconductor element, and an adhesive applied in a manner that surrounds the metal film sphere.

13. Semiconductor elements and A substrate on which the semiconductor element is fixed, A liquid metal and metal film spheres are filled into the gap formed when the semiconductor element and the substrate are fixed together. Alternatively, Semiconductor elements and A substrate on which the semiconductor element is fixed, The system comprises the substrate, the semiconductor element, and an adhesive applied to the entire periphery of the semiconductor element to fix them together, and a cooling medium is filled into a gap formed by covering the upper surface of the substrate with a low surface tension material along the inner circumference of the adhesive. Or, Semiconductor elements and A substrate on which the semiconductor element is fixed, The cooling medium is filled into a gap formed by a partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, which is lower than the thickness of the adhesive, and the substrate is the substrate, the semiconductor element and the adhesive is applied to the entire peripheral edge of the semiconductor element to fix the two together, and the cooling medium is filled into the gap formed by the partition protruding from the upper surface of the substrate along the inner circumference of the adhesive, Electronic equipment having semiconductor devices.

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