Electronic components

Abstract

To realize an electronic component which can be miniaturized, and in which a cost can be reduced.SOLUTION: An electronic component 100 comprises: a first main body 1 containing a plurality of laminated dielectric body layers; and a second main body 2 mounted onto the first main body 1. The second main body 2 contains a first circuit part 41 and a second circuit part 42 that are electrically separated each other while being constructed by using at least one elastic wave element. The first main body 1 contains first to third ground conductor layers 81 to 83 that are positioned between the first circuit parts 41 and the second circuit part 42 in view of a Z direction.SELECTED DRAWING: Figure 4

Description

Technical Field

[0005]

[0001] The present invention relates to an electronic component in which a main body including an elastic wave element is mounted on another main body.

Background Art

[0002] In small mobile communication devices, a configuration is widely used in which an antenna commonly used in a plurality of applications having different systems and usage frequency bands is provided, and a plurality of signals transmitted and received by this antenna are separated using a diplexer.

[0003] Generally, a diplexer that separates a first signal having a frequency within a first frequency band and a second signal having a frequency within a second frequency band higher than the first frequency band includes a common port, a first signal port, a second signal port, a first filter provided in a first signal path from the common port to the first signal port, and a second filter provided in a second signal path from the common port to the second signal port.

[0004] Patent Documents 1 and 2 disclose a diplexer including two filters each including an LC resonator and an elastic wave resonator as the first and second filters. An elastic wave resonator is a resonator configured using an elastic wave element. An elastic wave element is an element that utilizes an elastic wave. Elastic wave elements include surface acoustic wave elements that utilize surface acoustic waves and bulk acoustic wave elements that utilize bulk acoustic waves. In the diplexers disclosed in Patent Documents 1 and 2, two physically separated elastic wave resonators are mounted on a laminate including an LC resonator.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

[0006] Miniaturization is particularly important for demultiplexers used in small communication devices. However, when using two physically separated elastic wave resonators, it is necessary to space them apart to suppress electromagnetic coupling between them. Therefore, miniaturization of the entire demultiplexer is difficult in this case. Furthermore, this method results in a higher cost for the demultiplexer compared to using a single elastic wave resonator.

[0007] The above problem applies not only to demultiplexers, but to all electronic components that include two circuit sections, each composed of elastic wave elements.

[0008] The present invention has been made in view of the above problems, and its objective is to provide an electronic component that includes two circuit parts, each composed of an elastic wave element, and that can be miniaturized and cost-effective. [Means for solving the problem]

[0009] The electronic component of the present invention comprises a first body including a plurality of stacked dielectric layers, and a second body mounted on the first body. The second body includes a first circuit portion and a second circuit portion, each configured using at least one elastic wave element and electrically isolated from each other. The first body includes at least one ground conductor layer located between the first circuit portion and the second circuit portion when viewed from a first direction parallel to the direction in which the first body and the second body are aligned.

[0010] In the electronic component of the present invention, the first direction may be a single direction parallel to the stacking direction of the plurality of dielectric layers.

[0011] Furthermore, in the electronic component of the present invention, the second body may include a first terminal, a second terminal, a third terminal, and a fourth terminal arranged on the outer surface of the second body. The first circuit portion may be provided between the first terminal and the second terminal in terms of the circuit configuration. The second circuit portion may be provided between the third terminal and the fourth terminal in terms of the circuit configuration. The first terminal and the third terminal may be arranged so as to sandwich at least one ground conductor layer when viewed from the first direction. The second terminal and the fourth terminal may be arranged so as to sandwich at least one ground conductor layer when viewed from the first direction.

[0012] Furthermore, in the electronic component of the present invention, at least one ground conductor layer may protrude outside the second body when viewed from the first direction.

[0013] Furthermore, in the electronic component of the present invention, at least one ground conductor layer may be provided inside the first body.

[0014] Furthermore, in the electronic component of the present invention, the first body may have a first surface on which the second body is mounted and a second surface on the opposite side. In this case, at least one ground conductor layer may be positioned closer to the first surface than to the second surface.

[0015] Furthermore, in the electronic component of the present invention, at least one ground conductor layer may include a plurality of ground conductor layers. In this case, the first body may further include a plurality of through-holes connecting the plurality of ground conductor layers to each other. The plurality of ground conductor layers may also include a first ground conductor layer, a second ground conductor layer, and a third ground conductor layer arranged at different positions in the first direction. The plurality of through-holes may include a plurality of first through-holes electrically connecting the first ground conductor layer and the second ground conductor layer, and a plurality of second through-holes electrically connecting the second ground conductor layer and the third ground conductor layer. The plurality of first through-holes and the plurality of second through-holes may be arranged so as not to overlap when viewed from the first direction.

[0016] Furthermore, in the electronic component of the present invention, the first body may include a third circuit portion and a fourth circuit portion arranged so as to sandwich at least one ground conductor layer when viewed from a first direction. In this case, the first circuit portion may be electrically connected to the third circuit portion. The second circuit portion may be electrically connected to the fourth circuit portion. The first and third circuit portions may constitute a first filter that selectively passes signals with frequencies within a first passband. The second and fourth circuit portions may constitute a second filter that selectively passes signals with frequencies within a second passband higher than the first passband. [Effects of the Invention]

[0017] In the electronic component of the present invention, the second body includes a first circuit portion and a second circuit portion. The first body includes at least one ground conductor layer located between the first circuit portion and the second circuit portion when viewed from a first direction. This provides the effect of enabling miniaturization and cost reduction according to the present invention. [Brief explanation of the drawing]

[0018] [Figure 1] It is a block diagram showing the configuration of an electronic component according to an embodiment of the present invention. [Figure 2] It is a perspective view showing an electronic component according to an embodiment of the present invention. [Figure 3] It is a perspective view showing a first main body in an embodiment of the present invention. [Figure 4] It is a plan view showing an electronic component according to an embodiment of the present invention. [[ID=...]] [Figure 5] It is an explanatory diagram showing a plurality of ground conductor layers and a plurality of through-holes in an embodiment of the present invention. [Figure 6] It is a block diagram showing the configuration of an electronic component of a first comparative example. [Figure 7] It is a block diagram showing the configuration of an electronic component of a second comparative example. [Figure 8] It is a circuit diagram showing the circuit configuration in the model of the example used in the simulation. [Figure 9] It is a characteristic diagram showing the frequency characteristics of isolation obtained by the simulation. [Figure 10] It is a characteristic diagram showing the pass attenuation characteristics of the first filter obtained by the simulation. [Figure 11] It is a characteristic diagram showing the pass attenuation characteristics of the second filter obtained by the simulation.

Embodiments for Carrying Out the Invention

[0019] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, referring to FIG. 1, the schematic configuration of an electronic component 100 according to an embodiment of the present invention will be described. FIG. 1 is a block diagram showing the configuration of the electronic component 100.

[0020] It should be noted that in the original text, there are some consecutive tags like [Figure 5] which seem to be incomplete in the provided text. I have translated the text as accurately as possible based on the existing content. If there are any further clarifications or corrections needed, please let me know.The electronic component 100 according to this embodiment is a triplexer comprising a first filter 4, a second filter 5, and a third filter 6. The first filter 4 is configured to selectively pass a first signal with a frequency within a first passband. The second filter 5 is configured to selectively pass a second signal with a frequency within a second passband that is higher than the first passband. The third filter 6 is configured to selectively pass a third signal with a frequency within a third passband that is lower than the first passband.

[0021] The first filter 4 includes a third circuit section 10. The second filter 5 includes a fourth circuit section 20. The third filter 6 includes a fifth circuit section 30. The third through fifth circuit sections 10, 20, and 30 are each LC circuits including at least one inductor and at least one capacitor.

[0022] The first filter 4 further includes a first circuit section 41 electrically connected to the third circuit section 10. The second filter 5 further includes a second circuit section 42 electrically connected to the fourth circuit section 20. The first and second circuit sections 41 and 42 are electrically isolated from each other. The first and second circuit sections 41 and 42 are each configured using at least one elastic wave element. The elastic wave element may be, for example, a bulk elastic wave element or a surface acoustic wave element. The first and second circuit sections 41 and 42 may each be elastic wave resonators.

[0023] The first circuit section 41 and the third circuit section 10 constitute one filter circuit (the first filter 4). The second circuit section 42 and the fourth circuit section 20 constitute another filter circuit (the second filter 5).

[0024] The first main body 1 further includes a common port 1a, a first signal port 1b, a second signal port 1c, and a third signal port 1d. The first filter 4 is provided between the common port 1a and the first signal port 1b in the circuit configuration. The second filter 5 is provided between the common port 1a and the second signal port 1c in the circuit configuration. The third filter 6 is provided between the common port 1a and the third signal port 1d in the circuit configuration. In this application, the expression "in the circuit configuration" is used to refer to the arrangement on the circuit diagram, not the arrangement in the physical configuration.

[0025] Next, the configuration of the electronic component 100 will be specifically described with reference to Figures 1 to 5. Figure 2 is a perspective view showing the electronic component 100. Figure 3 is a perspective view showing the first main body in this embodiment. Figure 4 is a plan view showing the electronic component 100. Figure 5 is an explanatory diagram showing multiple ground conductor layers and multiple through-holes in this embodiment.

[0026] As shown in Figure 2, the electronic component 100 comprises a first body 1, a second body 2 mounted on the first body 1, and a sealing part 3 that seals the first and second bodies 1 and 2. The sealing part 3 is made of, for example, resin.

[0027] First, the configuration of the first main body 1 will be described. The first main body 1 includes the third to fifth circuit sections 10, 20, and 30 shown in Figure 1. The first main body 1 also includes a laminate 50. The laminate 50 includes a plurality of stacked dielectric layers, a plurality of conductor layers formed on these dielectric layers, and a plurality of through-holes. Each LC circuit of the third to fifth circuit sections 10, 20, and 30 is constructed using a plurality of dielectric layers, a plurality of conductor layers, and a plurality of through-holes.

[0028] Each of the through-holes is formed by filling the through-hole holes with conductive paste. Each of the through-holes is connected to a conductive layer or another through-hole. For convenience, in the following explanation, a structure consisting of two or more through-holes connected in series will also be referred to as a "through-hole."

[0029] The laminate 50 has a first surface 50A and a second surface 50B located at both ends in the stacking direction of the multiple dielectric layers, and four side surfaces 50C to 50F connecting the first surface 50A and the second surface 50B. Side surfaces 50C and 50D face opposite each other, and side surfaces 50E and 50F also face opposite each other. Side surfaces 50C to 50F are perpendicular to the first surface 50A and the second surface 50B.

[0030] Here, as shown in Figures 2 to 5, we define the X, Y, and Z directions. The X, Y, and Z directions are orthogonal to each other. In this embodiment, the Z direction is defined as one direction parallel to the stacking direction. The Z direction is also one direction parallel to the direction in which the first body 1 and the second body 2 are aligned. Furthermore, the direction opposite to the X direction is defined as the -X direction, the direction opposite to the Y direction is defined as the -Y direction, and the direction opposite to the Z direction is defined as the -Z direction.

[0031] As shown in Figure 3, the first surface 50A is located at the Z-direction end of the laminate 50. The first surface 50A is also part of the outer surface of the first body 1 on which the second body 2 is mounted, and is the top surface of the laminate 50. The second surface 50B is located at the -Z-direction end of the laminate 50. The second surface 50B is also the surface opposite to the first surface 50A, and is the bottom surface of the laminate 50. The side surface 50C is located at the -X-direction end of the laminate 50. The side surface 50D is located at the X-direction end of the laminate 50. The side surface 50E is located at the -Y-direction end of the laminate 50. The side surface 50F is located at the Y-direction end of the laminate 50.

[0032] Figure 4 shows the approximate positions of the third to fifth circuit portions 10, 20, and 30 within the laminate 50. The third circuit portion 10 is located closer to side 50C than to side 50D. The fourth and fifth circuit portions 20 and 30 are located between the third circuit portion 10 and side 50D. The fourth circuit portion 20 is located closer to side 50F than to side 50E. The fifth circuit portion 30 is located closer to side 50E than to side 50F.

[0033] The first body 1 further includes a plurality of terminals 111, 112, 113, 114, 115, 116, 117, 118, and 119 provided on the second surface 50B of the laminate 50. Terminal 111 is located near the corner where the second surface 50B intersects with the side surface 50C and the side surface 50E. Terminal 113 is located near the corner where the second surface 50B intersects with the side surface 50D and the side surface 50E. Terminal 115 is located near the corner where the second surface 50B intersects with the side surface 50D and the side surface 50F. Terminal 117 is located near the corner where the second surface 50B intersects with the side surface 50C and the side surface 50F.

[0034] Terminal 112 is located between terminals 111 and 113. Terminal 114 is located between terminals 113 and 115. Terminal 116 is located between terminals 115 and 117. Terminal 118 is located between terminals 111 and 117. Terminal 119 is located in the center of the second surface 50B.

[0035] Terminal 111 corresponds to the third signal port 1d, terminal 113 corresponds to the common port 1a, terminal 115 corresponds to the second signal port 1c, and terminal 117 corresponds to the first signal port 1b. Therefore, the common port 1a and the first to third signal ports 1b to 1d are provided on the second surface 50B of the laminate 50. Each of terminals 112, 114, 116, 118, and 119 is connected to ground.

[0036] The first body 1 further includes a plurality of terminals 121, 122, 123, and 124 provided on the first surface 50A of the laminate 50. Terminals 121 to 124 are located near the centroid of the first surface 50A. Terminals 121 and 122 are arranged in this order in the Y direction at a position -X direction side of the centroid of the first surface 50A. Terminals 123 and 124 are arranged in this order in the Y direction at a position X direction side of the centroid of the first surface 50A.

[0037] The first body 1 further includes at least one ground conductor layer. In this embodiment, the first body 1 may include multiple ground conductor layers as the at least one ground conductor layer.

[0038] As shown in Figure 5, in this embodiment, the first body 1 includes, in particular, a first ground conductor layer 81, a second ground conductor layer 82, and a third ground conductor layer 83, which are arranged at different positions in the Z direction, as at least one ground conductor layer. The first to third ground conductor layers 81, 82, and 83 are provided inside the first body 1, i.e., inside the laminate 50. The first to third ground conductor layers 81, 82, and 83 are arranged in this order in the -Z direction from the first surface 50A side.

[0039] At least one of the first to third ground conductor layers 81 to 83 is positioned closer to the first surface 50A than to the second surface 50B. In this embodiment in particular, all of the first to third ground conductor layers 81 to 83 are positioned closer to the first surface 50A than to the second surface 50B.

[0040] Each of the first to third ground conductor layers 81-83 extends in a direction parallel to the Y direction between the third circuit section 10 and the fourth circuit section 20. The shapes of the first to third ground conductor layers 81-83 may be the same or nearly the same, or they may be different. The third circuit section 10 and the fourth circuit section 20 are arranged so as to sandwich the first to third ground conductor layers 81-83.

[0041] The plurality of through-holes in the first body 1 include a plurality of first through-holes 91 that electrically connect the first ground conductor layer 81 and the second ground conductor layer 82, and a plurality of second through-holes 92 that electrically connect the second ground conductor layer 82 and the third ground conductor layer 83. In this embodiment, each of the plurality of first through-holes 91 is in contact with both the first ground conductor layer 81 and the second ground conductor layer 82. Similarly, each of the plurality of second through-holes 92 is in contact with both the second ground conductor layer 82 and the third ground conductor layer 83. The plurality of first through-holes 91 and the plurality of second through-holes are arranged so as not to overlap when viewed from the Z direction.

[0042] The first body 1 further includes a ground conductor layer 84 located near the second surface 50B within the laminate 50. The ground conductor layer 84 is electrically connected to at least one of the terminals 112, 114, 116, 118, and 119 that are connected to ground. The shape of the ground conductor layer 84 may be the same as or different from the shape of any of the first to third ground conductor layers 81 to 83.

[0043] The plurality of through-holes in the first body 1 further include a plurality of through-holes 93 that electrically connect the third ground conductor layer 83 and the ground conductor layer 84. In particular in this embodiment, each of the plurality of through-holes 93 is in contact with both the third ground conductor layer 83 and the ground conductor layer 84. The plurality of second through-holes 92 and the plurality of through-holes 93 are arranged so as not to overlap with each other when viewed from the Z direction. The plurality of through-holes 93 may be arranged so as not to overlap with the plurality of first through-holes 91 when viewed from the Z direction.

[0044] The third ground conductor layer 83 is electrically connected to at least one of the terminals 112, 114, 116, 118, 119 connected to ground via the ground conductor layer 84 and a plurality of through holes 93. The second ground conductor layer 82 is a plurality Second The first ground conductor layer 81 is electrically connected to the third ground conductor layer 83 via a through-hole 92. First The first to third ground conductor layers 81-83 are electrically connected to ground via the through-hole 91.

[0045] The ground conductor layers 81-83 and through-holes 91-93 constitute a partition 8 that separates a portion of the third circuit portion 10 from a portion of the fourth circuit portion 20. The first body 1 may further include a first partition (not shown) that separates another portion of the third circuit portion 10 from another portion of the fourth circuit portion 20, and a second partition (not shown) that separates yet another portion of the third circuit portion 10 from at least a portion of the fifth circuit portion 30. The first and second partitions may be directly or indirectly connected to the partition 8.

[0046] Next, the configuration of the second body 2 will be described. The second body 2 includes the first and second circuit portions 41 and 42 shown in Figure 1. The second body 2 also has a third surface 2A and a fourth surface 2B located at both ends in a direction parallel to the Z direction, and four side surfaces 2C to 2F connecting the third surface 2A and the fourth surface 2B. Side surfaces 2C and 2D face opposite each other, and side surfaces 2E and 2F also face opposite each other. Side surfaces 2C to 2F are perpendicular to the third surface 2A and the fourth surface 2B.

[0047] As shown in Figure 2, the third face 2A is located at the Z-direction end of the second body 2. The third face 2A is also the top surface of the second body 2. The fourth face 2B is located at the -Z-direction end of the second body 2. The fourth face 2B is also the face facing the first body 1 and is also the bottom surface of the second body 2. The side surface 2C is located at the -X-direction end of the second body 2. The side surface 2D is located at the X-direction end of the second body 2. The side surface 2E is located at the -Y-direction end of the second body 2. The side surface 2F is located at the Y-direction end of the second body 2.

[0048] The second body 2 further includes a first terminal 2a, a second terminal 2b, a third terminal 2c, and a fourth terminal 2d, which are located on the outer surface of the second body 2, i.e., the fourth surface 2B. The first terminal 2a is located near a corner (see Figure 2) where the fourth surface 2B intersects with side surfaces 2C and 2E. The second terminal 2b is located near a corner (see Figure 2) where the fourth surface 2B intersects with side surfaces 2C and 2F. The third terminal 2c is located near a corner (see Figure 2) where the fourth surface 2B intersects with side surfaces 2D and 2E. The fourth terminal 2d is located near a corner (see Figure 2) where the fourth surface 2B intersects with side surfaces 2D and 2F.

[0049] The first and second terminals 2a and 2b are located on the -X side of the first to third ground conductor layers 81 to 83 of the first body 1 when viewed from the Z direction. The third and fourth terminals 2c and 2d are located on the X side of the first to third ground conductor layers 81 to 83 when viewed from the Z direction. Furthermore, the first terminal 2a and the third terminal 2c are positioned so as to sandwich the first to third ground conductor layers 81 to 83 when viewed from the Z direction. The second terminal 2b and the fourth terminal 2d are positioned so as to sandwich the first to third ground conductor layers 81 to 83 when viewed from the Z direction.

[0050] When the second body 2 is mounted on the first body 1, the first to fourth terminals 2a, 2b, 2c, and 2d of the second body 2 face the terminals 121, 122, 123, and 124 of the first body 1, respectively. The first to fourth terminals 2a, 2b, 2c, and 2d are physically connected to the terminals 121, 122, 123, and 124, respectively, for example, by solder bumps 7.

[0051] As shown in Figure 1, the first circuit portion 41 is located between the first terminal 2a and the second terminal 2b in the circuit configuration. The second circuit portion 42 is located between the third terminal 2c and the fourth terminal 2d in the circuit configuration.

[0052] Figure 4 shows the approximate locations of the first and second circuit sections 41 and 42 within the second main body 2. The first circuit section 41 is located closer to side 2C than to side 2D (see Figure 2). The second circuit section 42 is located closer to side 2D than to side 2C (see Figure 2).

[0053] As shown in Figure 4, the first to third ground conductor layers 81 to 83 are located between the first circuit portion 41 and the second circuit portion 42 when viewed from the Z direction. Furthermore, the first to third ground conductor layers 81 to 83 each protrude outside the second body 2, that is, on the Y direction side and the -Y direction side of the second body 2, when viewed from the Z direction.

[0054] Next, the operation and effects of the electronic component 100 according to this embodiment will be described. The electronic component 100 comprises a first body 1 including a plurality of stacked dielectric layers, and a second body 2 mounted on the first body 1. The second body 2 includes a first circuit portion 41 and a second circuit portion 42. The first body 1 includes first to third ground conductor layers 81 to 83 located between the first circuit portion 41 and the second circuit portion 42 when viewed from the Z direction. As will be described later, according to this embodiment, isolation can be sufficiently increased by the first to third ground conductor layers 81 to 83. As a result, according to this embodiment, miniaturization and cost reduction are possible.

[0055] The effects of the electronic component 100 according to this embodiment will be described below in comparison with the electronic components of the first and second comparative examples. First, the electronic component 200 of the first comparative example will be described. Figure 6 is a block diagram showing the configuration of the electronic component 200 of the first comparative example.

[0056] The configuration of the electronic component 200 of the first comparative example differs from the configuration of the electronic component 100 according to this embodiment in the following respects. The electronic component 200 of the first comparative example comprises two bodies 202A and 202B mounted on and physically separated from the first body 1, instead of the second body 2 in this embodiment. Body 202A includes a first circuit portion 41 and first and second terminals 2a and 2b. Body 202B includes a second circuit portion 42 and third and fourth terminals 2c and 2d. The other configurations of the electronic component 200 of the first comparative example are the same as those of the electronic component 100 according to this embodiment.

[0057] In the first comparative example, in order to suppress electromagnetic coupling (magnetic and capacitive coupling) between bodies 202A and 202B, bodies 202A and 202B need to be placed with a certain amount of space between them. Consequently, the planar shape (shape viewed from the Z direction) of the first body 1 also needs to be larger, making it difficult to miniaturize the first body 1 in the first comparative example. In addition, generally, electronic components such as the first body 1 are manufactured by forming a base structure that includes at least a portion of multiple electronic components, and then cutting this base structure. Therefore, as the planar shape of the electronic component increases, the number of electronic components that can be obtained from one base structure decreases, and the manufacturing cost of the electronic component increases. In the first comparative example, the manufacturing cost of the first body 1 increases due to the larger planar shape of the first body 1. For these reasons, in the first comparative example, it becomes difficult to miniaturize the electronic component 200, and the manufacturing cost of the electronic component 200 increases. Furthermore, in the first comparative example, since it is necessary to mount two components (main bodies 202A and 202B) on the first main body 1, the manufacturing cost of the electronic component 200 increases compared to the case where only one component is mounted on the first main body 1.

[0058] In contrast, in this embodiment, only the second main body 2 is mounted on the first main body 1. As a result, according to this embodiment, miniaturization and cost reduction can be achieved.

[0059] Next, we will describe the electronic component 300 of the second comparative example. Figure 7 is a block diagram showing the configuration of the electronic component 300 of the second comparative example.

[0060] The configuration of the electronic component 300 of the second comparative example differs from the configuration of the electronic component 100 according to this embodiment in the following respects. The electronic component 300 of the second comparative example includes a first body 301 instead of the first body 1 in this embodiment. The configuration of the first body 301 is the same as that of the first body 1, except that the partition portion 8 is not provided. The first body 301 does not include the first to third ground conductor layers 81 to 83 in this embodiment.

[0061] Furthermore, the electronic component 300 of the second comparative example includes a second body 302 instead of the second body 2 in this embodiment. The second body 302 includes first and second circuit portions 41, 42 and first to fourth terminals 2a to 2d, similar to the second body 2. The second body 302 further includes a ground conductor layer 43 provided inside the second body 302 between the first circuit portion 41 and the second circuit portion 42, and two terminals 2e, 2f connected to the ground conductor layer 43. Terminal 2e is located on the outer surface (bottom surface) of the second body 302 between the first terminal 2a and the second terminal 2b. Terminal 2f is located on the outer surface (bottom surface) of the second body 302 between the third terminal 2c and the fourth terminal 2d. Terminals 2e, 2f are connected to ground.

[0062] The other configurations of the electronic component 300 in the second comparative example are the same as those of the electronic component 100 in this embodiment.

[0063] In the second comparative example, a ground conductor layer 43 is provided inside the second body 302. Therefore, in the second comparative example, the planar shape (shape viewed from the Z direction) of the second body 302 is larger compared to the case where the ground conductor layer 43 is not provided. This increases the manufacturing cost of the second body 302, and consequently, the manufacturing cost of the electronic component 300 also increases. In addition, in the second comparative example, the number of terminals is greater compared to the case where the ground conductor layer 43 is not provided. This also increases the planar shape of the second body 302, and thus increases the manufacturing cost of the electronic component 300.

[0064] In contrast, in this embodiment, a ground conductor layer is not provided inside the second main body 2. As a result, this embodiment makes it possible to achieve miniaturization and cost reduction.

[0065] Next, we will describe the results of a simulation that investigated the isolation characteristics of the electronic component 100 according to this embodiment. First, we will describe the model of the embodiment used in the simulation. The model of the embodiment is a model of the electronic component 100 according to this embodiment. In the simulation, the first circuit section 41, the second circuit section 42, the third circuit section 10, the fourth circuit section 20, and the fifth circuit section 30 were designed so that the model of the embodiment would operate as a demultiplexer.

[0066] Figure 8 is a circuit diagram showing the circuit configuration of the embodiment model. The embodiment model includes a first circuit section 41, a second circuit section 42, a third circuit section 10, a fourth circuit section 20, and a fifth circuit section 30, in addition to an inductor L41 and a capacitor C41. One end of the inductor L41 is connected to a common port 1a. The other end of the inductor L41 is connected to the fifth circuit section 30 and one end of the capacitor C41.

[0067] The first circuit section 41 includes four elastic wave elements 411, 412, 413, and 414. One end of each elastic wave element 411 and 413 is connected to the first terminal 2a. The other end of elastic wave element 411 is connected to one end of elastic wave element 412. The other end of elastic wave element 413 is connected to one end of elastic wave element 414. The other ends of each elastic wave element 412 and 414 are connected to the second terminal 2b.

[0068] The second circuit section 42 includes four elastic wave elements 421, 422, 423, and 424. One end of each elastic wave element 421 and 423 is connected to the third terminal 2c. The other end of elastic wave element 421 is connected to one end of elastic wave element 422. The other end of elastic wave element 423 is connected to one end of elastic wave element 424. The other ends of each elastic wave element 422 and 424 are connected to the fourth terminal 2d.

[0069] The third circuit section 10 includes inductors L11, L12, L13, L14, L15, and L16, and capacitors C11, C12, C13, and C14. One end of inductor L11 is connected to the other end of capacitor C41. The other end of inductor L11 is connected to one end of inductor L12. The other end of inductor L12 is connected to one end of capacitor C11. The other end of capacitor C11 is connected to the first terminal 2a of the second body 2.

[0070] One end of inductor L13 is connected to the junction point of inductors L11 and L12. The other end of inductor L13 is connected to one end of capacitor C12. The other end of capacitor C12 is connected to ground.

[0071] One end of inductor L14 is connected to the other end of capacitor C11. The other end of inductor L14 is connected to one end of capacitor C13. The other end of capacitor C13 is connected to ground.

[0072] One end of inductor L15 is connected to the second terminal 2b of the second body 2. The other end of inductor L15 is connected to the first signal port 1b. L16 Each end of capacitor C14 is connected to one end of inductor L15. L16 The other end of capacitor C14 is connected to ground.

[0073] The fourth circuit section 20 includes inductors L21, L22, L23 and capacitors C21, C22, C23, C24, C25, C26. One end of capacitor C21 is connected to the other end of capacitor C41. The other end of capacitor C21 is connected to the third terminal 2c of the second body 2. One end of inductor L21 is connected to the other end of capacitor C21. The other end of inductor L21 is connected to one end of capacitor C22. The other end of capacitor C22 is connected to ground.

[0074] One end of capacitor C23 is connected to the fourth terminal 2d of the second body 2. The other end of capacitor C23 is connected to one end of inductor L22. The other end of inductor L22 is connected to the second signal port 1c. Capacitor C24 is connected in parallel with inductor L22.

[0075] One end of inductor L23 is connected to one end of capacitor C23. The other end of inductor L23 is connected to one end of capacitor C25. The other end of capacitor C25 is connected to ground.

[0076] One end of capacitor C26 is connected to the other end of inductor L22. The other end of capacitor C26 is connected to ground.

[0077] The fifth circuit section 30 includes inductors L31 and L32, and capacitors C31, C32, and C33. One end of inductor L31 is connected to the other end of inductor L41. The other end of inductor L31 is connected to one end of inductor L32. The other end of inductor L32 is connected to the third signal port 1d.

[0078] Capacitor C31 is connected in parallel with inductor L32. One end of capacitor C32 is connected to the connection point between inductor L31 and inductor L32. The other end of capacitor C32 is connected to ground. One end of capacitor C33 is connected to the other end of inductor L32. The other end of capacitor C33 is connected to ground.

[0079] The multiple inductors and multiple capacitors shown in Figure 8 are constructed using multiple dielectric layers, multiple conductor layers, and multiple through-holes in the laminate 50.

[0080] Next, we will describe the model of the third comparative example used in the simulation. The model of the third comparative example is the same as the model of the embodiment, but with the partition portion 8 removed. Therefore, the model of the third comparative example does not have the first to third ground conductor layers 81 to 83.

[0081] Next, the simulation results will be explained. In the simulation, the frequency characteristics of the isolation between the first filter 4 and the second filter 5, the pass-through attenuation characteristics of the first filter 4, and the pass-through attenuation characteristics of the second filter 5 were determined for each of the models of the embodiment and the third comparative example. The definition of isolation in the simulation is as follows: When a high-frequency signal with power P1 is input to the first signal port 1b, P2 is the power of the signal output from the second signal port 1c. Isolation I is defined by the following equation (1).

[0082] I = 10log(P2 / P1) …(1)

[0083] Figure 9 is a characteristic diagram showing the frequency characteristics of the isolation. Figure 10 is a characteristic diagram showing the pass-through attenuation characteristics of the first filter 4. Figure 11 is a characteristic diagram showing the pass-through attenuation characteristics of the second filter 5. In Figures 9 to 11, the horizontal axis represents frequency. In Figure 9, the vertical axis represents isolation. In Figures 10 and 11, the vertical axis represents attenuation. In Figures 9 to 11, the curves denoted by reference numeral 501 represent the characteristics of the model in the embodiment, and the curves denoted by reference numeral 502 represent the characteristics of the model in the third comparative example.

[0084] As shown in Figure 9, the absolute value of isolation is larger in the example model (501) compared to the third comparative example model (502). Also, as shown in Figure 10, the absolute value of attenuation in the example model (501) is larger in the frequency domain that is higher than the first passband of the first filter 4 and includes the second passband of the second filter 5 compared to the third comparative example model (502). Furthermore, as shown in Figure 11, the absolute value of attenuation in the example model (501) is larger in the frequency domain that is lower than the second passband of the second filter 5 and includes the first passband of the first filter 4 compared to the third comparative example model (502).

[0085] The simulation results show that in the embodiment, the absolute value of the out-of-passband attenuation can be made sufficiently large in each of the first and second filters 4 and 5, indicating that the isolation is sufficiently large. As can be understood from the simulation results, according to this embodiment, the isolation can be made sufficiently large by the first to third ground conductor layers 81 to 83.

[0086] Next, other effects of this embodiment will be described. In this embodiment, the first to third ground conductor layers 81 to 83 are provided inside the first body 1, that is, inside the laminate 50. As a result, according to this embodiment, it is possible to prevent short circuits between the ground conductor layers and the first to fourth terminals 2a to 2d of the second body 2, and to reduce the distance between the first terminal 2a and the third terminal 2c, and the distance between the second terminal 2b and the fourth terminal 2d.

[0087] Furthermore, in this embodiment, the first to third ground conductor layers 81 to 83 are positioned closer to the first surface 50A than to the second surface 50B. As a result, according to this embodiment, isolation can be increased more effectively compared to the case where the first to third ground conductor layers 81 to 83 are positioned closer to the second surface 50B.

[0088] Incidentally, if the dimensions of the through-holes in the direction parallel to the Z direction become large, there is a risk that the laminate 50 may deform due to the through-holes. In contrast, in this embodiment, the plurality of first through-holes 91 and the plurality of second through-holes 92 are arranged so as not to overlap each other when viewed from the Z direction. As a result, according to this embodiment, deformation of the laminate 50 can be suppressed.

[0089] It should be noted that the present invention is not limited to the embodiments described above, and various modifications are possible. For example, the electronic component of the present invention may be a diplexer equipped with two filters. [Explanation of Symbols]

[0090] 1...First main body, 1a...Common port, 1b...First signal port, 1c...Second signal port, 1d...Third signal port, 2...Second main body, 2a...First terminal, 2b...Second terminal, 2c...Third terminal, 2d...Fourth terminal, 3...Sealing part, 4...First filter, 5...Second filter, 6...Third filter, 7...Solder bump, 8...Partition part, 10...Third circuit section, 20...Fourth circuit section Minutes, 30...5th circuit section, 41...1st circuit section, 42...2nd circuit section, 50...Laminate, 50A...1st face, 50B...2nd face, 50C~50F...side, 81...1st ground conductor layer, 82...2nd ground conductor layer, 83...3rd ground conductor layer, 91...1st through-hole, 92...2nd through-hole, 100...Electronic component, 111~119,121~124...Terminals.

Claims

1. A first body comprising multiple stacked dielectric layers, It comprises a second body mounted on the first body as a single component smaller than the first body, The second body includes a first circuit portion and a second circuit portion, each provided inside the second body and configured using at least one elastic wave element, and electrically isolated from each other, and also has a first terminal, a second terminal, a third terminal, and a fourth terminal arranged on the outer surface of the second body. The first circuit portion is provided between the first terminal and the second terminal in the circuit configuration. The second circuit portion is provided between the third terminal and the fourth terminal in the circuit configuration. The first body includes at least one ground conductor layer located between the first circuit portion and the second circuit portion when viewed from a first direction parallel to the direction in which the first body and the second body are aligned. The electronic component is characterized in that the second body does not have terminals other than the first to fourth terminals that are connected to ground.

2. The electronic component according to claim 1, characterized in that the first direction is a single direction parallel to the stacking direction of the plurality of dielectric layers.

3. The electronic component according to claim 1 or 2, characterized in that the second terminal and the fourth terminal are arranged so as to sandwich the at least one ground conductor layer when viewed from the first direction.

4. The electronic component according to any one of claims 1 to 3, characterized in that the at least one ground conductor layer protrudes outside the second body when viewed from the first direction.

5. The electronic component according to any one of claims 1 to 4, characterized in that the at least one ground conductor layer is provided inside the first body.

6. The first body has a first surface on which the second body is mounted and a second surface on the opposite side thereof. The electronic component according to claim 5, characterized in that the at least one ground conductor layer is positioned closer to the first surface than to the second surface.

7. The electronic component according to any one of claims 1 to 6, characterized in that the at least one ground conductor layer includes a plurality of ground conductor layers.

8. The electronic component according to claim 7, wherein the first body further includes a plurality of through-holes that connect the plurality of ground conductor layers to each other.

9. The plurality of ground conductor layers include a first ground conductor layer, a second ground conductor layer, and a third ground conductor layer, which are arranged at different positions in the first direction. The plurality of through-holes include a plurality of first through-holes that electrically connect the first ground conductor layer and the second ground conductor layer, and a plurality of second through-holes that electrically connect the second ground conductor layer and the third ground conductor layer. The electronic component according to claim 8, characterized in that the plurality of first through-holes and the plurality of second through-holes are arranged so as not to overlap when viewed from the first direction.

10. The electronic component according to any one of claims 1 to 9, characterized in that the first body includes a third circuit portion and a fourth circuit portion arranged to sandwich the at least one ground conductor layer when viewed from the first direction.

11. The first circuit portion is electrically connected to the third circuit portion. The electronic component according to claim 10, characterized in that the second circuit portion is electrically connected to the fourth circuit portion.

12. The first circuit portion and the third circuit portion constitute a first filter that selectively passes signals within a first passband. The electronic component according to claim 11, characterized in that the second circuit portion and the fourth circuit portion constitute a second filter that selectively passes signals with frequencies within a second passband higher than the first passband.

13. The first main body further includes a common port, a first signal port, and a second signal port. The first circuit portion is provided between the common port and the first signal port in terms of the circuit configuration. The electronic component according to any one of claims 1 to 12, characterized in that the second circuit portion is provided between the common port and the second signal port in the circuit configuration.

14. The electronic component according to any one of claims 1 to 13, characterized in that the second body is not provided with terminals connected to both the first circuit portion and the second circuit portion.

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