Gate drive circuit, test apparatus, and switching method

Abstract

To provide a technique that enables efficient dynamic characteristic testing of power semiconductors.SOLUTION: A gate drive circuit is used for dynamic characteristic testing of power semiconductors and comprises a voltage source configured to change gate voltage at a gate of a power semiconductor, a plurality of resistance setting circuits connected in parallel to the voltage source and the gate, and a switching circuit configured to connect at least one of the plurality of resistance setting circuits to the voltage source and the gate.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a gate drive circuit, a test apparatus, and a switching method.

Background Art

[0002] In the test apparatus for power semiconductors described in Patent Document 1, a part of a plurality of units used for test measurement is configured to be detachable. Depending on the required test measurement items, necessary units are mounted and unnecessary units are removed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the apparatus described in Patent Document 1, depending on the measurement items of the dynamic characteristic test of the power semiconductor, detachment work for configuration change is required. Therefore, there is a risk that the test may take a long time. The present invention provides a technology capable of efficiently performing a test of a power semiconductor.

Means for Solving the Problems

[0005] A gate drive circuit according to an aspect of the present embodiment is a circuit used for a dynamic characteristic test of a power semiconductor, and includes a voltage source that changes a gate voltage of a gate of the power semiconductor, a plurality of resistance setting circuits connected in parallel to the voltage source and the gate, and a switching circuit that connects at least one of the plurality of resistance setting circuits to the voltage source and the gate.

Effects of the Invention

[0006] According to the present embodiment, it is possible to provide a technology capable of efficiently performing a dynamic characteristic test of a power semiconductor. [Brief explanation of the drawing]

[0007] [Figure 1] This figure shows the external appearance of the apparatus, including the test apparatus according to this embodiment. [Figure 2] This figure shows an example of a circuit diagram of the test apparatus according to this embodiment. [Figure 3] This figure shows an example of a signal related to the test apparatus according to this embodiment. [Figure 4] This figure shows another example of a signal related to the test apparatus according to this embodiment. [Figure 5] This is a flowchart showing the switching process. [Modes for carrying out the invention]

[0008] (Embodiment) This embodiment will be described below with reference to the drawings. In the following description, the same or equivalent elements will be denoted by the same reference numeral, and redundant descriptions will not be repeated. The dimensional ratios in the drawings do not necessarily match those in the description. The terms "top," "bottom," "left," and "right" are based on the illustrated state and are for convenience only.

[0009] Figure 1 shows the external appearance of the test apparatus 1 according to this embodiment. The test apparatus 1 comprises, for example, a first housing 13, a second housing 14, a third housing 15, and a fourth housing 16. The first housing 13 has a connection part 11 and a main body part 12 that connect the power semiconductor 100 and the test apparatus 1. The test apparatus 1 may consist of a single housing.

[0010] The connection section 11 may have, for example, a probe, and can connect to power semiconductors of various physical shapes. For example, the main body section 12 may have a gate drive circuit 3 and a sensor 4, which will be described later.

[0011] For example, the third housing 15 is a housing for testing the static characteristics of the power semiconductor 100. For example, the second housing 14 has a controller 2, which will be described later. For example, the fourth housing 16 has input devices such as a keyboard and mouse for the user of the test apparatus 1 to set up the test.

[0012] For example, the fourth enclosure 16 includes a presentation device (e.g., at least one of a speaker, microphone, and display) for performing at least one of setting and confirming the setting. For example, the input device and presentation device are used when the user of the test apparatus 1 sets the resistance value described later.

[0013] Figure 2 shows an example of a circuit diagram of the test apparatus 1 according to the embodiment. The test apparatus 1 shown in Figure 2 is an apparatus for testing power semiconductors 100. For example, power semiconductors 100 are semiconductors that perform power conversion such as converting AC to DC or stepping down voltage to 5V or 3V for control of motors, lighting, or batteries, and refer to semiconductors that handle large voltages or currents.

[0014] For example, the power semiconductor 100 is an insulated-gate bipolar transistor (IGBT) having an emitter, collector, and gate. The testing of the power semiconductor 100 includes static characteristics (DC: Direct Current) testing and dynamic characteristics (AC: Alternating Current) testing.

[0015] A static characteristics test of the power semiconductor 100 refers to a test in which the voltage applied to the power semiconductor 100 and the current flowing through it remain constant, and the voltage applied to the power semiconductor 100 and the current flowing through it are not changed.

[0016] The dynamic characteristics test of power semiconductor 100 refers to a test in which the voltage applied to power semiconductor 100 and the current through which it is passed are changed, thereby altering the voltage applied to power semiconductor 100 and the current through which it is passed.

[0017] For example, as a static characteristic test, characteristics such as the total gate charge, collector cut-off current, gate-emitter threshold voltage, gate-emitter leakage current, and collector-emitter voltage Vce in the power semiconductor 100 can be measured. For example, the collector-emitter voltage Vce refers to the voltage between the collector and the emitter.

[0018] For example, as a dynamic characteristic test, turn-on delay time, turn-on rise time, turn-off delay time, turn-off fall time, reverse recovery time, reverse recovery charge, switching measurement, and short-circuit withstand measurement, etc. in the power semiconductor 100 are performed. For example, turn-on refers to starting to energize the power semiconductor 100, and turn-off refers to stopping energizing the power semiconductor 100.

[0019] The measurement items of the static characteristic test and the dynamic characteristic test are appropriately selected according to the user's required specifications. Hereinafter, for example, a dynamic characteristic test for measuring the collector-emitter voltage Vce of the power semiconductor 100 will be described, but the present embodiment is not limited to the dynamic characteristic test.

[0020] As shown in FIG. 2, the test apparatus 1 includes a controller 2 that performs switching processing described later, a gate drive circuit 3, and a sensor 4. The controller 2 is connected to, for example, the gate drive circuit 3.

[0021] The controller 2 outputs a gate signal Sge that controls the ON / OFF of the gate of the power semiconductor 100. For example, the gate signal Sge is a pulse signal composed of an ON signal (for example, 1) indicating the ON of the gate of the power semiconductor 100 and an OFF signal (for example, 0) indicating the OFF of the gate of the power semiconductor 100.

[0022] In the gate drive circuit 3, a gate voltage Vge is applied to the gate of the power semiconductor 100 according to the gate signal Sge output from the controller 2. In addition to the gate signal Sge, the controller 2 is configured to be able to output other signals described later that drive the components of the gate drive circuit 3.

[0023] The hardware of controller 2 is not particularly limited as long as it is capable of outputting signals. Controller 2 may be configured as a computer having, for example, a CPU (Central Processing Unit), ROM (Read-only memory), RAM (Random Access Memory), etc., or it may be configured as a PLC (Programmable Logic Controller) or FPGA (FieldProgrammable Gate Array), etc.

[0024] The gate drive circuit 3 comprises a voltage source, multiple resistance setting circuits, and a switching circuit. For example, the gate drive circuit 3 is used for dynamic characteristic testing with a power semiconductor 100 as the test subject. For instance, the collector-emitter voltage Vce changes due to a change in the gate voltage Vge of the power semiconductor 100 caused by the voltage applied from the voltage source. In other words, the gate voltage Vge changes depending on the voltage from the voltage source.

[0025] For example, multiple resistor setting circuits are connected in parallel to the voltage source and the gate, and the switching circuit connects at least one of the multiple resistor setting circuits to the voltage source and the gate. The circuit including the resistor setting circuits and the switching circuit may also be called a resistor circuit, for example, a resistor circuit refers to at least one of the ON resistor circuit 31 and OFF resistor circuit 32 described later.

[0026] For example, the voltage source refers to the ON voltage source VGP and OFF voltage source VGN described later, and the multiple resistance setting circuits refer to the ON resistance setting circuits 311, 312 and OFF resistance setting circuits 321, 322 described later. For example, the switching circuit refers to the ON resistance switching circuit 313 and the OFF resistance switching circuit 323 described later.

[0027] The gate drive circuit 3 changes the collector-emitter voltage Vce of the power semiconductor 100 by applying a gate voltage Vge to the gate of the power semiconductor 100 in response to the gate signal Sge output from the controller 2, thereby switching the gate of the power semiconductor 100 ON / OFF. The gate drive circuit 3 has an ON voltage source VGP and an ON resistance circuit 31 as a configuration that operates when the gate signal Sge is an ON signal.

[0028] For example, the ON voltage source VGP is connected to the ON resistance circuit 31 via a semiconductor element such as a transistor having an emitter, collector, and base. The ON resistance circuit 31 is a gate resistor having a preset resistance value. The gate resistor refers to a resistor that limits the current flowing into the gate of the power semiconductor 100.

[0029] The pre-set resistance value is the resistance value set before the dynamic characteristics test and is determined according to the content of the dynamic characteristics test. Hereafter, unless otherwise specified, "transistor" refers to a bipolar transistor having, for example, an emitter, collector, and base.

[0030] For example, the ON resistance circuit 31 includes resistors connected in series, and switches and relays provided for each resistor. The controller 2 outputs OFF resistance setting signals Sa, Sb and ON resistance setting signals Sd, Se to control the relays of each resistor. The OFF resistance setting signals Sa, Sb and ON resistance setting signals Sd, Se may also be simply called resistance setting signals.

[0031] Controller 2 outputs an OFF resistance switching signal Sc and an ON resistance switching signal Sf. Controller 2 pre-sets the resistance values ​​of the gate resistors of the ON resistance circuit 31 and the OFF resistance circuit 32 before the dynamic characteristics test. At least one of the OFF resistance switching signal Sc and the ON resistance switching signal Sf may simply be called a switching signal.

[0032] In the gate drive circuit 3, when the gate signal Sge is an ON signal, the transistor connected to the ON voltage source VGP operates, and a voltage is applied from the ON voltage source VGP to the ON resistance circuit 31. As a result of the change in the gate voltage Vge of the power semiconductor 100, for example, the collector-emitter voltage Vce changes. For example, the ON resistance circuit 31 can change the gate driving conditions when the gate voltage Vge is turned on during dynamic characteristic testing of the power semiconductor 100.

[0033] The ON-resistance circuit 31 has a plurality of resistance setting circuits connected in parallel to the ON voltage source VGP and the gate of the power semiconductor 100. For example, as shown in Figure 2, the ON-resistance circuit 31 has a first resistance setting circuit (hereinafter referred to as the ON-resistance setting circuit) 311 and a second resistance setting circuit (hereinafter referred to as the ON-resistance setting circuit) 312.

[0034] The first resistance setting circuit 311 and the second resistance setting circuit 312 are gate resistors having preset resistance values. The first resistance setting circuit 311 includes resistors connected in series and switches and relays provided for each resistor. The controller 2 outputs an ON resistance setting signal Sd to control the relays in the first resistance setting circuit 311.

[0035] The second resistance setting circuit 312, like the first resistance setting circuit 311, includes resistors connected in series and switches and relays provided for each resistor. The controller 2 outputs an ON resistance setting signal Se that controls the relays in the second resistance setting circuit 312. The resistance values ​​of the gate resistors (first resistor and second resistor) in the first resistance setting circuit 311 and the second resistance setting circuit 312 are preset before the dynamic characteristics test.

[0036] Controller 2 pre-sets the ON resistance setting signals Sd,Se to control the relays of each ON resistor so that the value of the first resistor in the first resistance setting circuit 311 and the value of the second resistor in the second resistance setting circuit 312 are different.

[0037] For example, the ON resistance circuit 31 has an ON resistance switching circuit 313 that connects at least one of a plurality of resistance setting circuits to the ON voltage source VGP and the gate of the power semiconductor 100. In Figure 2, the ON resistance switching circuit 313 switches between the first resistance setting circuit 311 and the second resistance setting circuit 312.

[0038] The ON-resistance switching circuit 313 is provided on the output side of the first resistance setting circuit 311 and the second resistance setting circuit 312, respectively. For example, as shown in Figure 2, the ON-resistance switching circuit 313 may include a semiconductor element that operates in response to the ON-resistance switching signal Sf output by the controller 2. For example, the semiconductor element may be a transistor.

[0039] The ON-resistance circuit 31 operates when the gate signal Sge is an ON signal, causing the transistor connected to the ON-voltage source VGP to operate. The gate voltage Vge is determined by the resistance value of the ON-resistance circuit 31, which is determined by the ON-resistance switching signal Sf, and the voltage from the ON-voltage source VGP, and this gate voltage Vge is applied to the gate of the power semiconductor 100.

[0040] For example, the controller 2 outputs an ON resistance switching signal Sf during one test, such as one dynamic characteristic test, from the start to the end of a gate signal Sge. The ON resistance switching circuit 313 connects the resistance setting circuit selected from the first resistance setting circuit 311 and the second resistance setting circuit 312 according to the ON resistance switching signal Sf to the ON voltage source VGP and the gate of the power semiconductor 100. For example, one test in this embodiment is the period during which any series of gate signals Sge are transmitted.

[0041] The gate drive circuit 3 has an OFF voltage source VGN and an OFF resistor circuit 32, configured to operate when the gate signal Sge is an OFF signal. The OFF voltage source VGN is connected to the OFF resistor circuit 32 via a semiconductor element such as a transistor. The OFF resistor circuit 32 allows the gate drive conditions during the turn-off of the gate voltage Vge to be changed when testing the dynamic characteristics of the power semiconductor 100.

[0042] The OFF resistor circuit 32 has a plurality of resistor setting circuits connected in parallel to the OFF voltage source VGN and the gate of the power semiconductor 100. For example, as shown in Figure 2, the OFF resistor circuit 32 has a third resistor setting circuit (hereinafter referred to as the OFF resistor setting circuit) 321 and a fourth resistor setting circuit (hereinafter referred to as the OFF resistor setting circuit) 322.

[0043] The third resistance setting circuit 321 and the fourth resistance setting circuit 322 are gate resistors having preset resistance values. The third resistance setting circuit 321 includes resistors connected in series, and switches and relays provided for each resistor. The controller 2 outputs an OFF resistance setting signal Sa to control the relays in the third resistance setting circuit 321.

[0044] The fourth resistor setting circuit 322, like the third resistor setting circuit 321, includes resistors connected in series and switches and relays provided for each resistor. The controller 2 outputs an OFF resistor setting signal Sb to control the relays of each resistor in the fourth resistor setting circuit 322. The resistance values ​​of the gate resistors (third resistor and fourth resistor) in the third resistor setting circuit 321 and the fourth resistor setting circuit 322 are preset before the dynamic characteristics test.

[0045] Controller 2 pre-sets OFF-resistance setting signals Sa and Sb to control the relays of each OFF-resistance so that the value of the third resistor in the third resistor setting circuit 321 and the value of the fourth resistor in the fourth resistor setting circuit 322 are different.

[0046] For example, the OFF resistor circuit 32 has an OFF resistor switching circuit 323 that connects at least one of a plurality of resistor setting circuits to the OFF voltage source VGN and the gate of the power semiconductor 100. In Figure 2, the OFF resistor switching circuit 323 switches between the third resistor setting circuit 321 and the fourth resistor setting circuit 322.

[0047] The OFF-resistance switching circuit 323 is provided on the output side of the third resistance setting circuit 321 and the fourth resistance setting circuit 322, respectively. For example, as shown in Figure 2, the OFF-resistance switching circuit 323 may include a semiconductor element that operates in response to the OFF-resistance switching signal Sc output by the controller 2. For example, the semiconductor element may be a transistor.

[0048] The OFF resistor circuit 32 operates when the gate signal Sge is an OFF signal, by the operation of the transistor connected to the OFF voltage source VGN. The gate voltage Vge is determined by the resistance value of the OFF resistor circuit 32 determined by the OFF resistor switching signal Sc and the voltage from the OFF voltage source VGN, and the gate voltage Vge is applied to the gate of the power semiconductor 100.

[0049] For example, controller 2 outputs an OFF resistance switching signal Sc during one test, such as one dynamic characteristic test, from the start to the end of the gate signal Sge. The OFF resistance switching circuit 323 connects the resistance setting circuit selected from the third resistance setting circuit 321 and the fourth resistance setting circuit 322 in response to the OFF resistance switching signal Sc to the OFF voltage source VGN and the gate of the power semiconductor 100. For example, the gate resistance is dynamically switched during one test, such as one dynamic characteristic test, by a switching circuit such as the ON resistance switching circuit 313 or the OFF resistance switching circuit 323.

[0050] Sensor 4 is a voltmeter that measures the collector-emitter voltage Vce of the power semiconductor 100. Based on the detection results of Sensor 4, dynamic characteristics such as detecting changes in the collector-emitter voltage Vce are tested.

[0051] First, we will explain an example where no gate resistance switching occurs during the dynamic characteristics test. Figure 3 shows an example of a signal related to test apparatus 1. Figure 3(A) shows the gate signal Sge. As shown in Figure 3(A), the gate signal Sge is a pulse signal that repeatedly switches between ON and OFF. The period T from the start to the end of the gate signal Sge is the duration of one test, for example, one dynamic characteristics test. For example, the period T is about several tens of microseconds.

[0052] Figure 3(B) shows the OFF resistance setting signal Sa, which is an example of the value A of the third resistor in the third resistance setting circuit 321, and Figure 3(C) shows the OFF resistance setting signal Sb, which is the value B of the fourth resistor in the fourth resistance setting circuit 322. The values ​​A of the third resistor and B of the fourth resistor are determined before the start of the dynamic characteristics test and are not changed during the dynamic characteristics test, so they remain constant.

[0053] Figure 3(D) shows an example of the OFF resistance switching signal Sc, and Figure 3(E) shows the OFF resistance setting actual output signal, which is a signal used to control the value of the gate resistance actually output by the gate drive circuit 3 during one test.

[0054] As shown in Figure 3(D), the OFF resistance switching signal Sc is a constant value, and when the OFF resistance switching signal Sc is a constant value, no switching of the gate resistance occurs in the OFF resistance circuit 32 during the dynamic characteristics test.

[0055] Since no switching of the gate resistor occurs in the OFF resistor circuit 32 during the dynamic characteristics test, the value of the gate resistor in the OFF resistor circuit 32 is set to the value A of the third resistor during the dynamic characteristics test, as shown in Figure 3(E).

[0056] Figure 3(F) is the ON resistance setting signal Sd, which indicates the value C of the first resistance of the first resistance setting circuit 311, and Figure 3(G) is the ON resistance setting signal Se, which indicates the value D of the second resistance of the second resistance setting circuit 312. The value of the first resistance C and the value of the second resistance D are determined before the start of the dynamic characteristics test and are not changed during the dynamic characteristics test, so they remain constant.

[0057] Figure 3(H) shows an example of the ON resistance switching signal Sf, and Figure 3(I) shows the ON resistance setting actual output signal, which is a signal used to control the value of the gate resistance actually output by the gate drive circuit 3 during one test.

[0058] As shown in Figure 3(H), the ON resistance switching signal Sf is a constant value, and when the ON resistance switching signal Sf is a constant value, no gate resistance switching occurs in the ON resistance circuit 31 during the dynamic characteristics test.

[0059] Since no switching of the gate resistance occurs in the ON resistance circuit 31 during the dynamic characteristics test, the value of the gate resistance in the ON resistance circuit 31 is set to the value of the first resistance C during the dynamic characteristics test, as shown in Figure 3(I).

[0060] In Figure 3, (J) represents the gate voltage Vge, (G) represents the collector-emitter current Ice, and (L) represents the collector-emitter voltage Vce. For example, the dynamic characteristics can be evaluated by referring to (J) to (L) in Figure 3.

[0061] Next, we will explain an example in which gate resistance switching occurs during dynamic characteristics testing. Figure 4 shows another example of signals related to test apparatus 1. Figures 4(A) to 4(L) correspond to Figures 3(A) to 4(L). As shown in Figure 4(D), the OFF resistance switching signal Sc is a signal that switches the value of the third resistor from A to the value of the fourth resistor B, and as shown in Figure 4(H), the ON resistance switching signal Sf is a signal that switches the value of the first resistor from C to the value of the second resistor D.

[0062] When the gate resistance value switches from the value of the third resistor A to the value of the fourth resistor B, the gate resistance switch occurs during the dynamic characteristics test, and as shown in Figure 4(E), the gate resistance value of the OFF resistor circuit is set from the value of the third resistor A to the value of the fourth resistor B during the dynamic characteristics test.

[0063] When the gate resistance value switches from the value of the first resistance C to the value of the second resistance D, the gate resistance switch occurs during the dynamic characteristics test, and as shown in Figure 4(I), the gate resistance value of the ON resistance circuit is set from the value of the first resistance C to the value of the second resistance D during the dynamic characteristics test.

[0064] The dashed lines shown in Figure 4(J) to (L) represent the results of Figure 3(J) to (L). As shown in Figure 4(J), during the test period T, the waveforms 42 and 44 at the turn-off of the gate voltage Vge consist of two waveforms: waveform 42 corresponding to the value A of the third resistor and waveform 44 corresponding to the value B of the fourth resistor.

[0065] As shown in Figure 4(K), during the test period T, the waveforms 46 and 48 at the turn-off of the collector-emitter current Ice consist of two waveforms: waveform 46 corresponding to the value A of the third resistor and waveform 48 corresponding to the value B of the fourth resistor.

[0066] As shown in Figure 4(L), during the test period T, the turn-on waveforms 50 and 52 of the collector-emitter voltage Vce consist of two waveforms: waveform 50 corresponding to the value A of the third resistor and waveform 52 corresponding to the value B of the fourth resistor.

[0067] As shown in Figure 4(J), during the test period T, the waveforms 41 and 43 at the turn-on of the gate voltage Vge consist of two waveforms: waveform 41 corresponding to the value of the first resistor C and waveform 43 corresponding to the value of the second resistor D.

[0068] As shown in Figure 4(K), during the test period T, the turn-on waveforms 45 and 47 of the collector-emitter current Ice consist of two waveforms: waveform 45 corresponding to the value of the first resistance C and waveform 47 corresponding to the value of the second resistance D.

[0069] As shown in Figure 4(L), during a test period T, the waveforms 49 and 51 of the collector-emitter voltage Vce at turn-off consist of two waveforms: waveform 49 corresponding to the value of the first resistance C and waveform 51 corresponding to the value of the second resistance D. Waveforms 41 to 52 represent, for example, the rate of change per unit time of the voltage applied to the power semiconductor 100 or the current flowing through it.

[0070] A single test, for example, a single dynamic characteristics test, can be performed with two different gate voltage conditions. Therefore, as shown in Figure 4(J), for example, a single dynamic characteristics test can evaluate the collector-emitter voltage Vce during turn-off with two different gate voltage conditions, and the collector-emitter voltage Vce during turn-on can also be evaluated with two different gate voltage conditions. The collector-emitter current Ice can also be evaluated in the same way as the collector-emitter voltage Vce.

[0071] In dynamic performance testing of power semiconductor 100, it is necessary to change the gate drive conditions (e.g., gate resistance) depending on the content of the dynamic performance test and the characteristics of the object being tested. However, setting the gate drive conditions is time-consuming because it generally involves using relays.

[0072] As shown in Figures 2 to 4, in the gate drive circuit 3 and test apparatus 1 of this embodiment, the gate signal Sge, OFF resistance setting signals Sa, Sb, OFF resistance switching signal Sc, ON resistance setting signals Sd, Se, and ON resistance switching signal Sf are inputs, and the gate voltage Vge, collector-emitter current Ice, and collector-emitter voltage Vce are output. In this embodiment, the gate drive circuit 3 and test apparatus 1 can perform tests under multiple gate driving conditions during dynamic characteristic testing, thus enabling efficient testing.

[0073] Next, using Figure 5, we will explain the switching process performed by controller 2 in one dynamic characteristic test when the gate signal Sge is an OFF signal. Figure 5 is a flowchart of the switching process.

[0074] The switching process is, in general terms, a switching method performed by the controller 2, and comprises a first step (step S1) of outputting a resistance setting signal, a second step (step S2) of outputting a gate signal Sge, and a third step (step S3) of outputting a resistance switching signal.

[0075] For example, let's assume that the RAM of controller 2 stores OFF resistance setting signals Sa, Sb, OFF resistance switching signal Sc, ON resistance setting signals Sd, Se, and ON resistance switching signal Sf.

[0076] For example, OFF resistance setting signals Sa, Sb, OFF resistance switching signal Sc, ON resistance setting signals Sd, Se, and ON resistance switching signal Sf are to be transmitted via communication from a device other than test device 1.

[0077] First, the controller 2 reads the OFF resistance setting signals Sa, Sb and ON resistance setting signals Sd, Se from, for example, ROM, and outputs the OFF resistance setting signals Sa, Sb and ON resistance setting signals Sd, Se to the third resistance setting circuit 321 and the fourth resistance setting circuit 322, and the first resistance setting circuit 311 and the second resistance setting circuit 312 (step S1). Next, the controller 2 outputs the gate signal Sge (step S2).

[0078] Next, the controller 2 reads the OFF resistance switching signal Sc and the ON resistance switching signal Sf from, for example, RAM, and outputs the OFF resistance switching signal Sc and the ON resistance switching signal Sf to the OFF resistance switching circuit 323 of the gate drive circuit 3 (step S3).

[0079] For example, when the OFF resistance switching circuit 323 receives the OFF resistance switching signal Sc and the ON resistance switching signal Sf, it switches the energized gate resistor from the third resistance setting circuit 321 to the fourth resistance setting circuit 322, or from the first resistance setting circuit 311 to the second resistance setting circuit 312.

[0080] For example, step S1 may be executed by the resistor setting signal output unit, step S2 by the gate signal output unit, and step S3 by the resistor switching signal output unit. For example, the gate signal output unit, resistor setting signal output unit, and resistor switching signal output unit are programs stored in ROM, loaded into RAM, and then read from RAM to the CPU for execution. The gate signal output unit, resistor setting signal output unit, and resistor switching signal output unit may each be independent circuits such as logic circuits.

[0081] Setting gate drive conditions is time-consuming because it typically involves using relays. Therefore, gate drive conditions are pre-set before the dynamic characteristics test and cannot be changed during the test. Because gate drive conditions cannot be changed during the dynamic characteristics test, conventional equipment can only measure characteristics with a single gate drive condition per dynamic characteristics test. This means that even for dynamic characteristics tests of the same operation, multiple dynamic characteristics tests must be performed with different gate drive conditions.

[0082] As described above, in the gate drive circuit 3 according to this embodiment, at least one of the multiple resistance setting circuits connected in parallel to the voltage source and the power semiconductor 100 is connected to the voltage source and the power semiconductor 100 by a switching circuit such as the OFF resistance switching circuit 323.

[0083] For example, specifically in the gate drive circuit 3, the OFF resistor switching circuit 323 connects one of the third resistor setting circuit 321 and the fourth resistor setting circuit 322, which are connected in parallel to the OFF voltage source VGN and the gate of the power semiconductor 100, to the OFF voltage source VGN and the gate of the power semiconductor 100.

[0084] As a result, the resistance value between the voltage source and the gate of the power semiconductor 100 is derived from at least one resistance setting circuit connected by the switching circuit, rather than from all of the multiple resistance setting circuits connected in parallel.

[0085] For example, specifically, the resistance value between the OFF voltage source VGN and the gate of the power semiconductor 100 is not derived from all the parallel-connected resistance setting circuits, but rather from the resistance setting circuit connected by the OFF resistance switching circuit 323.

[0086] The gate drive circuit 3 can appropriately set the resistance value between the voltage source and the gate of the power semiconductor by switching the connections of multiple resistance setting circuits connected to the voltage source and the gate of the power semiconductor 100 using a switching circuit.

[0087] For example, the gate drive circuit 3 can appropriately set the value of the resistance between the OFF voltage source VGN and the gate of the power semiconductor 100 by switching the connections of multiple resistor setting circuits connected to the OFF voltage source VGN and the gate of the power semiconductor 100 using the OFF resistance switching circuit 323.

[0088] For example, the gate drive circuit 3 can change the rate of change per unit time of the voltage applied to the power semiconductor 100 or the current supplied to it by a switching circuit. Specifically, the gate drive circuit 3 can change the rate of change per unit time of the gate voltage Vge, collector-emitter current Ice, or collector-emitter voltage Vce of the power semiconductor 100 by an ON-resistance switching circuit 313 and an OFF-resistance switching circuit 323, etc.

[0089] As described above, the gate drive circuit 3 according to this embodiment can electrically change the gate voltage Vge applied to the gate of the power semiconductor 100, thus enabling efficient dynamic characteristic testing, for example. This allows for high-speed switching of the gate resistance, enabling characteristic measurements under multiple gate driving conditions within a single test.

[0090] Furthermore, as described above, the test apparatus 1 according to this embodiment includes a controller 2, a gate drive circuit 3, and a sensor 4. The controller 2 outputs a gate signal Sge that controls the ON / OFF state of the gate of the power semiconductor 100.

[0091] Sensor 4 measures the collector-emitter voltage Vce of the power semiconductor 100. The gate drive circuit 3 includes a voltage source, multiple resistor setting circuits, and a switching circuit. The multiple resistor setting circuits are connected in parallel to the voltage source and the gate.

[0092] The switching circuit connects at least one of the multiple resistor setting circuits to the voltage source and the gate. In the gate drive circuit 3, the switching circuit connects at least one of the multiple resistor setting circuits connected in parallel to the voltage source and the gate of the power semiconductor 100 to the voltage source and the gate of the power semiconductor 100.

[0093] As described above, in the test apparatus 1 according to this embodiment, for example, the collector-emitter voltage Vce of a power semiconductor is measured. When the collector-emitter voltage Vce of the power semiconductor is measured, the gate drive circuit 3 can appropriately set the value of the resistance between the voltage source and the gate of the power semiconductor by switching the connection of a plurality of resistance setting circuits connected to the voltage source and the gate of the power semiconductor using a switching circuit.

[0094] The test apparatus 1 and gate drive circuit 3 can electrically change the gate voltage Vge applied to the gate of the power semiconductor 100 by a switching circuit. Therefore, the test apparatus 1 and gate drive circuit 3 can efficiently perform tests on power semiconductors where, for example, the gate voltage Vge needs to be changed.

[0095] When a switching circuit such as the OFF-resistance switching circuit 323 includes a semiconductor element that operates in response to a switching signal such as the OFF-resistance switching signal Sc, the gate drive circuit 3 can change the gate voltage Vge applied to the gate of the power semiconductor 100 more quickly than when the switching circuit does not include a semiconductor element and is composed only of a relay or the like.

[0096] As described above, the controller 2 outputs a switching signal such as an OFF resistance switching signal Sc during one dynamic characteristic test from the start to the end of the gate signal Sge, and the switching circuit may connect at least one resistor setting circuit selected from a plurality of resistor setting circuits in response to the OFF resistance switching signal Sc to the voltage source and the gate.

[0097] The test apparatus 1 can change the gate voltage Vge applied to the gate using a switching circuit during tests such as dynamic characteristic tests. Therefore, tests such as dynamic characteristic tests of power semiconductors 100 that require changing the gate voltage Vge can be performed efficiently.

[0098] The test apparatus 1 and gate drive circuit 3 described above are examples of the embodiment. The test apparatus 1 is not limited to the embodiment described above, and may be modified or applied to other devices, provided that the gist of the embodiment is not altered.

[0099] For example, although the OFF resistor circuit 32 was described as having two resistor setting circuits, a third resistor setting circuit 321 and a fourth resistor setting circuit 322, it may have three or more resistor setting circuits. The ON resistor circuit 31 may also have three or more resistor setting circuits, similar to the OFF resistor circuit 32.

[0100] The OFF resistance switching circuit 323 and the ON resistance switching circuit 313 can be configured by selecting at least one resistance setting circuit from three or more resistance setting circuits and connecting it between the OFF voltage source VGN and the gate of the power semiconductor 100. The test apparatus 1 can switch the gate resistance more precisely by selecting from three or more resistance setting circuits.

[0101] Not only switching circuits, but also resistance setting circuits may include semiconductor elements. When a resistance setting circuit includes semiconductor elements, the gate drive circuit 3 can change the gate voltage Vge applied to the gate of the power semiconductor 100 more quickly than when the resistance setting circuit does not include semiconductor elements and is composed only of relays, etc.

[0102] Furthermore, the semiconductor device described above does not have to be a transistor having an emitter, collector, and base, but may be a field-effect transistor such as an IGBT having an emitter, collector, and gate, or a metal-oxide-semiconductor field effect transistor (MOSFET) having a drain, source, and gate. [Explanation of Symbols]

[0103] 1...Test equipment, 2...Controller, 3...Gate drive circuit, 4...Sensor, 100...Power semiconductor.

Claims

1. A gate drive circuit used for dynamic characteristic testing of power semiconductors, A voltage source that changes the gate voltage of the gate of the power semiconductor, A plurality of resistor setting circuits connected in parallel to one another between the voltage source and the gate, A switching circuit connects at least one of the plurality of resistor setting circuits to the voltage source and the gate, Equipped with, The switching circuit switches the connection of the multiple resistor setting circuits during one dynamic characteristic test, from the start to the end of the gate signal that repeatedly turns the gate ON and OFF. Gate drive circuit.

2. The gate drive circuit according to claim 1, wherein the switching circuit includes a semiconductor element that operates in accordance with a switching signal.

3. A test apparatus used for testing the dynamic characteristics of power semiconductors, A controller that outputs a gate signal that controls the ON / OFF state of the gate of the power semiconductor, A gate drive circuit that applies a gate voltage to the gate in accordance with the gate signal output from the controller, A sensor for measuring the voltage between the collector and emitter of the power semiconductor, Equipped with, The aforementioned gate drive circuit is A voltage source that changes the gate voltage of the gate, A plurality of resistor setting circuits connected in parallel to one another between the voltage source and the gate, A switching circuit connects at least one of the plurality of resistor setting circuits to the voltage source and the gate, It has, The switching circuit switches the connection of the multiple resistor setting circuits during one dynamic characteristic test, from the start to the end of the gate signal, which repeatedly switches the gate ON and OFF. Testing equipment.

4. The controller outputs a switching signal during one of the dynamic characteristic tests, from the start to the end of the gate signal. The test apparatus according to claim 3, wherein the switching circuit connects at least one resistor setting circuit selected from the plurality of resistor setting circuits in accordance with the switching signal to the voltage source and the gate.

5. A switching method performed by a controller used in dynamic characteristic testing of power semiconductors, The first step is to output a resistance setting signal, A second step of outputting a gate signal that repeatedly turns the gate of the power semiconductor ON and OFF, A third step involves outputting a resistance switching signal during one of the dynamic characteristic tests from the start to the end of the gate signal, A switching method that includes [a specific feature / feature].

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