Apparatus and method for generating a parameter page library for NAND flash memory

Abstract

The present invention relates to an apparatus and method for generating a parameter page library for a NAND flash memory, and more particularly to an apparatus and method for generating a parameter page library for each memory chip by reading the parameter pages of the NAND flash memory in an environment where the internal controller of the NAND flash memory device is unavailable.

Description

[Technical Field]

[0001] The present invention relates to an apparatus and method that can generate a parameter page library for each memory chip by reading the parameter pages of a NAND flash memory device in an environment where the internal controller of the NAND flash memory device is unusable. [Background technology]

[0002] Flash memory is a semiconductor memory that allows data to be read and written using electrical signals, and retains stored data even after the power supply is interrupted. While reading and writing are possible in specific units within the memory, erasing must always be done in block units. Therefore, an area that has been recorded once can always be recorded again after being erased.

[0003] Flash memory of this type is broadly classified into parallel-structured NOR type and serial-structured NAND type. Of these, NAND type has a slower data read speed than NOR type, but because the memory block is divided into multiple pages, it has even faster write and erase speeds and a higher integration density per unit than NOR, and is mainly used in SSDs (Solid State Drives) and USB memory devices.

[0004] A USB memory device consists of flash memory and a controller, each separated into chips and integrated onto a single board. If the device experiences physical damage or failure, the memory chip corresponding to the flash memory is separated from the device board and placed in a recovery device with a data recovery program applied. Data recovery is then performed by using the parameter data of the memory chip via the data recovery program to reassemble the dumped data.

[0005] However, even if a data recovery program is used, in order to access the data area of the memory chip, it should be premised that the controller that controls the memory operation of the memory chip operates normally.

[0006] Therefore, if a problem occurs in the controller itself and it does not operate normally, there is a problem that it is difficult to recover the data of the memory chip.

Summary of the Invention

Problems to be Solved by the Invention

[0007] An object of the present invention is to solve the above-mentioned problems. The object is to provide an apparatus and method capable of generating a parameter page library for each memory chip by being able to read the parameter page of the memory in an environment where the internal controller of the NAND flash memory device cannot be used.

Means for Solving the Problems

[0008] A parameter page library generation device for a NAND flash memory according to one aspect of the present invention for achieving the above objective is a device for generating a library for the parameter pages of a memory chip in a memory device in an environment where the memory controller of the NAND flash memory device is unusable, comprising: an ID data acquisition module that applies an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputs an initial command value and an initial address value to the input / output terminal of the memory chip, and acquires ID data of the memory chip by executing an ID read command; and, when the ID data is acquired, inputs a call command value and a call address value, which are command words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and retrieves the parameter data stored in the parameter page area. The system is characterized by including: a data loading unit that loads the parameter data; a mode classification unit that extracts binary data recorded at specific byte positions of the loaded parameter data and assigns a mode classification value based on the result of comparing it with a plurality of pre-set protocol signature information; a restoration information generation unit that generates parameter page restoration information by matching the byte-specific item values ​​for the mode classification value with the contents of the parameter data in byte order based on the parameter page length and byte-specific item value information that are pre-set in accordance with the assigned mode classification value; and a library generation unit that generates and saves a parameter page library by matching the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page and saving it.

[0009] Furthermore, a method for generating a parameter page library for a NAND flash memory according to another aspect of the present invention for achieving the above objective is a method for generating a library for the parameter pages of a memory chip in a memory device in an environment where the memory controller of the NAND flash memory device is unusable, comprising the steps of: applying an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputting an initial command value and an initial address value to the input / output terminal of the memory chip to obtain ID data of the memory chip by executing an ID read command; and, when the ID data is obtained, inputting a call command value and a call address value, which are command words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and the parameters stored in the parameter page area The method is characterized by including the steps of: loading data; extracting binary data recorded at a specific byte position in the loaded parameter data and assigning a mode classification value based on the result of comparing it with a plurality of pre-configured protocol signature information; generating parameter page restoration information by matching the byte-specific item value for the mode classification value with the contents of the parameter data in byte order based on the parameter page length and byte-specific item value information pre-configured in accordance with the assigned mode classification value; and generating and saving a parameter page library by matching the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page and saving the results. [Effects of the Invention]

[0010] According to the present invention, even if the internal controller of a NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and instructions of the memory chip can still be executed, which has the effect of allowing the acquisition of parameter data necessary for data recovery.

[0011] Furthermore, according to the present invention, since a parameter page library can be constructed for each memory chip, it has the effect of being able to quickly obtain the information necessary for data recovery of the memory, even if only the memory chip image or the data recorded on the memory chip is used.

[0012] The effects of the present invention are not limited to those described above, and other effects not mentioned above will be clearly understood by those skilled in the art from the description of the claims. [Brief explanation of the drawing]

[0013] [Figure 1] This diagram schematically shows the configuration of a parameter page library generation device for NAND flash memory according to one embodiment of the present invention. [Figure 2] This block diagram shows in detail the internal configuration of the ID data acquisition module, memory recovery module, and library module shown in Figure 1. [Figure 3] Figure 2 shows the timing of the operation of the command words input by the initial command word input unit and the data loading unit. [Figure 4] This figure shows a portion of the parameter page corresponding to cases where the mode is classified into the first classification value by the mode classification unit in Figure 2. [Figure 5] This figure shows an example of a parameter page corresponding to a case where the mode is classified into a second category value by the mode classification unit in Figure 2. [Figure 6] This is a flowchart showing a method for generating a parameter page library for a NAND flash memory according to one embodiment of the present invention. [Figure 7] This is a flowchart showing step S100 in Figure 6 in detail. [Figure 8] This is a flowchart showing the data recovery process between step S500 and step S700 in Figure 6. [Figure 9] Figure 6 is a flowchart showing the library recommendation process from step S700 onward. [Modes for carrying out the invention]

[0014] A parameter page library generation device for a NAND flash memory according to one aspect of the present invention for achieving the above objective is a device for generating a library for the parameter pages of a memory chip in a memory device in an environment where the memory controller of the NAND flash memory device is unusable, comprising: an ID data acquisition module that applies an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputs an initial command value and an initial address value to the input / output terminal of the memory chip, and acquires ID data of the memory chip by executing an ID read command; and, when the ID data is acquired, inputs a call command value and a call address value, which are command words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and retrieves the parameter data stored in the parameter page area. The system is characterized by including: a data loading unit that loads the parameter data; a mode classification unit that extracts binary data recorded at specific byte positions of the loaded parameter data and assigns a mode classification value based on the result of comparing it with a plurality of pre-set protocol signature information; a restoration information generation unit that generates parameter page restoration information by matching the byte-specific item values ​​for the mode classification value with the contents of the parameter data in byte order based on the parameter page length and byte-specific item value information that are pre-set in accordance with the assigned mode classification value; and a library generation unit that generates and saves a parameter page library by matching the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page and saving it.

[0015] Furthermore, a method for generating a parameter page library for a NAND flash memory according to another aspect of the present invention for achieving the above objective is a method for generating a library for the parameter pages of a memory chip in a memory device in an environment where the memory controller of the NAND flash memory device is unusable, comprising the steps of: applying an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputting an initial command value and an initial address value to the input / output terminal of the memory chip to obtain ID data of the memory chip by executing an ID read command; and, when the ID data is obtained, inputting a call command value and a call address value, which are command words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and the parameters stored in the parameter page area The method is characterized by including the steps of: loading data; extracting binary data recorded at a specific byte position in the loaded parameter data and assigning a mode classification value based on the result of comparing it with a plurality of pre-configured protocol signature information; generating parameter page restoration information by matching the byte-specific item value for the mode classification value with the contents of the parameter data in byte order based on the parameter page length and byte-specific item value information pre-configured in accordance with the assigned mode classification value; and generating and saving a parameter page library by matching the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page and saving the results.

[0016] The specific details, including the problems to be solved by the present invention, the means of solving those problems, and the effects of the invention, are included in the embodiments and drawings described below. The advantages and features of the present invention, as well as how to achieve them, will become clear when referring to the embodiments described in detail later with the accompanying drawings. Throughout the specification, the same reference numerals refer to the same components.

[0017] Figure 1 is a schematic diagram showing the configuration of a parameter page library generation device for NAND flash memory according to one embodiment of the present invention; Figure 2 is a block diagram showing in detail the internal configuration of the ID data acquisition module, memory recovery module, and library module of Figure 1; Figure 3 is a timing diagram of the operation of the instruction words input by the initial instruction word input unit and data loading unit of Figure 2; Figure 4 is a diagram showing a part of the parameter page corresponding to the case where the mode classification unit of Figure 2 classifies the data into a first classification value; and Figure 5 is a diagram showing an example of a parameter page corresponding to the case where the mode classification unit of Figure 2 classifies the data into a second classification value.

[0018] Furthermore, Figure 6 is a flowchart showing a parameter page library generation method for NAND flash memory according to one embodiment of the present invention, Figure 7 is a flowchart showing step S100 in Figure 6 in detail, Figure 8 is a flowchart showing the data recovery process between steps S500 and S700 in Figure 6, and Figure 9 is a flowchart showing the library recommendation process from step S700 onward in Figure 6.

[0019] Hereinafter, with reference to the aforementioned attached drawings, a parameter page library generation apparatus and method for a NAND-type flash memory according to a preferred embodiment of the present invention will be described.

[0020] The present invention relates to an apparatus and method for generating a library for parameter pages of a memory chip 14 in a NAND flash memory device 10 in an environment where the memory controller 12 of the memory device 10 is unavailable.

[0021] First, referring to Figure 1, a parameter page library generation device for NAND flash memory according to one embodiment of the present invention is broadly composed of an ID data acquisition module 100, a data loading unit 200, a mode classification unit 400, a recovery information generation unit 500, a memory recovery module 600, and a library module 700.

[0022] The ID data acquisition module 100 is used to acquire the ID data of the memory chip 14 after confirming and operating the memory chip 14's operating voltage.

[0023] Here, the ID data corresponds to unique identification information used to distinguish one memory chip from other memory chips, and may include information such as a manufacturer ID, manufacturer identification code, device ID, and device identification code.

[0024] The ID data acquisition module 100 can acquire ID data from the memory chip 14 by applying an initial setting voltage corresponding to a preset voltage level to the power terminal VDD of the memory chip 14, inputting an initial command value and an initial address value to the input / output terminal I / Ox of the memory chip 14, and executing an ID read command.

[0025] Specifically, the ID data acquisition module 100 may include a voltage application unit 110, an initial command word input unit 120, an execution confirmation unit 130, and a control unit 140, as shown in Figure 2.

[0026] The voltage application unit 110 sets a first voltage value corresponding to one of a plurality of preset voltage levels to the initial setting voltage V S Set as, and the initial setting voltage V S Apply this to the power terminal VDD of the memory chip 14.

[0027] Here, the initial setting voltage V S This refers to the voltage required to set the memory chip to operate, and the preset voltage levels may include 1.2V, 1.8V, and 3.3V.

[0028] The initial instruction input unit 120 has an initial setting voltage V S The initial setting voltage V is set based on the time of application. S With the applied state, the initial instruction word C, which includes the initial command value and initial address value, is sent to the input / output terminal I / Ox of the memory chip 14. IInput it.

[0029] Here, the initial instruction word C I As shown in FIG. 3, can include the initial command value "90h" which indicates a Read ID Command of the ID data.

[0030] The execution confirmation unit 130 checks whether the ID data of the memory chip 14 is obtained by executing the ID read command corresponding to the input of the initial instruction word C I The execution confirmation unit 130 may be to check whether the ID data is loaded based on the initial command value "90h".

[0031] Based on the confirmation result of the execution confirmation unit 130, the control unit 140 controls the operations of the voltage application unit 110 and the initial instruction input unit 120 to obtain the ID data of the memory chip 14.

[0032] Based on the confirmation result of the execution confirmation unit 130, when the ID data is not obtained, the control unit 140, among a plurality of voltage levels, sets a second voltage value having a voltage level different from the currently set initial setting voltage V

[0033] as the initial setting voltage V S and then re - applies it to the power supply terminal VDD, and can control the voltage application unit 110 and the initial instruction word input unit 120 to repeatedly perform the operation of re - inputting the initial instruction word C S to the input / output terminal I / Ox until the ID data is obtained. I For example, if the first voltage value (1.8V) is set and applied as the initial setting voltage V

[0034] of the memory chip 14 and the initial instruction word C S is input, but as a result of the check, the ID data is not obtained, the control unit 140 controls the voltage application unit 110 to reset the second voltage value (3.3V) as the initial setting voltage V I and apply it to the voltage terminal VDD, and the reset initial setting voltage V S ​S With the initial instruction C applied I The initial command input unit 120 can be controlled to re-enter the command.

[0035] At this time, when the execution confirmation unit 130 confirms that the ID data has been acquired, the ID data acquisition module 100 retrieves the voltage value applied to the voltage terminal VDD of the memory chip 14 at the time the ID data was acquired, i.e., the initial setting voltage V S The configuration may further include an execution condition storage unit 150 that stores values ​​as voltage condition information that enables the operation of the memory chip 14 and the execution of instructions.

[0036] After confirming the acquisition of ID data, the data loading unit 200 loads the parameter data D from the memory chip 14. P This is for loading.

[0037] If the execution confirmation unit 130 confirms that ID data has been obtained, the data loading unit 200 sends the instruction word C to the input / output terminal I / Ox of the memory chip 14 to call the parameter page area of ​​the memory chip 14. P Enter the parameter data D stored in the parameter page area. P Load it.

[0038] Here, the instruction C calls the parameter page area. P As shown in Figure 3, this can include "ECh", which is a call command value indicating a call instruction to a parameter page containing the Maker Code and Device Code.

[0039] The mode classification unit 400 processes parameter data D P This is for determining the mode classification value M for the memory chip 14 based on the protocol information contained therein.

[0040] The mode classification unit 400 processes the parameter data D loaded by the data loading unit 200. PExtract the binary data recorded at a specific byte position.

[0041] At this time, the binary data extracted by the mode classification unit 400 is parameter data D P It is preferable that these are the first to fourth bytes of the data.

[0042] On the other hand, the mode classification unit 400 can also convert the extracted binary data into an ASCII code-based string.

[0043] In this case, the mode classification unit 400 uses parameter data D P Convert the first, second, third, and fourth byte data into the first string S1, second string S2, third string S3, and fourth string S4, respectively.

[0044] The mode classification unit 400 assigns a mode classification value M to the extracted binary data or converted string data based on the result of comparing it with a set of multiple protocol signature information sets.

[0045] Here, the multiple protocol signature information may include "ONFI," an abbreviation for the Open NAND Flash Interface Working Group, and "JESD," an abbreviation for the JEDEC standard, a memory standard document published by JEDEC (Japan Advanced Technology Council).

[0046] When the mode classification unit 400 uses binary data as the comparison target, the parameter data D P The first byte data is compared with the binary conversion values ​​of the first strings "O" and "J" in the protocol signature information, respectively, and parameter data D P The second byte data is compared with the binary values ​​obtained by converting the second strings "N" and "E" of the protocol signature information, respectively, to the parameter data D. PThe third byte data is compared with the binary conversion values ​​of the third strings "F" and "S" in the protocol signature information, and parameter data D P The fourth byte data is compared with the binary values ​​obtained by converting the fourth string "I" and "D" from the protocol signature information.

[0047] When the mode classification unit 400 uses string data as a comparison target, it compares the first string S1 with the first strings "O" and "J" of the protocol signature information, the second string S2 with the second strings "N" and "E" of the protocol signature information, the third string S3 with the third strings "F" and "S" of the protocol signature information, and the fourth string S4 with the fourth strings "I" and "D" of the protocol signature information.

[0048] Based on the comparison results described above, the mode classification unit 400 assigns a first classification value M if it corresponds to "ONFI", a second classification value if it corresponds to "JESD", and a third classification value if it does not fall under either the first or second classification value.

[0049] The recovery information generation unit 500 generates the byte-specific item value for the mode classification value M and the parameter data D loaded by the data loading unit 200, based on the parameter page length and byte-specific item value information that are pre-set in accordance with the mode classification value M assigned by the mode classification unit 400. P Match the contents in byte order to restore parameter page information I R Generates.

[0050] In this case, the database may further include a database that stores the table data of the parameter page corresponding to the first classification value ONFI shown in Figure 4 and the table data of the parameter page corresponding to the second classification value JESD shown in Figure 5, separated by classification value.

[0051] Here, the table data of the parameter page is table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest-level item in that table.

[0052] For example, the last byte number for the bottom entry in the parameter page table for "ONFI" is "767", and the last byte number for the bottom entry in the parameter page table for "JESD" is "1535". Therefore, the parameter page lengths for the first classification value ONFI and the second classification value JESD are different.

[0053] The memory recovery module 600 recovers parameter page information I R Based on this, it is intended to restore the data originally stored in the memory chip 14.

[0054] The memory recovery module 600 recovers the dump data of the memory chip 14 as parameter page recovery information I R By rearranging the data based on this, the data originally stored in the memory chip 14 can be restored.

[0055] As shown in Figure 2, the memory recovery module 600 consists of a dump extraction unit 610, a descramble unit 620, and a data recovery unit 630. The dump extraction unit 610 extracts dump data from the memory chip 14, and the descramble unit 620 processes the extracted dump data into parameter recovery information I. R After rearranging based on the data, the data recovery unit 630 may perform a descrambling operation via an XOR operation and then recover the data originally stored in the memory chip 14 based on the descrambled data.

[0056] The library module 700 is for building a library for the parameter page information of the memory chip 14.

[0057] Specifically, as shown in Figure 2, the library module 400 may include a camera unit 710, an interface unit 720, an image storage unit 730, a string extraction unit 750, a library generation unit 740, and a library recommendation unit 760.

[0058] The library generation unit 740 generates parameter page restoration information I R At the time the ID data of the memory chip 14 was acquired, the initial setting voltage value V was applied to the power terminal VDD. S By matching and saving the mode classification value M assigned to the parameter page, the parameter page library L can be generated and saved.

[0059] The camera unit 710 acquires an image of the front or bottom surface of the first memory chip and transmits it to the image storage unit 730.

[0060] The interface unit 720 receives input of the front or bottom image of the first memory chip from the user via the user terminal 30 and transmits it to the image storage unit 730.

[0061] The image storage unit 730 acquires and stores images transmitted from the camera unit 710 or the interface unit 720.

[0062] The string extraction unit 750 uses a pre-configured string extraction algorithm to extract strings contained in the image stored in the image storage unit 730.

[0063] In this case, the library generation unit 740 generates the parameter page restoration information I mentioned above. R Initial setting voltage value V S By matching and saving the image stored in relation to the first memory chip and the string value extracted from it, along with the mode classification value M, a parameter page library L can be generated and saved for each memory chip.

[0064] The library recommendation unit 760 is designed to recommend a parameter page library for a memory chip similar to the newly saved memory chip image, based on a previously saved parameter page library.

[0065] The library recommendation unit 760, after saving a new first image for a predetermined memory chip in the image storage unit 730 and extracting a target string contained in the first image in the string extraction unit 750, can generate recommendation information in the library generation unit 740 that recommends the parameter page library having the most similar string value based on the result of comparing the extracted target string with parameter page libraries for each memory chip that have been previously saved.

[0066] In this case, it is preferable that the pre-saved parameter page library contains string values ​​extracted from the memory chip image, pre-saved for each memory chip.

[0067] The following describes the parameter page library generation method for NAND flash memory according to the present invention, based on the explanation of the components shown in Figures 1 and 2 above, with reference to Figures 6 to 9.

[0068] A method for generating a parameter page library for a NAND flash memory according to one embodiment of the present invention broadly includes an ID data acquisition step (S100), a parameter data loading step (S200), a binary data extraction step (S300), a mode classification value assignment step (S400), a recovery information generation step (S500), a memory recovery step (S600), and a library generation step (S700).

[0069] First, the ID data acquisition step (S100) is performed to acquire the ID data of the memory chip 14 after confirming and operating the memory chip 14's operating voltage.

[0070] Here, the ID data corresponds to unique identification information used to distinguish one memory chip from other memory chips, and may include information such as a manufacturer ID, manufacturer identification code, device ID, and device identification code.

[0071] In step S100, an initial setting voltage corresponding to a preset voltage level is applied to the power terminal VDD of the memory chip 14, and an initial command value and an initial address value are input to the input / output terminal I / Ox of the memory chip 14 to obtain the ID data of the memory chip 14 by executing an ID read command.

[0072] Specifically, in step S100, as shown in Figure 7, the first voltage value is set to the initial setting voltage V S The step (S112) to set the initial setting voltage V S Step (S114) is to apply power to the power terminal VDD of the memory chip 14, and to the initial instruction word C of the input / output terminal I / Ox of the memory chip 14. I The step of inputting (S120), and the initial instruction word C I Step (S130) confirms whether ID data from the memory chip 14 has been acquired by executing an ID read command corresponding to the input, and if ID data has not been acquired as a result of the confirmation, the currently set initial setting voltage V is selected from among several voltage levels. S A second voltage value having a different voltage level is set to the initial setting voltage V. S The steps may include a step (S140) to reset the ID data, and a step to control the process so that steps S114, S120, S130 and S140 are repeated until the ID data is acquired.

[0073] Here, the initial setting voltage V S This refers to the voltage required to set the memory chip to operate, and the preset voltage levels may include 1.2V, 1.8V, and 3.3V.

[0074] Here, the initial command C IAs shown in Figure 3, this can include "90h", which is the initial command value indicating a Read ID Command.

[0075] Step S130 may involve checking whether ID data has been loaded based on the initial command value "90h".

[0076] At this point, if it is confirmed that the ID data has been acquired, the voltage value applied to the voltage terminal VDD of the memory chip 14 at the time the ID data was acquired, i.e., the initial setting voltage V, will be determined. S The process may further include a step (not shown) of saving the value as voltage condition information that enables the operation and instruction execution of the memory chip 14.

[0077] Next, the parameter data loading step (S200) confirms the acquisition of ID data in step S100, and then loads the parameter data D from the memory chip 14. P This is for loading.

[0078] In step S200, if the ID data is obtained as a result of the verification in step S130, the instruction word C is used to call the parameter page area of ​​the memory chip 14 to the input / output terminal I / Ox of the memory chip 14. P Enter the parameter data D stored in the parameter page area. P Load it.

[0079] Here, the instruction C calls the parameter page area. P As shown in Figure 3, this can include "ECh", which is a call command value indicating a call instruction to a parameter page containing the Maker Code and Device Code.

[0080] Next, the binary data extraction step (S300) extracts the parameter data D loaded in step S200. P Extract the binary data recorded at a specific byte position.

[0081] At this time, the binary data extracted in step S300 is parameter data D P It is preferable that these are the first to fourth bytes of the data.

[0082] The process may also further include a step (S350) of converting the binary data extracted in step S300 into an ASCII code-based string.

[0083] In this case, the parameter data D is obtained by step S350. P The first, second, third, and fourth byte data are converted into the first string S1, second string S2, third string S3, and fourth string S4, respectively.

[0084] Next, the mode classification value assignment step (S400) is performed on parameter data D P This is for determining the mode classification value M for the memory chip 14 based on the protocol information contained therein.

[0085] In step S400, a mode classification value M is assigned to the binary data extracted in step S300 or the string data converted in step S350 based on the result of comparing it with a set of multiple protocol signature information sets.

[0086] Here, multiple protocol signature information can include "ONFI," an abbreviation for the Open NAND Flash Interface Working Group, and "JESD," an abbreviation for the JEDEC standard, a memory standard document published by JEDEC (Japan Semiconductor Technology Association).

[0087] In step S400, if the binary data extracted in step S300 is used as the comparison target, the parameter data D PThe first byte data is compared with the binary conversion values ​​of the first strings "O" and "J" in the protocol signature information, respectively, and parameter data D P The second byte data is compared with the binary values ​​obtained by converting the second strings "N" and "E" of the protocol signature information, respectively, to the parameter data D. P The third byte data is compared with the binary conversion values ​​of the third strings "F" and "S" in the protocol signature information, and parameter data D P The fourth byte data is compared with the binary values ​​obtained by converting the fourth string "I" and "D" from the protocol signature information.

[0088] In step S400, if the string data converted in step S350 is used as the comparison target, the first string S1 is compared with the first strings "O" and "J" of the protocol signature information, the second string S2 is compared with the second strings "N" and "E" of the protocol signature information, the third string S3 is compared with the third strings "F" and "S" of the protocol signature information, and the fourth string S4 is compared with the fourth strings "I" and "D" of the protocol signature information.

[0089] In step S400, based on the comparison results described above, a first classification value is assigned as the mode classification value M if it corresponds to "ONFI", a second classification value if it corresponds to "JESD", and a third classification value if it does not fall under either the first or second classification value.

[0090] Next, the recovery information generation step (S500) generates the byte-specific item value for the mode classification value M and the parameter data D loaded by the data loading unit 200, based on the parameter page length and byte-specific item value information that are set in advance in correspondence with the mode classification value M assigned in step S400. P Match the contents in byte order to restore parameter page information I R Generates.

[0091] At this time, between step S400 and step S500, a step (not shown) may be further included in which the table data of the parameter page corresponding to the first classification value ONFI shown in Figure 4 and the table data of the parameter page corresponding to the second classification value JESD shown in Figure 5 are stored separately by classification value.

[0092] Here, the table data of the parameter page is table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest-level item in that table.

[0093] Next, the memory recovery step (S600) is performed by the parameter page recovery information I generated in step S500. R Based on this, it is intended to restore the data originally stored in the memory chip 14.

[0094] In step S600, the dump data of the memory chip 14 is extracted to restore parameter page information I R After rearranging based on the above, the data originally stored in the memory chip 14 can be recovered by descrambling via an XOR operation.

[0095] Specifically, as shown in Figure 8, step S600 includes the step (S612) of extracting dump data from the memory chip 14, and the step of recovering parameter information I from the extracted dump data. R The steps may include: a step of descrambling the data via an XOR operation after recombining it based on the data (S614-S620); and a step of restoring the data originally stored in the memory chip 14 based on the descrambled data (S630).

[0096] Next, the library generation step (S700) is for building a library for the parameter page information of the memory chip 14.

[0097] In step S700, parameter page restoration information I R At the time the ID data of the memory chip 14 was acquired, the initial setting voltage value V was applied to the power terminal VDD. S The parameter page library L is generated and saved by matching and saving the mode classification value M assigned to the parameter page.

[0098] In this case, the step before step S700 may further include the steps of acquiring and saving an image of the front of the first memory chip taken from the front of the first memory chip or an image of the front of the first memory chip input by the user, and extracting a string of characters contained in the image corresponding to the first memory chip using a pre-set string extraction algorithm.

[0099] Here, the step of acquiring and saving an image of the front of the first memory chip taken by the user or an image of the front of the first memory chip input by the user means acquiring and saving an image of the front or bottom of the first memory chip taken by the user via the camera, or acquiring and saving an image of the front or bottom of the first memory chip input by the user via the user terminal 30.

[0100] Here, the step of extracting a string contained in the image saved corresponding to the first memory chip may involve using a pre-configured string extraction algorithm to extract a string contained in the memory chip image saved in the step of acquiring and saving an image of the front of the first memory chip taken from the front of the first memory chip or an image of the front of the first memory chip input by the user.

[0101] In this case, step S700 provides parameter page restoration information I to the first memory chip. R And, the voltage value V applied to the power terminal VDD at the time the ID data of the first memory chip was acquired. SThis may involve matching and saving a parameter page library L for each memory chip by performing the following steps: acquiring and saving a mode classification value M assigned in accordance with the parameter page of the first memory chip, an image of the front of the first memory chip taken or an image of the front of the first memory chip input by the user, and extracting a string from the image saved in accordance with the first memory chip, and then matching and saving the image saved in accordance with the first memory chip and the string value extracted therefrom.

[0102] On the other hand, in the case of a parameter page library generation method for NAND flash memory according to one embodiment of the present invention, in addition to the process described above, the library recommendation process (S730-S764) shown in Figure 9 may be further included.

[0103] The library recommendation process described above is performed on the premise that each memory chip image and the string values ​​extracted therefrom are matched and stored in the parameter page library for each memory chip, which was saved in step S700. Specifically, it may include the steps of: acquiring and saving a new first image for a predetermined memory chip (S730); extracting target strings contained in the saved first image using a pre-set string extraction algorithm (S750); comparing the extracted target strings with the parameter page library specific to the memory chip (S762); and generating recommendation information that recommends the parameter page library with the most similar string values ​​based on the result of comparing the extracted target strings with the parameter page library for each memory chip (S764).

[0104] As a result, according to the present invention described above, even if the internal controller of the NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and instructions of the memory chip can be executed, and the parameter data necessary for data recovery can be obtained.

[0105] Furthermore, according to the present invention, since a parameter page library can be constructed for each memory chip, the information necessary for data recovery of the memory can be obtained in a short time, even with only the memory chip image or the data recorded on the memory chip.

[0106] Although the present invention has been described in detail above with respect to preferred embodiments, the present invention is not limited thereto and can be implemented in various ways within the scope of the claims.

[0107] In particular, the foregoing has described the features and technical strengths of the present invention in a somewhat broad manner so as to allow for a better understanding of the claims of the present invention described later. Therefore, it should be recognized by those skilled in the art that the above-described concepts and specific embodiments of the present invention can be immediately used as the basis for designing or modifying other shapes to accomplish similar purposes.

[0108] Furthermore, the embodiments described above are merely one embodiment of the present invention, and it will be understood that they can be realized in various modified and altered forms within the scope of the technical idea of ​​the present invention by a person with ordinary skill in the art. Accordingly, the disclosed embodiments should be considered from an explanatory rather than restrictive viewpoint, and their various modifications and alterations are also within the scope of the technical idea of ​​the present invention as indicated in the claims of the present invention, and all differences within an equivalent scope should be interpreted as being included in the present invention. [Industrial applicability]

[0109] The present invention can be used in industrial fields to generate parameter page libraries for each memory chip by enabling the reading of parameter pages of a NAND flash memory device in an environment where the internal controller of the device is unavailable.

Claims

1. In an environment where the memory controller of a NAND flash memory device is unavailable, a device for generating a library for the parameter pages of a memory chip in the memory device, An ID data acquisition module that applies an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputs an initial command value and an initial address value to the input / output terminal of the memory chip, and acquires the ID data of the memory chip by executing an ID read command. When the aforementioned ID data is acquired, a data loading unit inputs a call command value and a call address value, which are instruction words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and loads the parameter data stored in the parameter page area. A mode classification unit extracts binary data recorded at a specific byte position in the loaded parameter data and assigns a mode classification value based on the result of comparing it with a set of multiple protocol signature information; A restoration information generation unit generates parameter page restoration information by matching the byte-specific item values ​​for the assigned mode classification value with the contents of the parameter data in byte order, based on the parameter page length and byte-specific item value information that are set in advance in accordance with the assigned mode classification value. A parameter page library generation device for a NAND flash memory, characterized by including a library generation unit that generates and saves a parameter page library by matching and saving the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page.

2. The aforementioned ID data acquisition module is: A voltage application unit sets a first voltage value corresponding to one of several preset voltage levels as the initial setting voltage and applies it to the power terminal of the memory chip, An initial command input unit inputs an initial command word, including the initial command value and the initial address value, to the input / output terminals of the memory chip, based on the time when the initial setting voltage is applied. An execution confirmation unit confirms whether or not ID data from the memory chip has been acquired by executing an ID read command corresponding to the input of the initial command word. A parameter page library generation device for a NAND flash memory according to claim 1, comprising: a control unit that controls the voltage application unit and the initial command input unit, so as to repeatedly perform the operation of resetting a second voltage value having a voltage level different from the currently set initial setting voltage among the plurality of voltage levels as the initial setting voltage and applying it to the power terminal, and then re-inputting the initial command word to the input / output terminal, until the ID data is acquired, if the ID data is not acquired.

3. The parameter page library generation device for a NAND flash memory according to claim 1, further comprising a memory recovery module that recovers the data originally stored in the memory chip by extracting dump data from the memory chip, recombining it based on the parameter page recovery information, and then descrambling it via an XOR operation.

4. An image storage unit that acquires and stores an image of the front of the first memory chip taken from the front of the first memory chip or an image of the front of the first memory chip input by the user, The system further includes a string extraction unit that extracts strings contained in an image stored corresponding to the first memory chip using a pre-configured string extraction algorithm, The library generation unit, A parameter page library generation device for a NAND flash memory according to claim 1, characterized in that it generates and saves a parameter page library for each memory chip by matching and saving together the parameter page restoration information for the first memory chip, the voltage value applied to the power terminal at the time the ID data of the first memory chip is acquired, the mode classification value assigned in accordance with the parameter page of the first memory chip, and the image stored in accordance with the first memory chip and the string value extracted therefrom.

5. The parameter page library generation apparatus for a NAND flash memory according to claim 4, further comprising a library recommendation unit that, when the image storage unit newly stores a first image for a predetermined memory chip and the string extraction unit extracts a target string contained in the first image, generates recommendation information that recommends the parameter page library having the most similar string value based on the result of comparing the extracted target string with the parameter page libraries for each memory chip.

6. A method for generating a parameter page library for a NAND flash memory, wherein the NAND flash memory device generates a library for parameter pages of a memory chip in the memory device in an environment where the memory controller of the NAND flash memory device is unavailable, The steps include: applying an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, inputting an initial command value and an initial address value to the input / output terminal of the memory chip, and obtaining the ID data of the memory chip by executing an ID read command; When the aforementioned ID data is obtained, the steps include inputting a call command value and a call address value, which are instruction words for calling the parameter page area of ​​the memory chip, to the input / output terminal, and loading the parameter data stored in the parameter page area, The steps include: extracting binary data recorded at a specific byte position in the loaded parameter data and assigning a mode classification value based on the result of comparing it with a set of multiple protocol signature information; The steps include generating parameter page restoration information by matching the byte-specific item values ​​for the assigned mode classification value with the contents of the parameter data in byte order, based on the parameter page length and byte-specific item value information that have been set in advance in accordance with the assigned mode classification value, A method for generating a parameter page library for a NAND flash memory, comprising the steps of generating and saving a parameter page library by matching and saving the parameter page restoration information, the voltage value applied to the power terminal at the time the ID data was acquired, and the mode classification value assigned in accordance with the parameter page.

7. The step of obtaining the aforementioned ID data is: The steps include setting a first voltage value corresponding to one of several pre-set voltage levels as the initial setting voltage and applying it to the power terminal of the memory chip, The steps include inputting an initial command word, including the initial command value and the initial address value, to the input / output terminals of the memory chip, based on the time when the initial setting voltage is applied, The steps include: confirming whether or not ID data from the memory chip has been obtained by executing an ID read command corresponding to the input of the initial command word; A method for generating a parameter page library for a NAND flash memory according to claim 6, characterized in that, if the ID data is not acquired, the method includes the step of repeatedly performing the following operations until the ID data is acquired: first, if the ID data is not acquired, resetting a second voltage value having a voltage level different from the currently set initial setting voltage among the plurality of voltage levels and applying it to the power terminal, and then re-inputting the initial command word to the input / output terminal.

8. After the step of generating the parameter page restoration information, A method for generating a parameter page library for a NAND flash memory according to claim 6, further comprising the step of extracting dump data from the memory chip, recombining it based on the parameter page restoration information, and then restoring the data originally stored in the memory chip by descrambling it via an XOR operation.

9. Before the step of generating the parameter page library, The steps include: acquiring and saving an image of the front of the first memory chip, either by taking a photograph of the front of the first memory chip or by obtaining an image of the front of the first memory chip based on user input; The method further includes the step of extracting a string contained in an image stored corresponding to the first memory chip using a pre-configured string extraction algorithm, The step of generating the parameter page library is: A method for generating a parameter page library for a NAND flash memory according to claim 6, characterized in that a parameter page library is generated and saved for each memory chip by matching and saving together the parameter page restoration information for the first memory chip, the voltage value applied to the power terminal at the time the ID data of the first memory chip is acquired, the mode classification value assigned in accordance with the parameter page of the first memory chip, and the image saved in accordance with the first memory chip and the string value extracted therefrom.

10. After the step of generating the parameter page library, The steps include acquiring and saving a new first image for a specified memory chip, The steps include: extracting the target string contained in the first image using the string extraction algorithm described above; A method for generating a parameter page library for a NAND flash memory according to claim 9, further comprising the step of generating recommendation information that recommends the parameter page library having the most similar string value based on the result of comparing the extracted target string with the parameter page libraries for each memory chip.

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