Motor control device

Abstract

One of embodiments of the motor control device of the present invention comprises: a power conversion circuit that is connected to an n-phase motor and performs mutual conversion between DC power and n-phase AC power; and a control unit that controls the power conversion circuit on the basis of an n-phase duty command value that is updated in a predetermined update cycle. When predicting, on the basis of the recently updated value of the n-phase duty command value, that the voltage variations at at least the first and second phase connection terminals of n-phase connection terminals connected to the n-phase motor occur in the same direction and at the same timing, the control unit shifts, by a first time in a first direction, the occurrence timing of the voltage variation at the first phase connection terminal, which is determined by the recently updated value, shifts, by a third time in the first direction, the occurrence timings of the voltage variations at the remaining connection terminals, which are determined by the recently updated value, and shifts, by a second time in a direction opposite to the first direction, the occurrence timing of the voltage variation at the second phase connection terminal, which is determined by the next updated value or last updated value of the n-phase duty command value.

Description

[Technical Field]

[0001] This invention relates to a motor control device. This application claims priority based on Japanese Patent Application No. 2021-162378, filed in Japan on September 30, 2021, the contents of which are incorporated herein by reference. [Background technology]

[0002] Patent Document 1 discloses a technique for an inverter device that supplies a three-phase AC voltage to a three-phase motor, in which a three-phase PWM (Pulse Width Modulation) signal is generated using three types of basic voltage vectors, and a switching signal is generated to each of the at least six switching elements included in the inverter device based on the three-phase PWM signal. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Patent No. 3447366 [Overview of the project] [Problems that the invention aims to solve]

[0004] For example, at the moment when the switching timings of two phases of a three-phase PWM signal coincide, the potential difference (shaft voltage) between the motor's output shaft and the motor case can fluctuate significantly. This can potentially cause noise. Separately, galvanic corrosion can occur in the motor's rotor bearings due to the shaft voltage. Research by the inventors of this invention has revealed that this noise, in particular, may contribute to the occurrence of galvanic corrosion. [Means for solving the problem]

[0005] One aspect of the motor control device of the present invention is a motor control device for controlling an n-phase motor (where n is an integer of 3 or more), comprising: a power conversion circuit connected to the n-phase motor and performing mutual conversion between DC power and n-phase AC power; and a control unit that controls the power conversion circuit based on an n-phase duty command value updated at a predetermined update cycle, wherein, based on the currently updated value of the n-phase duty command value, the control unit predicts that voltage fluctuations at at least the first and second phase connection terminals among the n-phase connection terminals connected to the n-phase motor will occur in the same direction and at the same timing, it shifts the timing of the voltage fluctuation at the first phase connection terminal, determined by the currently updated value, by a first hour in the first direction, shifts the timing of the voltage fluctuation at the remaining connection terminals, determined by the currently updated value, by a third hour in the first direction, and shifts the timing of the voltage fluctuation at the second phase connection terminal, determined by the next update value or the previous update value of the n-phase duty command value, by a second hour in the opposite direction to the first direction. [Effects of the Invention]

[0006] According to the above aspect of the present invention, a motor control device capable of reducing noise is provided. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a schematic circuit block diagram showing the configuration of a motor control device in one embodiment of the present invention. [Figure 2] Figure 2 schematically illustrates the principle by which a three-phase PWM signal is generated based on a three-phase duty cycle command value. [Figure 3] Figure 3 is a timing chart showing an example where the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide. [Figure 4] Figure 4 is a timing chart illustrating the basic concept of the present invention. [Figure 5]FIG. 5 is a timing chart showing an example in which the rising edge timing of the V-phase PWM signal matches the rising edge timing of the W-phase PWM signal in a state where the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 6] FIG. 6 is a timing chart showing an example of a three-phase PWM signal generated by a comparative technique when the rising edge timing of the V-phase PWM signal matches the rising edge timing of the W-phase PWM signal in a state where the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 7] FIG. 7 is a timing chart showing an example of a three-phase PWM signal generated according to this embodiment when the rising edge timing of the V-phase PWM signal matches the rising edge timing of the W-phase PWM signal in a state where the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 8] FIG. 8 is a timing chart showing an example of a three-phase PWM signal generated according to this embodiment when the falling edge timing of the V-phase PWM signal matches the falling edge timing of the W-phase PWM signal in a state where the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 9] FIG. 9 is a timing chart showing an example in which the rising edge timing of the U-phase PWM signal matches the rising edge timing of the V-phase PWM signal in a state where the duty ratios of the U-phase PWM signal and the V-phase PWM signal are close to 0%. [Figure 10] FIG. 10 is a timing chart showing an example of a three-phase PWM signal generated by a comparative technique when the rising edge timing of the U-phase PWM signal matches the rising edge timing of the V-phase PWM signal in a state where the duty ratios of the U-phase PWM signal and the V-phase PWM signal are close to 0%. [Figure 11]Fig. 11 is a timing chart showing an example of the three-phase PWM signal generated according to this embodiment when the rising edge timing of the U-phase PWM signal coincides with the rising edge timing of the V-phase PWM signal in a state where the duty ratios of the U-phase PWM signal and the V-phase PWM signal are close to 0%. [Figure 12] Fig. 12 is a timing chart showing an example of the three-phase PWM signal generated according to this embodiment when the falling edge timing of the U-phase PWM signal coincides with the falling edge timing of the V-phase PWM signal in a state where the duty ratios of the U-phase PWM signal and the V-phase PWM signal are close to 0%. [Figure 13] Fig. 13 is a timing chart showing an example of the three-phase PWM signal generated in the normal center alignment mode when the rising edge timing of the V-phase PWM signal coincides with the rising edge timing of the W-phase PWM signal in a state where the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 14] Fig. 14 is a timing chart showing an example of the three-phase PWM signal generated in the normal center alignment mode when the rising edge timing of the U-phase PWM signal coincides with the rising edge timing of the V-phase PWM signal in a state where the duty ratios of the U-phase PWM signal and the V-phase PWM signal are close to 0%. [Figure 15] Fig. 15 is a timing chart showing an example where the rising edge timing of the V-phase PWM signal coincides with the rising edge timing of the W-phase PWM signal in a state where the duty ratio of the U-phase PWM signal is close to 0% and the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 16] Fig. 16 is a timing chart showing an example of the three-phase PWM signal generated according to this embodiment when the rising edge timing of the V-phase PWM signal coincides with the rising edge timing of the W-phase PWM signal in a state where the duty ratio of the U-phase PWM signal is close to 0% and the duty ratios of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 17]Figure 17 is a timing chart showing an example where the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide, when the duty cycle of the U-phase PWM signal is close to 0% and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%. [Figure 18] Figure 18 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 0%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide. [Figure 19] Figure 19 is a timing chart showing an example where the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide, with the duty cycle of the U-phase PWM signal being close to 100% and the duty cycles of the V-phase PWM signal and the W-phase PWM signal being close to 0%. [Figure 20] Figure 20 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 100%, the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide. [Figure 21] Figure 21 is a timing chart showing an example where the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide, with the duty cycle of the U-phase PWM signal being close to 100% and the duty cycles of the V-phase PWM signal and the W-phase PWM signal being close to 0%. [Figure 22] Figure 22 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 100%, the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide. [Figure 23] Figure 23 is a timing chart showing an example of the waveforms for the U-phase upper gate control signal G1, the U-phase lower gate control signal G2, the U-phase terminal voltage Vu, the V-phase upper gate control signal G3, the V-phase lower gate control signal G4, the V-phase terminal voltage Vv, the W-phase upper gate control signal G5, the W-phase lower gate control signal G6, and the W-phase terminal voltage Vw, when the direction of the V-phase and W-phase currents is both from the power conversion circuit to the three-phase motor. [Figure 24] Figure 24 is a timing chart showing an example of the waveforms of the U-phase upper gate control signal G1, U-phase lower gate control signal G2, U-phase terminal voltage Vu, V-phase upper gate control signal G3, V-phase lower gate control signal G4, V-phase terminal voltage Vv, W-phase upper gate control signal G5, W-phase lower gate control signal G6, and W-phase terminal voltage Vw, when the direction of the W-phase current is from the power conversion circuit to the three-phase motor, and the direction of the V-phase current is from the three-phase motor to the power conversion circuit. [Modes for carrying out the invention]

[0008] Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. Figure 1 is a schematic circuit block diagram showing the configuration of the motor control device 10 in this embodiment. As shown in Figure 1, the motor control device 10 controls a three-phase motor 20. As an example, the three-phase motor 20 is an inner rotor type three-phase brushless DC motor. The three-phase motor 20 is also, for example, a drive motor (traction motor) mounted on an electric vehicle.

[0009] The three-phase motor 20 has a U-phase terminal 21u, a V-phase terminal 21v, a W-phase terminal 21w, a U-phase coil 22u, a V-phase coil 22v, and a W-phase coil 22w. Although not shown in Figure 1, the three-phase motor 20 has a motor case and a rotor and stator housed in the motor case. The rotor is a rotating body that is rotatably supported inside the motor case by bearing components such as rotor bearings. The rotor has an output shaft that is coaxially connected to the rotor and penetrates the radially inner side of the rotor in the axial direction. The stator is fixed inside the motor case, surrounding the outer surface of the rotor, and generates the electromagnetic force necessary to rotate the rotor.

[0010] The U-phase terminal 21u, V-phase terminal 21v, and W-phase terminal 21w are metal terminals exposed from the surface of the motor case. The U-phase terminal 21u is connected to the U-phase connection terminal 13u of the motor control device 10. The V-phase terminal 21v is connected to the V-phase connection terminal 13v of the motor control device 10. The W-phase terminal 21w is connected to the W-phase connection terminal 13w of the motor control device 10. The U-phase coil 22u, V-phase coil 22v, and W-phase coil 22w are excitation coils provided on the stator. As an example, the U-phase coil 22u, V-phase coil 22v, and W-phase coil 22w are star-connected inside the three-phase motor 20.

[0011] The U-phase coil 22u is connected between the U-phase terminal 21u and the neutral point N. The V-phase coil 22v is connected between the V-phase terminal 21v and the neutral point N. The W-phase coil 2 2w is connected between the W-phase terminal 21w and the neutral point N. The energization state of the U-phase coil 22u, V-phase coil 22v, and W-phase coil 22w is controlled by the motor control device 10, generating the electromagnetic force necessary to rotate the rotor. As the rotor rotates, the output shaft also rotates in sync with the rotor.

[0012] The motor control device 10 includes a power conversion circuit 11 and an MCU (Microcontroller Unit) 12. The power conversion circuit 11 is connected to a three-phase motor 20 and performs mutual conversion between DC power and three-phase AC power. When the power conversion circuit 11 functions as an inverter, the power conversion circuit 11 converts the DC power supplied from the DC power source 30 into three-phase AC power and outputs it to the three-phase motor 20. As an example, the DC power source 30 is one of a plurality of batteries mounted on an electric vehicle.

[0013] The power conversion circuit 11 includes an upper-arm switch Q for the U phase UH an upper-arm switch Q for the V phase VH an upper-arm switch Q for the W phase WH a lower-arm switch Q for the U phase UL a lower-arm switch Q for the V phase VL a lower-arm switch Q for the W phase WL In this embodiment, each arm switch is, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0014] The collector terminal of the upper-arm switch Q for the U phase UH the collector terminal of the upper-arm switch Q for the V phase VH and the collector terminal of the upper-arm switch Q for the W phase WH are each connected to the positive terminal of the DC power source 30. The emitter terminal of the lower-arm switch Q for the U phase UL the emitter terminal of the lower-arm switch Q for the V phase VL and the emitter terminal of the lower-arm switch Q for the W phase WL are each connected to the negative terminal of the DC power source 30.

[0015] The emitter terminal of the upper-arm switch Q for the U phase UH is connected to each of the U-phase connection terminal 13u and the collector terminal of the lower-arm switch Q for the U phase UL That is, the emitter terminal of the upper-arm switch Q for the U phase UH is connected to the U-phase terminal 21u of the three-phase motor 20 via the U-phase connection terminal 13u. The emitter terminal of the upper-arm switch Q for the V phaseVH The emitter terminal has a V-phase connection terminal 13V and a V-phase lower arm switch Q. VL It is connected to the collector terminals of each of them. In other words, the V-phase upper arm switch Q VH The emitter terminal is connected to the V-phase terminal 21V of the three-phase motor 20 via the V-phase connection terminal 13V. W-phase upper arm switch Q WH The emitter terminals are W-phase connection terminal 13w and W-phase lower arm switch Q. WL It is connected to the collector terminals of each of them. In other words, the W-phase upper arm switch Q WH The emitter terminal is connected to the W-phase terminal 21w of the three-phase motor 20 via the W-phase connection terminal 13w.

[0016] U-phase upper arm switch Q UH The gate terminal, V-phase upper arm switch Q VH The gate terminal and the W-phase upper arm switch Q WH The gate terminals are connected to the output terminals of the MCU12. Also, the U-phase lower arm switch Q UL The gate terminal, V-phase lower arm switch Q VL The gate terminal and the W-phase lower arm switch Q WL The gate terminals are also connected to the output terminals of the MCU12.

[0017] As described above, the power conversion circuit 11 is composed of a three-phase full-bridge circuit having three upper arm switches and three lower arm switches. The power conversion circuit 11, configured in this way, performs mutual conversion between DC power and three-phase AC power by controlling the switching of each arm switch by the MCU 12.

[0018] The MCU 12 is a control unit that controls the power conversion circuit 11 based on three-phase duty cycle command values ​​that are updated at a predetermined update cycle. The three-phase duty cycle command values ​​include the U-phase duty cycle command value DU, the V-phase duty cycle command value DV, and the W-phase duty cycle command value DW. The MCU 12 has an MCU core 12a and a PWM module 12b.

[0019] The MCU core 12a performs a command value calculation process to calculate at least three-phase duty cycle command values ​​according to a program pre-stored in memory (not shown). Although not shown in Figure 1, the MCU 12 receives torque command values ​​output from a higher-level control device. For example, the higher-level control device is an ECU (Electronic Control Unit) mounted on an electric vehicle. For example, the MCU core 12a calculates q-axis current command values ​​and d-axis current command values ​​based on the torque command values, and calculates three-phase duty cycle command values ​​as three-phase voltage command values ​​based on these current command values. Since torque control of the three-phase motor 20 is a known technique, a detailed explanation is omitted in this specification.

[0020] The MCU core 12a outputs the calculated three-phase duty cycle command values, namely the U-phase duty cycle command value DU, the V-phase duty cycle command value DV, and the W-phase duty cycle command value DW, to the PWM module 12b. Based on the U-phase duty cycle command value DU, the V-phase duty cycle command value DV, and the W-phase duty cycle command value DW, the PWM module 12b generates gate control signals that are supplied to the gate terminals of each arm switch included in the power conversion circuit 11.

[0021] The gate control signal is controlled by the U-phase upper arm switch Q. UH The U-phase upper gate control signal G1 supplied to the gate terminal and the U-phase lower arm switch Q UL This includes the U-phase lower gate control signal G2 supplied to the gate terminal. The gate control signal also includes the V-phase upper arm switch Q VH The V-phase upper gate control signal G3 supplied to the gate terminal and the V-phase lower arm switch Q VL The gate control signal G4 is supplied to the gate terminal of the V-phase lower-side gate control signal Q. Furthermore, the gate control signal includes the W-phase upper-side arm switch Q. WH The W-phase upper gate control signal G5 and the W-phase lower arm switch Q are supplied to the gate terminal. WLThis includes the W-phase lower gate control signal G6 supplied to the gate terminal. A dead time is inserted into each gate control signal to prevent the upper and lower arm switches of the same phase from being switched on simultaneously.

[0022] Figure 2 schematically illustrates the principle by which a three-phase PWM signal is generated based on a three-phase duty cycle command value. As shown in Figure 2, a triangular wave TW with a predetermined period Tp is generated in the PWM module 12b. Hereafter, the period Tp of the triangular wave TW may be referred to as the PWM period.

[0023] For example, the triangular wave TW is composed of the count value of a PWM timer. In the example shown in Figure 2, during the period from time t1 to time t2, the PWM timer operates in countdown mode, causing the PWM timer's count value to change from the maximum value to the minimum value. Then, during the period from time t2 to time t3, the PWM timer operates in count-up mode, causing the PWM timer's count value to change from the minimum value to the maximum value. The period from time t1 to time t3 corresponds to the period of the triangular wave TW, i.e., the PWM period Tp.

[0024] The countdown period from time t1 to time t2 and the count-up period from time t2 to time t3 each correspond to half the duration of the PWM period Tp. The three-phase duty cycle command value is updated at both the countdown start time t1 and the count-up start time t2. That is, the update period Td of the three-phase duty cycle command value corresponds to half the duration of the PWM period Tp.

[0025] Within the PWM module 12b, a buffer register and an update register are assigned to each of the three duty cycle command values ​​included in the three-phase duty cycle command value. The three-phase duty cycle command value calculated by the MCU core 12a is first stored in the buffer register. Then, when an update timing such as the countdown start time t1 or the count-up start time t2 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. Thus, "the three-phase duty cycle command value is updated" means that the three-phase duty cycle command value is transferred from the buffer register to the update register at the update timing.

[0026] As described above, the three-phase duty cycle command value calculated by the MCU core 12a needs to be stored in the buffer register before the update timing arrives. Therefore, the MCU core 12a calculates the three-phase duty cycle command value earlier than the update timing. In other words, the MCU core 12a calculates the three-phase duty cycle command value to be updated at the countdown start time t1 earlier than the countdown start time t1 and outputs it to the PWM module 12b. Also, the MCU core 12a calculates the three-phase duty cycle command value to be updated at the countup start time t2 earlier than the countup start time t2 and outputs it to the PWM module 12b. In this way, the MCU core 12a repeats the command value calculation process at the same cycle as the update cycle Td of the three-phase duty cycle command value, but the command value calculation timing is earlier than the update timing.

[0027] As shown in Figure 2, assume that at the countdown start time t1, the U-phase duty command value DU is updated to "DU1", the V-phase duty command value DV is updated to "DV1", and the W-phase duty command value DW is updated to "DW1". The U-phase duty command value DU1 is greater than the V-phase duty command value DV1. The V-phase duty command value DV1 is greater than the W-phase duty command value DW1. "DU1", "DV1", and "DW1" are the values ​​in the update registers assigned to each duty command value as described above.

[0028] During the descent of the triangular wave tweeter (TW), when the triangular wave tweeter reaches the three-phase duty cycle command value, the three-phase PWM signal becomes high. In other words, during the countdown operation of the PWM timer, the three-phase PWM signal becomes high at the timing when the PWM timer's count value matches the three-phase duty cycle command value.

[0029] Therefore, as shown in Figure 2, during the countdown period from time t1 to time t2, the U-phase PWM signal PU becomes high when the PWM timer count value matches the U-phase duty cycle command value DU1. During the countdown period from time t1 to time t2, the V-phase PWM signal PV becomes high when the PWM timer count value matches the V-phase duty cycle command value DV1. During the countdown period from time t1 to time t2, the W-phase PWM signal PW becomes high when the PWM timer count value matches the W-phase duty cycle command value DW1.

[0030] As shown in Figure 2, assume that at the count-up start time t2, the U-phase duty command value DU is updated to "DU2", the V-phase duty command value DV is updated to "DV2", and the W-phase duty command value DW is updated to "DW2". The U-phase duty command value DU2 is greater than the V-phase duty command value DV2. The V-phase duty command value DV2 is greater than the W-phase duty command value DW2. "DU2", "DV2", and "DW2" are the values ​​in the update registers assigned to each duty command value as described above.

[0031] During the rise of the triangular wave TW, when the triangular wave TW reaches the three-phase duty cycle command value, the three-phase PWM signal goes low. In other words, during the count-up operation of the PWM timer, the three-phase PWM signal goes low at the timing when the PWM timer's count value matches the three-phase duty cycle command value.

[0032] Therefore, as shown in Figure 2, during the count-up period from time t2 to time t3, the U-phase PWM signal PU becomes low when the PWM timer count value matches the U-phase duty command value DU2. During the count-up period from time t2 to time t3, the V-phase PWM signal PV becomes low when the PWM timer count value matches the V-phase duty command value DV2. During the count-up period, when the count value of the PWM timer matches the W-phase duty cycle command value DW2, the W-phase PWM signal PW becomes low.

[0033] The operation during the countdown period from time t3 to time t4 is the same as the operation during the countdown period from time t1 to time t2. The operation during the count-up period from time t4 to time t5 is the same as the operation during the count-up period from time t2 to time t3. By repeating the above operation with the update cycle Td of the three-phase duty command value, the duty cycle of the three-phase PWM signal is controlled individually.

[0034] As can be understood from the above explanation, this embodiment illustrates a control mode called asymmetric center alignment mode, in which the rising edge timing and falling edge timing of the PWM signal are controlled individually, in which the duty cycle of the PWM signal is controlled. However, the PWM signal control modes that can be used in the present invention are not limited to asymmetric center alignment mode.

[0035] As shown in Figure 3, for example, if the V-phase duty cycle command value DV and the W-phase duty cycle command value DW are equal among the three-phase duty cycle command values ​​updated at the count-up start time t2, then the falling edge timing of the V-phase PWM signal PV and the falling edge timing of the W-phase PWM signal PW coincide during the countdown period from time t2 to time t3.

[0036] As already mentioned, electrolytic corrosion may occur in the rotor bearing of the three-phase motor 20 due to the potential difference (shaft voltage) between the output shaft of the three-phase motor 20 and the motor case. In the example shown in Figure 3, the off-timing of the V-phase PWM signal PV and the off-timing of the W-phase PWM signal PW coincide in the nth PWM control cycle. As a result of the inventors' research, it has been found that, as shown in Figure 3, a large instantaneous fluctuation in the shaft voltage at the moment when the switching timings of two phases of the three-phase PWM signal coincide may affect the occurrence of electrolytic corrosion. In the example in Figure 3, for example, when the three-phase motor 20 is in the powering state and the V-phase and W-phase currents are positive (when current flows from the power conversion circuit 11 to the three-phase motor 20), a rapid fluctuation in the shaft voltage occurs when the switching timings of the V-phase PWM signal PV and the W-phase PWM signal PW overlap. On the other hand, under similar conditions, if the V-phase current is positive and the W-phase current is negative, a rapid fluctuation in the shaft voltage occurs when the turn-off of the V-phase high-side coincides with the turn-on of the W-phase low-side, or when the turn-on of the V-phase high-side coincides with the turn-off of the W-phase low-side.

[0037] To solve the above technical problems, the MCU 12 in this embodiment predicts that voltage fluctuations at at least the first and second phase connection terminals among the three-phase connection terminals 13u, 13v, and 13w connected to the three-phase motor 20 will occur in the same direction and at the same timing, based on the currently updated value of the three-phase duty cycle command, and shifts the timing of the voltage fluctuation at the first phase connection terminal, determined by the currently updated value, by one hour in the first direction, shifts the timing of the voltage fluctuation at the remaining connection terminals, determined by the currently updated value, by three hours in the first direction, and shifts the timing of the voltage fluctuation at the second phase connection terminal, determined by the next or previous update value of the three-phase duty cycle command, by two hours in the opposite direction to the first direction. In the following, in order to facilitate understanding of the present invention, the operation of this embodiment will be described in comparison with the technology disclosed in Japanese Patent Application Publication No. 2005-51959.

[0038] The technology disclosed in Japanese Patent Publication No. 2005-51959 is a technology aimed at avoiding simultaneous switching of multiple phases. Hereinafter, the technology disclosed in Japanese Patent Publication No. 2005-51959 will be referred to as the comparative technology. In the comparative technology, when the edge timings of two phases of a three-phase PWM signal match, the rising edge timing and falling edge timing of one of the two phases of the PWM signal are delayed by a predetermined time ΔT.

[0039] For example, as shown in Figure 3, when the duty cycle of two-phase PWM signals with matching off-timing is close to 100% (or close to 0%), if the phase of the W-phase PWM signal PW is delayed by a predetermined time ΔT based on comparison techniques, the falling edge timing of the W-phase PWM signal PW may exceed the PWM period Tp, potentially preventing sufficient timing adjustment. Therefore, in this case, the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value cannot be used, complicating the program.

[0040] In contrast, the basic concept of the present invention, as shown in Chart A of Figure 4, first, shifts the off-timing of all three phase PWM signals, not just the two phase PWM signals with matching off-timing, forward to create a margin for timing adjustment. Then, as shown in Chart B of Figure 4, the off-timing of, for example, the W-phase PWM signal PW among the two phase PWM signals with matching off-timing is shifted in the delay direction. This makes it possible to avoid simultaneous switching of the V-phase and W-phase. Furthermore, as shown in Chart C of Figure 4, in order to suppress the impact on motor control due to the shift in the W-phase switching timing, for example, if the off-timing of the W-phase PWM signal PW is delayed, the next on-timing of the W-phase PWM signal PW is also delayed by the same amount.

[0041] According to the basic concept of the present invention as described above, even when the duty cycle of two-phase PWM signals with matching off-timing (or on-timing) is close to 100% (or close to 0%), the timing of the PWM signal can be adjusted within the PWM period Tp. Therefore, while avoiding simultaneous switching of multiple phases, a PWM signal can be generated by the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value. The following describes in detail each embodiment based on the basic concept of the present invention.

[0042] For example, as shown in Figure 5, during the countdown period from time t1 to time t2, assume that the duty cycles of the V-phase PWM signal PV and the W-phase PWM signal PW are close to 100%, and that the rising edge timing of the V-phase PWM signal PV and the rising edge timing of the W-phase PWM signal PW coincide. In this case, as shown in Figure 6, if the phase of the W-phase PWM signal PW is delayed by a predetermined time ΔT based on the comparison technique, the falling edge timing of the W-phase PWM signal PW may exceed the PWM period Tp. Therefore, in this case, the PWM signal cannot be generated using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, and the program becomes complicated.

[0043] Figure 7 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when, during the countdown period from time t1 to time t2, the duty cycles of the V-phase PWM signal PV and the W-phase PWM signal PW are close to 100%, and the rising edge timing of the V-phase PWM signal PV and the rising edge timing of the W-phase PWM signal PW coincide. In this embodiment, if the type of timing of voltage fluctuations at the connection terminals of the first and second phases, which are predicted to coincide with each other, is a rising edge timing, and the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from the first threshold to 100%, the MCU 12 shifts the rising edge timing of the voltage fluctuations of the remaining connection terminals, determined by the updated value, by a delay of 3 hours, shifts the rising edge timing of the voltage fluctuations at the connection terminals of the first phase, determined by the updated value, by a delay of 1 hour, and shifts the falling edge timing of the voltage fluctuations at the connection terminals of the second phase, determined by the next update value or the previous update value of the three-phase duty command value, forward by 2 hours.

[0044] Specifically, as shown in Figure 7, during the countdown period from time t1 to time t2, the MCU12 delays, for example, the rising edge timing of the W-phase PWM signal PW by the first time ΔT, and also delays the rising edge timing of the U-phase PWM signal PU by the third time ΔT. This is essentially the same as delaying all phases by ΔT and then advancing only the V-phase turn-on timing by ΔT. Furthermore, to minimize the impact on motor control caused by essentially advancing the V-phase switching timing by ΔT, the MCU12 also shifts the falling edge timing of the V-phase PWM signal PV by the same amount (second time ΔT) in the forward direction during the count-up period from time t2 to time t3. Note that in this example in Figure 7, the case where the first time, second time, and third time are the same value (ΔT) is shown.

[0045] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two-phase PWM signals with matching on-timing is close to 100%. As a result, the PWM signal can be generated using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, while avoiding simultaneous switching of multiple phases. Note that the processing of the V phase and the W phase described above may be swapped.

[0046] The operation of the MCU12 in the example shown in Figure 7 will be explained in detail below. The MCU core 12a of the MCU12 performs a command value calculation process before the countdown start time t1, which is the update timing of the three-phase duty command value. Based on the three-phase duty command value calculated by the command value calculation process, it predicts whether the edge timings of two of the three-phase PWM signals will match. For example, if the V-phase duty command value DV and the W-phase duty command value DW are equal among the three-phase duty command values ​​calculated before the countdown start time t1, the MCU core 12a predicts that the rising edge timing of the V-phase PWM signal PV and the rising edge timing of the W-phase PWM signal PW will match during the countdown period from time t1 to time t2.

[0047] The MCU core 12a predicts that the rising edge timing of the V-phase PWM signal PV and the rising edge timing of the W-phase PWM signal PW coincide, and determines that the duty cycles of the V-phase and W-phase fall within the range from the first threshold to 100%, then performs a correction process by subtracting a value corresponding to the third time ΔT from the calculated value of the U-phase duty command value DU, and also performs a correction process by subtracting a value corresponding to the first time ΔT from the calculated value of the W-phase duty command value DW. The MCU core 12a outputs the V-phase duty command value DV calculated by the command value calculation process, and the corrected U-phase duty command value DU and W-phase duty command value DW to the PWM module 12b.

[0048] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the countdown start time t1 is temporarily stored in a buffer register. Then, when the countdown start time t1 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the countdown start time t1, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 7, during the countdown period from time t1 to time t2, the rising edge timing of the W-phase PWM signal PW is delayed by the first time ΔT, and the rising edge timing of the U-phase PWM signal PU is delayed by the third time ΔT.

[0049] The MCU core 12a executes the command value calculation process again before the count-up start time t2, which is the next update timing for the three-phase duty command value. Of the three-phase duty command values ​​calculated by this command value calculation process, the MCU core 12a selects the duty command that underwent correction processing during the previous command value calculation process. Compensation processing is performed on the values. For example, the MCU core 12a performs compensation processing by adding a value corresponding to the second time ΔT to the calculated value of the V-phase duty command value DV among the three-phase duty command values ​​calculated by the command value calculation process. The MCU core 12a outputs the U-phase duty command value DU and W-phase duty command value DW calculated by the command value calculation process, and the compensated V-phase duty command value DV, to the PWM module 12b.

[0050] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the count-up start time t2 is temporarily stored in a buffer register. Then, when the count-up start time t2 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the count-up start time t2, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 7, the falling edge timing of the V-phase PWM signal PV among the three-phase PWM signals generated by the PWM module 12b during the count-up period from time t2 to time t3 is advanced by the second time ΔT.

[0051] Figure 8 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when, during the countdown period from time t1 to time t2, the duty cycles of the V-phase PWM signal PV and the W-phase PWM signal PW are close to 100%, and the falling edge timing of the V-phase PWM signal PV and the falling edge timing of the W-phase PWM signal PW coincide. In this embodiment, if the type of timing for the voltage fluctuations at the connection terminals of the first and second phases, which are predicted to coincide with each other, is a falling edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from the first threshold to 100%, the MCU 12 shifts the falling edge timing of the voltage fluctuations at the remaining connection terminals, determined by the updated value, forward by 3 hours, shifts the falling edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the updated value, forward by 1 hour, and shifts the rising edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the next update value or the previous update value of the three-phase duty command value, backward by 2 hours.

[0052] Specifically, as shown in Figure 8, during the count-up period from time t2 to time t3, the MCU12 shifts, for example, the falling edge timing of the W-phase PWM signal PW forward by the first time ΔT, and also shifts the falling edge timing of the U-phase PWM signal PU forward by the third time ΔT. This is essentially the same as advancing all phases by ΔT and then delaying only the V-phase turn-off timing by ΔT. Furthermore, in order to minimize the impact on motor control caused by effectively delaying the V-phase switching timing by ΔT, the MCU12 shifts the rising edge timing of the V-phase PWM signal PV backward by the same amount (second time ΔT) during the count-down period from time t3 to time t4.

[0053] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two-phase PWM signals with matching off-timing is close to 100%. As a result, the PWM signal can be generated using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, while avoiding simultaneous switching of multiple phases. Note that the processing of the V phase and the W phase described above may be swapped.

[0054] The operation of the MCU12 in the example shown in Figure 8 will be explained in detail below. The MCU core 12a of the MCU12 performs a command value calculation process before the count-up start time t2, which is the update timing of the three-phase duty command value. Based on the three-phase duty command value calculated by the command value calculation process, it predicts whether the edge timings of two of the three-phase PWM signals will match. For example, if the V-phase duty command value DV and the W-phase duty command value DW are equal among the three-phase duty command values ​​calculated before the count-up start time t2, the MCU core 12a predicts that the falling edge timing of the V-phase PWM signal PV and the falling edge timing of the W-phase PWM signal PW will match during the count-up period from time t2 to time t3.

[0055] The MCU core 12a predicts that the falling edge timing of the V-phase PWM signal PV and the falling edge timing of the W-phase PWM signal PW coincide, and determines that the duty cycles of the V-phase and W-phase are within the range from the first threshold to 100%, then performs a correction process by subtracting a value corresponding to the third time ΔT from the calculated value of the U-phase duty command value DU, and also performs a correction process by subtracting a value corresponding to the first time ΔT from the calculated value of the W-phase duty command value DW. The MCU core 12a outputs the V-phase duty command value DV calculated by the command value calculation process, and the corrected U-phase duty command value DU and W-phase duty command value DW to the PWM module 12b.

[0056] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the count-up start time t2 is temporarily stored in a buffer register. Then, when the count-up start time t2 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the count-up start time t2, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 8, among the three-phase PWM signals generated by the PWM module 12b during the count-up period from time t2 to time t3, the falling edge timing of the W-phase PWM signal PW is advanced by the first time ΔT, and the falling edge timing of the U-phase PWM signal PU is advanced by the third time ΔT.

[0057] The MCU core 12a executes the command value calculation process again before the countdown start time t3, which is the next update timing for the three-phase duty command values. The MCU core 12a performs compensation processing on the duty command values ​​among the three-phase duty command values ​​calculated by the current command value calculation process that were corrected during the previous command value calculation process. For example, the MCU core 12a performs compensation processing by subtracting a value corresponding to the second time ΔT from the calculated value of the V-phase duty command value DV among the three-phase duty command values ​​calculated by the current command value calculation process. The MCU core 12a outputs the U-phase duty command value DU and W-phase duty command value DW calculated by the current command value calculation process, and the compensated V-phase duty command value DV, to the PWM module 12b.

[0058] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the countdown start time t3 is temporarily stored in a buffer register. Then, when the countdown start time t3 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the countdown start time t3, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 8, the rising edge timing of the V-phase PWM signal PV among the three-phase PWM signals generated by the PWM module 12b during the countdown period from time t3 to time t4 is delayed by the second time ΔT.

[0059] Next, as shown in Figure 9, consider the case where, during the countdown period from time t1 to time t2, the duty cycles of the U-phase PWM signal and the V-phase PWM signal are close to 0%, and the rising edge timing of the U-phase PWM signal and the rising edge timing of the V-phase PWM signal coincide. In this case, as shown in Figure 10, if, for example, the phase of the V-phase PWM signal PV is delayed by a predetermined time ΔT based on the comparison technique, the rising edge timing of the V-phase PWM signal PV may extend beyond the trough of the triangular wave TW. Therefore, in this case, the usual method of generating a PWM signal by comparing the triangular wave TW with the three-phase duty cycle command value cannot generate the PWM signal, and the program becomes complicated.

[0060] Although not shown in the diagram, conversely, if the phase of the V-phase PWM signal PW is advanced by a predetermined time ΔT, the falling edge timing of the V-phase PWM signal PV may exceed the trough of the triangular wave TW. Therefore, even in this case, the usual method of generating a PWM signal by comparing the triangular wave TW with the three-phase duty cycle command value cannot generate the PWM signal, and the program becomes more complex.

[0061] Figure 11 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycles of the U-phase PWM signal and the V-phase PWM signal are close to 0%, and the rising edge timing of the U-phase PWM signal and the rising edge timing of the V-phase PWM signal coincide. In this embodiment, if the type of timing of the voltage fluctuations at the connection terminals of the first and second phases, which are predicted to coincide with each other, is a rising edge timing, and the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from the second threshold to 0%, the MCU 12 shifts the rising edge timing of the voltage fluctuations of the remaining connection terminals, determined by the updated value, forward by 3 hours, shifts the rising edge timing of the voltage fluctuations at the connection terminal of the first phase, determined by the updated value, forward by 1 hour, and shifts the falling edge timing of the voltage fluctuations at the connection terminal of the second phase, determined by the next update value or the previous update value of the three-phase duty command value, backward by 2 hours.

[0062] Specifically, as shown in Figure 11, during the countdown period from time t1 to time t2, the MCU12 shifts, for example, the rising edge timing of the U-phase PWM signal PU forward by the first time ΔT, and also shifts the rising edge timing of the W-phase PWM signal PW forward by the third time ΔT. This is essentially the same as advancing all phases by ΔT and then delaying only the V-phase turn-on timing by ΔT. Furthermore, in order to minimize the impact on motor control caused by effectively delaying the V-phase switching timing by ΔT, the MCU12 shifts the falling edge timing of the V-phase PWM signal PV in the delay direction by the same amount (second time ΔT) during the count-up period from time t2 to time t3.

[0063] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two PWM signals with matching on-timing is close to 0%. As a result, the PWM signal can be generated using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, while avoiding simultaneous switching of multiple phases. Note that the processing of the U phase and the V phase described above may be swapped.

[0064] The operation of the MCU12 in the example shown in Figure 11 will be explained in detail below. The MCU core 12a of the MCU12 performs a command value calculation process before the countdown start time t1, which is the update timing of the three-phase duty command value. Based on the three-phase duty command value calculated by the command value calculation process, it predicts whether the edge timings of two of the three-phase PWM signals will match. For example, if the U-phase duty command value DU and the V-phase duty command value DV are equal among the three-phase duty command values ​​calculated before the countdown start time t1, the MCU core 12a predicts that the rising edge timing of the U-phase PWM signal PU and the rising edge timing of the V-phase PWM signal PV will match during the countdown period from time t1 to time t2.

[0065] MCU core 12a predicts that the rising edge timing of the U-phase PWM signal PU will coincide with the rising edge timing of the V-phase PWM signal PV. Furthermore, if it is determined that the duty cycles of the U-phase and V-phase fall within the range from the second threshold to 0%, a correction process is performed to add a value corresponding to the third time ΔT to the calculated value of the W-phase duty command value DW, and a correction process is performed to add a value corresponding to the first time ΔT to the calculated value of the U-phase duty command value DU. The MCU core 12a outputs the V-phase duty command value DV calculated by the command value calculation process, and the corrected U-phase duty command value DU and W-phase duty command value DW to the PWM module 12b.

[0066] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the countdown start time t1 is temporarily stored in a buffer register. Then, when the countdown start time t1 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the countdown start time t1, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 11, among the three-phase PWM signals generated by the PWM module 12b during the countdown period from time t1 to time t2, the rising edge timing of the U-phase PWM signal PW is advanced by the first time ΔT, and the rising edge timing of the W-phase PWM signal PW is advanced by the third time ΔT.

[0067] The MCU core 12a executes the command value calculation process again before the count-up start time t2, which is the next update timing for the three-phase duty command value. The MCU core 12a performs compensation processing on the duty command values ​​among the three-phase duty command values ​​calculated by the current command value calculation process that were corrected during the previous command value calculation process. For example, the MCU core 12a performs compensation processing by adding a value corresponding to the second time ΔT to the calculated value of the V-phase duty command value DV among the three-phase duty command values ​​calculated by the current command value calculation process. The MCU core 12a outputs the U-phase duty command value DU and W-phase duty command value DW calculated by the current command value calculation process, and the compensated V-phase duty command value DV, to the PWM module 12b.

[0068] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the count-up start time t2 is temporarily stored in a buffer register. Then, when the count-up start time t2 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the count-up start time t2, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 11, the falling edge timing of the V-phase PWM signal PV among the three-phase PWM signals generated by the PWM module 12b during the count-up period from time t2 to time t3 is delayed by the second time ΔT.

[0069] Figure 12 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycles of the U-phase PWM signal and the V-phase PWM signal are close to 0%, and the falling edge timing of the U-phase PWM signal and the falling edge timing of the V-phase PWM signal coincide. In this embodiment, if the type of timing of the voltage fluctuations at the connection terminals of the first and second phases, which are predicted to coincide with each other, is a falling edge timing, the MCU 12 shifts the falling edge timing of the voltage fluctuations of the remaining connection terminals determined by the updated value by a third time delay, shifts the falling edge timing of the voltage fluctuations at the connection terminals of the first phase, determined by the updated value, by a first time delay, and shifts the rising edge timing of the voltage fluctuations at the connection terminals of the second phase, determined by the next or previous update value of the three-phase duty command value, forward by a second time.

[0070] Specifically, as shown in Figure 12, during the count-up period from time t2 to time t3, the MCU12 shifts the falling edge timing of the U-phase PWM signal PU to a delay of 1 time ΔT, and also shifts the falling edge timing of the W-phase PWM signal PW to a delay of 3 time ΔT. This is essentially the same as delaying all phases by ΔT and then advancing only the V-phase turn-off timing by ΔT. Furthermore, in order to minimize the impact on motor control caused by essentially advancing the V-phase switching timing by ΔT, the MCU12 shifts the rising edge timing of the V-phase PWM signal PV to an advance by the same amount (2nd time ΔT) during the count-down period from time t3 to time t4.

[0071] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two-phase PWM signals with matching off-timing is close to 0%. As a result, the PWM signal can be generated using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, while avoiding simultaneous switching of multiple phases. Note that the processing of the U-phase and V-phase described above may be swapped.

[0072] The operation of the MCU12 in the example shown in Figure 12 will be explained in detail below. The MCU core 12a of the MCU12 performs a command value calculation process before the count-up start time t2, which is the update timing of the three-phase duty command value. Based on the three-phase duty command value calculated by the command value calculation process, it predicts whether the edge timings of two of the three-phase PWM signals will match. For example, if the U-phase duty command value DU and the V-phase duty command value DV are equal among the three-phase duty command values ​​calculated before the count-up start time t2, the MCU core 12a predicts that the falling edge timing of the U-phase PWM signal PU and the falling edge timing of the V-phase PWM signal PV will match during the count-up period from time t2 to time t3.

[0073] The MCU core 12a predicts that the falling edge timing of the U-phase PWM signal PU and the falling edge timing of the V-phase PWM signal PV coincide, and determines that the duty cycles of the U-phase and V-phase fall within the range from the second threshold to 0%, then performs a correction process by adding a value corresponding to the third time ΔT to the calculated value of the W-phase duty command value DW, and also performs a correction process by adding a value corresponding to the first time ΔT to the calculated value of the U-phase duty command value DU. The MCU core 12a outputs the V-phase duty command value DV calculated by the command value calculation process, and the corrected U-phase duty command value DU and W-phase duty command value DW to the PWM module 12b.

[0074] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the count-up start time t2 is temporarily stored in a buffer register. Then, when the count-up start time t2 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the count-up start time t2, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 12, among the three-phase PWM signals generated by the PWM module 12b during the count-up period from time t2 to time t3, the falling edge timing of the U-phase PWM signal PW is delayed by the first time ΔT, and the falling edge timing of the W-phase PWM signal PW is delayed by the third time ΔT.

[0075] The MCU core 12a executes the command value calculation process again before the countdown start time t3, which is the next update timing for the three-phase duty command values. The MCU core 12a performs compensation processing on the duty command values ​​among the three-phase duty command values ​​calculated by the current command value calculation process that were corrected during the previous command value calculation process. For example, the MCU core 12a performs compensation processing by adding a value corresponding to the second time ΔT to the calculated value of the V-phase duty command value DV among the three-phase duty command values ​​calculated by the current command value calculation process. The MCU core 12a outputs the U-phase duty command value DU and W-phase duty command value DW calculated by the current command value calculation process, and the compensated V-phase duty command value DV, to the PWM module 12b.

[0076] As described above, the three-phase duty cycle command value input from the MCU core 12a to the PWM module 12b before the countdown start time t3 is temporarily stored in a buffer register. Then, when the countdown start time t3 arrives, the three-phase duty cycle command value stored in the buffer register is transferred to the update register. In this way, at the countdown start time t3, the contents of the update register are updated with the new three-phase duty cycle command value. As a result, as shown in Figure 12, the rising edge timing of the V-phase PWM signal PV among the three-phase PWM signals generated by the PWM module 12b during the count-up period from time t3 to time t4 is advanced by the second time ΔT.

[0077] In the above embodiment, an example was given of generating a PWM signal in an asymmetric center alignment mode where the three-phase duty cycle command value is updated on both the peaks and troughs of the triangular wave TW. However, when generating a PWM signal in a normal center alignment mode where the three-phase duty cycle command value is updated on only one of the peaks or troughs of the triangular wave TW, duty cycle compensation for the timing shift during the current update can be performed during the next update.

[0078] Figure 13 is a timing chart showing an example of a three-phase PWM signal generated by a normal center alignment mode when the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%, and the rising edge timings of the V-phase PWM signal and the W-phase PWM signal coincide. Figure 13 illustrates the case where the three-phase duty cycle command values ​​are updated at the peaks of the triangular wave TW, i.e., at times t1, t3, and t5. In this case, as shown in Figure 13, the duty cycles of the U-phase and W-phase are shortened by 2ΔT during the period from time t1 to time t3. This is equivalent to extending the duty cycle of the V-phase by 2ΔT during the period from time t1 to time t3. Therefore, in this case, the duty cycle of the V-phase is shortened by 2ΔT during the period from time t3 to time t5.

[0079] Figure 14 is a timing chart showing an example of a three-phase PWM signal generated by a normal center alignment mode when the duty cycles of the U-phase PWM signal and the V-phase PWM signal are close to 0%, and the rising edge timings of the U-phase PWM signal and the V-phase PWM signal coincide. Figure 14 illustrates the case where the three-phase duty cycle command values ​​are updated at the peaks of the triangular wave TW, i.e., at times t1, t3, and t5. In this case, as shown in Figure 14, the duty cycles of the U-phase and W-phase are extended by 2ΔT during the period from time t1 to time t3. This is equivalent to shortening the duty cycle of the V-phase by 2ΔT during the period from time t1 to time t3. Therefore, in this case, the duty cycle of the V-phase is extended by 2ΔT during the period from time t3 to time t5.

[0080] Next, as shown in Figure 15, we consider the case where the duty cycle of the U-phase PWM signal is close to 0%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%, and the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide. Even in this case, if we try to avoid simultaneous switching of multiple phases based on comparison techniques, the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value will not be able to generate a PWM signal, and the program will become complicated.

[0081] Figure 16 shows the state where the duty cycle of the U-phase PWM signal is close to 0%, and the duty cycles of the V-phase PWM signal and W-phase PWM signal are close to 100%. This timing chart shows an example of a three-phase PWM signal generated by this embodiment when the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide.

[0082] In this embodiment, the MCU12, when the type of voltage fluctuation at the terminals of the first and second phases predicted to coincide with each other is a rising edge timing, the duty cycles of the voltage fluctuations at the terminals of the first and second phases fall within the range from a first threshold to 100%, and the duty cycle of at least one of the remaining terminals falls within the range from a second threshold to 0%, shifts the rising edge timing of the voltage fluctuation at the terminal of the first phase determined by the updated value by a delay of 1 hour, shifts the rising edge timing of the voltage fluctuation at the terminal of the second phase determined by the updated value forward by 4 hours, and shifts the rising edge timing of the voltage fluctuations at the remaining terminals determined by the updated value by a delay of 3 hours. Furthermore, the MCU12 shifts the falling edge timing of the voltage fluctuation at the second phase connection terminal, determined by the next or previous update value of the three-phase duty cycle command value, forward by 2 hours; shifts the falling edge timing of the voltage fluctuation at the first phase connection terminal, determined by the next or previous update value, backward by 5 hours; and shifts the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next or previous update value, forward by 6 hours.

[0083] Specifically, as shown in Figure 16, during the countdown period from time t1 to time t2, the MCU12 shifts the rising edge timing of the W-phase PWM signal PW to a delay of 1 time (3ΔT / 4), the rising edge timing of the V-phase PWM signal PV to a forward position of 4 time (ΔT / 4), and the rising edge timing of the U-phase PWM signal PU to a delay of 3 time (ΔT / 4). Furthermore, during the count-up period from time t2 to time t3, the MCU12 shifts the falling edge timing of the V-phase PWM signal PV to a forward position of 2 time (3ΔT / 4), the falling edge timing of the W-phase PWM signal PW to a delay of 5 time (ΔT / 4), and the falling edge timing of the U-phase PWM signal PU to a forward position of 6 time (ΔT / 4).

[0084] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two PWM signals with matching on-timing is close to 100%. This avoids simultaneous switching of multiple phases, while enabling the generation of a PWM signal using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, and also suppresses the amount of edge shift near the peaks and troughs of the triangular wave TW. In the example shown in Figure 16, the on-time of all phases is uniformly shortened by ΔT / 2. The processing of the V phase and the W phase described above may be swapped.

[0085] Next, as shown in Figure 17, we consider the case where the duty cycle of the U-phase PWM signal is close to 0%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide. Even in this case, if we try to avoid simultaneous switching of multiple phases based on comparison techniques, the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value will not be able to generate a PWM signal, and the program will become complicated.

[0086] Figure 18 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 0%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 100%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide.

[0087] In this embodiment, the MCU12 shifts the falling edge timing of the voltage fluctuation of the first phase terminal determined by the updated value forward by 1 hour, shifts the falling edge timing of the voltage fluctuation of the second phase terminal determined by the updated value backward by 4 hours, and shifts the falling edge timing of the voltage fluctuation of the remaining terminal determined by the updated value forward by 3 hours. This is done when the type of voltage fluctuation of the first phase and second phase terminals predicted to coincide with each other is a falling edge timing, the duty cycle of the voltage fluctuation of the first phase and second phase terminals falls within the range from a first threshold to 100%, and the duty cycle of at least one of the remaining terminals falls within the range from a second threshold to 0%. Furthermore, the MCU12 shifts the rising edge timing of the voltage fluctuation at the second phase connection terminal, determined by the next or previous update value of the three-phase duty cycle command, by 2 hours in the delay direction, shifts the rising edge timing of the voltage fluctuation at the first phase connection terminal, determined by the next or previous update value, by 5 hours in the advance direction, and shifts the rising edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next or previous update value, by 6 hours in the delay direction.

[0088] Specifically, as shown in Figure 18, during the count-up period from time t2 to time t3, the MCU12 shifts, for example, the falling edge timing of the W-phase PWM signal PW forward by 1 time (3ΔT / 4), the falling edge timing of the V-phase PWM signal PV backward by 4 time (ΔT / 4), and the falling edge timing of the U-phase PWM signal PU forward by 3 time (ΔT / 4). Furthermore, during the count-down period from time t3 to time t4, the MCU12 shifts the rising edge timing of the V-phase PWM signal PV backward by 2 time (3ΔT / 4), the rising edge timing of the W-phase PWM signal PW forward by 5 time (ΔT / 4), and the rising edge timing of the U-phase PWM signal PU backward by 6 time (ΔT / 4).

[0089] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two-phase PWM signals with matching off-timing is close to 100%. This avoids simultaneous switching of multiple phases, while enabling the generation of a PWM signal using the usual method of comparing a triangular wave TW with a three-phase duty cycle command value, and suppresses the amount of edge shift near the peaks and troughs of the triangular wave TW. In the example shown in Figure 18, the on-time of all phases is uniformly shortened by ΔT / 2. The processing of the V phase and the W phase described above may be swapped.

[0090] Next, as shown in Figure 19, we consider the case where the duty cycle of the U-phase PWM signal is close to 100%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide. Even in this case, if we try to avoid simultaneous switching of multiple phases based on comparison techniques, the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value will not be able to generate a PWM signal, and the program will become complicated.

[0091] Figure 20 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 100%, the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the rising edge timing of the V-phase PWM signal and the rising edge timing of the W-phase PWM signal coincide.

[0092] In this embodiment, the MCU12 shifts the rise edge timing of the voltage fluctuation of the first phase and second phase connection terminals, determined by the updated value, forward by 1 hour, shifts the rise edge timing of the voltage fluctuation of the second phase connection terminal, determined by the updated value, backward by 4 hours, and shifts the rise edge timing of the voltage fluctuation of the remaining connection terminals, determined by the updated value, forward by 3 hours. Furthermore, the MCU12 shifts the falling edge timing of the voltage fluctuation at the second phase connection terminal, determined by the next or previous update value of the three-phase duty cycle command, by 2 hours in the delay direction, shifts the falling edge timing of the voltage fluctuation at the first phase connection terminal, determined by the next or previous update value, by 5 hours in the advance direction, and shifts the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next or previous update value, by 6 hours in the delay direction.

[0093] Specifically, as shown in Figure 20, during the countdown period from time t1 to time t2, the MCU12 shifts, for example, the rising edge timing of the W-phase PWM signal PW forward by 1 time (3ΔT / 4), the rising edge timing of the V-phase PWM signal PV backward by 4 time (ΔT / 4), and the rising edge timing of the U-phase PWM signal PU forward by 3 time (ΔT / 4). Furthermore, during the count-up period from time t2 to time t3, the MCU12 shifts the falling edge timing of the V-phase PWM signal PV backward by 2 time (3ΔT / 4), the falling edge timing of the W-phase PWM signal PW forward by 5 time (ΔT / 4), and the falling edge timing of the U-phase PWM signal PU backward by 6 time (ΔT / 4).

[0094] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two PWM signals with matching on-timing is close to 0%. This avoids simultaneous switching of multiple phases, while enabling the generation of a PWM signal using the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value, and also suppresses the amount of edge shift near the peaks and troughs of the triangular wave TW. In the example shown in Figure 20, the on-time of all phases is uniformly increased by ΔT / 2. The processing of the V phase and the W phase described above may be swapped.

[0095] Next, as shown in Figure 21, we consider the case where the duty cycle of the U-phase PWM signal is close to 100%, and the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide. Even in this case, if we try to avoid simultaneous switching of multiple phases based on comparison techniques, the usual method of generating a PWM signal by comparing a triangular wave TW with a three-phase duty cycle command value will not be able to generate a PWM signal, and the program will become complicated.

[0096] Figure 22 is a timing chart showing an example of a three-phase PWM signal generated by this embodiment when the duty cycle of the U-phase PWM signal is close to 100%, the duty cycles of the V-phase PWM signal and the W-phase PWM signal are close to 0%, and the falling edge timing of the V-phase PWM signal and the falling edge timing of the W-phase PWM signal coincide.

[0097] In this embodiment, the MCU12 is determined to have a type of voltage fluctuation at the connection terminals of the first and second phases that are predicted to coincide with each other that is a falling edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from the second threshold to 0%, and the remaining connection terminals are less If the duty cycle of any one voltage fluctuation falls within the range from the first threshold to 100%, the falling edge timing of the voltage fluctuation at the first phase connection terminal, determined by the updated value, is shifted to a delay of 1 hour, the falling edge timing of the voltage fluctuation at the second phase connection terminal, determined by the updated value, is shifted to a forward position of 4 hours, and the falling edge timing of the remaining connection terminals, determined by the updated value, is shifted to a delay of 3 hours. Furthermore, the MCU12 shifts the rising edge timing of the voltage fluctuation at the second phase connection terminal, determined by the next or previous update of the three-phase duty command value, to a forward position of 2 hours, the rising edge timing of the voltage fluctuation at the first phase connection terminal, determined by the next or previous update, is shifted to a delay of 5 hours, and the rising edge timing of the remaining connection terminals, determined by the next or previous update, is shifted to a forward position of 6 hours.

[0098] Specifically, as shown in Figure 22, during the count-up period from time t2 to time t3, the MCU12 shifts, for example, the falling edge timing of the W-phase PWM signal PW to a delay of 1 time (3ΔT / 4), the falling edge timing of the V-phase PWM signal PV to a forward position of 4 time (ΔT / 4), and the falling edge timing of the U-phase PWM signal PU to a delay of 3 time (ΔT / 4). Furthermore, during the count-down period from time t3 to time t4, the MCU12 shifts the rising edge timing of the V-phase PWM signal PV to a forward position of 2 time (3ΔT / 4), the rising edge timing of the W-phase PWM signal PW to a delay of 5 time (ΔT / 4), and the rising edge timing of the U-phase PWM signal PU to a forward position of 6 time (ΔT / 4).

[0099] This allows for timing adjustment of the PWM signal within the PWM period Tp, even when the duty cycle of two-phase PWM signals with matching off-timing is close to 0%. This avoids simultaneous switching of multiple phases, while enabling the generation of a PWM signal using the usual method of comparing a triangular wave TW with a three-phase duty cycle command value, and suppresses the amount of edge shift near the peaks and troughs of the triangular wave TW. In the example shown in Figure 22, the on-time of all phases is uniformly increased by ΔT / 2. The processing of the V phase and the W phase described above may be swapped.

[0100] In the above explanation, a three-phase PWM signal without considering dead time was used, but a dead time is provided in the gate control signals supplied to each arm switch of the power conversion circuit 11. Figure 23 is a timing chart showing an example of the waveforms of the U-phase upper gate control signal G1, U-phase lower gate control signal G2, U-phase terminal voltage Vu, V-phase upper gate control signal G3, V-phase lower gate control signal G4, V-phase terminal voltage Vv, W-phase upper gate control signal G5, W-phase lower gate control signal G6, and W-phase terminal voltage Vw when the direction of the V-phase and W-phase currents is both from the power conversion circuit 11 to the three-phase motor 20. In Figure 23, the U-phase terminal voltage Vu is the voltage at the U-phase connection terminal 13u, the V-phase terminal voltage Vv is the voltage at the V-phase connection terminal 13v, and the W-phase terminal voltage Vw is the voltage at the W-phase connection terminal 13w. Furthermore, in Figure 23, Vp is the positive electrode potential of the DC power supply 30, and Vn is the negative electrode potential of the DC power supply 30. For the sake of simplicity, the voltage drop when the IGBT and diode conduct is ignored in Figure 23.

[0101] As shown in Figure 23, a dead time TD is inserted between the U-phase upper gate control signal G1 and the U-phase lower gate control signal G2. Although not shown in the figure, similar dead time TD is also inserted between the V-phase upper gate control signal G3 and the V-phase lower gate control signal G4, and between the W-phase upper gate control signal G5 and the W-phase lower gate control signal G6. When the direction of the V-phase and W-phase currents is both from the power conversion circuit 11 to the three-phase motor 20, the V-phase terminal voltage Vv fluctuates in synchronization with the V-phase upper gate control signal G3, and the W-phase terminal voltage Vw fluctuates in synchronization with the W-phase upper gate control signal G5.

[0102] As shown in Figure 23, for example, let's assume that the V-phase upper gate control signal G3 and the W-phase upper gate control signal G5 coincide at off-timing. In this case, the V-phase terminal voltage Vv and the W-phase terminal voltage Vw simultaneously change from the positive potential Vp to the negative potential Vn of the DC power supply 30. As a result, the potential fluctuation at the neutral point N of the three-phase motor 20 becomes larger compared to the case where only one phase fluctuates, and consequently the shaft voltage of the three-phase motor 20 also fluctuates significantly, causing noise. To avoid this, in this embodiment, when the off timings of the V-phase upper gate control signal G3 and the W-phase upper gate control signal G5 are closer than a predetermined time ΔT, that is, when there is a risk that the phase voltage fluctuation timings will coincide due to a delay in the gate driver, the off timing of the W-phase upper gate control signal G5, determined by the updated value of the W-phase duty command value DW, is shifted forward by 1 time ΔT, and the off timing of the U-phase upper gate control signal G1, determined by the updated value of the U-phase duty command value DU, is shifted forward by 3 time ΔT. Accordingly, the W-phase lower gate control signal G6 is also shifted forward by 1 time ΔT in the direction of the on timing corresponding to the W-phase upper gate control signal G5 so as to maintain the dead time TD, and the U-phase lower gate control signal G2 is also shifted forward by 3 time ΔT in the direction of the on timing corresponding to the U-phase upper gate control signal G1 so as to maintain the dead time TD. As a result, the waveform of the W-phase terminal voltage Vw is shifted forward by the first time ΔT, and the waveform of the U-phase terminal voltage Vu is also shifted forward by the third time ΔT.

[0103] Furthermore, in this embodiment, the on-timing of the V-phase upper gate control signal G3, which is determined by the next update value of the V-phase duty cycle command value DV, is shifted in the delay direction by a second time ΔT. Accordingly, the off-timing of the V-phase lower gate control signal G4, which corresponds to the V-phase upper gate control signal G3, is also shifted in the delay direction by a second time ΔT in order to maintain the dead time TD. As a result, the waveform of the V-phase terminal voltage Vv is also shifted in the delay direction by a second time ΔT. By performing the above operations, it is possible to prevent the two phase voltages from fluctuating simultaneously in the same direction, and as a result, it is possible to suppress large instantaneous fluctuations in the shaft voltage of the three-phase motor 20.

[0104] As described above, when the direction of the V-phase and W-phase currents is both from the power conversion circuit 11 to the three-phase motor 20, the V-phase terminal voltage Vv fluctuates in synchronization with the V-phase upper gate control signal G3, and the W-phase terminal voltage Vw fluctuates in synchronization with the W-phase upper gate control signal G5. On the other hand, although not shown in the diagram, when the direction of the V-phase and W-phase currents is both from the three-phase motor 20 to the power conversion circuit 11, the V-phase terminal voltage Vv fluctuates in synchronization with the V-phase lower gate control signal G4, and the W-phase terminal voltage Vw fluctuates in synchronization with the W-phase lower gate control signal G6. In this embodiment, taking this into consideration, it is determined whether the voltage fluctuations of at least two of the three-phase connection terminals 13u, 13v, and 13w occurred in the same direction and at the same timing. Note that the lower gate control signal is merely a signal shifted by the dead time TD from the upper gate control signal, so when determining whether or not the switch timing matches, it is not necessary to consider the effect of the dead time TD when the direction of the current is the same. If the timing of the upper gate control signals matches, the timing of the lower gate control signal, which is shifted by a dead time TD relative to the upper gate control signal, will also match. In the example above, the U-phase gate control signal and the W-phase gate control signal were advanced at the timing of the match, but the V-phase gate control signal may be advanced instead of the W-phase gate control signal, in which case the next W-phase gate control signal will be shifted in the delay direction. Alternatively, at the timing of the match, the U-phase gate control signal and the W-phase gate control signal may be shifted in the delay direction instead of advanced, in which case the next V-phase gate control signal will be shifted in the advance direction.

[0105] Figure 24 is a timing chart showing an example of the waveforms of the U-phase upper gate control signal G1, U-phase lower gate control signal G2, U-phase terminal voltage Vu, V-phase upper gate control signal G3, V-phase lower gate control signal G4, V-phase terminal voltage Vv, W-phase upper gate control signal G5, W-phase lower gate control signal G6, and W-phase terminal voltage Vw, when the direction of the V-phase current is from the three-phase motor 20 to the power conversion circuit 11, and the direction of the W-phase current is also from the three-phase motor 20 to the power conversion circuit 11.

[0106] As shown in Figure 24, when the direction of the V-phase current is from the three-phase motor 20 to the power conversion circuit 11, and the direction of the W-phase current is also from the three-phase motor 20 to the power conversion circuit 11, the V-phase terminal voltage Vv fluctuates in synchronization with the V-phase lower gate control signal G4, and the W-phase terminal voltage Vw fluctuates in synchronization with the W-phase upper gate control signal G5.

[0107] As shown in Figure 24, for example, let's assume that the on-timing of the V-phase lower gate control signal G4 and the off-timing of the W-phase upper gate control signal G5 coincide. In this case, the V-phase terminal voltage Vv and the W-phase terminal voltage Vw simultaneously change from the positive potential Vp to the negative potential Vn of the DC power supply 30, causing the shaft voltage of the three-phase motor 20 to fluctuate significantly and become a source of noise. To avoid this, in this embodiment, when the on-timing of the V-phase lower gate control signal G4 and the off-timing of the W-phase upper gate control signal G5 are closer than a predetermined time ΔT, the off-timing of the W-phase upper gate control signal G5, determined by the updated W-phase duty command value DW, is shifted forward by 1 time ΔT, and the off-timing of the U-phase upper gate control signal G1, determined by the updated U-phase duty command value DU, is shifted forward by 3 time ΔT. Accordingly, the W-phase lower gate control signal G6 is also shifted forward by 1 time ΔT in the direction of the on timing corresponding to the W-phase upper gate control signal G5 in order to maintain the dead time TD, and the U-phase lower gate control signal G2 is also shifted forward by 3 time ΔT in the direction of the on timing corresponding to the U-phase upper gate control signal G1 in order to maintain the dead time TD. As a result, the waveform of the W-phase terminal voltage Vw is shifted forward by 1 time ΔT, and the waveform of the U-phase terminal voltage Vu is also shifted forward by 3 time ΔT.

[0108] Furthermore, in this embodiment, the on-timing of the V-phase upper gate control signal G3, which is determined by the next update value of the V-phase duty cycle command value DV, is shifted in the delay direction by a second time ΔT. Accordingly, the off-timing of the V-phase lower gate control signal G4, which corresponds to the V-phase upper gate control signal G3, is also shifted in the delay direction by a second time ΔT in order to maintain the dead time TD. As a result, the waveform of the V-phase terminal voltage Vv is also shifted in the delay direction by a second time ΔT. By performing the above operations, it is possible to prevent the two phase voltages from fluctuating simultaneously in the same direction, and as a result, it is possible to suppress large instantaneous fluctuations in the shaft voltage of the three-phase motor 20.

[0109] As described above, when the direction of the V-phase current is from the three-phase motor 20 to the power conversion circuit 11, and the direction of the W-phase current is also from the three-phase motor 20 to the power conversion circuit 11, the V-phase terminal voltage Vv fluctuates in sync with the V-phase lower gate control signal G4, and the W-phase terminal voltage Vw fluctuates in sync with the W-phase upper gate control signal G5. Therefore, in determining whether or not a switch timing match occurs, for the negative current phase (in this case, the V-phase), the timing that is shifted by the dead time TD relative to the upper gate control signal should be considered as the "voltage fluctuation timing of the connection terminals". Note that for the positive current phase (in this case, the W-phase), the connection terminal voltage fluctuates in sync with the upper gate control signal, while for the negative current phase, the timing that is shifted by the dead time TD relative to the upper gate control signal The terminal voltage rises at a timing equal to the dead time TD earlier than the turn-on timing, and falls at a timing equal to the dead time TD later than the turn-off timing of the upper gate control signal. This must be taken into consideration when determining whether the switching timings match. In the example above, the U-phase gate control signal and the W-phase gate control signal were advanced at the timing of the match, but the V-phase gate control signal may be advanced instead of the W-phase gate control signal, in which case the next W-phase gate control signal should be shifted in the delay direction. Alternatively, at the timing of the match, the U-phase gate control signal and the W-phase gate control signal may be shifted in the delay direction instead of advanced, in which case the next V-phase gate control signal should be shifted in the advance direction.

[0110] As described above, in this embodiment, when a dead time is provided, it is determined whether the voltage fluctuations of at least two of the three-phase connection terminals 13u, 13v, and 13w occurred in the same direction and at the same timing, taking into consideration (1) whether the terminal voltage fluctuations synchronize with the upper gate control signal or the lower gate control signal change depending on the direction of the current, and (2) whether the turn-on timing is delayed by the amount of the dead time due to the provision of a dead time.

[0111] As described above, according to one embodiment of the present disclosure, voltage fluctuations at at least two of the three-phase connection terminals 13u, 13v, and 13w are prevented from occurring in the same direction and at the same timing, thereby suppressing large instantaneous fluctuations in the shaft voltage of the three-phase motor 20. In other words, according to one embodiment of the present disclosure, it is possible to reduce noise caused by large instantaneous fluctuations in the shaft voltage. As a result, according to one embodiment of the present disclosure, electrolytic corrosion of the rotor bearing of the three-phase motor 20 can be suppressed.

[0112] The present invention is not limited to the embodiments described above, and the configurations described herein can be combined as appropriate within the bounds of mutual non-inconsistency. For example, in the above embodiment, a motor control device 10 for controlling a three-phase motor 20 was exemplified, but the motor to be controlled is not limited to a three-phase motor 20, but can be an n-phase motor (where n is an integer of 3 or more). Also, in the above embodiment, IGBTs were exemplified as each arm switch included in the power conversion circuit 11, but each arm switch may be a high-power switching element other than an IGBT, such as a MOS-FET. [Explanation of symbols]

[0113] 10…Motor control device, 11…Power conversion circuit, 12…MCU (control unit), 12a…MCU core, 12b…PWM module, 13u…U-phase connection terminal, 13v…V-phase connection terminal, 13w…W-phase connection terminal, 20…Three-phase motor, 30…DC power supply

Claims

1. A motor control device for controlling an n-phase motor (where n is an integer of 3 or more), A power conversion circuit connected to the aforementioned n-phase motor, which performs mutual conversion between DC power and n-phase AC power, The system includes a control unit that controls the power conversion circuit based on an n-phase duty cycle command value that is updated at a predetermined update cycle, The control unit, based on the currently updated value of the n-phase duty cycle command, predicts that voltage fluctuations at at least the first and second phase connection terminals among the n-phase connection terminals connected to the n-phase motor will occur in the same direction and at the same timing, and shifts the timing of the voltage fluctuation at the first phase connection terminal, determined by the currently updated value, by a first hour in the first direction, shifts the timing of the voltage fluctuation at the remaining connection terminals, determined by the currently updated value, by a third hour in the first direction, and shifts the timing of the voltage fluctuation at the second phase connection terminal, determined by the next update value or the previous update value of the n-phase duty cycle command, by a second hour in the opposite direction to the first direction, in a motor control device.

2. The control unit determines the first direction to either the lag direction or the advance direction based on the type of timing of voltage fluctuations at the connection terminals of the first and second phases that are predicted to coincide with each other, and the duty cycle of at least the voltage fluctuations at the connection terminals of the first and second phases. The motor control device according to claim 1, wherein the type of occurrence timing includes rising edge timing and falling edge timing.

3. The motor control device according to claim 2, wherein the control unit, when the type of timing of voltage fluctuations at the connection terminals of the first and second phases predicted to coincide is the rising edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from a first threshold to 100%, shifts the rising edge timing of the voltage fluctuations at the remaining connection terminals determined by the current update value by the third time in the delay direction, shifts the rising edge timing of the voltage fluctuations at the connection terminals of the first phase determined by the current update value by the first time in the delay direction, and shifts the falling edge timing of the voltage fluctuations at the connection terminals of the second phase determined by the next update value or the previous update value of the n-phase duty command value by the second time in the forward direction.

4. The motor control device according to claim 2 or 3, wherein the control unit, when the type of timing of voltage fluctuations at the connection terminals of the first and second phases predicted to coincide with each other is the rising edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from the second threshold to 0%, shifts the rising edge timing of the voltage fluctuations at the remaining connection terminals determined by the current update value forward by the third time, shifts the rising edge timing of the voltage fluctuations at the connection terminals of the first phase determined by the current update value forward by the first time, and shifts the falling edge timing of the voltage fluctuations at the connection terminals of the second phase determined by the next update value or the previous update value of the n-phase duty command value backward by the second time.

5. The motor control device according to any one of claims 2 to 4, wherein the control unit, when the type of timing of voltage fluctuations at the connection terminals of the first and second phases predicted to coincide is the falling edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from a first threshold to 100%, shifts the falling edge timing of the voltage fluctuations of the remaining connection terminals determined by the current update value forward by the third time, shifts the falling edge timing of the voltage fluctuations at the connection terminals of the first phase determined by the current update value forward by the first time, and shifts the rising edge timing of the voltage fluctuations at the connection terminals of the second phase determined by the next update value or the previous update value of the n-phase duty command value forward by the second time in the delay direction.

6. The motor control device according to any one of claims 2 to 5, wherein the control unit, when the type of timing of voltage fluctuations at the connection terminals of the first and second phases predicted to coincide is the falling edge timing, and the duty cycle of the voltage fluctuations at the connection terminals of the first and second phases falls within the range from the second threshold to 0%, shifts the falling edge timing of the voltage fluctuations at the remaining connection terminals determined by the current update value by the third time in the delay direction, shifts the falling edge timing of the voltage fluctuations at the connection terminals of the first phase determined by the current update value by the first time in the delay direction, and shifts the rising edge timing of the voltage fluctuations at the connection terminals of the second phase determined by the next update value or the previous update value of the n-phase duty command value by the second time in the forward direction.

7. The control unit, when the type of voltage fluctuation at the connection terminals of the first and second phases predicted to coincide with each other is the rising edge timing, the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from a first threshold to 100%, and the duty cycle of at least one of the remaining connection terminals is within the range from a second threshold to 0%, shifts the rising edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the updated value, in the delay direction by the first time, shifts the rising edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the updated value, in the forward direction by the fourth time, and shifts the rising edge timing of the voltage fluctuation at the remaining connection terminals, determined by the updated value, in the delay direction by the third time. A motor control device according to any one of claims 2 to 6, wherein the falling edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the next update value or the previous update value of the n-phase duty command value, is shifted by the second time in the forward direction, the falling edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the next update value or the previous update value, is shifted by the fifth time in the delay direction, and the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next update value or the previous update value, is shifted by the sixth time in the forward direction.

8. The control unit, when the type of voltage fluctuation at the connection terminals of the first and second phases predicted to coincide is the falling edge timing, the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from a first threshold to 100%, and the duty cycle of at least one of the remaining connection terminals is within the range from a second threshold to 0%, shifts the falling edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the updated value, forward by the first time, shifts the falling edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the updated value, backward by the fourth time, and shifts the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the updated value, forward by the third time. A motor control device according to any one of claims 2 to 7, wherein the rising edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the next update value or the previous update value of the n-phase duty command value, is shifted in the delay direction by the second time, the rising edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the next update value or the previous update value, is shifted in the advance direction by the fifth time, and the rising edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next update value or the previous update value, is shifted in the delay direction by the sixth time.

9. The control unit, when the type of voltage fluctuation at the connection terminals of the first and second phases predicted to coincide with each other is the rising edge timing, the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from the second threshold to 0%, and the duty cycle of at least one of the remaining connection terminals is within the range from the first threshold to 100%, shifts the rising edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the updated value, forward by the first time, shifts the rising edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the updated value, backward by the fourth time, and shifts the rising edge timing of the voltage fluctuation at the remaining connection terminals, determined by the updated value, forward by the third time. A motor control device according to any one of claims 2 to 8, wherein the falling edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the next update value or the previous update value of the n-phase duty command value, is shifted by the second time in the delay direction, the falling edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the next update value or the previous update value, is shifted by the fifth time in the advance direction, and the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next update value or the previous update value, is shifted by the sixth time in the delay direction.

10. The control unit, when the type of voltage fluctuation at the connection terminals of the first and second phases predicted to coincide is the falling edge timing, the duty cycles of the voltage fluctuations at the connection terminals of the first and second phases are within the range from the second threshold to 0%, and the duty cycle of at least one of the remaining connection terminals is within the range from the first threshold to 100%, shifts the falling edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the updated value, in the delay direction by the first time, shifts the falling edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the updated value, in the advance direction by the fourth time, and shifts the falling edge timing of the voltage fluctuation at the remaining connection terminals, determined by the updated value, in the delay direction by the third time. A motor control device according to any one of claims 2 to 9, wherein the rising edge timing of the voltage fluctuation at the connection terminal of the second phase, determined by the next update value or the previous update value of the n-phase duty command value, is shifted by the second time in the forward direction, the rising edge timing of the voltage fluctuation at the connection terminal of the first phase, determined by the next update value or the previous update value, is shifted by the fifth time in the delay direction, and the rising edge timing of the voltage fluctuation at the remaining connection terminals, determined by the next update value or the previous update value, is shifted by the sixth time in the forward direction.

Images