Semiconductor device
Patent Information
- Application Number
- JP2023520989
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-05-02
- Filing Date
- 2022-05-02
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2042-05-02
AI Technical Summary
Conventional semiconductor power modules are prone to malfunction due to surge voltages during switching operations, which can reduce their reliability.
A semiconductor device configuration that includes a MOSFET and an IGBT with the MOSFET's drain and IGBT's collector electrically connected, and the MOSFET's source and IGBT's emitter connected, where the MOSFET's breakdown voltage is higher than the IGBT's, allowing the IGBT to absorb surge voltages and prevent the MOSFET from entering avalanche mode.
This configuration effectively suppresses failures and reliability decreases by ensuring the IGBT enters avalanche mode before the MOSFET, thereby absorbing surge voltages and preventing damage to both components.
Abstract
Description
Semiconductor Devices
[0001] The present disclosure relates to semiconductor devices.
[0002] Conventionally, semiconductor devices including switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. For example, Patent Document 1 discloses a power module (semiconductor device) including a switching element of either a MOSFET or an IGBT. Such a power module is used, for example, in an inverter, and performs power conversion by the switching operation of the switching element.
[0003] Japanese Patent Application Laid-Open No. 2018-174252
[0004] In the power module, a surge voltage may occur during the switching operation of each switching element. If this surge voltage exceeds the rated voltage of the power module, the power module may fail, reducing its reliability. To prevent such a decrease in reliability, it is important not only to suppress the occurrence of surge voltage, but also to take measures to prevent the power module from failing even if a surge voltage occurs.
[0005] The present disclosure has been made in view of the above circumstances, and an object of the present disclosure is to provide a semiconductor device that can suppress the occurrence of failures even if a surge voltage occurs.
[0006] The semiconductor device of the present disclosure includes a first MOSFET and a first IGBT, the drain of the first MOSFET and the collector of the first IGBT are electrically connected, the source of the first MOSFET and the emitter of the first IGBT are electrically connected, and the element breakdown voltage of the first MOSFET is greater than the element breakdown voltage of the first IGBT.
[0007] According to the above configuration of the present disclosure, it is possible to suppress the occurrence of failures in the semiconductor device and to suppress a decrease in the reliability of the semiconductor device.
[0008] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment. FIG. 2 is a plan view showing the semiconductor device according to the first embodiment, with a sealing member indicated by an imaginary line. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2. FIG. 6 is a diagram showing an example of a circuit configuration of a semiconductor device according to the first embodiment. FIG. 7 is a perspective view showing a semiconductor device according to a second embodiment. FIG. 8 is a view showing the perspective view of FIG. 7, with a portion of the case (top plate) and a resin member omitted. FIG. 9 is a plan view showing a semiconductor device according to the second embodiment, with a portion of the case (top plate) and a resin member omitted. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 9. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 9. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 9. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 9. FIG. 14 is a perspective view showing a semiconductor device according to a third embodiment. FIG. 15 is a plan view showing the semiconductor device according to the third embodiment, with the sealing member indicated by imaginary lines. FIG. 16 is a view in which the main surface metal layer, multiple external terminals, multiple connection members, and resin member are omitted from the plan view of FIG. 15. FIG. 17 is a view in which the insulating substrate is omitted from the plan view of FIG. 16. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII of FIG. 15. FIG. 19 is a cross-sectional view taken along line XIX-XIX of FIG. 15. FIG. 20 is a perspective view showing a semiconductor device according to a fourth embodiment. FIG. 21 is a view in which the sealing member is omitted from the perspective view of FIG. 20. FIG. 22 is a plan view showing the semiconductor device according to the fourth embodiment, with the sealing member indicated by imaginary lines. FIG. 23 is a cross-sectional view taken along line XXIII-XXIII of FIG. 22. FIG. 24 is a cross-sectional view taken along line XXIV-XXIV of FIG. 22. 25 and 26 are plan views showing a semiconductor device according to a modified example, in which the sealing member is shown by imaginary lines.
[0009] Preferred embodiments of the semiconductor device of the present disclosure will be described below with reference to the drawings. Hereinafter, identical or similar components will be designated by the same reference numerals, and redundant explanations will be omitted. Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not intended to necessarily assign any order to their objects.
[0010] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on (an) object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on (an) object B" includes "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "when viewed from a certain direction, an object A overlaps an object B" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."
[0011] 1 to 6 show a semiconductor device A1 according to a first embodiment. The semiconductor device A1 includes two switching circuits 1 and 2, a support member 3, a plurality of external terminals, a plurality of connection members, and a sealing member 6. The plurality of external terminals includes a plurality of power terminals 41, 42, and 43, and a plurality of signal terminals 44A, 44B, 45A, 45B, and 49. The plurality of connection members includes a plurality of power connection members 511-513 and 521-523, and a plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B.
[0012] For ease of explanation, three mutually orthogonal directions are referred to as a first direction x, a second direction y, and a third direction z. The third direction z is the thickness direction of the semiconductor device A1. The first direction x is the left-right direction in the plan view of the semiconductor device A1 (see FIG. 2). The second direction y is the up-down direction in the plan view of the semiconductor device A1 (see FIG. 2).
[0013] The two switching circuits 1 and 2 fulfill the electrical functions of the semiconductor device A1. Each of the two switching circuits 1 and 2 is controlled by a drive circuit installed outside the semiconductor device A1, and switches between a conductive state and a cut-off state. The switching between the conductive state and the cut-off state is called a switching operation. The two switching circuits 1 and 2 convert, for example, an input power supply voltage (DC voltage) into an AC voltage through each switching operation. Note that the power supply voltage may be an AC voltage instead of a DC voltage, and the converted voltage may be a DC voltage instead of an AC voltage. The main current in the semiconductor device A1 is generated by the power supply voltage and the converted voltage.
[0014] The switching circuit 1 includes a MOSFET 11 as a first MOSFET, an IGBT 12 as a first IGBT, and a Schottky barrier diode (hereinafter referred to as "SBD") 13 as a first Schottky barrier diode. The MOSFET 11 includes, for example, a first semiconductor material. The IGBT 12 includes, for example, a second semiconductor material. The SBD 13 includes, for example, a third semiconductor material. The first, second, and third semiconductor materials are, for example, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), or gallium oxide (GaO). Preferably, the first and third semiconductor materials have wider bandgaps than the second semiconductor material. In the semiconductor device A1, for example, the MOSFET 11 and the SBD 13 each include SiC, and the IGBT 12 includes Si.
[0015] The MOSFET 11 has a main surface 11a and a back surface 11b. The main surface 11a and the back surface 11b are spaced apart in the thickness direction of the MOSFET 11. In the semiconductor device A1, the MOSFET 11 is arranged so that the thickness direction of the MOSFET 11 and the third direction z are the same direction (or approximately the same direction). The MOSFET 11 has a vertical structure, with the drain 111 arranged on the back surface 11b and the source 112 and gate 113 arranged on the main surface 11a. The switching operation of the MOSFET 11 is controlled by a first drive signal (e.g., a gate voltage) input to the gate 113. The MOSFET 11 has, for example, a rectangular shape when viewed in the third direction z (hereinafter also referred to as a "plan view").
[0016] The IGBT 12 has a main surface 12a and a back surface 12b. The main surface 12a and the back surface 12b are spaced apart in the thickness direction of the IGBT 12. In the semiconductor device A1, the IGBT 12 is arranged so that the thickness direction of the IGBT 12 coincides (or substantially coincides) with the third direction z. The IGBT 12 has a vertical structure, with the collector 121 arranged on the back surface 12b and the emitter 122 and gate 123 arranged on the main surface 12a. The switching operation of the IGBT 12 is controlled by a first drive signal (e.g., a gate voltage) input to the gate 123. The IGBT 12 has, for example, a rectangular shape in a plan view. In the semiconductor device A1, a common first drive signal is input to the MOSFET 11 and the IGBT 12.
[0017] The SBD 13 has a principal surface 13a and a rear surface 13b. The principal surface 13a and the rear surface 13b are spaced apart in the thickness direction of the SBD 13. In the semiconductor device A1, the SBD 13 is arranged so that the thickness direction of the SBD 13 coincides (or substantially coincides) with the third direction z. The SBD 13 has a cathode 132 arranged on the principal surface 13a and an anode 131 arranged on the rear surface 13b. The SBD 13 has, for example, a rectangular shape in a plan view.
[0018] In the switching circuit 1, the element withstand voltage (drain withstand voltage) of the MOSFET 11 is greater than the element withstand voltage (collector withstand voltage) of the IGBT 12. For example, in an example where the power supply voltage (DC voltage) is 400 V or more and 500 V or less, the element withstand voltage of the MOSFET 11 is 750 V, and the element withstand voltage of the IGBT 12 is 650 V. In the switching circuit 1, the planar area of the MOSFET 11 is smaller than the planar area of the IGBT 12, and the planar area of the SBD 13 is larger than the planar area of the MOSFET 11 and smaller than the planar area of the IGBT 12. The relationship between the planar areas of the MOSFET 11, the IGBT 12, and the SBD 13 is not limited to the example described above.
[0019] The switching circuit 1 has a configuration, which will be described in detail later, in which the drain 111 of the MOSFET 11, the collector 121 of the IGBT 12, and the cathode 132 of the SBD 13 are electrically connected, and the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13 are electrically connected. As a result, the MOSFET 11 and the IGBT 12 are electrically connected in parallel, and the SBD 13 is connected in anti-parallel to them. When either the MOSFET 11 or the IGBT 12 is in a conductive state, the switching circuit 1 is in a conductive state, and when both the MOSFET 11 and the IGBT 12 are in a cutoff state, the switching circuit 1 is in a cutoff state. The switching operation of the switching circuit 1 is performed by the switching operations of the MOSFET 11 and the IGBT 12.
[0020] The switching circuit 2 includes a MOSFET 21 as a second MOSFET, an IGBT 22 as a second IGBT, and an SBD 23 as a second Schottky barrier diode. Like the MOSFET 11, the MOSFET 21 includes, for example, a first semiconductor material. Like the IGBT 12, the IGBT 22 includes, for example, a second semiconductor material. Like the SBD 13, the SBD 23 includes, for example, a third semiconductor material. In the semiconductor device A1, for example, the MOSFET 21 and the SBD 23 each include SiC, and the IGBT 22 includes Si.
[0021] The MOSFET 21 has a main surface 21a and a back surface 21b. The main surface 21a and the back surface 21b are spaced apart in the thickness direction of the MOSFET 21. In the semiconductor device A1, the MOSFET 21 is arranged so that the thickness direction of the MOSFET 21 and the third direction z are the same (or approximately the same) direction. The MOSFET 21 has a vertical structure, with the drain 211 arranged on the back surface 21b and the source 212 and gate 213 arranged on the main surface 21a. The switching operation of the MOSFET 21 is controlled by a second drive signal (e.g., a gate voltage) input to the gate 213. The MOSFET 21 has, for example, a rectangular shape in a plan view.
[0022] The IGBT 22 has a main surface 22a and a back surface 22b. The main surface 22a and the back surface 22b are spaced apart in the thickness direction of the IGBT 22. In the semiconductor device A1, the IGBT 22 is arranged so that the thickness direction of the IGBT 22 coincides (or substantially coincides) with the third direction z. The IGBT 22 has a vertical structure, with the collector 221 arranged on the back surface 22b and the emitter 222 and gate 223 arranged on the main surface 22a. The switching operation of the IGBT 22 is controlled by a second drive signal (e.g., a gate voltage) input to the gate 223. The IGBT 22 has, for example, a rectangular shape in a plan view. In the semiconductor device A1, a common second drive signal is input to the MOSFET 21 and the IGBT 22.
[0023] The SBD 23 has a principal surface 23a and a rear surface 23b. The principal surface 23a and the rear surface 23b are spaced apart in the thickness direction of the SBD 23. In the semiconductor device A1, the SBD 23 is arranged so that the thickness direction of the SBD 23 coincides (or substantially coincides) with the third direction z. The SBD 23 has a cathode 232 arranged on the principal surface 23a and an anode 231 arranged on the rear surface 23b. The SBD 23 has, for example, a rectangular shape in a plan view.
[0024] In the switching circuit 2, the element withstand voltage (drain withstand voltage) of the MOSFET 21 is larger than the element withstand voltage (collector withstand voltage) of the IGBT 22. For example, in an example where the power supply voltage (DC voltage) is 400 V or higher and 500 V or lower, the element withstand voltage of the MOSFET 21 is 750 V, and the element withstand voltage of the IGBT 22 is 650 V. In the switching circuit 2, the planar area of the MOSFET 21 is smaller than the planar area of the IGBT 22, and the planar area of the SBD 23 is larger than the planar area of the MOSFET 21 and smaller than the planar area of the IGBT 22. The relationship between the planar areas of the MOSFET 21, the IGBT 22, and the SBD 23 is not limited to the example described above.
[0025] The switching circuit 2 has a configuration, described in detail below, in which the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23 are electrically connected, and the source 212 of the MOSFET 21, the emitter 222 of the IGBT 22, and the anode 231 of the SBD 23 are also electrically connected. As a result, the MOSFET 21 and the IGBT 22 are electrically connected in parallel, and the SBD 23 is connected in anti-parallel to them. When either the MOSFET 21 or the IGBT 22 is in a conductive state, the switching circuit 2 is in a conductive state, and when both the MOSFET 21 and the IGBT 22 are in a cutoff state, the switching circuit 2 is in a cutoff state. The switching operation of the switching circuit 2 is performed by the switching operations of the MOSFET 21 and the IGBT 22.
[0026] 6 , the semiconductor device A1 is configured as, for example, a half-bridge circuit. Switching circuit 1 and switching circuit 2 are connected in series. Specifically, the source 112 of MOSFET 11, the emitter 122 of IGBT 12, and the anode 131 of SBD 13 are electrically connected to the drain 211 of MOSFET 21, the collector 221 of IGBT 22, and the cathode 232 of SBD 23. Switching circuit 1 configures the upper arm circuit of the semiconductor device A1, and switching circuit 2 configures the lower arm circuit of the semiconductor device A1.
[0027] The support member 3 supports the two switching circuits 1 and 2, respectively, and provides conductive paths between the two switching circuits 1 and 2 and the plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, and 49. The support member 3 includes an insulating substrate 31, a main surface metal layer 32, and a back surface metal layer 33.
[0028] The insulating substrate 31 is made of, for example, ceramics with excellent thermal conductivity, such as AlN (aluminum nitride), SiN (silicon nitride), Al2O3 (aluminum oxide), etc. The insulating substrate 31 is, for example, in the shape of a flat plate.
[0029] The insulating substrate 31 has a principal surface 31 a and a rear surface 31 b. The principal surface 31 a and the rear surface 31 b are spaced apart in the third direction z. As shown in Fig. 3 , the principal surface 31 a faces one side (upward) in the third direction z, and the rear surface 31 b faces the other side (downward) in the third direction z.
[0030] The main surface metal layer 32 is formed on the main surface 31a of the insulating substrate 31. The constituent material of the main surface metal layer 32 is, for example, copper or a copper alloy. The constituent material may be aluminum or an aluminum alloy instead of copper or a copper alloy. The main surface metal layer 32 is covered with a sealing member 6. The main surface metal layer 32 includes a power wiring portion 321 as a first conductor, a power wiring portion 322 as a third conductor, a power wiring portion 323 as a second conductor, and a plurality of signal wiring portions 324A, 324B, 325A, 325B, and 329. The plurality of power wiring portions 321, 322, and 323 and the plurality of signal wiring portions 324A, 324B, 325A, 325B, and 329 are arranged apart from one another.
[0031] The power wiring section 321 includes two pad sections 321a and 321b, which are integrally formed with each other.
[0032] The pad portion 321a is mounted with the MOSFET 11, the IGBT 12, and the SBD 13. In the example shown in FIGS. 2 and 3 , the MOSFET 11, the SBD 13, and the IGBT 12 are arranged on the pad portion 321a in this order along the first direction x. That is, the arrangement direction of the MOSFET 11, the IGBT 12, and the SBD 13 (hereinafter referred to as the "first arrangement direction") coincides (or substantially coincides) with the first direction x. In addition, in the example shown in FIGS. 2 and 3 , the MOSFET 11 is located on one side of the IGBT 12 in the first direction x (the side where the power terminals 41 and 42 are located). The drain 111 of the MOSFET 11, the collector 121 of the IGBT 12, and the cathode 132 of the SBD 13 are conductively joined to the pad portion 321a by conductive bonding materials (e.g., solder, metal paste, or sintered metal). With this configuration, the drain 111 of the MOSFET 11, the collector 121 of the IGBT 12, and the cathode 132 of the SBD 13 are electrically connected to each other. The pad portion 321a has, for example, a rectangular shape in a plan view with its longitudinal direction aligned with the first direction x.
[0033] The pad portion 321b is joined to the power terminal 41. The pad portion 321b has, for example, a strip shape extending in the second direction y in a plan view. The pad portion 321a extends from the pad portion 321b in the first direction x.
[0034] The power wiring section 322 includes two pad sections 322a and 322b, which are integrally formed with each other.
[0035] The pad portion 322a is joined to a plurality of power connection members 521, 522, and 523. The pad portion 322a is electrically connected to the source 212 of the MOSFET 21, the emitter 222 of the IGBT 22, and the anode 231 of the SBD 23 via these power connection members 521, 522, and 523. The pad portion 322a has, for example, a rectangular shape in a plan view with the first direction x as its longitudinal direction.
[0036] The pad portion 322b is joined to the power terminal 42. The pad portion 322b has, for example, a strip shape extending in the second direction y in a plan view. The pad portion 322a extends from the pad portion 322b in the first direction x.
[0037] The power wiring section 323 includes two pad sections 323a and 323b, which are integrally formed with each other.
[0038] The pad portion 323a is mounted with the MOSFET 21, the IGBT 22, and the SBD 23. In the example shown in FIGS. 2 and 4 , the MOSFET 21, the SBD 23, and the IGBT 22 are arranged on the pad portion 323a in this order along the first direction x. That is, the arrangement direction of the MOSFET 21, the IGBT 22, and the SBD 23 (hereinafter referred to as the "second arrangement direction") coincides (or substantially coincides) with the first direction x and the first arrangement direction. In addition, in the example shown in FIGS. 2 and 4 , the MOSFET 21 is located on one side of the IGBT 22 in the first direction x (the side where the power terminals 41 and 42 are located). The drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23 are conductively joined to the pad portion 323a by conductive bonding materials (e.g., solder, metal paste, or sintered metal). With this configuration, the collector 221 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23 are electrically connected to the pad portion 323a. A plurality of power connection members 511, 512, and 513 are joined to the pad portion 323a. The pad portion 323a is electrically connected to the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13 via these power connection members 511, 512, and 513. The pad portion 323a has, for example, a rectangular shape with its longitudinal direction aligned in the first direction x in a plan view.
[0039] The pad portion 323b is joined to the power terminal 43. The pad portion 323b has a strip shape extending in the second direction y in a plan view, for example. The pad portion 323a extends from the pad portion 323b in the first direction x.
[0040] In the semiconductor device A1, the three pads 321 a, 322 a, and 323 a are arranged in parallel (or approximately parallel) in the second direction y in a plan view, and the pad 323 a is located between the pads 321 a and 322 a in the second direction y.
[0041] The signal wiring portion 324A is connected to two signal connection members 541A, 542A. The signal wiring portion 324A is electrically connected to the gate 113 of the MOSFET 11 via the signal connection member 541A. The signal wiring portion 324A is also electrically connected to the gate 123 of the IGBT 12 via the signal connection member 542A. The signal wiring portion 324A transmits a first drive signal that controls the switching operation of the switching circuit 1 (the switching operation of the MOSFET 11 and the switching operation of the IGBT 12).
[0042] The signal wiring portion 324B is connected to two signal connection members 541B, 542B. The signal wiring portion 324B is electrically connected to the gate 213 of the MOSFET 21 via the signal connection member 541B. The signal wiring portion 324B is also electrically connected to the gate 223 of the IGBT 22 via the signal connection member 542B. The signal wiring portion 324B transmits a second drive signal that controls the switching operation of the switching circuit 2 (the switching operation of the MOSFET 21 and the switching operation of the IGBT 22).
[0043] Two signal connection members 551A, 552A are connected to the signal wiring portion 325A. The signal wiring portion 325A is electrically connected to the source 112 of the MOSFET 11 via the signal connection member 551A. The signal wiring portion 325A is also electrically connected to the emitter 122 of the IGBT 12 via the signal connection member 552A. The signal wiring portion 325A transmits a first detection signal that indicates the conductive state of the switching circuit 1. The voltages of the source 112 of the MOSFET 11 and the emitter 122 of the IGBT 12 are applied to the signal wiring portion 325A.
[0044] The signal wiring portion 325B is connected to two signal connection members 551B, 552B. The signal wiring portion 325B is electrically connected to the source 212 of the MOSFET 21 via the signal connection member 551B. The signal wiring portion 325B is also electrically connected to the emitter 222 of the IGBT 22 via the signal connection member 552B. The signal wiring portion 325B transmits a second detection signal that indicates the conductive state of the switching circuit 2. The voltages of the source 212 of the MOSFET 21 and the emitter 222 of the IGBT 22 are applied to the signal wiring portion 325B.
[0045] The plurality of signal wiring portions 329 are not electrically connected to any of the two switching circuits 1 and 2 (the two MOSFETs 11 and 21, the two IGBTs 12 and 22, and the two SBDs 13 and 23). In other words, no main current or electrical signal flows through any of the plurality of signal wiring portions 329.
[0046] The back surface metal layer 33 is formed on the back surface 31b of the insulating substrate 31. The constituent material of the back surface metal layer 33 is the same as the constituent material of the main surface metal layer 32. The surface of the back surface metal layer 33 facing downward in the third direction z is exposed from the sealing member 6. Note that the surface of the back surface metal layer 33 facing downward in the third direction z may be covered by the sealing member 6. Furthermore, the support member 3 may not include the back surface metal layer 33. In this case, the back surface 31b of the insulating substrate 31 may be covered by the sealing member 6 or may be exposed from the sealing member 6.
[0047] The plurality of external terminals include a power terminal 41 as a first power terminal, a power terminal 42 as a third power terminal, a power terminal 43 as a second power terminal, and a plurality of signal terminals 44A, 44B, 45A, 45B, and 49. A portion of each of the plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, and 49 is exposed from the sealing member 6. The plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, and 49 are each bonded to the main surface metal layer 32 inside the sealing member 6. The plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, and 49 are formed, for example, from the same lead frame, and each is formed from a metal plate material. The plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, 49 are each made of copper or a copper alloy, for example.
[0048] The power terminal 41 is electrically connected to the drain 111 of the MOSFET 11, the collector 121 of the IGBT 12, and the cathode 132 of the SBD 13. The power terminal 41 includes a junction portion 411 and a terminal portion 412.
[0049] 2 and 3, the joint portion 411 is covered with a sealing member 6. The joint portion 411 is joined to the pad portion 321b of the power wiring portion 321, as shown in FIGS. 2 and 3. This establishes electrical continuity between the power terminal 41 and the power wiring portion 321. The joint portion 411 and the pad portion 321b may be joined by any method, such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.
[0050] 2 and 3, the terminal portion 412 is exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 412 extends from the sealing member 6 to one side in the first direction x in a plan view. The surface of the terminal portion 412 may be plated with silver, for example.
[0051] The power terminal 42 is electrically connected to the source 212 of the MOSFET 21, the emitter 222 of the IGBT 22, and the anode 231 of the SBD 23. The power terminal 42 includes a junction portion 421 and a terminal portion 422.
[0052] 2 and 4, the joint portion 421 is covered with a sealing member 6. The joint portion 421 is joined to the pad portion 322b of the power wiring portion 322, as shown in Fig. 2 and 4. This establishes electrical continuity between the power terminal 42 and the power wiring portion 322. The joint portion 421 and the pad portion 322b may be joined by any method, such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.
[0053] 2 and 4, the terminal portion 422 is exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 422 extends from the sealing member 6 to one side in the first direction x in a plan view. The surface of the terminal portion 422 may be plated with silver, for example.
[0054] The power terminal 43 is electrically connected to the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13, and is also electrically connected to the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23. The power terminal 43 includes a junction portion 431 and a terminal portion 432.
[0055] 2 and 4, the joint portion 431 is covered with a sealing member 6. The joint portion 431 is joined to the pad portion 323b of the power wiring portion 323, as shown in Fig. 2 and 4. This establishes electrical continuity between the power terminal 43 and the power wiring portion 323. The joint portion 431 and the pad portion 323b may be joined by any method, such as joining using a conductive joining material (such as solder or sintered metal), laser joining, or ultrasonic joining.
[0056] 2 and 4, the terminal portion 432 is exposed from the sealing member 6. As shown in Fig. 2, the terminal portion 432 extends from the sealing member 6 to the other side in the first direction x in a plan view. The surface of the terminal portion 432 may be plated with silver, for example.
[0057] In the semiconductor device A1, the power terminals 41 and 42 are connected to a power supply and the power supply voltage (e.g., DC voltage) is applied thereto. For example, the power terminal 41 is a positive electrode (P terminal) and the power terminal 42 is a negative electrode (N terminal). The power terminals 41 and 42 are spaced apart from each other and arranged along the second direction y. The power terminal 43 outputs a voltage (e.g., AC voltage) converted by the switching operations of the switching circuits 1 and 2. The power terminal 43 is, for example, a power output terminal (OUT terminal).
[0058] In the semiconductor device A1, the power terminals 41 and 42 are arranged on one side of the support member 3 in the first direction x, and the power terminal 43 is arranged on the other side of the support member 3 in the first direction x. In the semiconductor device A1, the power terminals 41 and 42 are located on the opposite side of the MOSFETs 11 and 21 from the IGBTs 12 and 22 in the first direction x.
[0059] 2, the signal terminal 44A is joined to the signal wiring portion 324A. The signal terminal 44A is electrically connected to the gate 113 of the MOSFET 11 and the gate 123 of the IGBT 12 via the signal wiring portion 324A and each of the signal connecting members 541A and 542A. The signal terminal 44A is an input terminal for a first drive signal, and is connected to, for example, an external drive circuit.
[0060] 2, the signal terminal 44B is joined to the signal wiring portion 324B. The signal terminal 44B is electrically connected to the gate 213 of the MOSFET 21 and the gate 223 of the IGBT 22 via the signal wiring portion 324B and each of the signal connecting members 541B and 542B. The signal terminal 44B is an input terminal for a second drive signal, and is connected to, for example, an external drive circuit.
[0061] 2, the signal terminal 45A is joined to the signal wiring portion 325A. The signal terminal 45A is electrically connected to the source 112 of the MOSFET 11 and the emitter 122 of the IGBT 12 via the signal wiring portion 325A and signal connecting members 551A and 552A. The signal terminal 45A is an output terminal for a first detection signal, and is connected to, for example, an external drive circuit.
[0062] 2, the signal terminal 45B is joined to the signal wiring portion 325B. The signal terminal 45B is electrically connected to the source 212 of the MOSFET 21 and the emitter 222 of the IGBT 22 via the signal wiring portion 325B and the signal connecting members 551B and 552B. The signal terminal 45B is an output terminal for a second detection signal, and is connected to, for example, an external drive circuit.
[0063] 2, the plurality of signal terminals 49 are respectively joined to the plurality of signal wiring portions 329. None of the plurality of signal terminals 49 is electrically connected to either of the two switching circuits 1 and 2. Each of the plurality of signal terminals 49 is a non-connect terminal.
[0064] Each of the plurality of connection members provides electrical conduction between two spaced apart portions. The plurality of connection members includes a power connection member 511 as a first connection member, power connection members 512 and 513 as second connection members, a power connection member 521 as a third connection member, power connection members 522 and 523 as fourth connection members, and a plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B.
[0065] Each of the multiple power connection members 511-513 and 521-523 is a conductive path for the main current. Each of the multiple power connection members 511-513 and 521-523 is formed, for example, from a metal flat plate. Each of the multiple power connection members 511-513 and 521-523 may be one or more bonding wires instead of a metal flat plate. The constituent material of each of the multiple power connection members 511-513 and 521-523 is, for example, copper or a copper alloy. The constituent material may not be copper or a copper alloy, but may be gold or a gold alloy, or aluminum or an aluminum alloy. Each of the power connection members 513 and 523 is partially bent, as shown in FIG. 5 . Similarly to the power connection members 513 and 523, each of the power connection members 511, 512, 521, and 522 is also partially bent.
[0066] The power connection member 511 is connected to the source 112 and pad 323a of the MOSFET 11, providing electrical continuity between the source 112 and the power wiring 323. The power connection member 512 is connected to the emitter 122 and pad 323a of the IGBT 12, providing electrical continuity between the emitter 122 and the power wiring 323. The power connection member 513 is connected to the anode 131 and pad 323a of the SBD 13, providing electrical continuity between the anode 131 and the power wiring 323. With this configuration, the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13 are electrically connected.
[0067] The power connection member 521 is connected to the source 212 and pad 322a of the MOSFET 21, providing electrical continuity between the source 212 and the power wiring portion 322. The power connection member 522 is connected to the emitter 222 and pad 322a of the IGBT 22, providing electrical continuity between the emitter 222 and the power wiring portion 322. The power connection member 523 is connected to the anode 231 and pad 322a of the SBD 23, providing electrical continuity between the anode 231 and the power wiring portion 322. With this configuration, the source 212 of the MOSFET 21, the emitter 222 of the IGBT 22, and the anode 231 of the SBD 23 are electrically connected.
[0068] Each of the plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B is a conductive path for an electrical signal. Each of the plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B is, for example, a bonding wire. Each of the plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B is made of, for example, gold or a gold alloy. The material may not be gold or a gold alloy, but may be copper or a copper alloy, or aluminum or an aluminum alloy.
[0069] The signal connection member 541A is connected to the gate 113 of the MOSFET 11 and the signal wiring portion 324A, and provides electrical continuity between the gate 113 and the signal wiring portion 324A. The signal connection member 542A is connected to the gate 123 of the IGBT 12 and the signal wiring portion 324A, and provides electrical continuity between the gate 123 and the signal wiring portion 324A.
[0070] The signal connection member 541B is connected to the gate 213 of the MOSFET 21 and the signal wiring portion 324B, and provides electrical continuity between the gate 213 and the signal wiring portion 324B. The signal connection member 542B is connected to the gate 223 of the IGBT 22 and the signal wiring portion 324B, and provides electrical continuity between the gate 223 and the signal wiring portion 324B.
[0071] The signal connection member 551A is connected to the source 112 of the MOSFET 11 and the signal wiring portion 325A, and provides electrical continuity between the source 112 and the signal wiring portion 325A. The signal connection member 552A is connected to the emitter 122 of the IGBT 12 and the signal wiring portion 325A, and provides electrical continuity between the emitter 122 and the signal wiring portion 325A.
[0072] The signal connection member 551B is connected to the source 212 of the MOSFET 21 and the signal wiring portion 325B, and provides electrical continuity between the source 212 and the signal wiring portion 325B. The signal connection member 552B is connected to the emitter 222 of the IGBT 22 and the signal wiring portion 325B, and provides electrical continuity between the emitter 222 and the signal wiring portion 325B.
[0073] The sealing member 6 is a sealing material that protects the two switching circuits 1 and 2. The sealing member 6 covers the two switching circuits 1 and 2, a portion of the support member 3, a portion of each of the plurality of power terminals 41, 42, and 43, a portion of each of the plurality of signal terminals 44A, 44B, 45A, 45B, and 49, the power connection members 511-513 and 521-523, and the plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B. The sealing member 6 is made of, for example, an insulating resin material. The insulating resin material is, for example, epoxy resin. The sealing member 6 has a resin main surface 61, a resin back surface 62, and a plurality of resin side surfaces 631-634.
[0074] As shown in FIGS. 3 to 5 , the resin main surface 61 and the resin back surface 62 are spaced apart in the third direction z. The resin main surface 61 faces one side (upward) in the third direction z, and the resin back surface 62 faces the other side (downward) in the third direction z. Each of the multiple resin side surfaces 631 to 634 is sandwiched between and connected to the resin main surface 61 and the resin back surface 62 in the third direction z. The two resin side surfaces 631, 632 face opposite each other in the first direction x. The power terminals 41, 42 protrude from the resin side surface 632, and the power terminal 43 protrudes from the resin side surface 631. The two resin side surfaces 633, 634 face opposite each other in the second direction y. The signal terminals 44A, 45A protrude from the resin side surface 634, and the signal terminals 44B, 45B protrude from the resin side surface 633.
[0075] The semiconductor device A1 has the following functions and effects.
[0076] In the semiconductor device A1, the breakdown voltage of the MOSFET 11 is greater than the breakdown voltage of the IGBT 12. With this configuration, when a surge voltage occurs during switching operation of the switching circuit 1, the surge voltage exceeds the breakdown voltage of the IGBT 12 before the breakdown voltage of the MOSFET 11. Therefore, the IGBT 12 enters avalanche mode before the MOSFET 11. The avalanche mode is a state in which avalanche breakdown occurs. Research by the present inventors has revealed that due to the difference in avalanche resistance between the MOSFET 11 and the IGBT 12, the IGBT 12 chip itself is less likely to break even when it enters avalanche mode, while the MOSFET 11 is more likely to break when it enters avalanche mode. Therefore, even if a surge voltage occurs due to the switching operation of the switching circuit 1, the IGBT 12 enters avalanche mode first, allowing the IGBT 12 to absorb the surge voltage and preventing the MOSFET 11 from entering avalanche mode. Therefore, even when a switching surge occurs in the switching circuit 1, the semiconductor device A1 is configured to bring the IGBT 12 into avalanche breakdown before the MOSFET 11, thereby preventing the MOSFET 11 and the IGBT 12 from being destroyed. In other words, the semiconductor device A1 can prevent the MOSFET 11 and the IGBT 12 from failing due to a surge voltage when the MOSFET 11 and the IGBT 12 are operated in parallel, thereby preventing a decrease in reliability.
[0077] For example, in the semiconductor device A1, when the power supply voltage applied to the two power terminals 41 and 42 is between 400 V and 500 V, a surge voltage of approximately 650 V may be generated by the switching operation of the switching circuit 1. In such a case, the withstand voltages of the MOSFET 11 and the IGBT 12 are each designed to be approximately 650 V to accommodate this surge voltage. However, in the semiconductor device A1, the withstand voltages of the MOSFET 11 and the IGBT 12 are set to 750 V and 650 V, respectively. This creates a situation in which the MOSFET 11 does not enter avalanche mode even when the IGBT 12 enters avalanche mode. In other words, in the semiconductor device A1, even if a surge voltage is generated by the switching operation of the switching circuit 1, the IGBT 12 enters avalanche mode before the MOSFET 11, thereby preventing breakdown of the MOSFET 11 and the IGBT 12.
[0078] In the semiconductor device A1, the MOSFET 11 contains SiC, and the IGBT 12 contains Si. In general, the MOSFET 11 containing SiC tends to have a lower avalanche resistance than the IGBT 12 containing Si. Therefore, ensuring that the breakdown voltages of the MOSFET 11 and the IGBT 12 have the above-described relationship is effective in preventing breakdown of the MOSFET 11 and the IGBT 12.
[0079] In the semiconductor device A1, the inductance of the first conduction path from the power terminal 41 to the drain 111 of the MOSFET 11 is smaller than the inductance of the second conduction path from the power terminal 41 to the collector 121 of the IGBT 12. For example, in the semiconductor device A1, as can be seen from FIG. 2 , the length of the first conduction path is shorter than the length of the second conduction path, thereby making the inductance of the first conduction path smaller than the inductance of the second conduction path. With this configuration, the inductance of the second conduction path is larger than the inductance of the first conduction path, and therefore a larger switching surge is generated in the IGBT 12 than in the MOSFET 11. Therefore, even if a surge voltage is generated due to the switching operation of the switching circuit 1, the IGBT 12 enters the avalanche mode before the MOSFET 11, regardless of the relationship between the element breakdown voltages of the MOSFET 11 and the IGBT 12. Therefore, the surge voltage is absorbed by the IGBT 12, and the MOSFET 11 is prevented from entering the avalanche mode, thereby preventing breakdown of the MOSFET 11 and the IGBT 12. In other words, the semiconductor device A1 can operate the MOSFET 11 and the IGBT 12 in parallel, and further prevent failures caused by the surge voltage, thereby preventing a decrease in reliability.
[0080] In the semiconductor device A1, the MOSFET 11 and the IGBT 12 are mounted on a pad portion 321a, which extends in a plan view along a first arrangement direction (for example, the first direction x) of the MOSFET 11 and the IGBT 12. The pad portion 321a is connected to a pad portion 321b to which a power terminal 41 is joined, and the pad portion 321b is connected to an edge of the pad portion 321a that is closer to the MOSFET 11 than the IGBT 12 in the first arrangement direction. This configuration makes it possible to make the length of the first conduction path shorter than the length of the second conduction path.
[0081] The semiconductor device A1 includes an SBD 13. The SBD 13 is connected in anti-parallel to the MOSFET 11 and the IGBT 12. With this configuration, even if a switching surge occurs due to the switching operation of the switching circuit 1, the SBD 13 conducts current, thereby reducing the current flowing through the built-in diodes of the MOSFET 11 and the IGBT 12. Therefore, the semiconductor device A1 can suppress the switching surge applied to the MOSFET 11 and the IGBT 12 and prevent damage to the MOSFET 11 and the IGBT 12. In other words, even if a switching surge occurs during the switching operation of the MOSFET 11 and the IGBT 12, the semiconductor device A1 can suppress the occurrence of failures due to the switching surge, thereby suppressing a decrease in reliability. In particular, in the semiconductor device A1, the length of the third conduction path from the power terminal 41 to the SBD 13 is longer than the length of the first conduction path from the power terminal 41 to the MOSFET 11 and shorter than the length of the second conduction path from the power terminal 41 to the IGBT 12. Such a configuration is effective in suppressing switching surges applied to the MOSFET 11 and the IGBT 12. For example, in the semiconductor device A1, when the power terminal 41 is arranged on one side of the switching circuit 1 in the first arrangement direction, the SBD 13 is arranged between the MOSFET 11 and the IGBT 12. This makes the length of the third conduction path longer than the length of the first conduction path and shorter than the length of the second conduction path.
[0082] In the semiconductor device A1, the breakdown voltage of the MOSFET 21 is greater than the breakdown voltage of the IGBT 22. With this configuration, similar to the switching circuit 1, even if a surge voltage occurs due to the switching operation of the switching circuit 2, the IGBT 22 enters avalanche mode before the MOSFET 21, thereby preventing breakdown of the MOSFET 21 and the IGBT 22. In other words, the semiconductor device A1 can prevent failures due to surge voltages when the MOSFET 21 and the IGBT 22 are operated in parallel, thereby preventing a decrease in reliability. In the switching circuit 2, similar to the switching circuit 1, when the power supply voltage applied to the two power terminals 41, 42 is 400 V or more and 500 V or less, the breakdown voltage of the MOSFET 21 is 750 V and the breakdown voltage of the IGBT 22 is 650 V. As a result, even if a surge voltage occurs due to the switching operation of the switching circuit 2 in the semiconductor device A1, the IGBT 22 enters the avalanche mode before the MOSFET 21, and breakdown of the MOSFET 21 and the IGBT 22 is suppressed.
[0083] In the semiconductor device A1, the inductance of the fourth conduction path from the power terminal 41 to the drain 211 of the MOSFET 21 is smaller than the inductance of the fifth conduction path from the power terminal 41 to the collector 221 of the IGBT 22. For example, in the semiconductor device A1, as can be seen from FIG. 2 , the length of the fourth conduction path is shorter than the length of the fifth conduction path, thereby making the inductance of the fourth conduction path smaller than the inductance of the fifth conduction path. With this configuration, similar to the switching circuit 1, even if a surge voltage is generated by the switching operation of the switching circuit 2, the IGBT 22 enters the avalanche mode before the MOSFET 21, thereby suppressing damage to the MOSFET 21 and the IGBT 22. In other words, in the semiconductor device A1, in addition to operating the MOSFET 21 and the IGBT 22 in parallel, the occurrence of failures due to surge voltages can be further suppressed, thereby suppressing a decrease in reliability.
[0084] The semiconductor device A1 includes an SBD 23. The SBD 23 is connected in anti-parallel to the MOSFET 21 and the IGBT 22. With this configuration, similar to the switching circuit 1, even if a switching surge occurs due to the switching operation of the switching circuit 2, the SBD 23 conducts current, thereby suppressing the switching surge applied to the MOSFET 21 and the IGBT 22 and preventing damage to the MOSFET 21 and the IGBT 22. In other words, even if a switching surge occurs during the switching operation of the MOSFET 21 and the IGBT 22, the semiconductor device A1 can suppress the occurrence of failures due to the switching surge, thereby preventing a decrease in reliability. In particular, in the semiconductor device A1, the length of the sixth conduction path from the power terminal 41 to the SBD 23 is longer than the length of the fourth conduction path from the power terminal 41 to the MOSFET 21 and shorter than the length of the fifth conduction path from the power terminal 41 to the IGBT 22. Such a configuration is effective in suppressing switching surges applied to the MOSFET 21 and the IGBT 22. For example, in the semiconductor device A1, when the power terminal 41 is arranged on one side of the switching circuit 1 in the second arrangement direction, the SBD 23 is arranged between the MOSFET 21 and the IGBT 22. This makes the length of the sixth conduction path longer than the length of the fourth conduction path and shorter than the length of the fifth conduction path.
[0085] In the semiconductor device A1, the power terminals 41 and 42 are located on the opposite side of the MOSFET 11 from the IGBT 12 in the arrangement direction (first arrangement direction) of the MOSFET 11 and the IGBT 12. The power terminals 41 and 42 are located on the opposite side of the MOSFET 21 from the IGBT 22 in the arrangement direction (second arrangement direction) of the MOSFET 21 and the IGBT 22. With this configuration, in the conduction path of the main current between the power terminals 41 and 42, the path passing through the two MOSFETs 11 and 21 is shorter than the path passing through the two IGBTs 12 and 22. In the low current range (e.g., about 100 A), the current flowing through the semiconductor device A1 preferentially flows through the path passing through the two MOSFETs 11 and 21, which has a relatively short conduction path. Generally, MOSFETs have lower on-resistance in the low current range than IGBTs. Therefore, in the semiconductor device A1, in the low current range, current flows preferentially through the MOSFETs 11 and 21 rather than through the IGBTs 12 and 22, thereby suppressing power loss due to on-resistance. For example, when the semiconductor device A1 is used in an on-vehicle inverter, the semiconductor device A1 operates frequently under light loads (when the current flowing through the semiconductor device A1 is in the low current range). Therefore, when the semiconductor device A1 is used in an on-vehicle inverter, it is effective in suppressing power loss due to the on-resistance of the MOSFETs 11 and 21 and the IGBTs 12 and 22.
[0086] In the first embodiment, the inductance of the first conduction path is made smaller than the inductance of the second conduction path by the difference between the length of the first conduction path from the power terminal 41 to the drain 111 of the MOSFET 11 and the length of the second conduction path from the power terminal 41 to the collector 121 of the IGBT 12. However, instead of this configuration, the inductance of the first conduction path may be made smaller than the inductance of the second conduction path by the difference in the constituent materials or shapes of the first conduction path and the second conduction path.
[0087] 7 to 13 show a semiconductor device A2 according to a second embodiment. As shown in FIGS. 7 to 13, the semiconductor device A2 includes two switching circuits 1 and 2, a support member 3, a plurality of external terminals, a plurality of connecting members, a heat sink 70, a case 71, and a resin member 75. The plurality of external terminals include a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47. The plurality of connecting members include a plurality of power connecting members 511 to 513, 521 to 523, and a plurality of signal connecting members 541A, 541B, 542A, 542B, 551A, 551B, 552A, 552B, 540A, 540B, 550A, 550B, 56, and 57.
[0088] The semiconductor device A2 differs from the semiconductor device A1 in its module structure. For example, the semiconductor device A2 differs from the semiconductor device A1 in that the semiconductor device A2 includes a heat sink 70, a case 71, and a resin member 75 instead of the sealing member 6. The heat sink 70, the case 71, and the resin member 75 protect the two switching circuits 1 and 2, etc.
[0089] The heat sink 70 is, for example, a flat plate having a rectangular shape in a plan view. The heat sink 70 is made of a material with high thermal conductivity, such as copper or a copper alloy. The surface of the heat sink 70 may be Ni-plated. If necessary, a cooling member (for example, a heat sink) is attached to the surface of the heat sink 70 on the lower side in the third direction z. As shown in FIGS. 10 and 11 , the insulating substrate 31 is placed on the heat sink 70.
[0090] As can be seen from Figures 8 and 9, the case 71 is, for example, a rectangular parallelepiped. The case 71 is made of a synthetic resin that has electrical insulation properties and excellent heat resistance, such as PPS (polyphenylene sulfide). In a plan view, the case 71 has a rectangular shape that is approximately the same size as the heat sink 70. As shown in Figures 7 to 13, the case 71 includes a frame portion 72, a top plate 73, and a plurality of terminal blocks 741 to 744.
[0091] The frame 72 is fixed to the upper surface of the heat sink 70 in the third direction z. The top plate 73 is fixed to the frame 72. As shown in Figures 7, 10, and 11, the top plate 73 closes the opening of the frame 72 on the upper side in the third direction z. As shown in Figures 10 and 11, the top plate 73 faces the heat sink 70, which closes the lower side of the frame 72 in the third direction z. The top plate 73, the heat sink 70, and the frame 72 define a circuit accommodating space (a space that accommodates the switching circuits 1, 2, etc.) inside the case 71.
[0092] The two terminal blocks 741, 742 are disposed on one side of the frame portion 72 in the first direction x and are integrally formed with the frame portion 72. The two terminal blocks 743, 744 are disposed on the other side of the frame portion 72 in the first direction x and are integrally formed with the frame portion 72. The two terminal blocks 741, 742 are disposed along the second direction y on the side wall of the frame portion 72 on one side in the first direction x. As shown in FIGS. 10 and 12 , the terminal block 741 covers a portion of the power terminal 41, and a portion of the power terminal 41 is disposed on the surface on the upper side in the third direction z. As shown in FIGS. 11 and 12 , the terminal block 742 covers a portion of the power terminal 42, and a portion of the power terminal 42 is disposed on the surface on the upper side in the third direction z. The two terminal blocks 743, 744 are disposed along the second direction y on the side wall of the frame portion 72 on the other side in the first direction x. 10 and 13, the terminal block 743 covers a portion of one of the two power terminals 43, and a portion of this power terminal 43 is disposed on the surface on the upper side in the third direction z. As shown in Fig. 11 and 13, the terminal block 744 covers a portion of the other of the two power terminals 43, and a portion of this power terminal 43 is disposed on the surface on the upper side in the third direction z.
[0093] As shown in FIGS. 10 and 11 , the resin member 75 is filled in the area surrounded by the heat sink 70 and the case 71. The resin member 75 covers the two switching circuits 1, 2, etc. The resin member 75 is made of a material such as black epoxy resin. Instead of epoxy resin, other materials such as silicone gel may be selected as the material for the resin member 75. The semiconductor device A2 may not necessarily include the resin member 75. In an example in which the semiconductor device A2 includes the resin member 75, the case 71 may not include the top plate 73.
[0094] The switching circuit 1 of the semiconductor device A2 includes two MOSFETs 11, two IGBTs 12, and two SBDs 13. These are arranged in the first arrangement direction (same as the first direction x in the semiconductor device A2) from the two power terminals 41, 42 toward the two power terminals 43 in the order of the two MOSFETs 11, the two SBDs 13, and the two IGBTs 12. Thus, the two MOSFETs 11 are disposed closer to the two power terminals 41, 42 than the two IGBTs 12, respectively, and the two SBDs 13 are disposed between the two MOSFETs 11 and the two IGBTs 12, respectively.
[0095] The switching circuit 2 of the semiconductor device A2 includes two MOSFETs 21, two IGBTs 22, and two SBDs 23. These are arranged in the second arrangement direction (same as the first direction x in the semiconductor device A2) from the two power terminals 41, 42 toward the two power terminals 43 in the order of the two MOSFETs 21, the two SBDs 23, and the two IGBTs 22. Thus, the two MOSFETs 21 are disposed closer to the two power terminals 41, 42 than the two IGBTs 22, respectively, and the two SBDs 23 are disposed between the two MOSFETs 21 and the two IGBTs 22, respectively.
[0096] The support member 3 of the semiconductor device A2 includes an insulating substrate 31 and a main surface metal layer 32. The support member 3 of the semiconductor device A2 differs from the support member 3 of the semiconductor device A1 in that it does not include a back surface metal layer 33. The back surface 31b of the insulating substrate 31 of the semiconductor device A2 is bonded to a heat sink 70. Unlike this configuration, the support member 3 of the semiconductor device A2 may also include a back surface metal layer 33, like the support member 3 of the semiconductor device A1.
[0097] The main surface metal layer 32 of the semiconductor device A2 includes a plurality of power wiring portions 321 to 323 and a plurality of signal wiring portions 324A, 324B, 325A, 325B, 327, and 329. Thus, the main surface metal layer 32 of the semiconductor device A2 differs from the main surface metal layer 32 of the semiconductor device A1 in that it further includes a pair of signal wiring portions 327.
[0098] As shown in FIG. 9 , the pair of signal wiring portions 327 are spaced apart from each other in the second direction y. For example, a thermistor TH is bonded to each of the pair of signal wiring portions 327. The thermistor TH is disposed across the pair of signal wiring portions 327. In a configuration different from the semiconductor device A2, the thermistor TH may not be bonded to the pair of signal wiring portions 327. As shown in FIG. 9 , the pair of signal wiring portions 327 are located near any of the four corners of the insulating substrate 31. As shown in FIG. 9 , the pair of signal wiring portions 327 are located between the pad portion 321b and the two signal wiring portions 324A, 325A in the first direction x.
[0099] 9, a slit 322s is formed in the pad portion 322a of the power wiring portion 322. In a plan view, the slit 322s extends in the first direction x from an edge of the pad portion 322a on one side in the first direction x (the side on which the pad portion 322b is located). The tip of the slit 322s is located in the center of the pad portion 322a in the first direction x.
[0100] As described above, the plurality of external terminals in the semiconductor device A2 include the plurality of power terminals 41 to 43 and the plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47. Thus, the plurality of external terminals of the semiconductor device A2 differs from the plurality of external terminals of the semiconductor device A1 in that the plurality of external terminals further include the plurality of signal terminals 46 and 47, but do not include the signal terminal 49. In the semiconductor device A2, the plurality of power terminals 41 to 43 are supported by the plurality of terminal blocks 741 to 744, respectively, and the plurality of signal terminals 44A, 44B, 45A, 45B, 46, and 47 are supported by the case 71.
[0101] As shown in Fig. 9 , a signal connection member 56 is joined to the signal terminal 46. The signal terminal 46 is electrically connected to the power wiring portion 321 via the signal connection member 56. As a result, the signal terminal 46 is electrically connected to the drain 111 of each MOSFET 11 and the collector 121 of each IGBT 12. The signal terminal 46 is an output terminal for a third detection signal. The third detection signal is a signal for detecting the voltage applied to the power wiring portion 321.
[0102] As shown in Fig. 9, a pair of signal connection members 57 are respectively joined to the pair of signal terminals 47. The pair of signal terminals 47 are electrically connected to the pair of signal wiring portions 327 via the pair of signal connection members 57. This allows the pair of signal terminals 47 to be electrically connected to the thermistor TH. The pair of signal terminals 47 are terminals for detecting the temperature inside the case 71. When the thermistor TH is not joined to the pair of signal wiring portions 327, the pair of signal terminals 47 are non-connected terminals.
[0103] As described above, in the semiconductor device A2, the plurality of connection members include the plurality of power connection members 511-513, 521-523, and the plurality of signal connection members 541A, 541B, 542A, 542B, 551A, 551B, 552A, 552B, 540A, 540B, 550A, 550B, 56, and 57. Thus, the plurality of connection members of the semiconductor device A2 differ from the plurality of connection members of the semiconductor device A1 in that they further include the plurality of signal connection members 540A, 540B, 550A, 550B, 56, and 57. In the example shown in FIG. 9 , the power connection members 511-513, 521-523 of the semiconductor device A2 are formed by bonding wires, but may also be flat metal plates, as in the semiconductor device A1.
[0104] The signal connection members 540A, 540B, 550A, 550B, 56, and 57 are, for example, bonding wires. The signal connection members 540A, 540B, 550A, 550B, 56, and 57 are made of, for example, gold or a gold alloy. The material may not be gold or a gold alloy, but may be copper or a copper alloy, or aluminum or an aluminum alloy.
[0105] The signal connecting member 540A is joined to the signal wiring portion 324A and the signal terminal 44A inside the circuit accommodating space defined by the case 71 or the like. The signal connecting member 540A electrically connects the signal wiring portion 324A and the signal terminal 44A.
[0106] The signal connection member 540B is joined to the signal wiring portion 324B and the signal terminal 44B inside the circuit accommodating space defined by the case 71 or the like. The signal connection member 540B electrically connects the signal wiring portion 324B and the signal terminal 44B.
[0107] The signal connecting member 550A is joined to the signal wiring portion 325A and the signal terminal 45A inside the circuit accommodating space defined by the case 71 or the like. The signal connecting member 550A electrically connects the signal wiring portion 325A and the signal terminal 45A.
[0108] The signal connection member 550B is joined to the signal wiring portion 325B and the signal terminal 45B inside the circuit accommodating space defined by the case 71 or the like. The signal connection member 550B electrically connects the signal wiring portion 325B and the signal terminal 45B.
[0109] The signal connection member 56 is joined to the pad portion 321a and the signal terminal 46 inside the circuit accommodating space defined by the case 71 or the like. The signal connection member 56 electrically connects the power wiring portion 321 and the signal terminal 46.
[0110] The pair of signal connection members 57 are respectively joined to the pair of signal wiring portions 327 and the pair of signal terminals 47 inside the circuit accommodating space such as the case 71. The pair of signal connection members 57 respectively connect the pair of signal wiring portions 327 and the pair of signal terminals 47 electrically.
[0111] In the semiconductor device A2, as in the semiconductor device A1, the breakdown voltage of the MOSFET 11 is greater than the breakdown voltage of the IGBT 12. Therefore, like the semiconductor device A1, the semiconductor device A2 can suppress the occurrence of failures due to surge voltages when the MOSFET 11 and the IGBT 12 are operated in parallel, thereby suppressing a decrease in reliability. Furthermore, in the semiconductor device A2, the breakdown voltage of the MOSFET 21 is greater than the breakdown voltage of the IGBT 22. Thus, like the semiconductor device A1, the semiconductor device A2 can suppress the occurrence of failures due to surge voltages when the MOSFET 21 and the IGBT 22 are operated in parallel, thereby suppressing a decrease in reliability. In addition, the semiconductor device A2 can achieve the same effects as the semiconductor device A1 by using a configuration common to the semiconductor device A1.
[0112] 14 to 19 show a semiconductor device A3 according to a third embodiment. As shown in FIGS. 14 to 19, the semiconductor device A3 includes two switching circuits 1 and 2, a support member 3, a plurality of external terminals, a plurality of connecting members, and a sealing member 6. The plurality of external terminals includes a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, and 46. The plurality of connecting members includes a plurality of power connecting members 511 to 513, 521 to 523, and a plurality of signal connecting members 541A, 541B, 542A, 542B, 551A, 551B, 552A, and 552B.
[0113] The semiconductor device A3 has a different module structure from the semiconductor devices A1 and A2. For example, like the semiconductor device A1, the semiconductor device A3 is a resin mold type in which two switching circuits 1 and 2 are covered with a sealing member 6, but the configuration of the support member 3, the plurality of external terminals, and the plurality of connecting members is different from that of the semiconductor device A1.
[0114] The support member 3 of the semiconductor device A3 includes an insulating substrate 31, a main surface metal layer 32, a back surface metal layer 33, a pair of conductive plates 34A, 34B, a pair of insulating plates 35A, 35B, and a plurality of metal members 391, 392.
[0115] Each of the pair of conductive plates 34A, 34B is made of a conductive material, such as copper or a copper alloy. Alternatively, each of the conductive plates 34A, 34B may be a laminate in which, for example, copper layers and molybdenum layers are alternately stacked in the third direction z. In this case, both surface layers of the pair of conductive plates 34A, 34B in the third direction z are copper layers. Each of the pair of conductive plates 34A, 34B is disposed such that its thickness direction coincides (or substantially coincides) with the third direction z. As shown in FIG. 17 , each of the pair of conductive plates 34A, 34B has, for example, a rectangular shape in a plan view.
[0116] 17 and other drawings, the MOSFET 11, the IGBT 12, and the SBD 13 are mounted on the conductive plate 34A. The conductive plate 34A is electrically connected to the drain 111 of the MOSFET 11, the collector 121 of the IGBT 12, and the cathode 132 of the SBD 13. The drain 111, the collector 121, and the cathode 132 are electrically connected via the conductive plate 34A. The conductive plate 34A has, for example, a rectangular parallelepiped shape.
[0117] 17 and other drawings, the MOSFET 21, the IGBT 22, and the SBD 23 are mounted on the conductive plate 34B. The conductive plate 34B is electrically connected to the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23. The drain 211, the collector 221, and the cathode 232 are electrically connected via the conductive plate 34B. The conductive plate 34B is, for example, in the shape of a rectangular parallelepiped.
[0118] Each of the pair of insulating plates 35A and 35B is made of ceramics such as AlN, SiN, or Al2O3. Each of the pair of insulating plates 35A and 35B has, for example, a rectangular shape in plan view, as shown in FIG.
[0119] As shown in Figures 18 and 19, the insulating plate 35A is joined to the conductive plate 34A and supports the conductive plate 34A. The insulating plate 35A may have a plating layer formed on the surface to which the conductive plate 34A is joined. The plating layer may be made of, for example, silver or a silver alloy. In the example shown in Figures 18 and 19, the surface of the insulating plate 35A facing downward in the third direction z is exposed from the sealing member 6. Alternatively, the surface of the insulating plate 35A facing downward in the third direction z may be covered by the sealing member 6.
[0120] As shown in Figures 18 and 19, the insulating plate 35B is joined to the conductive plate 34B and supports the conductive plate 34B. The insulating plate 35B may have a plating layer formed on the surface to which the conductive plate 34B is joined. The plating layer may be made of, for example, silver or a silver alloy. In the example shown in Figures 18 and 19, the surface of the insulating plate 35B facing downward in the third direction z is exposed from the sealing member 6. Alternatively, the surface of the insulating plate 35B facing downward in the third direction z may be covered by the sealing member 6.
[0121] As shown in FIG. 16, the insulating substrate 31 of the semiconductor device A3 includes a plurality of through holes 311, a through hole 312, a plurality of openings 313 and a plurality of openings 314.
[0122] As shown in FIG. 18 , each of the multiple through holes 311 penetrates the insulating substrate 31 from the main surface 31 a to the back surface 31 b in the thickness direction (third direction z) of the insulating substrate 31. As shown in FIGS. 16 and 18 , a metal member 391 is inserted into each through hole 311. As shown in FIGS. 16 and 18 , the inner surface of each through hole 311 does not contact the metal member 391. Alternatively, the inner surface of each through hole 311 may contact the metal member 391. In the present disclosure, "inserted" refers to a state in which a certain member (e.g., each metal member 391) is inserted into a certain through hole (e.g., each through hole 311), and it is not limited to whether the certain member contacts the inner surface of the certain through hole. An insulating member different from the insulating substrate 31 may be formed in the gap between each metal member 391 and the through hole 311.
[0123] The through hole 312 penetrates the insulating substrate 31 from the main surface 31 a to the back surface 31 b in the thickness direction of the insulating substrate 31 (third direction z). As shown in Fig. 16 , a metal member 392 is inserted into the through hole 312. In the illustrated example, the inner surface of the through hole 312 is in contact with the metal member 392 (see Fig. 16 ), but it may not be in contact with the metal member 392, as in this configuration.
[0124] 19, each of the plurality of openings 313 penetrates the insulating substrate 31 from the main surface 31a to the back surface 31b in the thickness direction (third direction z) of the insulating substrate 31. As shown in FIG. 16, each opening 313 surrounds one of the MOSFET 11, the IGBT 12, and the SBD 13 in plan view.
[0125] 19, each of the plurality of openings 314 penetrates the insulating substrate 31 from the main surface 31a to the back surface 31b in the thickness direction (third direction z) of the insulating substrate 31. As shown in FIG. 16, each opening 314 surrounds one of the MOSFET 21, the IGBT 22, and the SBD 23 in plan view.
[0126] The main surface metal layer 32 of the semiconductor device A3 includes two power wiring portions 322 and 323 and a plurality of signal wiring portions 324A, 324B, 325A, 325B, 326 and 329, and the back surface metal layer 33 includes two power wiring portions 331 and 332.
[0127] In the semiconductor device A3, a conduction path for the main current is formed by a plurality of power wiring portions 322, 323, 331, and 332. The power wiring portion 322 and the power wiring portion 331 overlap each other in a plan view, and the power wiring portion 323 and the power wiring portion 332 overlap each other in a plan view.
[0128] The power wiring portion 331 is formed on the back surface 31b of the insulating substrate 31. The power wiring portion 331 is joined to the conductive plate 34A, as shown in Figures 18 and 19. The power wiring portion 331 is electrically connected to the drain 111 of the MOSFET 11, the collector 121 of each IGBT 12, and the cathode 132 of the SBD 13 via the conductive plate 34A.
[0129] As shown in FIGS. 17 and 19 , the power wiring portion 331 includes a plurality of openings 331 a and a through-hole 331 b. As shown in FIG. 19 , each of the openings 331 a penetrates the power wiring portion 331 in the third direction z (the thickness direction of the power wiring portion 331). As can be seen from FIG. 19 , each of the openings 331 a overlaps a corresponding opening 313 of the insulating substrate 31 in a plan view. As shown in FIG. 17 , each of the openings 331 a surrounds one of the MOSFET 11, the IGBT 12, and the SBD 13 in a plan view. The through-hole 331 b penetrates the power wiring portion 331 in the third direction z (the thickness direction of the power wiring portion 331). As shown in FIG. 17 , a metal member 392 is fitted into the through-hole 331 b, and the inner surface of the through-hole 331 b contacts the metal member 392. In the present disclosure, "fitted" refers to a state in which a certain member (e.g., metal member 392) is inserted into a certain through-hole (e.g., through-hole 331b) and the certain member is in contact with the inner surface of the certain through-hole. In other words, the "fitted" state corresponds to the "inserted" state in which the certain member is in contact with the inner surface of the through-hole.
[0130] The power wiring portion 332 is formed on the back surface 31b of the insulating substrate 31. As shown in FIGS. 18 and 19 , the power wiring portion 332 is joined to the conductive plate 34B. The power wiring portion 332 is electrically connected to the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23 via the conductive plate 34B. The power wiring portion 332 is also electrically connected to the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13 via a plurality of metal members 391, as will be described in detail later.
[0131] As shown in FIGS. 17 to 19 , the power wiring portion 332 includes a plurality of openings 332 a and a plurality of through holes 332 b. As shown in FIGS. 17 and 19 , the plurality of openings 332 a each penetrates the power wiring portion 332 in the third direction z (the thickness direction of the power wiring portion 332). As can be seen from FIG. 19 , the plurality of openings 332 a each overlaps a corresponding opening 314 of the insulating substrate 31 in a plan view. As shown in FIG. 17 , the plurality of openings 332 a each surrounds one of the MOSFET 21, the IGBT 22, and the SBD 23 in a plan view. As shown in FIG. 18 , the plurality of through holes 332 b each penetrates the power wiring portion 332 in the third direction z (the thickness direction of the power wiring portion 332). As can be seen from FIG. 18 , each through hole 332 b overlaps a corresponding through hole 323 c of the power wiring portion 323 in a plan view. A plurality of metal members 391 are fitted into each of the through holes 332b, and the inner surface of each through hole 332b is in contact with the metal member 391. In the illustrated example, each through hole 332b is circular in plan view (see FIG. 17 ), but this may be changed as appropriate depending on the shape of each metal member 391.
[0132] The power wiring portion 322 is formed on the main surface 31a of the insulating substrate 31. As shown in Fig. 15 , a plurality of power connection members 521 to 523 are joined to the power wiring portion 322, and the power wiring portion 322 is electrically connected to the source 212 of the MOSFET 21, the emitter 222 of the IGBT 22, and the anode 231 of the SBD 23 via the plurality of power connection members 521 to 523.
[0133] The power wiring portion 323 is formed on the main surface 31a of the insulating substrate 31. As shown in Fig. 15 , a plurality of power connection members 511-513 are joined to the power wiring portion 323, and the power wiring portion 323 is electrically connected to the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13 via the plurality of power connection members 511-513. The power wiring portion 323 is also electrically connected to the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23 via a plurality of metal members 391, with a configuration that will be described in detail later.
[0134] As shown in Fig. 15 , the power wiring portion 323 includes a plurality of through holes 323c. As shown in Fig. 18 , each of the plurality of through holes 323c penetrates the power wiring portion 323 in the third direction z (the thickness direction of the power wiring portion 323). As shown in Figs. 15 and 18 , one of a plurality of metal members 391 is fitted into each of the through holes 323c, and the inner surface of each through hole 323c is in contact with the corresponding metal member 391. In the illustrated example, each through hole 323c is circular in plan view (see Fig. 15 ), but this may be changed as appropriate depending on the shape of each metal member 391.
[0135] 18 , the plurality of metal members 391 each penetrate the insulating substrate 31 in the third direction z (the thickness direction of the insulating substrate 31) and electrically connect the power wiring portion 323 and the power wiring portion 332. Therefore, the power wiring portion 323 and the power wiring portion 332 are at the same potential via the plurality of metal members 391. In other words, the power wiring portion 323 and the power wiring portion 332 are electrically connected to the source 112 of the MOSFET 11, the emitter 122 of the IGBT 12, and the anode 131 of the SBD 13, respectively, and are also electrically connected to the drain 211 of the MOSFET 21, the collector 221 of the IGBT 22, and the cathode 232 of the SBD 23. Each metal member 391 is, for example, columnar. In the illustrated example, the shape of each metal member 391 in plan view is circular (see FIGS. 15 to 17), but the shape of each metal member 391 in plan view may not be circular but may be elliptical or polygonal. Each metal member 391 is made of, for example, copper or a copper alloy.
[0136] As shown in FIGS. 15 to 18 , the multiple metal members 391 are fitted into the through holes 323c of the power wiring section 323 and the through holes 332b of the power wiring section 332, and are inserted into the through holes 311 of the insulating substrate 31. Each metal member 391 contacts the inner surface of each through hole 323c and each through hole 332b. Each metal member 391 is supported by being fitted into each through hole 323c and each through hole 332b. If gaps occur between each metal member 391 and the inner surface of each through hole 323c and between each metal member 391 and the inner surface of each through hole 332b, solder may be poured into these gaps. This fills the gaps with solder, and the metal members 391 are fixed to the power wiring section 323 and the power wiring section 332. When the solder is poured, the solder can also fill the gaps between the metal members 391 and the inner surfaces of the through holes 311 of the insulating substrate 31 .
[0137] The metal member 392 penetrates the insulating substrate 31 in the third direction z (the thickness direction of the insulating substrate 31) and provides electrical continuity between the power wiring portion 331 and the signal wiring portion 326. The metal member 392 is, for example, columnar. In the illustrated example, the shape of the metal member 392 in a plan view is circular (see FIGS. 15 to 17 ), but the shape of the metal member 392 in a plan view may not be circular but may instead be elliptical or polygonal. The constituent material of the metal member 392 is, for example, copper or a copper alloy.
[0138] As shown in FIGS. 15 to 17 , the metal member 392 is fitted into the through hole 326 a of the signal wiring portion 326 and the through hole 331 b of the power wiring portion 331, and is also inserted into the through hole 312 of the insulating substrate 31. As shown in FIGS. 15 to 17 , the metal member 392 is in contact with the inner surfaces of the through holes 326 a, 331 b, and 312. At this time, if gaps are formed between the metal member 392 and the inner surfaces of the through holes 326 a, 331 b, and 312, it is advisable to pour solder into these gaps. This fills the gaps with solder, and the metal member 392 is fixed to the power wiring portion 322, the signal wiring portion 326, and the insulating substrate 31.
[0139] 15 and 19 , in semiconductor device A3, MOSFET 11, IGBT 12, and SBD 13 are each housed in a recess formed by each opening 313 of insulating substrate 31 and each opening 331a of power wiring portion 331, and conductive plate 34A. In the illustrated example, main surface 11a of MOSFET 11, main surface 12a of IGBT 12, and main surface 13a of SBD 13 overlap either insulating substrate 31 or power wiring portion 331 when viewed in a direction perpendicular to third direction z (e.g., second direction y), but may also overlap power wiring portion 322. In either case, MOSFET 11, IGBT 12, and SBD 13 do not protrude upward in third direction z beyond power wiring portion 322. 15 and 19 , MOSFET 21, IGBT 22, and SBD 23 are each housed in a recess formed by each opening 314 of insulating substrate 31 and each opening 332a of power wiring portion 332, and conductive plate 34B. In the illustrated example, main surface 21a of MOSFET 21, main surface 22a of IGBT 22, and main surface 23a of SBD 23 overlap either insulating substrate 31 or power wiring portion 332 when viewed in a direction perpendicular to third direction z (e.g., second direction y), but may also overlap power wiring portion 323. In either case, MOSFET 21, IGBT 22, and SBD 23 do not protrude upward in the third direction z beyond power wiring portion 323.
[0140] In the semiconductor device A3, the power terminal 41 is not a metal plate but is part of the power wiring section 331. The power terminal 42 is not a metal plate but is part of the power wiring section 322. One of the two power terminals 43 is not a metal plate but is part of the power wiring section 323. The other of the two power terminals 43 is not a metal plate but is part of the power wiring section 332. Each of the multiple power terminals 41 to 43 is exposed from the sealing member 6. The surfaces of the multiple power terminals 41 to 43 may or may not be plated. The power terminal 41 and the power terminal 42 overlap each other in a planar view. The two power terminals 43 overlap each other in a planar view. In the illustrated example, the semiconductor device A3 includes two power terminals 43, but may also include only one of the two power terminals 43, unlike this configuration. In the semiconductor device A3, all of the multiple power terminals 41 to 43 are located on one side in the first direction x of the two switching circuits 1 and 2. Of the switching circuit 1, the MOSFET 11 has the shortest conduction path to the power terminal 41, and of the switching circuit 2, the MOSFET 21 has the shortest conduction path to the power terminal 41.
[0141] In the semiconductor device A3, as in the semiconductor devices A1 and A2, the breakdown voltage of the MOSFET 11 is greater than the breakdown voltage of the IGBT 12. Therefore, like the semiconductor devices A1 and A2, the semiconductor device A3 can suppress the occurrence of failures due to surge voltages when the MOSFET 11 and the IGBT 12 are operated in parallel, thereby suppressing a decrease in reliability. Furthermore, in the semiconductor device A3, the breakdown voltage of the MOSFET 21 is greater than the breakdown voltage of the IGBT 22. Therefore, like the semiconductor devices A1 and A2, the semiconductor device A3 can suppress the occurrence of failures due to surge voltages when the MOSFET 21 and the IGBT 22 are operated in parallel, thereby suppressing a decrease in reliability. Furthermore, the semiconductor device A3, by virtue of its common configuration with the semiconductor devices A1 and A2, can achieve the same effects as the semiconductor devices A1 and A2.
[0142] 20 to 24 show a semiconductor device A4 according to the fourth embodiment. As shown in FIGS. 20 to 24, the semiconductor device A4 includes two switching circuits 1 and 2, a support member 3, a plurality of external terminals, a plurality of connecting members, and a sealing member 6. The plurality of external terminals includes a plurality of power terminals 41 to 43 and a plurality of signal terminals 44A, 44B, 45A, 45B, and 49. The plurality of connecting members includes a plurality of power connecting members 511 to 513, 521 to 523, and a plurality of signal connecting members 541A, 541B, 542A, 542B, 551A, 551B, 552A, 552B, 540A, 540B, 550A, and 550B.
[0143] The semiconductor device A4 has a different module structure from the semiconductor devices A1 to A3. For example, like the semiconductor devices A1 and A3, the semiconductor device A4 is a resin-molded type in which two switching circuits 1 and 2 are covered with a sealing member 6, but the configuration of the support member 3, external terminals, and multiple connecting members differs from the semiconductor devices A1 and A3. Note that the semiconductor device A4 will be described as an example in which the switching circuit 1 includes one MOSFET 11, two IGBTs 12, and one SBD 13, and the switching circuit 2 includes one MOSFET 21, two IGBTs 22, and one SBD 23.
[0144] The support member 3 of the semiconductor device A4 includes a pair of conductive plates 34A, 34B, an insulating plate 35, a pair of insulating plates 36A, 36B, and a plurality of signal wiring portions 371A, 371B, 372A, 372B.
[0145] The conductive plate 34A of the semiconductor device A4 is mounted with the switching circuit 1, similar to the conductive plate 34A of the semiconductor device A3. However, in the semiconductor device A4, as shown in Fig. 22 , the MOSFET 11, the two IGBTs 12, and the SBD 13 are arranged on the conductive plate 34A along the second direction y. Furthermore, in the second direction y, the MOSFET 11 and the SBD 13 are arranged between the two IGBTs 12.
[0146] The conductive plate 34B of the semiconductor device A4 is mounted with the switching circuit 2, similar to the conductive plate 34B of the semiconductor device A3. However, in the semiconductor device A4, the MOSFET 21, the two IGBTs 22, and the SBD 23 are arranged on the conductive plate 34B along the second direction y, as shown in Fig. 22. Furthermore, the MOSFET 21 and the SBD 23 are arranged between the two IGBTs 22 in the second direction y.
[0147] The insulating plate 35 is made of ceramic, similar to the insulating plates 35A and 35B of the semiconductor device A3. Both of the pair of conductive plates 34A and 34B are joined to the insulating plate 35, and the insulating plate 35 supports them. Unlike this configuration, the semiconductor device A4 may include a pair of insulating plates 35A and 35B instead of the insulating plate 35, similar to the semiconductor device A3, with the conductive plate 34A joined to the insulating plate 35A and the conductive plate 34B joined to the insulating plate 35B.
[0148] Each of the pair of insulating plates 36A, 36B is made of, for example, glass epoxy resin. As shown in FIGS. 22 to 24 , the insulating plate 36A is disposed on the conductive plate 34A. As shown in FIG. 22 , the insulating plate 36A has a strip shape extending in the second direction y in a plan view. As shown in FIG. 22 , the insulating plate 36A is positioned on the side where the power terminal 41 is disposed relative to the switching circuit 1 (MOSFET 11, two IGBTs 12, and SBD 13) in the first direction x. As shown in FIG. 22 , the insulating plate 36B is disposed on the conductive plate 34B. As shown in FIG. 22 , the insulating plate 36B has a strip shape extending in the second direction y in a plan view. As shown in FIG. 22 , the insulating plate 36B is positioned on the side where the power terminal 43 is disposed relative to the switching circuit 2 (MOSFET 21, two IGBTs 22, and SBD 23) in the first direction x.
[0149] As shown in FIGS. 22 to 24 , the two signal wiring portions 371A, 372A are each disposed on the insulating plate 36A. Each of the two signal wiring portions 371A, 372A is made of, for example, copper or a copper alloy. As shown in FIG. 22 , each of the two signal wiring portions 371A, 372A has a strip shape extending in the second direction y in a plan view. As shown in FIG. 22 , the signal wiring portion 371A is connected to a plurality of signal connection members 541A, 542A, and is electrically connected to the gate 113 of the MOSFET 11 and the gates 123 of each IGBT 12 via the plurality of signal connection members 541A, 542A. The signal wiring portion 371A transmits a first drive signal, similar to the signal wiring portion 324A. The signal wiring portion 371A is joined to a signal connecting member 540A and is electrically connected to a signal terminal 44A (an input terminal for the first drive signal) via the signal connecting member 540A. The signal wiring portion 372A is connected to a plurality of signal connecting members 551A and 552A and is electrically connected to the source 112 of the MOSFET 11 and the emitters 122 of each IGBT 12 via the plurality of signal connecting members 551A and 552A. The signal wiring portion 372A transmits a first detection signal, similar to the signal wiring portion 325A. The signal wiring portion 372A is joined to a signal connecting member 550A and is electrically connected to a signal terminal 45A (an output terminal for the first detection signal) via the signal connecting member 550A.
[0150] As shown in FIGS. 22 to 24 , the two signal wiring portions 371B, 372B are each disposed on the insulating plate 36B. Each of the two signal wiring portions 371B, 372B is made of, for example, copper or a copper alloy. As shown in FIG. 22 , each of the two signal wiring portions 371B, 372B has a strip shape extending in the second direction y in a plan view. As shown in FIG. 22 , the signal wiring portion 371B is connected to a plurality of signal connection members 541B, 542B, and is electrically connected to the gate 213 of the MOSFET 21 and the gate 223 of each IGBT 22 via the plurality of signal connection members 541B, 542B. The signal wiring portion 371B transmits a second drive signal, similar to the signal wiring portion 324B. The signal wiring portion 371B is joined to a signal connecting member 540B, and is electrically connected to a signal terminal 44B (an input terminal for the second drive signal) via the signal connecting member 540B. A plurality of signal connecting members 551B and 552B are connected to the signal wiring portion 372B, and is electrically connected to the source 212 of the MOSFET 21 and the emitters 222 of each IGBT 22 via the plurality of signal connecting members 551B and 552B. The signal wiring portion 372B transmits a second detection signal, similar to the signal wiring portion 325B. The signal wiring portion 372B is joined to a signal connecting member 550B, and is electrically connected to a signal terminal 45B (an output terminal for the second detection signal) via the signal connecting member 550B.
[0151] The power terminal 41 of the semiconductor device A4 has a joint 411 electrically connected to the conductive plate 34A. In the example shown in Fig. 22, the tip of the joint 411 (the side opposite the base end connected to the terminal 412) has a comb-like shape, and the comb-like part is electrically connected to the conductive plate 34A. The method for connecting the joint 411 to the conductive plate 34A is not particularly limited, and may be, for example, laser bonding, ultrasonic bonding, or bonding using a conductive bonding material.
[0152] In the power terminal 42 of the semiconductor device A4, the joint portion 421 includes a connecting portion 421a and multiple extending portions 421b. The connecting portion 421a is connected to the terminal portion 422. The connecting portion 421a is connected to each of the multiple extending portions 421b. The multiple extending portions 421b are strip-shaped and extend from the connecting portion 421a in the first direction x. In a plan view, the multiple extending portions 421b are aligned in the second direction y and arranged parallel to one another. In a plan view, the tip portion of each extending portion 421b overlaps an insulating block material 429. The tip portion is joined to each block material 429 by a joining material (not shown). The tip portion is the edge portion of the extending portion 421b on the side opposite to the side connected to the connecting portion 421a in the first direction x. The joining of each extension 421b and each block 429 is not limited to joining using a joining material, but may be laser welding, ultrasonic joining, or the like.
[0153] 22 , the tip of the joint 431 (the side opposite the base end connected to the terminal 432) is comb-shaped, and the comb-shaped part is conductively joined to the conductive plate 34B. The method for joining the joint 431 to the conductive plate 34B is not particularly limited, and may be, for example, laser joining, ultrasonic joining, or joining using a conductive joining material.
[0154] The insulating member 40 has electrical insulation properties and is made of, for example, insulating paper. As shown in Figures 4, 6, 9, 10, and 11, the insulating member 40 is sandwiched between the terminal portion 412 of the power terminal 41 and the terminal portion 422 of the power terminal 42 in the third direction z. The two power terminals 41, 42 are insulated from each other by the insulating member 40. A portion of the insulating member 40 (a portion on one side in the first direction x) is covered with the sealing member 6.
[0155] The power connection member 511 is joined to the source 112 and the conductive plate 34B of the MOSFET 11, thereby providing electrical continuity therebetween. Each power connection member 512 is joined to the emitter 122 and the conductive plate 34B of each IGBT 12, thereby providing electrical continuity therebetween. The power connection member 513 is joined to the anode 131 and the conductive plate 34B of the SBD 13, thereby providing electrical continuity therebetween.
[0156] The power connection member 521 is joined to the source 212 of the MOSFET 21 and any one of the multiple extensions 421b of the power terminal 42, thereby providing electrical continuity therebetween. Each power connection member 522 is joined to the emitter 222 of each IGBT 22 and any one of the multiple extensions 421b of the power terminal 42, thereby providing electrical continuity therebetween. The power connection member 523 is joined to the anode 231 of the SBD 23 and any one of the multiple extensions 421b of the power terminal 42, thereby providing electrical continuity therebetween.
[0157] In the semiconductor device A4, as in each of the semiconductor devices A1 to A3, the element breakdown voltage of the MOSFET 11 is greater than the element breakdown voltage of the IGBT 12. Therefore, like each of the semiconductor devices A1 to A3, the semiconductor device A4 can suppress the occurrence of failures due to surge voltages when the MOSFET 11 and the IGBT 12 are operated in parallel, thereby suppressing a decrease in reliability. Furthermore, in the semiconductor device A4, the element breakdown voltage of the MOSFET 21 is greater than the element breakdown voltage of the IGBT 22. Thus, like each of the semiconductor devices A1 to A3, the semiconductor device A4 can suppress the occurrence of failures due to surge voltages when the MOSFET 21 and the IGBT 22 are operated in parallel, thereby suppressing a decrease in reliability. In addition, the semiconductor device A4 can achieve the same effects as each of the semiconductor devices A1 to A3 due to the configuration common to each of the semiconductor devices A1 to A3.
[0158] In the first to fourth embodiments, each of the semiconductor devices A1 to A4 has an example in which the switching circuit 1 includes at least one MOSFET 11, one IGBT 12, and one SBD 13. However, as long as the switching circuit 1 includes at least one MOSFET 11 and one IGBT 12, the SBD 13 may not be included. For example, FIG. 25 shows an example in which the switching circuit 1 of the semiconductor device A1 includes the MOSFET 11 and two IGBTs 12. As can be seen from FIG. 25, the same applies to the switching circuit 2. Note that when the MOSFET 11 and the IGBT 12 are operated in parallel, the MOSFET 11 is operated preferentially in the low current range, and the IGBT 12 is operated preferentially in the high current range, in order to suppress power loss due to on-resistance. In this case, the load is relatively lower in the low current range than when operating in the high current range, and the load is relatively higher in the high current range than when operating in the low current range. Therefore, in the semiconductor device shown in FIG. 25, the number of IGBTs 12 that are operated with priority in the high current range is made larger than the number of MOSFETs 11 that are operated with priority in the low current range.
[0159] In the first to fourth embodiments, examples have been shown in which each of the semiconductor devices A1 to A4 includes two switching circuits 1 and 2, but they may also include one switching circuit 1. For example, Fig. 26 shows an example in which the semiconductor device A1 includes the switching circuit 1 but does not include the switching circuit 2.
[0160] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways. For example, the present disclosure includes the embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: a first MOSFET; and a first IGBT; wherein the drain of the first MOSFET and the collector of the first IGBT are electrically connected; the source of the first MOSFET and the emitter of the first IGBT are electrically connected; and the withstand voltage of the first MOSFET is higher than the withstand voltage of the first IGBT. Appendix 2. The semiconductor device according to Appendix 1, wherein the first MOSFET is made of SiC; and the first IGBT is made of Si. Appendix 3. The semiconductor device according to Supplementary Note 1 or 2, further comprising: a first power terminal electrically connected to the drain of the first MOSFET and the collector of the first IGBT; and a second power terminal electrically connected to the source of the first MOSFET and the emitter of the first IGBT, wherein an inductance of a first conduction path from the drain of the first MOSFET to the first power terminal is smaller than an inductance of a second conduction path from the collector of the first IGBT to the first power terminal.Supplementary Note 4. The semiconductor device according to Supplementary Note 3, further comprising: a first Schottky barrier diode electrically connected in parallel to the first MOSFET and the first IGBT.Supplementary Note 5. The semiconductor device according to Supplementary Note 4, wherein the first Schottky barrier diode includes SiC.Supplementary Note 6. The semiconductor device according to Supplementary Note 4 or 5, wherein a length of a third conduction path from the first Schottky barrier diode to the first power terminal is greater than a length of the first conduction path and less than a length of the second conduction path.Supplementary Note 7. 7. The semiconductor device according to claim 3, further comprising: a second MOSFET; and a second IGBT, wherein a drain of the second MOSFET and a collector of the second IGBT are electrically connected; a source of the second MOSFET and an emitter of the second IGBT are electrically connected; and a breakdown voltage of the second MOSFET is higher than a breakdown voltage of the second IGBT.Appendix 8. The semiconductor device according to Appendix 7, wherein the second MOSFET is comprised of SiC, and the second IGBT is comprised of Si. Appendix 9. The semiconductor device according to Appendix 7 or Appendix 8, further comprising: a third power terminal electrically connected to the source of the second MOSFET and the emitter of the second IGBT, the second power terminal being electrically connected to the drain of the second MOSFET and the collector of the second IGBT, and an inductance of a fourth conduction path from the source of the second MOSFET to the first power terminal being smaller than an inductance of a fifth conduction path from the emitter of the second IGBT to the first power terminal. Appendix 10. The semiconductor device according to Appendix 9, further comprising: a second Schottky barrier diode electrically connected in parallel to the second MOSFET and the second IGBT. Appendix 11. The semiconductor device according to Appendix 10, wherein the second Schottky barrier diode is comprised of SiC. Appendix 12. the length of a sixth conduction path from the second Schottky barrier diode to the first power terminal is greater than the length of the fourth conduction path and less than the length of the fifth conduction path. Supplementary Note 13: The semiconductor device according to any of Supplementary Note 9 to Supplementary Note 12, further comprising: a first conductor connected to the first power terminal; a second conductor connected to the second power terminal; and a third conductor connected to the third power terminal, wherein the first conductor includes a first pad portion conductive to the drain of the first MOSFET and the collector of the first IGBT, the second conductor includes a second pad portion conductive to the source of the first MOSFET, the emitter of the first IGBT, the drain of the second MOSFET, and the collector of the second IGBT, and the third conductor includes a third pad portion conductive to the source of the second MOSFET and the emitter of the second IGBT.Appendix 14. The semiconductor device according to Appendix 13, wherein each of the first MOSFET and the second MOSFET has a vertical structure in which the drain and the source are arranged apart in the thickness direction of each, and each of the first IGBT and the second IGBT has a vertical structure in which the collector and the emitter are arranged apart in the thickness direction of each. Appendix 15. The semiconductor device according to Appendix 14, further comprising: a first connection member that electrically connects the source of the first MOSFET and the second pad portion; and a second connection member that electrically connects the emitter of the first IGBT and the second pad portion, wherein the drain of the first MOSFET and the collector of the first IGBT are conductively joined to the first pad portion. Appendix 16. The semiconductor device according to Appendix 15, further comprising: a third connection member electrically connecting the source of the second MOSFET and the third pad portion; and a fourth connection member electrically connecting the emitter of the second IGBT and the third pad portion, wherein the drain of the second MOSFET and the collector of the second IGBT are conductively joined to the second pad portion. Appendix 17. The semiconductor device according to Appendix 16, wherein the first MOSFET and the first IGBT are arranged along a first arrangement direction intersecting with a thickness direction of the first pad portion, the second MOSFET and the second IGBT are arranged along a second arrangement direction intersecting with a thickness direction of the second pad portion, and the first arrangement direction and the second arrangement direction are the same. Appendix 18. 18. The semiconductor device according to claim 17, wherein the first power terminal and the third power terminal are located on an opposite side of the first MOSFET from the first IGBT in the first arrangement direction, and are located on an opposite side of the second MOSFET from the second IGBT in the second arrangement direction.
[0161] A1 to A4: semiconductor device 1, 2: switching circuit 11, 21: MOSFET 11a, 21a: main surface 11b, 21b: back surface 111, 211: drain 112, 212: source 113, 213: gate 12, 22: IGBT 12a, 22a: main surface 12b, 22b: back surface 121, 221: collector 122, 222: emitter 123, 223: gate 13, 23: SBD 13a, 23a: main surface 13b, 23b: back surface 131, 231: anode 132, 232: cathode 3: support member 31: insulating substrate 31a: main surface 31b: back surface 311, 312: through hole 313, 314: opening 32: Main surface metal layer 321, 322, 323: Power wiring section 321a, 321b: Pad section 322a, 322b: Pad section 322s: Slit 323a, 323b: Pad section 323c: Through hole 324A, 324B: Signal wiring section 325A, 325B: Signal wiring section 326, 327, 329: Signal wiring section 326a: Through hole 33: Back surface metal layer 331, 332: Power wiring section 331a, 332a: Opening 331b, 332b: Through hole 34A, 34B: Conductive plate 35, 35A, 35B: Insulating plate 36A, 36B: Insulating plate 371A, 371B: Signal wiring section 372A, 372B: Signal wiring section 391, 392: Metal member 40: Insulating member 41, 42, 43: Power terminal 411, 421, 431: Joint portion 412, 422, 432: Terminal portion 421a: Linking portion 421b: Extension portion 429: Block material 44A, 44B: Signal terminal 45A, 45B: Signal terminal 46, 47, 49: Signal terminal 511, 512, 513, 521, 522, 523: Power connecting member 540A, 540B, 541A, 541B, 542A, 542B: Signal connecting member 550A, 550B, 551A, 551B, 552A, 552B: Signal connecting member 56, 57: Signal connecting member 6: Sealing member 61: Resin main surface 62: Resin back surface 631 to 634: Resin side surfaces 70: Heat sink 71: Case 72: Frame 73: Top plate 741 to 744: Terminal block 75: Resin member TH: Thermistor
Claims
1. A first MOSFET; and A first IGBT; It is equipped with the drain of the first MOSFET and the collector of the first IGBT are electrically connected; the source of the first MOSFET and the emitter of the first IGBT are electrically connected to each other; The element breakdown voltage of the first MOSFET is higher than the element breakdown voltage of the first IGBT. Semiconductor device.
2. the first MOSFET is configured to include SiC; The semiconductor device according to claim 1 , wherein said first IGBT comprises Si.
3. a first power terminal in communication with the drain of the first MOSFET and the collector of the first IGBT; a second power terminal in communication with the source of the first MOSFET and the emitter of the first IGBT; It also has 2 . The semiconductor device according to claim 1 , wherein an inductance of a first conduction path from the drain of the first MOSFET to the first power terminal is smaller than an inductance of a second conduction path from the collector of the first IGBT to the first power terminal.
4. The semiconductor device according to claim 3 , further comprising a first Schottky barrier diode electrically connected in parallel to said first MOSFET and said first IGBT.
5. The semiconductor device according to claim 4 , wherein the first Schottky barrier diode is made of SiC.
6. 5 . The semiconductor device according to claim 4 , wherein a length of a third conduction path from said first Schottky barrier diode to said first power terminal is greater than a length of said first conduction path and less than a length of said second conduction path.
7. A second MOSFET; and A second IGBT; and Further equipped with the drain of the second MOSFET and the collector of the second IGBT are electrically connected to each other; the source of the second MOSFET and the emitter of the second IGBT are electrically connected to each other; 4. The semiconductor device according to claim 3, wherein a breakdown voltage of said second MOSFET is higher than a breakdown voltage of said second IGBT.
8. the second MOSFET is configured to include SiC; The semiconductor device according to claim 7 , wherein the second IGBT includes Si.
9. a third power terminal in communication with the source of the second MOSFET and the emitter of the second IGBT; the second power terminal is electrically connected to the drain of the second MOSFET and the collector of the second IGBT; 8. The semiconductor device according to claim 7, wherein an inductance of a fourth conduction path from the source of the second MOSFET to the first power terminal is smaller than an inductance of a fifth conduction path from the emitter of the second IGBT to the first power terminal.
10. The semiconductor device according to claim 9 , further comprising a second Schottky barrier diode electrically connected in parallel to said second MOSFET and said second IGBT.
11. The semiconductor device according to claim 10 , wherein the second Schottky barrier diode is made of SiC.
12. 11. The semiconductor device according to claim 10, wherein a length of a sixth conduction path from said second Schottky barrier diode to said first power terminal is greater than a length of said fourth conduction path and less than a length of said fifth conduction path.
13. a first conductor connected to the first power terminal; a second conductor connected to the second power terminal; a third conductor connected to the third power terminal; It also has the first conductor includes a first pad portion electrically connected to the drain of the first MOSFET and the collector of the first IGBT; the second conductor includes a second pad portion electrically connected to the source of the first MOSFET, the emitter of the first IGBT, the drain of the second MOSFET, and the collector of the second IGBT; 13 . The semiconductor device according to claim 9 , wherein the third conductor includes a third pad portion that is electrically connected to the source of the second MOSFET and the emitter of the second IGBT.
14. each of the first MOSFET and the second MOSFET has a vertical structure in which the drain and the source are disposed apart from each other in a thickness direction of the first MOSFET and the second MOSFET, 14. The semiconductor device according to claim 13, wherein each of said first IGBT and said second IGBT has a vertical structure in which said collector and said emitter are disposed apart from each other in a thickness direction of said first IGBT and said second IGBT.
15. a first connection member electrically connecting the source of the first MOSFET and the second pad portion; a second connection member electrically connecting the emitter of the first IGBT and the second pad portion, The semiconductor device according to claim 14 , wherein the drain of the first MOSFET and the collector of the first IGBT are conductively joined to the first pad portion.
16. a third connection member electrically connecting the source of the second MOSFET and the third pad portion; a fourth connection member that electrically connects the emitter of the second IGBT and the third pad portion; Further equipped with The semiconductor device according to claim 15 , wherein the drain of the second MOSFET and the collector of the second IGBT are conductively joined to the second pad portion.
17. the first MOSFET and the first IGBT are arranged along a first arrangement direction intersecting a thickness direction of the first pad portion, the second MOSFET and the second IGBT are arranged along a second arrangement direction intersecting a thickness direction of the second pad portion, The semiconductor device according to claim 16 , wherein the first arrangement direction and the second arrangement direction are the same direction.
18. 18. The semiconductor device according to claim 17, wherein the first power terminal and the third power terminal are located on an opposite side of the first MOSFET from the first IGBT in the first arrangement direction, and are located on an opposite side of the second MOSFET from the second IGBT in the second arrangement direction.