Semiconductor device

Abstract

This semiconductor device is provided with: an electrically conductive substrate having a main surface facing one side in a thickness direction, and a reverse surface facing the opposite side to the main surface; at least one first semiconductor element which is joined to the main surface and which has a switching function; a first conductive member constituting a path for a main circuit current that is switched by the first semiconductor element; and sealing resin covering at least a portion of the electrically conductive substrate, the first semiconductor element, and the first conductive member. The electrically conductive substrate includes a first electrically conductive portion and a second electrically conductive portion which are disposed spaced apart from one another on one side and another side in a first direction perpendicular to the thickness direction. The first semiconductor element is electrically joined to the first electrically conductive portion. The first conductive member includes a first portion that overlaps both the first electrically conductive portion and the second electrically conductive portion when viewed in the thickness direction, and that is positioned set apart, in the thickness direction, from the main surface toward said one side in the thickness direction. The first portion has a first opening.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Conventionally, semiconductor devices including power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors) have been known. Such semiconductor devices are installed in a variety of electronic devices, from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 (Patent Document 1) discloses a conventional semiconductor device (power module). The semiconductor device described in Patent Document 1 includes a semiconductor element, a support substrate, and a sealing resin. The semiconductor element is, for example, an IGBT made of Si (silicon). The support substrate supports the semiconductor element. The support substrate includes an insulating base material and conductor layers stacked on the main surface and back surface of the base material. The base material is, for example, made of ceramic. Each conductor layer is, for example, made of Cu (copper), and a semiconductor element is bonded to one of the conductor layers. The semiconductor element is covered with a sealing resin.

[0003] JP 2015-220382 A

[0004] In recent years, there has been a demand for electronic devices to become more compact and perform better. To achieve this, it is necessary to improve the performance and miniaturize the semiconductor modules that are installed in these electronic devices.

[0005] The present disclosure has been devised in light of the above circumstances, and has as one object to provide a semiconductor device (semiconductor module) that can meet the above-mentioned demands. Another object of the present disclosure is to provide a semiconductor device that suppresses unfilled sealing resin and is suitable for passing a large current.

[0006] A semiconductor device provided by the present disclosure comprises a conductive substrate having a main surface facing one side in a thickness direction and a back surface facing the opposite side to the main surface, at least one first semiconductor element bonded to the main surface and having a switching function, a first conductive member forming a path of a main circuit current switched by the first semiconductor element, and a sealing resin covering at least a portion of the conductive substrate, the first semiconductor element, and the first conductive member, wherein the conductive substrate includes a first conductive portion and a second conductive portion arranged spaced apart from each other on one side and the other side in a first direction perpendicular to the thickness direction, the first semiconductor element being electrically bonded to the first conductive portion, and the first conductive member includes a first portion that overlaps both the first conductive portion and the second conductive portion when viewed in the thickness direction and is positioned away from the main surface in the thickness direction to one side of the thickness direction, and the first portion has a first opening.

[0007] According to the semiconductor device of the present disclosure, for example, it is possible to provide a structure that is preferable for preventing non-filling of the sealing resin and for allowing a large current to flow.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a perspective view of FIG. 1 with the sealing resin omitted. FIG. 3 is a perspective view of FIG. 2 with the first conductive member omitted. FIG. 4 is a plan view of the semiconductor device shown in FIG. 1. FIG. 5 is a view showing the sealing resin in imaginary lines in the plan view of FIG. 4. FIG. 6 is a right side view of the semiconductor device shown in FIG. 1 with the sealing resin in imaginary lines. FIG. 7 is a partially enlarged view of a portion of FIG. 5 with the sealing resin omitted. FIG. 8 is a plan view of a second conductive member. FIG. 9 is a view of the plan view of FIG. 5 with the sealing resin and the second conductive member omitted. FIG. 10 is a view showing the first conductive member in imaginary lines in the plan view of FIG. 9. FIG. 11 is a right side view of the semiconductor device shown in FIG. 1. FIG. 12 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 5. FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 5. FIG. 15 is a partially enlarged view of FIG. 14. FIG. 16 is a partially enlarged view of FIG. 14. FIG. 17 is a partially enlarged view of FIG. 14. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 5. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 5. FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 5. FIG. 21 is a plan view similar to FIG. 7 (with the sealing resin omitted) showing a semiconductor device according to a modified example of the first embodiment. FIG. 22 is a plan view showing a semiconductor device according to a modified example of the first embodiment, with the sealing resin and second conductive member omitted. FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 21. FIG. 24 is a partially enlarged view of FIG. 23.

[0010] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0011] Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to dictate any ordering of their objects.

[0012] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed from a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."

[0013] 1 to 20 show a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 according to this embodiment includes a plurality of first semiconductor elements 10A, a plurality of second semiconductor elements 10B, a conductive substrate 2, a support substrate 3, a first terminal 41, a second terminal 42, a plurality of third terminals 43, a fourth terminal 44, a plurality of control terminals 45, a control terminal support 48, a first conductive member 5, a second conductive member 6, and a sealing resin 8.

[0014] FIG. 1 is a perspective view showing a semiconductor device A1. FIG. 2 is a perspective view of FIG. 1 with the sealing resin 8 omitted. FIG. 3 is a perspective view of FIG. 2 with the first conductive member 5 omitted. FIG. 4 is a plan view of the semiconductor device A1. FIG. 5 is a view of the plan view of FIG. 4 with the sealing resin 8 shown in imaginary lines. FIG. 6 is a right side view of the semiconductor device A1 with the sealing resin 8 shown in imaginary lines. FIG. 7 is a partially enlarged view of a portion of FIG. 5 with the sealing resin 8 omitted. FIG. 8 is a plan view of the second conductive member 6. FIG. 9 is a view of the plan view of FIG. 5 with the sealing resin 8 and the second conductive member 6 omitted. FIG. 10 is a view of the plan view of FIG. 9 with the first conductive member 5 shown in imaginary lines. FIG. 11 is a right side view of the semiconductor device A1. FIG. 12 is a bottom view of the semiconductor device A1. FIG. 13 is a cross-sectional view taken along line XIII-XIII of FIG. 5. Fig. 14 is a cross-sectional view taken along line XIV-XIV in Fig. 5. Figs. 15 to 17 are partially enlarged views of Fig. 14. Fig. 18 is a cross-sectional view taken along line XVIII-XVIII in Fig. 5. Fig. 19 is a cross-sectional view taken along line XIX-XIX in Fig. 5. Fig. 20 is a cross-sectional view taken along line XX-XX in Fig. 5.

[0015] For convenience of explanation, reference will be made to three mutually orthogonal directions (x direction, y direction, and z direction). The z direction is, for example, the thickness direction of the semiconductor device A1. The x direction is the left-right direction in the plan view of the semiconductor device A1 (see FIG. 4). The y direction is the up-down direction in the plan view of the semiconductor device A1 (see FIG. 4). In the following explanation, "plan view" refers to the view in the z direction. The x direction is an example of a "first direction," and the y direction is an example of a "second direction."

[0016] The multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B are electronic components that are central to the functionality of the semiconductor device A1. The constituent material of each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is a semiconductor material primarily composed of, for example, silicon carbide (SiC). This semiconductor material is not limited to SiC and may be silicon (Si), gallium nitride (GaN), diamond (C), or the like. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, a power semiconductor chip with switching function, such as a metal oxide semiconductor field effect transistor (MOSFET). In this embodiment, the first semiconductor elements 10A and the second semiconductor elements 10B are MOSFETs, but are not limited thereto and may be other transistors such as insulated gate bipolar transistors (IGBTs). Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is the same element. Each of the first semiconductor elements 10A and each of the second semiconductor elements 10B is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0017] 15 and 16 , the first semiconductor element 10A and the second semiconductor element 10B each have an element main surface 101 and an element back surface 102. In each of the first semiconductor elements 10A and the second semiconductor elements 10B, the element main surface 101 and the element back surface 102 are spaced apart in the z direction. The element main surface 101 faces the z2 direction, and the element back surface 102 faces the z1 direction.

[0018] In this embodiment, the semiconductor device A1 includes four first semiconductor elements 10A and four second semiconductor elements 10B. However, the number of first semiconductor elements 10A and the number of second semiconductor elements 10B are not limited to this configuration and may be changed as appropriate depending on the performance required of the semiconductor device A1. In the example shown in FIGS. 9 and 10 , four first semiconductor elements 10A and four second semiconductor elements 10B are arranged. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be two, three, or five or more. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B may be equal to or different from each other. The number of first semiconductor elements 10A and the number of second semiconductor elements 10B is determined by the current capacity handled by the semiconductor device A1.

[0019] The semiconductor device A1 is configured, for example, as a half-bridge switching circuit. In this case, a plurality of first semiconductor elements 10A form an upper arm circuit of the semiconductor device A1, and a plurality of second semiconductor elements 10B form a lower arm circuit. In the upper arm circuit, the plurality of first semiconductor elements 10A are connected in parallel with each other, and in the lower arm circuit, the plurality of second semiconductor elements 10B are connected in parallel with each other. Each first semiconductor element 10A and each second semiconductor element 10B are connected in series to form a bridge layer.

[0020] As shown in Figures 9, 10, and 20, each of the multiple first semiconductor elements 10A is mounted on a conductive substrate 2. In the example shown in Figures 9 and 10, the multiple first semiconductor elements 10A are lined up, for example, in the y direction and spaced apart from one another. Each first semiconductor element 10A is conductively bonded to the conductive substrate 2 (a first conductive portion 2A described below) via a conductive bonding material 19. When each first semiconductor element 10A is bonded to the first conductive portion 2A, the element back surface 102 faces the first conductive portion 2A.

[0021] As shown in FIGS. 9 , 10 , and 19 , the multiple second semiconductor elements 10B are mounted on a conductive substrate 2. In the example shown in FIGS. 9 and 10 , the multiple second semiconductor elements 10B are aligned, for example, in the y direction and spaced apart from one another. Each second semiconductor element 10B is conductively bonded to the conductive substrate 2 (a second conductive portion 2B described below) via a conductive bonding material 19. When each second semiconductor element 10B is bonded to the second conductive portion 2B, the element back surface 102 faces the second conductive portion 2B. As can be seen from FIG. 10 , the multiple first semiconductor elements 10A and the multiple second semiconductor elements 10B overlap when viewed in the x direction, but they do not necessarily have to overlap.

[0022] The plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B each have a first principal surface electrode 11, a second principal surface electrode 12, a third principal surface electrode 13, and a back surface electrode 15. The configurations of the first principal surface electrode 11, the second principal surface electrode 12, the third principal surface electrode 13, and the back surface electrode 15 described below are common to each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are provided on the element main surface 101. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are insulated by an insulating film (not shown). The back surface electrode 15 is provided on the element back surface 102.

[0023] The first principal surface electrode 11 is, for example, a gate electrode, to which a drive signal (for example, a gate voltage) for driving the first semiconductor element 10A (second semiconductor element 10B) is input. In the first semiconductor element 10A (second semiconductor element 10B), the second principal surface electrode 12 is, for example, a source electrode, through which a source current flows. The third principal surface electrode 13 is, for example, a source sense electrode, through which a source current flows. The back surface electrode 15 is, for example, a drain electrode, through which a drain current flows. The back surface electrode 15 covers the entire area (or substantially the entire area) of the element back surface 102. The back surface electrode 15 is, for example, formed by Ag (silver) plating.

[0024] When a drive signal (gate voltage) is input to the first principal surface electrode 11 (gate electrode), each first semiconductor element 10A (each second semiconductor element 10B) switches between a conductive state and a non-conductive state in response to the drive signal. In the conductive state, current flows from the back surface electrode 15 (drain electrode) to the second principal surface electrode 12 (source electrode), and in the non-conductive state, current does not flow. In other words, each first semiconductor element 10A (each second semiconductor element 10B) performs a switching operation. The semiconductor device A1 converts a DC voltage input between the single fourth terminal 44 and the two first and second terminals 41 and 42 into, for example, an AC voltage, and outputs the AC voltage from the third terminal 43, using the switching functions of the multiple first semiconductor elements 10A and multiple second semiconductor elements 10B.

[0025] 5, 9, 10, etc., the semiconductor device A1 includes a thermistor 17. The thermistor 17 is used as a temperature detection sensor.

[0026] The conductive substrate 2 supports the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The conductive substrate 2 is bonded onto the support substrate 3 via a conductive bonding material 29. The conductive substrate 2 has, for example, a rectangular shape in a plan view. The conductive substrate 2, together with the first conductive members 5 and the second conductive members 6, constitutes a path for a main circuit current that is switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B.

[0027] The conductive substrate 2 includes a first conductive portion 2A and a second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B are each a plate-shaped member made of metal. This metal is, for example, Cu (copper) or a Cu alloy. The first conductive portion 2A and the second conductive portion 2B, together with a first terminal 41, a second terminal 42, a plurality of third terminals 43, and a fourth terminal 44, form conductive paths to a plurality of first semiconductor elements 10A and a plurality of second semiconductor elements 10B. As shown in FIGS. 13 to 20 , the first conductive portion 2A and the second conductive portion 2B are each bonded to the support substrate 3 via a conductive bonding material 29. A plurality of first semiconductor elements 10A are bonded to the first conductive portion 2A via a conductive bonding material 19. A plurality of second semiconductor elements 10B are bonded to the second conductive portion 2B via a conductive bonding material 19. The constituent materials of the conductive bonding material 19 and the conductive bonding material 29 are not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. The first conductive portion 2A and the second conductive portion 2B are spaced apart in the x direction as shown in FIGS. 3, 9, 10, 13, and 14. In the examples shown in these figures, the first conductive portion 2A is positioned further in the x2 direction than the second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B each have, for example, a rectangular shape in a plan view. The first conductive portion 2A and the second conductive portion 2B overlap when viewed in the x direction. The first conductive portion 2A and the second conductive portion 2B each have, for example, an x-direction dimension of 15 mm to 25 mm, a y-direction dimension of 30 mm to 40 mm, and a z-direction dimension of 1.0 mm to 5.0 mm (preferably approximately 2.0 mm).

[0028] The conductive substrate 2 has a main surface 201 and a back surface 202. The main surface 201 and the back surface 202 are spaced apart in the z direction, as shown in FIGS. 13, 14, and 18 to 20. The main surface 201 faces the z2 direction, and the back surface 202 faces the z1 direction. The main surface 201 is formed by combining the upper surface of the first conductive portion 2A and the upper surface of the second conductive portion 2B. The back surface 202 is formed by combining the lower surface of the first conductive portion 2A and the lower surface of the second conductive portion 2B. The back surface 202 is bonded to the support substrate 3 so as to face the support substrate 3.

[0029] The support substrate 3 supports the conductive substrate 2. The support substrate 3 is formed of, for example, an AMB (Active Metal Brazing) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, and a second metal layer 33.

[0030] The insulating layer 31 is made of, for example, ceramics with excellent thermal conductivity. Examples of such ceramics include silicon nitride (SiN). The insulating layer 31 is not limited to ceramics and may be an insulating resin sheet or the like. The insulating layer 31 has, for example, a rectangular shape in a plan view.

[0031] The first metal layer 32 is formed on the upper surface (surface facing the z2 direction) of the insulating layer 31. The constituent material of the first metal layer 32 includes, for example, Cu. The constituent material may include Al (aluminum) instead of Cu. The first metal layer 32 includes a first portion 32A and a second portion 32B. The first portion 32A and the second portion 32B are spaced apart in the x direction. The first portion 32A is located on the x2 direction side of the second portion 32B. The first conductive portion 2A is joined to the first portion 32A and supports the first conductive portion 2A. The second portion 32B is joined to the second conductive portion 2B and supports the second conductive portion 2B. The first portion 32A and the second portion 32B are each, for example, rectangular in plan view.

[0032] The second metal layer 33 is formed on the lower surface (surface facing the z1 direction) of the insulating layer 31. The constituent material of the second metal layer 33 is the same as the constituent material of the first metal layer 32. In the example shown in FIG. 11 , the lower surface of the second metal layer 33 (a bottom surface 302 described below) is exposed from the sealing resin 8, for example. The lower surface may be covered by the sealing resin 8 without being exposed from the sealing resin 8. The second metal layer 33 overlaps both the first portion 32A and the second portion 32B in a plan view.

[0033] As shown in FIGS. 13 to 20 , the support substrate 3 has a support surface 301 and a bottom surface 302. The support surface 301 and the bottom surface 302 are spaced apart in the z direction. The support surface 301 faces the z2 direction, and the bottom surface 302 faces the z1 direction. As shown in FIG. 12 , the bottom surface 302 is exposed from the sealing resin 8. The support surface 301 is the upper surface of the first metal layer 32, and is formed by combining the upper surfaces of the first portion 32A and the second portion 32B. The support surface 301 faces the conductive substrate 2, and the conductive substrate 2 is bonded to the support surface 301. The bottom surface 302 is the lower surface of the second metal layer 33. A heat dissipation member (e.g., a heat sink) (not shown) can be attached to the bottom surface 302. The dimension of the support substrate 3 in the z direction (the distance along the z direction from the support surface 301 to the bottom surface 302) is, for example, 0.7 mm to 2.0 mm.

[0034] The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 are each made of a plate-shaped metal plate. The metal plate is made of, for example, Cu or a Cu alloy. In the example shown in Figures 1 to 5, 9, 10, and 12, the semiconductor device A1 includes one each of the first terminal 41, the second terminal 42, and the fourth terminal 44, and two third terminals 43.

[0035] A DC voltage to be converted into power is input to the first terminal 41, the second terminal 42, and the fourth terminal 44. The fourth terminal 44 is a positive electrode (P terminal), and the first terminal 41 and the second terminal 42 are each a negative electrode (N terminal). An AC voltage converted into power by the first semiconductor element 10A and the second semiconductor element 10B is output from the plurality of third terminals 43. The first terminal 41, the second terminal 42, the plurality of third terminals 43, and the fourth terminal 44 each include a portion covered with the sealing resin 8 and a portion exposed from the sealing resin 8.

[0036] As shown in FIG. 14 , the fourth terminal 44 is integrally formed with the first conductive portion 2A. Unlike the present configuration, the fourth terminal 44 may be separated from the first conductive portion 2A and conductively joined to the first conductive portion 2A. As shown in FIGS. 9 and 10 , the fourth terminal 44 is located on the x2 direction side with respect to the plurality of second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2). The fourth terminal 44 is electrically connected to the first conductive portion 2A and, via the first conductive portion 2A, to the back surface electrode 15 (drain electrode) of each first semiconductor element 10A.

[0037] As shown in FIG. 9 , the first terminal 41 and the second terminal 42 are each spaced apart from the first conductive portion 2A. As shown in FIGS. 5 and 7 , the first terminal 41 and the second terminal 42 are each joined to a second conductive member 6. As shown in FIGS. 5 , 9 , etc., the first terminal 41 and the second terminal 42 are each located on the x2 direction side with respect to the multiple first semiconductor elements 10A and the first conductive portion 2A (conductive substrate 2). The first terminal 41 and the second terminal 42 are each electrically connected to the second conductive member 6 and, via the second conductive member 6, to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B.

[0038] 1 to 5 and 12, the first terminal 41, the second terminal 42, and the fourth terminal 44 each protrude in the x2 direction from the sealing resin 8 in the semiconductor device A1. The first terminal 41, the second terminal 42, and the fourth terminal 44 are spaced apart from one another. The first terminal 41 and the second terminal 42 are located on opposite sides of the fourth terminal 44 in the y direction. The first terminal 41 is located on the y2-direction side of the fourth terminal 44, and the second terminal 42 is located on the y1-direction side of the fourth terminal 44. The first terminal 41, the second terminal 42, and the fourth terminal 44 overlap one another when viewed in the y direction.

[0039] As can be seen from FIGS. 9 , 10 , and 13 , the two third terminals 43 are each integrally formed with the second conductive portion 2B. Unlike the present configuration, the third terminal 43 may be separated from the second conductive portion 2B and conductively joined to the second conductive portion 2B. As shown in FIG. 9 and other figures, the two third terminals 43 are each located on the x1-direction side of the multiple second semiconductor elements 10B and the second conductive portion 2B (conductive substrate 2). Each third terminal 43 is electrically connected to the second conductive portion 2B and, via the second conductive portion 2B, to the back electrode 15 (drain electrode) of each second semiconductor element 10B. The number of third terminals 43 is not limited to two and may be, for example, one or three or more. For example, if there is one third terminal 43, it is preferably connected to the center of the second conductive portion 2B in the y direction.

[0040] The plurality of control terminals 45 are pin-shaped terminals for controlling each of the first semiconductor elements 10A and each of the second semiconductor elements 10B. The plurality of control terminals 45 include a plurality of first control terminals 46A to 46E and a plurality of second control terminals 47A to 47D. The plurality of first control terminals 46A to 46E are used to control each of the first semiconductor elements 10A, etc. The plurality of second control terminals 47A to 47D are used to control each of the second semiconductor elements 10B, etc.

[0041] The multiple first control terminals 46A-46E are arranged at intervals in the y direction. As shown in Figures 9 and 14, each of the first control terminals 46A-46E is supported by the first conductive portion 2A via a control terminal support body 48 (a first support portion 48A described below). As shown in Figures 5 and 9, each of the first control terminals 46A-46E is located in the x direction between the multiple first semiconductor elements 10A and the first terminal 41, the second terminal 42, and the fourth terminal 44.

[0042] The first control terminal 46A is a terminal (gate terminal) for inputting a drive signal for the plurality of first semiconductor elements 10A. A drive signal for driving the plurality of first semiconductor elements 10A is input to the first control terminal 46A (for example, a gate voltage is applied).

[0043] The first control terminal 46B is a terminal (source sense terminal) for detecting source signals of the multiple first semiconductor elements 10A. The first control terminal 46B detects a voltage (a voltage corresponding to a source current) applied to each second principal surface electrode 12 (source electrode) of the multiple first semiconductor elements 10A.

[0044] The first control terminal 46C and the first control terminal 46D are terminals that are electrically connected to the thermistor 17.

[0045] The first control terminal 46E is a terminal (drain sense terminal) for detecting drain signals of the multiple first semiconductor elements 10A. The first control terminal 46E detects a voltage (a voltage corresponding to a drain current) applied to each back electrode 15 (drain electrode) of the multiple first semiconductor elements 10A.

[0046] The second control terminals 47A to 47D are spaced apart in the y direction. As shown in FIGS. 9 and 14, each of the second control terminals 47A to 47D is supported by the second conductive portion 2B via a control terminal support 48 (a second support portion 48B described below). As shown in FIGS. 5 and 9, each of the second control terminals 47A to 47D is located between the second semiconductor elements 10B and two third terminals 43 in the x direction.

[0047] The second control terminal 47A is a terminal (gate terminal) for inputting drive signals for the multiple second semiconductor elements 10B. A drive signal for driving the multiple second semiconductor elements 10B is input to the second control terminal 47A (for example, a gate voltage is applied). The second control terminal 47B is a terminal (source sense terminal) for detecting source signals for the multiple second semiconductor elements 10B. The second control terminal 47B detects a voltage (a voltage corresponding to a source current) applied to each second main surface electrode 12 (source electrode) of the multiple second semiconductor elements 10B. The second control terminal 47C and the second control terminal 47D are terminals that are electrically connected to the thermistor 17.

[0048] Each of the plurality of control terminals 45 (the plurality of first control terminals 46A to 46E and the plurality of second control terminals 47A to 47D) includes a holder 451 and a metal pin 452.

[0049] The holder 451 is made of a conductive material. As shown in FIGS. 15 and 16 , the holder 451 is bonded to the control terminal support 48 (first metal layer 482 described below) via a conductive bonding material 459. The holder 451 includes a cylindrical portion, an upper flange, and a lower flange. The upper flange is connected to the upper part of the cylindrical portion, and the lower flange is connected to the lower part of the cylindrical portion. A metal pin 452 is inserted through at least the upper flange and the cylindrical portion of the holder 451. The holder 451 is covered with sealing resin 8 (second protrusion 852 described below).

[0050] The metal pin 452 is a rod-shaped member extending in the z direction. The metal pin 452 is supported by being press-fitted into the holder 451. The metal pin 452 is electrically connected to the control terminal support body 48 (a first metal layer 482 described below) at least via the holder 451. As in the example shown in FIGS. 15 and 16 , when the lower end (the end on the z1 direction side) of the metal pin 452 is in contact with the conductive bonding material 459 inside the insertion hole of the holder 451, the metal pin 452 is electrically connected to the control terminal support body 48 via the conductive bonding material 459.

[0051] The control terminal support 48 supports the plurality of control terminals 45. The control terminal support 48 is interposed between the main surface 201 (conductive substrate 2) and the plurality of control terminals 45 in the z direction.

[0052] The control terminal support 48 includes a first support portion 48A and a second support portion 48B. The first support portion 48A is disposed on the first conductive portion 2A of the conductive substrate 2 and supports a plurality of first control terminals 46A to 46E among the plurality of control terminals 45. As shown in FIG. 15 , the first support portion 48A is bonded to the first conductive portion 2A via a bonding material 49. The bonding material 49 may be conductive or insulating, and may be, for example, solder. The second support portion 48B is disposed on the second conductive portion 2B of the conductive substrate 2 and supports a plurality of second control terminals 47A to 47D among the plurality of control terminals 45. As shown in FIG. 16 , the second support portion 48B is bonded to the second conductive portion 2B via the bonding material 49.

[0053] The control terminal support 48 (each of the first support portion 48A and the second support portion 48B) is made of, for example, a direct bonded copper (DBC) substrate and includes an insulating layer 481, a first metal layer 482, and a second metal layer 483 stacked on top of each other.

[0054] The insulating layer 481 is made of, for example, ceramics and has, for example, a rectangular shape in plan view.

[0055] As shown in FIGS. 15 and 16 , the first metal layer 482 is formed on the upper surface of the insulating layer 481. Each control terminal 45 is provided upright on the first metal layer 482. The first metal layer 482 is made of, for example, Cu or a Cu alloy. As shown in FIG. 9 , the first metal layer 482 includes a first portion 482A, a second portion 482B, a third portion 482C, a fourth portion 482D, a fifth portion 482E, and a sixth portion 482F. The first portion 482A, the second portion 482B, the third portion 482C, the fourth portion 482D, the fifth portion 482E, and the sixth portion 482F are spaced apart and insulated from one another.

[0056] A plurality of wires 71 are bonded to the first portion 482A, and the first portion 482A is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 71. A plurality of wires 73 are connected between the first portion 482A and the sixth portion 482F. As a result, the sixth portion 482F is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first semiconductor elements 10A (second semiconductor elements 10B) via the wires 73 and 71. As shown in FIG. 9 , the first control terminal 46A is bonded to the sixth portion 482F of the first support portion 48A, and the second control terminal 47A is bonded to the sixth portion 482F of the second support portion 48B.

[0057] A plurality of wires 72 are joined to the second portion 482B, and the second portion 482B is electrically connected to the second main surface electrode 12 (source electrode) of each of the first semiconductor elements 10A (each of the second semiconductor elements 10B) via each of the wires 72. As shown in Fig. 9, the first control terminal 46B is joined to the second portion 482B of the first support portion 48A, and the second control terminal 47B is joined to the second portion 482B of the second support portion 48B.

[0058] The thermistor 17 is joined to the third portion 482C and the fourth portion 482D. As shown in Fig. 9, the first control terminals 46C and 46D are joined to the third portion 482C and the fourth portion 482D of the first support portion 48A, and the second control terminals 47C and 47D are joined to the third portion 482C and the fourth portion 482D of the second support portion 48B.

[0059] A wire 74 is joined to the fifth portion 482E of the first support portion 48A, and the fifth portion 482E is electrically connected to the first conductive portion 2A via the wire 74. As shown in FIG. 9 , a first control terminal 46E is joined to the fifth portion 482E of the first support portion 48A. The fifth portion 482E of the second support portion 48B is not electrically connected to other components. Each of the wires 71 to 74 is, for example, a bonding wire. The material of each of the wires 71 to 74 includes, for example, Au (gold), Al, or Cu.

[0060] 15, 16, etc., the second metal layer 483 is formed on the lower surface of the insulating layer 481. The second metal layer 483 of the first support portion 48A is bonded to the first conductive portion 2A via a bonding material 49, as shown in Fig. 15. The second metal layer 483 of the second support portion 48B is bonded to the second conductive portion 2B via a bonding material 49, as shown in Fig. 16.

[0061] The first conductive member 5 and the second conductive member 6, together with the conductive substrate 2, constitute a path for a main circuit current switched by the plurality of first semiconductor elements 10A and the plurality of second semiconductor elements 10B. The first conductive member 5 and the second conductive member 6 are spaced apart from the main surface 201 (conductive substrate 2) in the z2 direction and overlap the main surface 201 in a plan view. In this embodiment, the first conductive member 5 and the second conductive member 6 are each made of a metal plate material. The metal is, for example, Cu or a Cu alloy. Specifically, the first conductive member 5 and the second conductive member 6 are made of an appropriately bent metal plate material.

[0062] The first conductive member 5 is connected to the second principal surface electrode 12 (source electrode) of each first semiconductor element 10A and the second conductive portion 2B, and provides electrical continuity between the second principal surface electrode 12 of each first semiconductor element 10A and the second conductive portion 2B. The first conductive member 5 forms a path for a main circuit current switched by the multiple first semiconductor elements 10A. As shown in FIGS. 7 and 9 , the first conductive member 5 includes a first portion 51, multiple first bonding portions 52, and multiple second bonding portions 53.

[0063] The first portions 51 are strip-shaped regions that are located between the plurality of first semiconductor elements 10A and the second conductive portions 2B in the x direction and extend in the y direction in a plan view. The first portions 51 overlap both the first conductive portions 2A and the second conductive portions 2B in a plan view and are spaced apart from the main surface 201 in the z2 direction in the z direction. As shown in FIG. 18 and other figures, the first portions 51 are located in the z1 direction relative to second strip portions 622 of the second conductive member 6, which will be described later, and are closer to the main surface 201 (conductive substrate 2) than the second strip portions 622.

[0064] In the present embodiment, first portion 51 has a flat portion 511, a plurality of first bent portions 512, and a plurality of second bent portions 513. Flat portion 511 is arranged parallel to main surface 201 and overlaps both first conductive portion 2A and second conductive portion 2B in plan view. Here, "flat portion 511 arranged "parallel" to main surface 201" includes a state in which main surface 201 and flat portion 511 are approximately parallel, and also includes a range of manufacturing variations.

[0065] As shown in FIG. 9 and other figures, the flat portion 511 extends continuously in the y direction to correspond to the region in which the multiple first semiconductor elements 10A are arranged. In this embodiment, as shown in FIGS. 7 , 9 , 14 , and other figures, multiple first openings 514 are formed in the flat portion 511. Each of the multiple first openings 514 is, for example, a through hole penetrating in the z direction (the plate thickness direction of the first portion 51). The multiple first openings 514 are aligned at intervals in the y2 direction. The multiple first openings 514 are provided corresponding to each of the multiple first semiconductor elements 10A. In this embodiment, four first openings 514 are provided in the flat portion 511, and these first openings 514 and the multiple (four) first semiconductor elements 10A are positioned at the same position in the y direction.

[0066] 9, 14, etc., in the present embodiment, each first opening 514 overlaps with the gap 205 between the first conductive portion 2A and the second conductive portion 2B in a plan view. Also, each first opening 514 overlaps with the first conductive portion 2A in a plan view. The multiple first openings 514 are formed to facilitate the flow of the resin material between the upper side (z2 direction side) and the lower side (z1 direction side) near the first portion 51 (first conductive member 5) when injecting the flowable resin material to form the sealing resin 8.

[0067] 9 and other figures, the multiple first bent portions 512 and the multiple second bent portions 513 are each connected to the flat portion 511 and are arranged to correspond to the multiple first semiconductor elements 10A. As shown in Fig. 17, each first bent portion 512 is connected to an end of the flat portion 511 in the x2 direction and is positioned in the z1 direction as it approaches the x2 direction. Each second bent portion 513 is connected to an end of the flat portion 511 in the x1 direction and is positioned in the z1 direction as it approaches the x1 direction.

[0068] As shown in FIG. 9 and other figures, the multiple first bonding portions 52 and the multiple second bonding portions 53 are each connected to the first portion 51 and are arranged to correspond to the multiple first semiconductor elements 10A. Specifically, each first bonding portion 52 is located in the x2 direction relative to the first portion 51 and is connected to one of the multiple first bent portions 512. Each second bonding portion 53 is located in the x1 direction relative to the first portion 51 and is connected to one of the multiple second bent portions 513. As shown in FIGS. 15 and 17, each first bonding portion 52 is bonded to the corresponding second principal surface electrode 12 of one of the first semiconductor elements 10A via a conductive bonding material 59. As shown in FIG. 17, each second bonding portion 53 is bonded to the second conductive portion 2B via a conductive bonding material 59. The material of the conductive bonding material 59 is not particularly limited and may be, for example, solder, a metal paste, or a sintered metal. In this embodiment, an opening 521 is formed in each first bonding portion 52. Each opening 521 is preferably formed so as to overlap the center of the first semiconductor element 10A in plan view. The openings 521 are, for example, through holes that penetrate in the z direction. The openings 521 are used, for example, when positioning the first conductive member 5 with respect to the conductive substrate 2. The planar shape of the openings 521 may be a perfect circle, or may be another shape such as an oval or rectangle.

[0069] The second conductive member 6 is connected to the second main surface electrode 12 (source electrode) of each second semiconductor element 10B and to the first terminal 41 and second terminal 42, thereby electrically connecting the second main surface electrode 12 of each second semiconductor element 10B with the first terminal 41 and second terminal 42. The second conductive member 6 forms a path for a main circuit current switched by the multiple second semiconductor elements 10B. The second conductive member 6 has a maximum dimension in the x direction of, for example, 25 mm to 40 mm, and a maximum dimension in the y direction of, for example, 30 mm to 45 mm. As shown in FIGS. 7 and 8 , the second conductive member 6 includes a first wiring portion 61, a second wiring portion 62, a third wiring portion 63, and a fourth wiring portion 64.

[0070] The first wiring portion 61 is a strip-shaped portion extending in the y direction in a plan view. As can be seen from Fig. 7 and other figures, the first wiring portion 61 overlaps a plurality of second semiconductor elements 10B in a plan view. The first wiring portion 61 is connected to each of the second semiconductor elements 10B, as shown in Fig. 19 .

[0071] The first wiring portion 61 has multiple recessed regions 611. As shown in FIG. 19 and other figures, each recessed region 611 protrudes in the z1 direction relative to other portions of the first wiring portion 61. Each of the multiple recessed regions 611 is bonded to one of the multiple second semiconductor elements 10B. Each recessed region 611 of the first wiring portion 61 is bonded to the second principal surface electrode 12 of each second semiconductor element 10B via a conductive bonding material 69. The material of the conductive bonding material 69 is not particularly limited and may be, for example, solder, a metal paste material, or a sintered metal. In this embodiment, an opening 611a is formed in each recessed region 611. Each opening 611a is preferably formed so as to overlap the center of the second semiconductor element 10B in a plan view. The opening 611a is, for example, a through hole formed in each recessed region 611 of the first wiring portion 61. The opening 611a is used, for example, when positioning the second conductive member 6 relative to the conductive substrate 2. The planar shape of the opening 611a may be a perfect circle, or may be other shapes such as an oval or a rectangle.

[0072] 5, 7, 8, etc., the second wiring portion 62 is located in the x2 direction relative to the first wiring portion 61. In a plan view, the second wiring portion 62 overlaps the plurality of first semiconductor elements 10A and the plurality of first bonding portions 52. The second wiring portion 62 includes a first strip portion 621 and a second strip portion 622.

[0073] The first strip portion 621 is a strip-shaped portion of the second wiring portion 62 that is spaced apart from the first wiring portion 61 in the x direction and extends in the y direction in a planar view. The first strip portion 621 overlaps the plurality of first semiconductor elements 10A and the plurality of first bonding portions 52 in a planar view. The first strip portion 621 has a plurality of convex regions 621a. As shown in FIG. 20 and other figures, each convex region 621a protrudes in the z2 direction from other portions of the first strip portion 621. As shown in FIGS. 7 and 20 and other figures, the plurality of convex regions 621a and the plurality of first semiconductor elements 10A overlap each other in a planar view. In this embodiment, as can be seen from FIGS. 7 and 8 and other figures, the plurality of recessed regions 611 and the plurality of convex regions 621a in the first wiring portion 61 are positioned at the same position in the y direction.

[0074] The second strip portion 622 is connected to both the first strip portion 621 and the first wiring portion 61. The second strip portion 622 is a strip-shaped portion extending in the x direction in a plan view. In this embodiment, the second wiring portion 62 has a plurality (three) of second strip portions 622. The second strip portions 622 are arranged at intervals in the y direction. The second strip portions 622 are arranged parallel (or approximately parallel). The x2-direction end of each of the second strip portions 622 is connected between two convex regions 621a of the first strip portion 621 that are adjacent in the y direction. As a result, the x2-direction end of each of the second strip portions 622 is connected between the first semiconductor elements 10A that are adjacent to each other with respect to the first strip portion 621. The x1-direction end of each of the second strip portions 622 is connected between two concave regions 611 of the first wiring portion 61 that are adjacent in the y direction. As a result, the x1 direction ends of each of the multiple second strip portions 622 are connected between the second semiconductor elements 10B that are adjacent to each other with respect to the first wiring portion 61. In this embodiment, as shown in FIG. 18 and other figures, each second strip portion 622 overlaps the first portion 51 (flat portion 511) of the first conductive member 5 in a planar view. On the other hand, the second strip portion 622 (second conductive member 6) does not overlap any of the multiple first openings 514 in the first portion 51 in a planar view. Note that in FIG. 8, the boundaries between each second strip portion 622 and the first strip portion 621 and the boundaries between each second strip portion 622 and the first wiring portion 61 are represented by imaginary lines.

[0075] The third wiring portion 63 has a first end 631, a second end 632, and a plurality of openings 633. The first end 631 is connected to the first terminal 41. The first end 631 and the first terminal 41 are joined by a conductive bonding material 69. The third wiring portion 63 is a strip-shaped portion extending in the x direction as a whole in a plan view. The third wiring portion 63 overlaps both the first conductive portion 2A and the second conductive portion 2B in a plan view. The second end 632 is spaced apart from the first end 631 in the x direction. As shown in FIGS. 7 and 8 , the second end 632 is located in the x1 direction relative to the first end 631.

[0076] The third wiring portion 63 is connected to both the y2-direction end of the first wiring portion 61 and the y2-direction end of the first strip portion 621. More specifically, the second end portion 632 is connected to the y2-direction end of the first wiring portion 61. A portion between the first end portion 631 and the second end portion 632 is connected to the y2-direction end of the first strip portion 621.

[0077] Each of the multiple openings 633 is a partially removed portion in a plan view. The multiple openings 633 are spaced apart from one another in the x direction. In the illustrated example, the third wiring unit 63 has three openings 633. The openings 633 on the x2 direction side and the central opening 633 in the X direction overlap the main surface 201 of the first conductive unit 2A (conductive substrate 2) in a plan view, but are located so as not to overlap the multiple first semiconductor elements 10A in a plan view. The openings 633 on the x1 direction side overlap the main surface 201 of the second conductive unit 2B (conductive substrate 2) in a plan view, but are located so as not to overlap the multiple second semiconductor elements 10B in a plan view. Each opening 633 is located closer to the y2 direction of the first conductive unit 2A (second conductive unit 2B) in a plan view. In this embodiment, the openings 633 are arc-shaped notches recessed in the y2 direction from the y1-direction end of the third wiring unit 63. The planar shape of the opening 633 is not limited, and may be a notch as in this embodiment, or may be a hole as in this embodiment.

[0078] The fourth wiring portion 64 has a third end 641, a fourth end 642, and a plurality of openings 643. The third end 641 is connected to the second terminal 42. The third end 641 and the second terminal 42 are joined by a conductive bonding material 69. The fourth wiring portion 64 is a strip-shaped portion extending in the x direction as a whole in a plan view. The fourth wiring portion 64 is disposed apart from the third wiring portion 63 in the y direction. The fourth wiring portion 64 is located in the y1 direction relative to the third wiring portion 63. The fourth wiring portion 64 overlaps both the first conductive portion 2A and the second conductive portion 2B in a plan view. The fourth end 642 is located apart from the third end 641 in the x direction. As shown in FIGS. 7 and 8 , the fourth end 642 is located in the x1 direction relative to the third end 641.

[0079] The fourth wiring portion 64 is connected to both the y1-direction end of the first wiring portion 61 and the y1-direction end of the first strip portion 621. More specifically, the fourth end portion 642 is connected to the y1-direction end of the first wiring portion 61. A portion between the third end portion 641 and the fourth end portion 642 is connected to the y1-direction end of the first strip portion 621.

[0080] Each of the multiple openings 643 is a partially removed portion in a plan view. The multiple openings 643 are spaced apart from one another in the x direction. In the illustrated example, the fourth wiring unit 64 has three openings 643. The opening 643 on the x2 direction side and the central opening 643 in the X direction overlap the main surface 201 of the first conductive unit 2A (conductive substrate 2) in a plan view, but are positioned so as not to overlap the multiple first semiconductor elements 10A in a plan view. The opening 643 on the x1 direction side overlaps the main surface 201 of the second conductive unit 2B (conductive substrate 2) in a plan view, but are positioned so as not to overlap the multiple second semiconductor elements 10B in a plan view. Each opening 643 is located closer to the y1 direction of the first conductive unit 2A (second conductive unit 2B) in a plan view. In this embodiment, the openings 643 are arc-shaped notches recessed in the y1 direction from the y2 direction end of the fourth wiring unit 64. The planar shape of the opening 643 is not limited, and may be a notch as in this embodiment, or may be a hole as in this embodiment.

[0081] The sealing resin 8 covers the plurality of first semiconductor elements 10A, the plurality of second semiconductor elements 10B, the conductive substrate 2, the support substrate 3 (excluding the bottom surface 302), the first terminal 41, the second terminal 42, a portion of each of the plurality of third terminals 43 and the fourth terminal 44, a portion of each of the plurality of control terminals 45, the control terminal support 48, the first conductive member 5, the second conductive member 6, and the plurality of wires 71 to 74. The sealing resin 8 is made of, for example, black epoxy resin. The sealing resin 8 is formed, for example, by molding. The sealing resin 8 has, for example, a dimension in the x direction of approximately 35 mm to 60 mm, a dimension in the y direction of approximately 35 mm to 50 mm, and a dimension in the z direction of approximately 4 mm to 15 mm. These dimensions are the sizes of the largest portions along each direction. The sealing resin 8 has a resin main surface 81, a resin back surface 82, and a plurality of resin side surfaces 831 to 834.

[0082] As shown in Figures 11, 13, and 19, the resin main surface 81 and the resin back surface 82 are spaced apart in the z direction. The resin main surface 81 faces the z2 direction, and the resin back surface 82 faces the z1 direction. Multiple control terminals 45 (multiple first control terminals 46A-46E and multiple second control terminals 47A-47D) protrude from the resin main surface 81. As shown in Figure 12, the resin back surface 82 has a frame shape surrounding the bottom surface 302 (the lower surface of the second metal layer 33) of the support substrate 3 in a plan view. The bottom surface 302 of the support substrate 3 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82. Multiple resin side surfaces 831-834 are each connected to both the resin main surface 81 and the resin back surface 82 and are sandwiched between them in the z direction. As shown in Figure 4, the resin side surfaces 831 and 832 are spaced apart in the x direction. Resin side surface 831 faces the x1 direction, and resin side surface 832 faces the x2 direction. Two third terminals 43 protrude from resin side surface 831, and first terminal 41, second terminal 42, and fourth terminal 44 protrude from resin side surface 832. As shown in FIG. 4 and other figures, resin side surface 833 and resin side surface 834 are spaced apart in the y direction. Resin side surface 833 faces the y1 direction, and resin side surface 834 faces the y2 direction.

[0083] As shown in FIG. 4 , a plurality of recesses 832 a are formed on the resin side surface 832. Each recess 832 a is a portion recessed in the x-direction in plan view. The plurality of recesses 832 a include one formed between the first terminal 41 and the fourth terminal 44 and one formed between the second terminal 42 and the fourth terminal 44 in plan view. The plurality of recesses 832 a are provided to increase the creepage distance along the resin side surface 832 between the first terminal 41 and the fourth terminal 44 and the creepage distance along the resin side surface 832 between the second terminal 42 and the fourth terminal 44.

[0084] As shown in FIGS. 13 and 14 , the sealing resin 8 has a plurality of first protrusions 851 , a plurality of second protrusions 852 , and a resin gap 86 .

[0085] Each of the multiple first protrusions 851 protrudes in the z direction from the resin main surface 81. The multiple first protrusions 851 are arranged near the four corners of the sealing resin 8 in a plan view. A first protrusion end surface 851a is formed at the tip (end in the z2 direction) of each of the first protrusions 851. Each of the multiple first protrusions 851 has a bottomed, hollow truncated cone shape, for example. The multiple first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or other device that uses power generated by the semiconductor device A1. Each of the multiple first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each of the first protrusions 851 may be columnar, and is preferably cylindrical. The shape of the recess 851b is preferably cylindrical, and the inner wall surface 851c is preferably a single perfect circle in plan view.

[0086] The semiconductor device A1 may be mechanically fixed to a control circuit board or the like by a method such as screwing. In this case, a female screw thread may be formed on the inner wall surfaces 851c of the recesses 851b of the first protrusions 851. Insert nuts may be embedded in the recesses 851b of the first protrusions 851.

[0087] As shown in FIG. 14 and other figures, the multiple second protrusions 852 protrude in the z direction from the resin main surface 81. The multiple second protrusions 852 overlap the multiple control terminals 45 in a plan view. Each metal pin 452 of the multiple control terminals 45 protrudes from the corresponding second protrusion 852. Each second protrusion 852 has a truncated cone shape. In each control terminal 45, the second protrusion 852 covers the holder 451 and a portion of the metal pin 452.

[0088] 13 , the resin void portion 86 extends in the z direction from the resin main surface 81 to the main surface 201 of the conductive substrate 2. The resin void portion 86 is formed in a tapered shape such that the cross-sectional area decreases from the resin main surface 81 toward the main surface 201 in the z direction. The resin void portion 86 is formed during molding of the sealing resin 8, and is a portion where the sealing resin 8 is not formed during molding.

[0089] Although not shown in the drawings, resin voids 86 are formed when, for example, during molding of sealing resin 8, fluid resin material is not filled in due to the presence of a pressing member. The pressing member applies a pressing force to main surface 201 of conductive substrate 2 during molding, and is inserted into each opening 633 and each opening 643 of second conductive member 6. This allows conductive substrate 2 to be pressed by the pressing member without interfering with second conductive member 6, and warping of support substrate 3 to which conductive substrate 2 is bonded can be suppressed.

[0090] 13 , the semiconductor device A1 includes a resin filling portion 88. The resin filling portion 88 is filled into the resin void portion 86 so as to fill the resin void portion 86. The resin filling portion 88 is made of, for example, an epoxy resin like the sealing resin 8, but may be made of a different material from the sealing resin 8.

[0091] Next, the effects of this embodiment will be described.

[0092] The semiconductor device A1 includes a plurality of first semiconductor elements 10A, a conductive substrate 2, a first conductive member 5, and a sealing resin 8. Each of the plurality of first semiconductor elements 10A has a switching function and is bonded to a first conductive portion 2A (conductive substrate 2). The first conductive member 5 forms a path for a main circuit current switched by the plurality of first semiconductor elements 10A. The first conductive member 5 includes a first portion 51. The first portion 51 overlaps both the first conductive portion 2A and the second conductive portion 2B in a plan view and is spaced apart in the z2 direction from the main surface 201 in the z direction. The first portion 51 (flat portion 511) has a first opening 514.

[0093] With this configuration, the first conductive member 5 (first portion 51) can have a relatively large area in plan view. As a result, in the semiconductor device A1, the main circuit current flowing from the multiple first semiconductor elements 10A through the first conductive member 5 flows through a current path with a large area. Therefore, the semiconductor device A1 has a structure that is preferable for passing a large current.

[0094] The first portion 51 has a first opening 514. This allows the resin material to flow easily between the lower side (z1 direction side) and upper side (z2 direction side) of the first portion 51 (first conductive member 5) through the first opening 514 when injecting a fluid resin material to form the sealing resin 8. Furthermore, even if air bubbles are present on the lower side (z1 direction side) of the first portion 51 when injecting the fluid resin material, the air bubbles move to the upper side (z2 direction side) of the first portion 51 through the first opening 514. This prevents the sealing resin 8 from being left unfilled on the lower side (z1 direction side) of the first portion 51, thereby preventing voids from occurring. A semiconductor device A1 configured in this manner has improved reliability when passing a large current.

[0095] The first portion 51 has a plurality of first openings 514, and each of the first openings 514 overlaps with a gap 205 between the first conductive portion 2A and the second conductive portion 2B in a plan view. This configuration appropriately prevents the sealing resin 8 from being left unfilled in the gap 205 between the first conductive portion 2A and the second conductive portion 2B. In the conductive substrate 2, a high potential difference can occur between the first conductive portion 2A and the second conductive portion 2B, which are separated from each other. The semiconductor device A1 of this embodiment further improves reliability in passing a large current.

[0096] The first opening 514 overlaps the first conductive portion 2A (conductive substrate 2) in a plan view. With this configuration, it is possible to prevent the sealing resin 8 from being left unfilled in the gap, which is relatively narrow in the z direction, between the first portion 51 and the first conductive portion 2A (conductive substrate 2).

[0097] The first portion 51 has a flat portion 511, a first bent portion 512, and a second bent portion 513. In this embodiment, multiple first semiconductor elements 10A are arranged at intervals in the y direction. The flat portion 511 extends continuously in the y direction to correspond to the area where the multiple first semiconductor elements 10A are arranged. Multiple first openings 514 are formed in the flat portion 511. The multiple first openings 514 are provided corresponding to each of the multiple first semiconductor elements 10A. A semiconductor device A1 including such a flat portion 511 has a structure that is more preferable for passing a large current. Furthermore, by providing multiple first openings 514 in the flat portion 511, it is possible to more reliably prevent the sealing resin 8 from being left unfilled on the lower side (z1 direction side) of the first portion 51.

[0098] The semiconductor device A1 includes a plurality of second semiconductor elements 10B and a second conductive member 6. Each of the plurality of second semiconductor elements 10B has a switching function and is joined to a second conductive portion 2B (conductive substrate 2). The second conductive member 6 forms a path for a main circuit current that is switched by the plurality of second semiconductor elements 10B. The semiconductor device A1 having such a configuration is a more preferable structure for passing a large current.

[0099] The second conductive member 6 includes a first wiring portion 61, a second wiring portion 62 (a first strip portion 621 and a second strip portion 622), a third wiring portion 63, and a fourth wiring portion 64, and has a mesh-like current path extending vertically and horizontally in a plan view. This allows the second conductive member 6 to have a relatively large area in a plan view, while being subject to the constraints of other components in the semiconductor device A1. In the semiconductor device A1, the main circuit current flowing from the multiple second semiconductor elements 10B through the second conductive member 6 via the first wiring portion 61 flows through a current path that is dispersed over a large area. Therefore, the semiconductor device A1 has a structure that is more preferable for passing a large current.

[0100] In this embodiment, the second strip portion 622 of the second conductive member 6 overlaps the first portion 51 (flat portion 511) of the first conductive member 5 in a plan view. The semiconductor device A1 having such a configuration is suitable for reducing inductance components and is a preferable structure for passing large currents. On the other hand, the second strip portion 622 (second conductive member 6) does not overlap any of the multiple first openings 514 in the first portion 51 in a plan view. This prevents the second conductive member 6 from reducing the effects of the first openings 514 (reducing unfilled portions of the sealing resin 8 and preventing the occurrence of voids).

[0101] 21 to 24 show a semiconductor device according to a modified example of the first embodiment. FIG. 21 is a plan view similar to FIG. 7 shown in the above embodiment. FIG. 22 is a plan view omitting the sealing resin and the second conductive member. FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. 21. FIG. 24 is a partially enlarged view of a portion of FIG. 23. In the figures following FIG. 21, elements that are the same as or similar to those in the semiconductor device A1 of the above embodiment are designated by the same reference numerals as in the above embodiment, and descriptions thereof will be omitted where appropriate.

[0102] In the semiconductor device A2 of this modification, the configuration of the first conductive member 5 differs from that of the above embodiment, mainly in the configuration of the first openings 514 formed in the first portion 51. In this modification, each first opening 514 has a rectangular shape in a plan view. Each first opening 514 is formed across the flat portion 511, the first bent portion 512, and the second bent portion 513. Each first opening 514 is a through hole that penetrates the first portion 51 in the plate thickness direction. In a plan view, each first opening 514 overlaps with the gap 205 between the first conductive portion 2A and the second conductive portion 2B. Furthermore, in this modification, each first opening 514 overlaps both the first conductive portion 2A and the second conductive portion 2B.

[0103] In the semiconductor device A2, the first conductive member 5 (first portion 51) can have a relatively large area in plan view. As a result, in the semiconductor device A2, the main circuit current flowing from the multiple first semiconductor elements 10A through the first conductive member 5 flows through a current path with a large area. Therefore, the semiconductor device A2 has a structure that is preferable for passing a large current.

[0104] The first portion 51 has a first opening 514. This allows the resin material to flow easily between the lower side (z1 direction side) and upper side (z2 direction side) of the first portion 51 (first conductive member 5) through the first opening 514 when injecting a fluid resin material to form the sealing resin 8. Furthermore, even if air bubbles are present on the lower side (z1 direction side) of the first portion 51 when injecting the fluid resin material, the air bubbles move to the upper side (z2 direction side) of the first portion 51 through the first opening 514. This prevents the sealing resin 8 from being left unfilled on the lower side (z1 direction side) of the first portion 51, thereby preventing voids from occurring. A semiconductor device A2 configured in this manner has improved reliability when passing a large current.

[0105] In the semiconductor device A2, each first opening 514 is formed across the flat portion 511, the first bent portion 512, and the second bent portion 513. In a plan view, each first opening 514 overlaps the gap 205 between the first conductive portion 2A and the second conductive portion 2B and both the first conductive portion 2A and the second conductive portion 2B. This configuration further promotes the flow of the resin material and the movement of air bubbles through the first opening 514 when injecting a fluid resin material to form the sealing resin 8. This further reduces the possibility of the sealing resin 8 not being filled below the first portion 51 (the z1 direction side), thereby appropriately preventing the occurrence of voids.

[0106] In this modification, the second bent portion 513 is disposed near the first semiconductor element 10A, and a first opening 514 is formed in the second bent portion 513. This effectively prevents the sealing resin 8 from being unfilled or voids from occurring around the first semiconductor element 10A. This configuration prevents spatial discharge caused by voids around the first semiconductor element 10A. Therefore, the semiconductor device A2 has improved reliability in passing large currents. In addition, within the same configuration as the semiconductor device A1 of the above embodiment, the same effects as those of the above embodiment can be achieved.

[0107] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0108] In the above embodiment, a configuration has been described in which one first conductive member 5 is provided common to multiple first semiconductor elements 10A, but the present disclosure is not limited to this. For example, multiple first conductive members 5 may be provided so as to correspond to the multiple first semiconductor elements 10A individually.

[0109] The present disclosure includes the embodiments described in the appendix below.

[0110] Supplementary Note 1. A semiconductor device comprising: a conductive substrate having a main surface facing one side in a thickness direction and a back surface facing the opposite side to the main surface; at least one first semiconductor element bonded to the main surface and having a switching function; a first conductive member forming a path of a main circuit current switched by the first semiconductor element; and a sealing resin covering at least a portion of the conductive substrate, the first semiconductor element, and the first conductive member, wherein the conductive substrate includes a first conductive portion and a second conductive portion arranged spaced apart from each other on one side and the other side in a first direction perpendicular to the thickness direction, the first semiconductor element being electrically bonded to the first conductive portion, and the first conductive member including a first portion overlapping both the first conductive portion and the second conductive portion as viewed in the thickness direction and positioned away from the main surface to one side in the thickness direction in the thickness direction, the first portion having a first opening. Supplementary Note 2. The semiconductor device according to Supplementary Note 1, wherein the first conductive member is made of a metal plate. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein the first opening overlaps a gap between the first conductive portion and the second conductive portion when viewed in the thickness direction. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the first opening overlaps at least one of the first conductive portion and the second conductive portion when viewed in the thickness direction. Supplementary Note 5. The semiconductor device according to any one of Supplementary Notes 2 to 4, wherein the first conductive member includes a first bonding portion located on one side of the first portion in the first direction and bonded to the first semiconductor element, and a second bonding portion located on the other side of the first portion in the first direction and bonded to the second conductive portion. Supplementary Note 6. the first portion has a flat portion arranged parallel to the main surface and overlapping the first conductive portion and the second conductive portion when viewed in the thickness direction, a first bent portion connected to both one side end of the flat portion in the first direction and the first joint portion and positioned on the other side in the thickness direction as it approaches the one side in the first direction, and a second bent portion connected to both the other side end of the flat portion in the first direction and the second joint portion and positioned on the other side in the thickness direction as it approaches the other side in the first direction; and the first opening is formed in at least the flat portion.Appendix 7. The semiconductor device according to Appendix 6, wherein the first opening is formed in at least one of the first bent portion and the second bent portion. Appendix 8. The semiconductor device according to Appendix 6 or 7, wherein the at least one first semiconductor element includes a plurality of first semiconductor elements, and the plurality of first semiconductor elements are arranged at intervals in a second direction perpendicular to both the thickness direction and the first direction. Appendix 9. The semiconductor device according to Appendix 8, wherein the first opening includes a plurality of openings provided corresponding to each of the plurality of first semiconductor elements in the second direction. Appendix 10. The semiconductor device according to Appendix 9, wherein the flat portion extends continuously in the second direction corresponding to a region in which the plurality of first semiconductor elements are arranged. Appendix 11. The semiconductor device according to Appendix 9 or 10, wherein the first bonding portion, the second bonding portion, the first bent portion, and the second bent portion are arranged corresponding to each of the plurality of first semiconductor elements in the second direction. Appendix 12. The semiconductor device according to any one of Supplementary Notes 9 to 11, further comprising: a plurality of second semiconductor elements electrically connected to the second conductive portion and having a switching function; and a second conductive member made of a metal plate, wherein the second conductive member includes a first wiring portion and a second wiring portion, the first wiring portion is connected to the plurality of second semiconductor elements, and the second wiring portion is located on one side of the first wiring portion in the first direction and overlaps both the plurality of first semiconductor elements and the first joint portion.Supplementary Note 13. The semiconductor device according to Supplementary Note 12, wherein the plurality of second semiconductor elements are arranged at intervals in the second direction, and the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction.Supplementary Note 14. The semiconductor device described in Appendix 13, wherein the second wiring portion has a first strip portion and a second strip portion, the first strip portion is spaced apart from the first wiring portion in the first direction and overlaps both the plurality of first semiconductor elements and the first joint portion when viewed in the thickness direction, and the second strip portion has one side end in the first direction connected between the first semiconductor elements adjacent to each other with respect to the first strip portion and the other side end in the first direction connected between the second semiconductor elements adjacent to each other with respect to the first wiring portion.Appendix 15. The semiconductor device of Appendix 14, wherein the second band-shaped portion overlaps the flat portion of the first conductive member when viewed in the thickness direction. Appendix 16. The semiconductor device of Appendix 14 or 15, wherein the second conductive member includes a third wiring portion and a fourth wiring portion, the third wiring portion is connected to both one end of the first wiring portion in the second direction and one end of the first band-shaped portion in the second direction, and extends in the first direction, and the fourth wiring portion is connected to both the other end of the first wiring portion in the second direction and the other end of the first band-shaped portion in the second direction, and extends in the first direction. Appendix 17. The semiconductor device of any of Appendixes 12 to 15, wherein the second conductive member does not overlap any of the plurality of openings of the first opening when viewed in the thickness direction. Appendix 18. The semiconductor device of any of Appendixes 12 to 17, wherein the first conductive member and the second conductive member contain copper. Supplementary Note 19. The semiconductor device according to any one of Supplementary Notes 2 to 18, wherein the first opening is a through-hole that penetrates the first portion in a thickness direction.

[0111] A1, A2: semiconductor device 10A: first semiconductor element 10B: second semiconductor element 101: element main surface 102: element back surface 11: first main surface electrode 12: second main surface electrode 13: third main surface electrode 15: back surface electrode 17: thermistor 19: conductive bonding material 2: conductive substrate 2A: first conductive portion 2B: second conductive portion 201: main surface 202: back surface 205: gap 29: conductive bonding material 3: support substrate 301: support surface 302: bottom surface 31: insulating layer 32: first metal layer 32A: first portion 32B: second portion 321: first bonding layer 33: second metal layer 41: first terminal 42: second terminal 43: third terminal 44: fourth terminal 45: control terminal 451: holder 452: Metal pin 459: Conductive bonding material 46A, 46B, 46C, 46D, 46E: First control terminal 47A, 47B, 47C, 47D: Second control terminal 48: Control terminal support 481: Insulating layer 482: First metal layer 482A: First portion 482B: Second portion 482C: Third portion 482D: Fourth portion 482E: Fifth portion 482F: Sixth portion 483: Second metal layer 49: Bonding material 5: First conductive member 51: First portion 511: Flat portion 512: First bent portion 513: Second bent portion 514: First opening 52: First bonding portion 521: Opening 53: Second bonding portion 59: Conductive bonding material 6: Second conductive member 61: First wiring portion 611: Concave region 611a: Opening 62: Second wiring portion 621: First strip-shaped portion 621a: Convex region 622: Second strip-shaped portion 63: Third wiring portion 631: First end portion 632: Second end portion 633: Opening 64: Fourth wiring portion 641: Third end portion 642: Fourth end portion 643: Opening 69: Conductive bonding material 71, 72, 73, 74: Wire 8: Sealing resin 81: Resin main surface 82: Resin back surface 831, 832: Resin side surface 832a: Recess 833, 834: Resin side surface 851: First protruding portion 851a: First protruding end surface 851b: Recess 851c: Inner wall surface 852: Second protruding portion 86: Resin void portion 88: Resin filled portion

Claims

1. A conductive substrate having a main surface facing one side in the thickness direction and a back surface facing the opposite side of the main surface, At least one first semiconductor element bonded to the main surface and having a switching function, A first conduction member that constitutes a path of a main circuit current switched by the first semiconductor element, A sealing resin that covers at least a part of the conductive substrate, the first semiconductor element, and the first conduction member, and includes: The conductive substrate includes a first conductive portion and a second conductive portion that are spaced apart from each other on one side and the other side in a first direction orthogonal to the thickness direction, The first semiconductor element is electrically bonded to the first conductive portion, The first conduction member includes a first portion that overlaps both the first conductive portion and the second conductive portion when viewed in the thickness direction and is located away from the main surface toward one side in the thickness direction in the thickness direction, The first portion has a first opening, a semiconductor device.

2. The semiconductor device according to claim 1, wherein the first conduction member is formed of a metal plate material.

3. The semiconductor device according to claim 2, wherein the first opening overlaps a gap between the first conductive portion and the second conductive portion when viewed in the thickness direction.

4. The semiconductor device according to claim 3, wherein the first opening overlaps at least one of the first conductive portion and the second conductive portion when viewed in the thickness direction.

5. The first conduction member includes a first joint portion that is located on one side in the first direction with respect to the first portion and is joined to the first semiconductor element, and a second joint portion that is located on the other side in the first direction with respect to the first portion and is joined to the second conductive portion. The semiconductor device according to any one of claims 2 to 4.

6. The first portion has a flat portion that is arranged parallel to the main surface and overlaps the first conductive portion and the second conductive portion when viewed in the thickness direction, a first bent portion that is connected to both one end in the first direction of the flat portion and the first joint portion and is located on the other side in the thickness direction as it goes toward one side in the first direction, and a second bent portion that is connected to both the other end in the first direction of the flat portion and the second joint portion and is located on the other side in the thickness direction as it goes toward the other side in the first direction. The semiconductor device according to claim 5, wherein the first opening is formed at least in the flat portion.

7. The semiconductor device according to claim 6, wherein the first opening is formed in at least one of the first bent portion and the second bent portion.

8. The semiconductor device according to claim 6, wherein the at least one first semiconductor element includes a plurality of first semiconductor elements, and the plurality of first semiconductor elements are arranged at intervals in a second direction orthogonal to both the thickness direction and the first direction.

9. The semiconductor device according to claim 8, wherein the first opening includes a plurality of openings provided corresponding to the plurality of first semiconductor elements respectively in the second direction.

10. The semiconductor device according to claim 9, wherein the flat portion extends continuously corresponding to a region in which the plurality of first semiconductor elements are arranged in the second direction.

11. The semiconductor device according to claim 9, wherein the first bonding portion, the second bonding portion, the first bent portion, and the second bent portion are arranged corresponding to the plurality of first semiconductor elements respectively in the second direction.

12. A plurality of second semiconductor elements that are electrically bonded to the second conductive portion and have a switching function; And a second conduction member composed of a metal plate material, The second conduction member includes a first wiring portion and a second wiring portion, The first wiring portion is connected to the plurality of second semiconductor elements, The semiconductor device according to claim 9, wherein the second wiring portion is located on one side in the first direction with respect to the first wiring portion, and overlaps both the plurality of first semiconductor elements and the first bonding portion.

13. The plurality of second semiconductor elements are arranged at intervals in the second direction, The semiconductor device according to claim 12, wherein the plurality of first semiconductor elements and the plurality of second semiconductor elements overlap each other when viewed in the first direction.

14. The second wiring portion has a first strip portion and a second strip portion, The first strip portion is separated from the first wiring portion in the first direction, and overlaps both the plurality of first semiconductor elements and the first bonding portion when viewed in the thickness direction, The semiconductor device according to claim 13, wherein one end in the first direction of the second strip portion is connected between the first semiconductor elements adjacent to each other with respect to the first strip portion, and the other end in the first direction is connected between the second semiconductor elements adjacent to each other with respect to the first wiring portion.

15. The semiconductor device according to claim 14, wherein the second strip portion overlaps the flat portion of the first conduction member when viewed in the thickness direction.

16. The second conductive member includes a third wiring portion and a fourth wiring portion, the third wiring portion is connected to both one end in the second direction in the first wiring portion and one end in the second direction in the first strip portion, and extends in the first direction, the fourth wiring portion is connected to both the other end in the second direction in the first wiring portion and the other end in the second direction in the first strip portion, and extends in the first direction, the semiconductor device according to claim 14.

17. The semiconductor device according to claim 12, wherein the second conductive member does not overlap any of the plurality of openings of the first opening when viewed in the thickness direction.

18. The semiconductor device according to claim 12, wherein the first conductive member and the second conductive member contain copper.

19. The semiconductor device according to any one of claims 2 to 4, wherein the first opening is a through hole penetrating in the plate thickness direction of the first portion.