Chip resistor

Abstract

A chip resistor according to the present invention is provided with: an insulating substrate which has a first main surface that is an end face of the chip resistor in the thickness direction, and a first lateral surface and a second lateral surface that are end faces of the chip resistor in the longitudinal direction; a first surface electrode which is arranged on the first lateral surface-side end of the first main surface; a second surface electrode which is arranged on the second lateral surface-side end of the first main surface; a resistor which is arranged on the first main surface, while being electrically connected to the first surface electrode and the second surface electrode; a protective film which is arranged on the resistor so as to partially cover the first surface electrode and the second surface electrode; a first conductive resin layer which is arranged so as to extend over the first surface electrode and the protective film; and a second conductive resin layer which is arranged so as to extend over the second surface electrode and the protective film. The second lateral surface-side end of the first conductive resin layer and the first lateral surface-side end of the second conductive resin layer are at a distance from each other.

Description

Chip Resistors

[0001] The present disclosure relates to chip resistors.

[0002] The chip resistor described in JP 2020-170747 A (Patent Document 1) has an insulating substrate, first and second upper surface electrodes, a resistor, a protective film, first and second back surface electrodes, first and second end surface electrodes, and first and second plating layers. The insulating substrate has a first main surface, a second main surface, a first side surface, and a second side surface. The first and second side surfaces are end surfaces in the longitudinal direction (hereinafter referred to as the "longitudinal direction") of the chip resistor described in Patent Document 1.

[0003] The first upper surface electrode and the second upper surface electrode are respectively arranged on the end portion of the first main surface on the first side surface side and the end portion of the second side surface side. The resistor is arranged on the first main surface and is electrically connected to the first upper surface electrode and the second upper surface electrode. The protective film is arranged on the resistor. Both longitudinal ends of the protective film reach onto the first upper surface electrode and the second upper surface electrode, respectively. The first back surface electrode and the second back surface electrode are respectively arranged on the end portion of the second main surface on the first side surface side and the end portion of the second side surface side.

[0004] The first end surface electrode is disposed on the first side surface, the first top surface electrode, and the first back surface electrode. The first end surface electrode electrically connects the first top surface electrode and the first back surface electrode. The second end surface electrode is disposed on the second side surface, the second top surface electrode, and the second back surface electrode. The second end surface electrode electrically connects the second top surface electrode and the second back surface electrode.

[0005] The first plating layer covers the first end surface electrode, a portion of the first top surface electrode exposed from the first end surface electrode, and a portion of the first back surface electrode exposed from the first end surface electrode, while the second plating layer covers the second end surface electrode, a portion of the second top surface electrode exposed from the second end surface electrode, and a portion of the second back surface electrode exposed from the second end surface electrode.

[0006] Japanese Patent Application Laid-Open No. 2020-170747

[0007] The chip resistor described in Patent Document 1 is mounted on a circuit board having first and second lands. More specifically, in the chip resistor described in Patent Document 1, the first plating layer and the first land, and the second plating layer and the second land are joined by a joining member such as a solder alloy.

[0008] In the chip resistor described in Patent Document 1, heat generated in the resistor element is dissipated from the circuit board via the protective film, the first plating layer (second plating layer), and the bonding member. However, because the thermal conductivity of the protective film is relatively low, there is room for improvement in the heat dissipation performance of the resistor element in the chip resistor described in Patent Document 1.

[0009] The present disclosure has been made in view of the above-mentioned problems of the conventional technology. More specifically, the present disclosure provides a chip resistor having improved heat dissipation properties of the resistor element.

[0010] The chip resistor of the present disclosure includes an insulating substrate having a first main surface that is an end surface in the thickness direction of the chip resistor and first and second side surfaces that are end surfaces in the longitudinal direction of the chip resistor, a first surface electrode arranged on an end portion of the first main surface on the first side surface side, a second surface electrode arranged on an end portion of the first main surface on the second side surface side, a resistor arranged on the first main surface and electrically connected to the first and second surface electrodes, a protective film arranged on the resistor so as to partially cover the first and second surface electrodes, a first conductive resin layer arranged over the first surface electrode and the protective film, and a second conductive resin layer arranged over the second surface electrode and the protective film, wherein the end of the first conductive resin layer on the second side surface side and the end of the second conductive resin layer on the first side surface side are spaced apart from each other.

[0011] According to the chip resistor of the present disclosure, the heat dissipation properties of the resistor can be improved.

[0012] 16 is a plan view of the chip resistor 100. FIG. 16 is a cross-sectional view taken along line II-II in FIG. 1. FIG. 16 is a first cross-sectional view of the chip resistor 100 mounted on a circuit board 200. FIG. 16 is a second cross-sectional view of the chip resistor 100 mounted on a circuit board 200. FIG. 16 is a process diagram showing a manufacturing method of the chip resistor 100. FIG. 16 is a plan view of a sheet-like substrate 11. FIG. 16 is a bottom view of the sheet-like substrate 11. FIG. 16 is a cross-sectional view for explaining a first electrode forming step S2. FIG. 16 is a cross-sectional view for explaining a resistor forming step S3. FIG. 16 is a cross-sectional view for explaining a protective film forming step S4. FIG. 16 is a cross-sectional view for explaining a conductive resin layer forming step S5. FIG. 16 is a cross-sectional view for explaining a first dividing step S6. FIG. 16 is a cross-sectional view for explaining a second electrode forming step S7. FIG. 16 is a cross-sectional view for explaining a second dividing step S8. FIG. 16 is a cross-sectional view of the chip resistor 100A. FIG. 16 is a cross-sectional view of the chip resistor 100B. FIG. 16 is a top view of the chip resistor 100C. FIG. 16 is a bottom view of the chip resistor 100C. FIG. 16 is a cross-sectional view taken along line XVIII-XVIII in FIG. 16. FIG. 16 is a process diagram showing a manufacturing method of the chip resistor 100C. 25A and 25B are cross-sectional views illustrating a first electrode forming step S2 in the manufacturing method of the chip resistor 100C. A bottom view of the chip resistor 100D. A cross-sectional view taken along line XXII-XXII of FIG. 21. A bottom view of the chip resistor 100E. A cross-sectional view taken along line XXIV-XXIV of FIG. 23. A top view of the chip resistor 100F. A bottom view of the chip resistor 100F. A cross-sectional view taken along line XXVII-XXVII of FIG. 25A and 25B are cross-sectional views illustrating a resistor forming step S3 in the manufacturing method of the chip resistor 100F. A cross-sectional view illustrating a protective film forming step S4 in the manufacturing method of the chip resistor 100F. A cross-sectional view of the chip resistor 100G. A cross-sectional view of the chip resistor 100H.

[0013] The details of the embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant descriptions will not be repeated.

[0014] First Embodiment A chip resistor according to a first embodiment will be described below. The chip resistor according to the first embodiment is referred to as a chip resistor 100.

[0015] <Configuration of Chip Resistor 100> Fig. 1 is a plan view of the chip resistor 100. Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1. As shown in Fig. 1 and Fig. 2, the chip resistor 100 includes an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a resistor 30, a protective film 40, a first conductive resin layer 51 and a second conductive resin layer 52, a first side surface electrode 61 and a second side surface electrode 62, and a first plating layer 71 and a second plating layer 72.

[0016] The thickness direction of the chip resistor 100 is defined as a first direction DR1. The longitudinal direction of the chip resistor 100 is defined as a second direction DR2. The second direction DR2 is, for example, perpendicular to the first direction DR1. The width direction of the chip resistor 100 is defined as a third direction DR3. The third direction DR3 is perpendicular to the first direction DR1 and the second direction DR2.

[0017] The insulating substrate 10 is made of an insulating material. The insulating substrate 10 is preferably made of a material with high thermal conductivity. For example, the insulating substrate 10 is made of alumina (Al ２ O ３ The insulating substrate 10 is made of a ceramic material such as PET or the like. The longitudinal direction of the insulating substrate 10 is aligned with the second direction DR2. The insulating substrate 10 has, for example, a rectangular shape in plan view.

[0018] The insulating substrate 10 has a first main surface 10a, a second main surface 10b, a first side surface 10c, and a second side surface 10d. The first main surface 10a and the second main surface 10b are end surfaces of the insulating substrate 10 in the first direction DR1. The second main surface 10b is the surface opposite the first main surface 10a. When mounted on the circuit board 200, the first main surface 10a faces the circuit board 200 (see FIG. 3A). When mounted on the circuit board 200, the second main surface 10b may face the circuit board 200 (see FIG. 3B). The first side surface 10c and the second side surface 10d are end surfaces of the insulating substrate 10 in the second direction DR2. The second side surface 10d is the surface opposite the first side surface 10c.

[0019] The first surface electrode 21 and the second surface electrode 22 are formed of a conductive material, such as sintered metal particles, such as silver (Ag) particles.

[0020] The first surface electrode 21 and the second surface electrode 22 are disposed on the first major surface 10a. More specifically, the first surface electrode 21 is disposed on an end of the first major surface 10a on the first side surface 10c side, and the second surface electrode 22 is disposed on an end of the first major surface 10a on the second side surface 10d side. The first surface electrode 21 and the second surface electrode 22 are spaced apart from each other in the second direction DR2. That is, the first major surface 10a is exposed between the first surface electrode 21 and the second surface electrode 22.

[0021] The first back surface electrode 23 and the second back surface electrode 24 are formed of a conductive material. The first back surface electrode 23 and the second back surface electrode 24 are formed of, for example, sintered metal particles. The metal particles are, for example, silver particles.

[0022] The first back surface electrode 23 and the second back surface electrode 24 are disposed on the second major surface 10b. More specifically, the first back surface electrode 23 is disposed on an end of the second major surface 10b on the first side surface 10c side, and the second back surface electrode 24 is disposed on an end of the second major surface 10b on the second side surface 10d side. The first back surface electrode 23 and the second back surface electrode 24 are spaced apart from each other in the second direction DR2. That is, the second major surface 10b is exposed between the first back surface electrode 23 and the second back surface electrode 24.

[0023] The resistor 30 is made of a conductive material. For example, the resistor 30 is made of sintered conductive particles. The conductive particles may be, for example, particles of a silver-palladium (Pd) alloy, particles of a copper (Cu)-nickel (Ni) alloy, or particles of ruthenium oxide (RuO ２ ) particles, etc.

[0024] The resistor 30 is disposed on the first main surface 10a between the first surface electrode 21 and the second surface electrode 22. Both ends of the resistor 30 in the second direction DR2 may reach the end of the first surface electrode 21 on the second side surface 10d side and the end of the second surface electrode 22 on the first side surface 10c side, respectively. The resistor 30 is electrically connected to the first surface electrode 21 and the second surface electrode 22.

[0025] A trimming groove 30a is formed in the resistor 30. The trimming groove 30a penetrates the resistor 30 in the thickness direction. The trimming groove 30a extends, for example, along a third direction DR3. The electrical resistance value of the resistor 30 is adjusted by adjusting the length of the trimming groove 30a.

[0026] The protective film 40 is made of an insulating material. The protective film 40 is made of a resin material such as epoxy resin or phenolic resin. The protective film 40 is disposed on the resistor 30. Both ends of the protective film 40 in the second direction DR2 may reach the first surface electrode 21 and the second surface electrode 22, respectively. However, the first surface electrode 21 and the second surface electrode 22 are exposed from the protective film 40.

[0027] The first conductive resin layer 51 and the second conductive resin layer 52 are formed from a conductive resin. This conductive resin is composed of a resin material and conductive particles. The resin material is, for example, an epoxy resin, and the conductive particles are, for example, silver-palladium alloy particles or copper-nickel alloy particles. The thermal conductivity of the first conductive resin layer 51 and the second conductive resin layer 52 is greater than the thermal conductivity of the protective film 40.

[0028] The first conductive resin layer 51 and the second conductive resin layer 52 are spaced apart from each other in the second direction DR2. The trimming groove 30a is located between the first conductive resin layer 51 and the second conductive resin layer 52 in the second direction DR2. The first conductive resin layer 51 is disposed across the first surface electrode 21 and the protective film 40. The first conductive resin layer 51 is disposed, for example, so as to cover the first surface electrode 21. The second conductive resin layer 52 is disposed across the second surface electrode 22 and the protective film 40. The second conductive resin layer 52 is disposed, for example, so as to cover the second surface electrode 22. It is preferable that the end of the first conductive resin layer 51 on the second side surface 10d side and the end of the second conductive resin layer 52 on the first side surface 10c side overlap the resistor 30 in a plan view.

[0029] The width of the chip resistor 100 in the second direction DR2 is defined as width W. The distance in the second direction DR2 between the end of the first conductive resin layer 51 on the second side surface 10d side and the end of the second conductive resin layer 52 on the first side surface 10c side is defined as distance L1. Distance L1 is preferably 300 μm or more and 700 μm or less. The value obtained by dividing distance L1 by width W is preferably 0.0938 or more and 0.2188 or less.

[0030] The first side electrode 61 and the second side electrode 62 are made of a conductive material. The first side electrode 61 and the second side electrode 62 are made of, for example, a nickel-chromium (Cr) alloy. The first side electrode 61 and the second side electrode 62 are, for example, sputtered films.

[0031] The first side electrode 61 is disposed on the first side surface 10c. The first side electrode 61 is also disposed on an end of the first surface electrode 21 on the first side surface 10c side and an end of the first back surface electrode 23 on the first side surface 10c side. The first side surface electrode 61 electrically connects the first surface electrode 21 and the first back surface electrode 23. The second side surface electrode 62 is disposed on the second side surface 10d. The second side surface electrode 62 is also disposed on an end of the second surface electrode 22 on the second side surface 10d side and an end of the second back surface electrode 24 on the second side surface 10d side. The second side surface electrode 62 electrically connects the second surface electrode 22 and the second back surface electrode 24.

[0032] The first plating layer 71 is composed of a first layer 71a, a second layer 71b, and a third layer 71c. The second plating layer 72 is composed of a first layer 72a, a second layer 72b, and a third layer 72c. The first layer 71a is arranged to cover the first surface electrode 21, the first back electrode 23, the first conductive resin layer 51, and the first side electrode 61. The second layer 71b is arranged on the first layer 71a. The third layer 71c is arranged on the second layer 71b. The first layer 72a is arranged to cover the second surface electrode 22, the second back electrode 24, the second conductive resin layer 52, and the second side electrode 62. The second layer 72b is arranged on the first layer 72a. The third layer 72c is arranged on the second layer 72b.

[0033] The first layer 71 a and the first layer 72 a are made of, for example, copper, the second layer 71 b and the second layer 72 b are made of, for example, nickel, and the third layer 71 c and the third layer 72 c are made of, for example, tin (Sn).

[0034] FIG. 3A is a first cross-sectional view of the chip resistor 100 mounted on the circuit board 200. FIG. 3B is a second cross-sectional view of the chip resistor 100 mounted on the circuit board 200. As shown in FIGS. 3A and 3B , the circuit board 200 has a substrate 210, a first land 220, and a second land 230. The substrate 210 is formed of an insulating material such as an epoxy resin containing glass fiber. The first land 220 and the second land 230 are disposed on the main surface of the substrate 210. The first land 220 and the second land 230 are formed of a conductive material such as copper. The chip resistor 100 may be disposed so that the first main surface 10a faces the circuit board 200, or so that the second main surface 10b faces the circuit board 200.

[0035] The chip resistor 100 is mounted on a circuit board 200. More specifically, the first plating layer 71 is joined to the first land 220 by a joining member 240, and the second plating layer 72 is joined to the second land 230 by a joining member 250. The joining members 240 and 250 are formed of, for example, a tin alloy.

[0036] <Method of Manufacturing Chip Resistor 100> Figure 4 is a process diagram showing a method of manufacturing the chip resistor 100. As shown in Figure 4, the method of manufacturing the chip resistor 100 includes a preparation step S1, a first electrode formation step S2, a resistor formation step S3, a protective film formation step S4, and a conductive resin layer formation step S5. The method of manufacturing the chip resistor 100 further includes a first division step S6, a second electrode formation step S7, a second division step S8, and a plating layer formation step S9.

[0037] In the preparation step S1, a sheet-like substrate 11 is prepared. Fig. 5 is a plan view of the sheet-like substrate 11. Fig. 6 is a bottom view of the sheet-like substrate 11. As shown in Figs. 5 and 6, the sheet-like substrate 11 has a first main surface 10a and a second main surface 10b. The sheet-like substrate 11 is formed from the same material as the insulating substrate 10.

[0038] A plurality of first dividing grooves 10aa and a plurality of second dividing grooves 10ab are formed in the first main surface 10a, and a plurality of first dividing grooves 10ba and a plurality of second dividing grooves 10bb are formed in the second main surface 10b.

[0039] Each of the multiple first dividing grooves 10aa and each of the multiple first dividing grooves 10ba extends along the third direction DR3. Each of the multiple first dividing grooves 10aa is arranged at equal intervals in the second direction DR2. One and the other of two adjacent first dividing grooves 10aa are referred to as first dividing groove 10aaa and first dividing groove 10aab, respectively. Each of the multiple first dividing grooves 10ba is arranged at equal intervals in the second direction DR2. One and the other of two adjacent first dividing grooves 10ba are referred to as first dividing groove 10baa and first dividing groove 10bab, respectively. The position of each of the multiple first dividing grooves 10aa in the second direction DR2 coincides with the position of each of the multiple first dividing grooves 10ba in the second direction DR2.

[0040] Each of the multiple second dividing grooves 10ab and each of the multiple second dividing grooves 10bb extend along the second direction DR2. Each of the multiple second dividing grooves 10ab are arranged at equal intervals in the third direction DR3. Each of the multiple second dividing grooves 10bb are arranged at equal intervals in the third direction DR3. The position of each of the multiple second dividing grooves 10ab in the third direction DR3 coincides with the position of each of the multiple second dividing grooves 10bb in the third direction DR3.

[0041] The first electrode forming step S2 is performed after the preparation step S1. Fig. 7 is a cross-sectional view illustrating the first electrode forming step S2. As shown in Fig. 7, in the first electrode forming step S2, a front surface electrode 25 is formed on the first main surface 10a, and a back surface electrode 26 is formed on the second main surface 10b. The front surface electrode 25 is formed so as to straddle the first dividing groove 10aa, and the back surface electrode 26 is formed so as to straddle the first dividing groove 10ba.

[0042] The front surface electrode 25 formed so as to straddle the first dividing groove 10aaa and the front surface electrode 25 formed so as to straddle the first dividing groove 10aab are referred to as front surface electrode 25a and front surface electrode 25b, respectively. The back surface electrode 26 formed so as to straddle the first dividing groove 10baa and the back surface electrode 26 formed so as to straddle the first dividing groove 10bab are referred to as back surface electrode 26a and back surface electrode 26b, respectively.

[0043] The front surface electrode 25a and the front surface electrode 25b are arranged at an interval in the second direction DR2. The back surface electrode 26a and the back surface electrode 26b are arranged at an interval in the second direction DR2. The front surface electrode 25 and the back surface electrode 26 are formed by applying a paste containing metal particles such as silver particles and firing the applied paste.

[0044] The resistor forming step S3 is performed after the first electrode forming step S2. FIG. 8 is a cross-sectional view illustrating the resistor forming step S3. As shown in FIG. 8, in the resistor forming step S3, a resistor 30 is formed. The resistor 30 is formed on a portion of the first main surface 10a between the surface electrodes 25a and 25b such that both ends of the resistor 30 in the second direction DR2 are located on the surface electrodes 25a and 25b, respectively. The resistor 30 is formed by applying a paste containing conductive particles such as silver-palladium alloy particles and firing the applied paste.

[0045] In the resistor forming step S3, after the resistor 30 is formed, a trimming groove 30a is formed by, for example, irradiating with laser light, thereby adjusting the electrical resistance value of the resistor 30.

[0046] The protective film forming step S4 is performed after the resistor forming step S3. Fig. 9 is a cross-sectional view illustrating the protective film forming step S4. As shown in Fig. 9, in the protective film forming step S4, a protective film 40 is formed. The protective film 40 is formed on the resistor 30 so that both ends of the protective film 40 in the second direction DR2 are located on the surface electrode 25a and the surface electrode 25b, respectively. The protective film 40 is formed by applying an uncured resin material and then heat-curing the applied resin material.

[0047] The conductive resin layer forming step S5 is performed after the protective film forming step S4. FIG. 10 is a cross-sectional view illustrating the conductive resin layer forming step S5. As shown in FIG. 10 , in the conductive resin layer forming step S5, a conductive resin layer 53 is formed across the surface electrode 25 and the protective film 40. The conductive resin layer 53 formed across the surface electrode 25a and the protective film 40 and the conductive resin layer 53 formed across the surface electrode 25b and the protective film 40 are referred to as the conductive resin layer 53a and the conductive resin layer 53b, respectively. The conductive resin layer 53 is formed by applying an uncured resin material containing conductive particles across the surface electrode 25 and the protective film 40 and then heat-curing the applied uncured resin material.

[0048] The first dividing step S6 is performed after the conductive resin layer forming step S5. Fig. 11 is a cross-sectional view illustrating the first dividing step S6. As shown in Fig. 11, in the first dividing step S6, the sheet-like substrate 11 is divided into a plurality of belt-like substrates 12 by being cut at the first dividing grooves 10aa and 10ba. The cut surfaces of the belt-like substrate 12 become the first side surface 10c and the second side surface 10d.

[0049] By fracturing the sheet-like substrate 11, the portion of the surface electrode 25a on the first division groove 10aab side and the portion of the surface electrode 25b on the first division groove 10aaa side become the first surface electrode 21 and the second surface electrode 22, respectively, and the portion of the back surface electrode 26a on the first division groove 10bab side and the portion of the back surface electrode 26b on the first division groove 10baa side become the first back surface electrode 23 and the second back surface electrode 24. Furthermore, by fracturing the sheet-like substrate 11, the portion of the conductive resin layer 53a on the first division groove 10aab side and the portion of the conductive resin layer 53b on the first division groove 10aaa side become the first conductive resin layer 51 and the second conductive resin layer 52, respectively.

[0050] The second electrode forming step S7 is performed after the first dividing step S6. Fig. 12 is a cross-sectional view illustrating the second electrode forming step S7. As shown in Fig. 12, in the second electrode forming step S7, a first side electrode 61 is formed on the first side surface 10c, and a second side electrode 62 is formed on the second side surface 10d. The first side surface electrode 61 and the second side surface electrode 62 are formed by, for example, sputtering.

[0051] The second dividing step S8 is performed after the second electrode forming step S7. FIG. 13 is a cross-sectional view illustrating the second dividing step S8. As shown in FIG. 13, in the second dividing step S8, the band-shaped substrate 12 is divided into multiple insulating substrates 10 by cleaving along the second dividing grooves 10ab and 10bb. The plating layer forming step S9 is performed after the second dividing step S8. In the plating layer forming step S9, the first layer 71a, the second layer 71b, and the third layer 71c are sequentially formed. In the plating layer forming step S9, the first layer 72a, the second layer 72b, and the third layer 72c are also sequentially formed. In this manner, the chip resistor 100 having the structure shown in FIGS. 1 and 2 is manufactured.

[0052] <Effects of Chip Resistor 100> Heat generated in the resistor 30 is dissipated from the circuit board 200 via the bonding member 240 (bonding member 250). At this time, when the first main surface 10a faces the circuit board 200, for example, the heat generated in the resistor 30 reaches the bonding member 240 (bonding member 250) through the protective film 40, the first conductive resin layer 51 (second conductive resin layer 52), the first surface electrode 21 (second surface electrode 22), and the first plating layer 71 (second plating layer 72).

[0053] The thermal conductivity of the first conductive resin layer 51 (second conductive resin layer 52) is greater than the thermal conductivity of the protective film 40. Therefore, in the chip resistor 100, heat generated in the resistor 30 is more easily dissipated from the circuit board 200 via the bonding member 240 (bonding member 250), improving the heat dissipation of the resistor 30.

[0054] As the distance L1 decreases, the overlap between the first conductive resin layer 51 and the resistor 30 (protective film 40) and the overlap between the second conductive resin layer 52 and the resistor 30 (protective film 40) increases, and heat generated in the resistor 30 is more easily transferred to the first conductive resin layer 51 and the second conductive resin layer 52. On the other hand, if the distance between the first conductive resin layer 51 and the second conductive resin layer 52 becomes too small, the first conductive resin layer 51 and the second conductive resin layer 52 may come into contact with each other due to manufacturing errors or the like, which may cause a short circuit between the first surface electrode 21 and the second surface electrode 22. Therefore, by setting the value obtained by dividing the distance L1 by the width W to be 0.0938 to 0.2188 (setting the distance L1 to be 300 μm to 700 μm), it is possible to prevent a short circuit between the first surface electrode 21 and the second surface electrode 22 and improve the heat dissipation performance of the resistor 30.

[0055] Second Embodiment A chip resistor according to a second embodiment will be described below. The chip resistor according to the second embodiment is referred to as chip resistor 100A. Here, differences from chip resistor 100 will be mainly described, and overlapping descriptions will not be repeated.

[0056] <Configuration of chip resistor 100A> Fig. 14 is a cross-sectional view of the chip resistor 100A. As shown in Fig. 14, the chip resistor 100A, like the chip resistor 100, has an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a resistor 30, a protective film 40, a first conductive resin layer 51 and a second conductive resin layer 52, a first side electrode 61 and a second side electrode 62, and a first plating layer 71 and a second plating layer 72.

[0057] However, in chip resistor 100A, unlike chip resistor 100, the end of the first conductive resin layer 51 on the first side surface 10c side is spaced apart from the end of the first surface electrode 21 on the first side surface 10c side, and the end of the second conductive resin layer 52 on the second side surface 10d side is spaced apart from the end of the second surface electrode 22 on the second side surface 10d side.

[0058] The distance in the second direction DR2 between the end of the first conductive resin layer 51 on the first side surface 10c side and the end of the first surface electrode 21 on the first side surface 10c side is defined as distance L2. The distance in the second direction DR2 between the end of the second conductive resin layer 52 on the second side surface 10d side and the end of the second surface electrode 22 on the second side surface 10d side is defined as distance L3. Distances L2 and L3 are preferably 100 μm or more. The width in the second direction DR2 of the portion of the first conductive resin layer 51 on the first surface electrode 21 is preferably 100 μm or more, and the width in the second direction DR2 of the portion of the second conductive resin layer 52 on the second surface electrode 22 is preferably 100 μm or more.

[0059] Effect of Chip Resistor 100A In the chip resistor 100A, the end of the first conductive resin layer 51 on the first side surface 10c side is spaced apart from the end of the first surface electrode 21 on the first side surface 10c side, and the end of the second conductive resin layer 52 on the second side surface 10d side is spaced apart from the end of the second surface electrode 22 on the second side surface 10d side. As a result, there is a portion of the first surface electrode 21 in direct contact with the first plating layer 71 (first layer 71a) and a portion of the second surface electrode 22 in direct contact with the second plating layer 72 (first layer 72a). Therefore, with the chip resistor 100A, it is possible to further improve heat dissipation from the resistor element 30.

[0060] On the other hand, if the distances L2 and L3 are too large, the overlap between the first conductive resin layer 51 and the first surface electrode 21 and the overlap between the second conductive resin layer 52 and the second surface electrode 22 become too small. As a result, heat is not easily transferred from the first conductive resin layer 51 to the first surface electrode 21, and heat is not easily transferred from the second conductive resin layer 52 to the second surface electrode 22. Therefore, by setting the distances L2 and L3 to 100 μm or more and setting the width in the second direction DR2 of the portion of the first conductive resin layer 51 on the first surface electrode 21 and the width in the second direction DR2 of the portion of the second conductive resin layer 52 on the second surface electrode 22 to 100 μm or more, the heat dissipation from the resistor 30 can be further improved.

[0061] Third Embodiment A chip resistor according to a third embodiment will be described below. The chip resistor according to the third embodiment is referred to as chip resistor 100B. Here, differences from chip resistor 100 will be mainly described, and overlapping descriptions will not be repeated.

[0062] <Configuration of chip resistor 100B> Fig. 15 is a cross-sectional view of the chip resistor 100B. As shown in Fig. 15, the chip resistor 100B, like the chip resistor 100, includes an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a resistor 30, a protective film 40, a first conductive resin layer 51 and a second conductive resin layer 52, a first side surface electrode 61 and a second side surface electrode 62, and a first plating layer 71 and a second plating layer 72.

[0063] However, in the chip resistor 100B, the position of the trimming groove 30a in the second direction DR2 is shifted toward the first side surface 10c from the center position of the resistor 30 in the second direction DR2. More specifically, in the chip resistor 100B, the trimming groove 30a overlaps the first conductive resin layer 51 in a plan view. In this respect, the configuration of the chip resistor 100B differs from the configuration of the chip resistor 100.

[0064] In the chip resistor 100B, the position of the trimming groove 30a in the second direction DR2 may be shifted toward the second side surface 10d from the center position in the second direction DR2 of the resistor 30. That is, in the chip resistor 100B, the trimming groove 30a may overlap the second conductive resin layer 52 in a plan view.

[0065] <Effects of the Chip Resistor 100B> The resistor 30 is likely to generate heat near the trimming groove 30a. In the chip resistor 100B, the trimming groove 30a and the first conductive resin layer 51 (second conductive resin layer 52) overlap in a planar view, so that heat generated in the resistor 30 is easily transferred to the first conductive resin layer 51 (second conductive resin layer 52). Therefore, the chip resistor 100B can further improve the heat dissipation of the resistor 30.

[0066] (First Test) In the first test, samples 1 to 7 were used as chip resistor 100 samples. In samples 1 to 7, the width W was set to 3.2 mm. In samples 1 to 7, the distance L1 was changed. That is, in samples 1 to 7, the value obtained by dividing the distance L1 by the width W was changed. Note that the first test was performed after each sample was mounted with the first main surface 10a facing the circuit board 200.

[0067] The heat dissipation performance of each sample was evaluated based on the rate of change in electrical resistance when a current exceeding the rated current was applied to each sample. More specifically, five samples were prepared, and if the change in electrical resistivity in all five samples was less than 1%, the sample was evaluated as A. If the change in electrical resistivity in some of the five samples was 1% or more but less than 2% and the change in electrical resistivity in the remaining five samples was less than 1%, the sample was evaluated as B. If the change in electrical resistivity in some of the five samples was 2% or more, the sample was evaluated as C.

[0068]

[0069] As shown in Table 1, sample 1 received an A rating for heat dissipation when a current 3.1 times or less than the rated current was passed, but received a B or lower rating for heat dissipation when a current 3.2 times or more than the rated current was passed. sample 2 received an A rating for heat dissipation when a current 3.2 times or less than the rated current was passed, but received a B or lower rating for heat dissipation when a current 3.3 times or more than the rated current was passed. samples 3 to 7 received an A rating for heat dissipation even when a current 3.3 times the rated current was passed.

[0070] In Samples 1 and 2, the value obtained by dividing the distance L1 by the width W was not within the range of 0.0938 or more and 0.2188 or less (distance L1 was 300 μm or more and 700 μm or less). In Samples 3 to 7, the value obtained by dividing the distance L1 by the width W was within the range of 0.0938 or more and 0.2188 or less (distance L1 was 300 μm or more and 700 μm or less). From this comparison, it was experimentally revealed that the heat dissipation performance of the resistor 30 is improved by setting the value obtained by dividing the distance L1 by the width W to 0.0938 or more and 0.2188 or less (distance L1 was 300 μm or more and 700 μm or less).

[0071] (Second Test) In the second test, Sample 8 was used as the chip resistor 100 sample, and Samples 9 to 12 were used as chip resistor 100B samples. In Samples 8 to 12, the width W was set to 3.2 mm. In Samples 8 to 12, the distance L1 was set to 0.4 mm. The second test was performed after each sample was mounted with the first main surface 10a facing the circuit board 200.

[0072] In Sample 8, the end of the first conductive resin layer 51 on the first side surface 10c side was not spaced apart from the end of the first surface electrode 21 on the first side surface 10c side, and the end of the second conductive resin layer 52 on the second side surface 10d side was not spaced apart from the end of the second surface electrode 22 on the second side surface 10d side. In Samples 9 to 12, the distances L2 and L3 were changed.

[0073] The heat dissipation properties of Samples 8 to 12 were evaluated based on the rate of change in electrical resistance when a current exceeding the rated current was passed through each sample. When a current equal to or less than 3.3 times the rated current was passed through each sample, the rate of change in electrical resistance was less than 1 percent for all of the five Samples 8. When a current equal to or more than 3.4 times the rated current was passed through each sample, the rate of change in electrical resistance exceeded 1 percent for at least some of the five Samples 8.

[0074] When a current 3.4 times or less than the rated current was passed through, the rate of change in electrical resistance was less than 1 percent in all of the five prepared samples 9 and all of the five prepared samples 10. When a current 3.5 times or more than the rated current was passed through, the rate of change in electrical resistance was greater than 1 percent in at least some of the five prepared samples 9 and at least some of the five prepared samples 10.

[0075] When a current 3.3 times or less than the rated current was passed through, the rate of change in electrical resistance was less than 1% in all of the five prepared samples 11 and all of the five prepared samples 12. When a current 3.4 times or more than the rated current was passed through, the rate of change in electrical resistance was more than 1% in at least some of the five prepared samples 10 and at least some of the five prepared samples 12.

[0076] Condition A is that distance L2 and distance L3 are 100 μm or more. Condition B is that the width in the second direction DR2 of the portion of the first conductive resin layer 51 on the first surface electrode 21 and the width in the second direction DR2 of the portion of the second conductive resin layer 52 on the second surface electrode 22 are 100 μm or more. Samples 8, 11, and 12 did not satisfy conditions A and B. On the other hand, samples 9 and 10 satisfied conditions A and B. This comparison experimentally revealed that satisfying conditions A and B improves the heat dissipation of the resistor 30.

[0077] (Third Test) In the third test, Samples 13 and 14 were used as samples of the chip resistor 100B. In Sample 13, the trimming groove 30a did not overlap with either the first conductive resin layer 51 or the second conductive resin layer 52 in a planar view. In Sample 14, the trimming groove 30a overlapped with the first conductive resin layer 51 in a planar view. The heat dissipation properties of Samples 13 and 14 were evaluated based on the rate of change in electrical resistance when a current exceeding the rated current was passed through each sample. The third test was conducted after each sample was mounted with the first main surface 10a facing the circuit board 200.

[0078] When a current 3.7 times or less than the rated current was passed through the prepared five samples 13, the rate of change in electrical resistance was less than 1%. When a current 3.8 times or more than the rated current was passed through the prepared five samples 13, the rate of change in electrical resistance was more than 1%.

[0079] On the other hand, when a current 4.3 times or less than the rated current was passed through, the rate of change in electrical resistance was less than 1 percent in all of the five prepared samples 14. When a current 4.4 times or more than the rated current was passed through, the rate of change in electrical resistance exceeded 1 percent in at least some of the five prepared samples 14. From this comparison, it was experimentally revealed that the heat dissipation of resistor 30 is improved when trimming groove 30 a overlaps first conductive resin layer 51 (second conductive resin layer 52) in a plan view.

[0080] Fourth Embodiment A chip resistor according to a fourth embodiment will be described below. The chip resistor according to the fourth embodiment is referred to as chip resistor 100C. Here, differences from chip resistor 100 will be mainly described, and overlapping descriptions will not be repeated.

[0081] <Configuration of Chip Resistor 100C> FIG. 16 is a top view of the chip resistor 100C. FIG. 17 is a bottom view of the chip resistor 100C. Note that the first plating layer 71 and the second plating layer 72 are omitted from FIG. 17. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 16. As shown in FIGS. 16, 17, and 18, the chip resistor 100C includes an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a resistor 30, a protective film 40, a first side surface electrode 61 and a second side surface electrode 62, and a first plating layer 71 and a second plating layer 72. In this respect, the configuration of the chip resistor 100C is common to the configuration of the chip resistor 100.

[0082] The chip resistor 100C does not have the first conductive resin layer 51 and the second conductive resin layer 52, but further has a first heat dissipation film 54 and a second heat dissipation film 55.

[0083] The first heat dissipation film 54 and the second heat dissipation film 55 are made of an electrically conductive material. The first heat dissipation film 54 and the second heat dissipation film 55 are made of, for example, fired metal particles. The metal particles are, for example, silver particles.

[0084] The first heat dissipation film 54 and the second heat dissipation film 55 are disposed on the second main surface 10b. More specifically, the first heat dissipation film 54 extends on the second main surface 10b in the second direction DR2 from the first back surface electrode 23 toward the second back surface electrode 24. The second heat dissipation film 55 extends on the second main surface 10b in the second direction DR2 from the second back surface electrode 24 toward the first back surface electrode 23. The first heat dissipation film 54 and the second heat dissipation film 55 are spaced apart from each other in the second direction DR2. That is, the second main surface 10b is exposed between the first heat dissipation film 54 and the second heat dissipation film 55.

[0085] The width of the first heat dissipation film 54 in the third direction DR3 is preferably smaller than the width of the first back surface electrode 23 in the third direction DR3. The width of the second heat dissipation film 55 in the third direction DR3 is preferably smaller than the width of the second back surface electrode 24 in the third direction DR3.

[0086] The distance in the second direction DR2 between the first heat dissipation film 54 and the second heat dissipation film 55 (the distance in the second direction DR2 between the end of the first heat dissipation film 54 on the second back surface electrode 24 side and the end of the second heat dissipation film 55 on the first back surface electrode 23 side) is defined as distance L4. The width of the chip resistor 100C in the second direction DR2 is defined as width W1. The value obtained by dividing distance L4 by width W1 is preferably 0.4 or less. Preferably, the sum of the width of the first back surface electrode 23 in the second direction DR2 and the width of the first heat dissipation film 54 in the second direction DR2 is 0.3 times or more the width W1, and the sum of the width of the second back surface electrode 24 in the second direction DR2 and the width of the second heat dissipation film 55 in the second direction DR2 is 0.3 times or more the width W1. Preferably, distance L4 is 300 μm or more.

[0087] In the chip resistor 100C, the trimming groove 30a does not overlap either the first heat dissipation film 54 or the second heat dissipation film 55 in a plan view. In the chip resistor 100C, the trimming groove 30a may overlap either the first heat dissipation film 54 or the second heat dissipation film 55 in a plan view. In these respects, the configuration of the chip resistor 100C is common to the configuration of the chip resistor 100.

[0088] <Method of Manufacturing Chip Resistor 100C> Figure 19 is a process diagram showing a method of manufacturing the chip resistor 100C. As shown in Figure 19, the method of manufacturing the chip resistor 100C includes a preparation step S1, a first electrode formation step S2, a resistor formation step S3, a protective film formation step S4, a first division step S6, a second electrode formation step S7, a second division step S8, and a plating layer formation step S9. In this respect, the method of manufacturing the chip resistor 100C is common to the method of manufacturing the chip resistor 100.

[0089] The manufacturing method of the chip resistor 100C does not include the conductive resin layer forming step S5. FIG. 20 is a cross-sectional view illustrating the first electrode forming step S2 in the manufacturing method of the chip resistor 100C. As shown in FIG. 20, the first electrode forming step S2 in the manufacturing method of the chip resistor 100C further includes forming a first heat dissipation film 54 and a second heat dissipation film 55. The first heat dissipation film 54 is formed on the second main surface 10b so as to extend from the surface electrode 25a toward the surface electrode 25b, and the second heat dissipation film 55 is formed on the second main surface 10b so as to extend from the surface electrode 25b toward the surface electrode 25a. The first heat dissipation film 54 and the second heat dissipation film 55 are formed by applying a paste containing metal particles such as silver particles and then firing the applied paste. In these respects, the manufacturing method of the chip resistor 100C differs from the manufacturing method of the chip resistor 100.

[0090] <Effects of Chip Resistor 100C> In the chip resistor 100C, a portion of the heat generated in the resistor 30 is conducted to the second main surface 10b through the insulating substrate 10. In the chip resistor 100C, the first heat dissipation film 54 and the second heat dissipation film 55 are disposed on the second main surface 10b, so that the heat conducted to the second main surface 10b through the insulating substrate 10 is easily dissipated from the first heat dissipation film 54 and the second heat dissipation film 55. In this way, the chip resistor 100C improves the heat dissipation properties of the resistor 30.

[0091] As the value obtained by dividing the distance L4 by the width W1 becomes smaller, a larger portion of the second main surface 10b is covered by the first heat dissipation film 54 and the second heat dissipation film 55, and therefore, heat transmitted through the insulating substrate 10 to the second main surface 10b is more easily dissipated from the first heat dissipation film 54 and the second heat dissipation film 55. On the other hand, if the distance L4 becomes too small, the first heat dissipation film 54 and the second heat dissipation film 55 may come into contact with each other due to manufacturing errors, etc., and the first back surface electrode 23 and the second back surface electrode 24 may be short-circuited. Therefore, when the value obtained by dividing the distance L4 by the width W1 is 0.4 or less and the distance L4 is 300 μm or more, the heat dissipation properties of the resistor 30 can be improved while suppressing short-circuiting between the first back surface electrode 23 and the second back surface electrode 24.

[0092] Fifth Embodiment A chip resistor according to a fifth embodiment will be described below. The chip resistor according to the fifth embodiment is designated as chip resistor 100D. Here, differences from chip resistor 100C will be mainly described, and overlapping descriptions will not be repeated.

[0093] <Configuration of Chip Resistor 100D> FIG. 21 is a bottom view of the chip resistor 100D. Note that the first plating layer 71 and the second plating layer 72 are omitted from FIG. 21 . FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 21 . As shown in FIGS. 21 and 22 , the chip resistor 100D includes an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a first heat dissipation film 54 and a second heat dissipation film 55, a resistor 30, a protective film 40, a first side electrode 61 and a second side electrode 62, and a first plating layer 71 and a second plating layer 72. In this respect, the configuration of the chip resistor 100D is common to the configuration of the chip resistor 100C.

[0094] In the chip resistor 100D, the width of the first heat dissipation film 54 in the second direction DR2 is different from the width of the second heat dissipation film 55 in the second direction DR2. More specifically, in the chip resistor 100D, the width of the first heat dissipation film 54 in the second direction DR2 is larger than the width of the second heat dissipation film 55 in the second direction DR2, and the end of the first heat dissipation film 54 on the second heat dissipation film 55 side is closer to the second side surface 10d than the center of the second main surface 10b in the second direction DR2. In the chip resistor 100D, the trimming groove 30a overlaps with the first heat dissipation film 54 in a plan view. In these respects, the configuration of the chip resistor 100D differs from the configuration of the chip resistor 100C.

[0095] In the chip resistor 100D, the width of the second heat dissipation film 55 in the second direction DR2 may be larger than the width of the first heat dissipation film 54 in the second direction DR2, and the end of the second heat dissipation film 55 on the first heat dissipation film 54 side may be closer to the first side surface 10c than the center of the second main surface 10b in the second direction DR2. In the chip resistor 100D, the trimming groove 30a may overlap the second heat dissipation film 55 in a plan view.

[0096] <Effects of the Chip Resistor 100D> The resistor 30 generates a large amount of heat near the trimming groove 30a. In the chip resistor 100D, the trimming groove 30a is positioned so as to overlap the first heat dissipation film 54 (second heat dissipation film 55) in a planar view. This makes it easier for heat generated near the trimming groove 30a to be dissipated from the first heat dissipation film 54 (second heat dissipation film 55) through the insulating substrate 10. In this way, the chip resistor 100D further improves the heat dissipation performance of the resistor 30.

[0097] Sixth Embodiment A chip resistor according to the sixth embodiment will be described below. The chip resistor according to the sixth embodiment is designated as chip resistor 100E. Here, differences from chip resistor 100C will be mainly described, and overlapping descriptions will not be repeated.

[0098] <Configuration of Chip Resistor 100E> FIG. 23 is a bottom view of the chip resistor 100E. Note that the first plating layer 71 and the second plating layer 72 are omitted from FIG. 23 . FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. 23 . As shown in FIGS. 23 and 24 , the chip resistor 100E includes an insulating substrate 10, a first surface electrode 21 and a second surface electrode 22, a first back surface electrode 23 and a second back surface electrode 24, a first heat dissipation film 54 and a second heat dissipation film 55, a resistor 30, a protective film 40, a first side electrode 61 and a second side electrode 62, and a first plating layer 71 and a second plating layer 72. In this respect, the configuration of the chip resistor 100E is common to the configuration of the chip resistor 100C.

[0099] The chip resistor 100E further includes a third heat dissipation film 70. The third heat dissipation film 70 is disposed on the second main surface 10b between the first heat dissipation film 54 and the second heat dissipation film 55. Both ends of the third heat dissipation film 70 in the second direction DR2 may be disposed on the first heat dissipation film 54 and the second heat dissipation film 55, respectively.

[0100] The third heat dissipation film 70 is formed of an electrically insulating material. The third heat dissipation film 70 is formed of a material with high thermal conductivity. The thermal conductivity of the third heat dissipation film 70 is, for example, higher than the thermal conductivity of the protective film 40. The third heat dissipation film 70 is formed of, for example, a thermal conductive adhesive (TCA). More specifically, the third heat dissipation film 70 includes, for example, a resin material and particles formed of an electrically insulating material. The resin material is, for example, an epoxy resin or a phenolic resin, and the particles are alumina particles. In these respects, the configuration of the chip resistor 100E differs from the configuration of the chip resistor 100C. The third heat dissipation film 70 is formed, for example, in the protective film formation process S4.

[0101] <Effects of the Chip Resistor 100E> In the chip resistor 100E, the third heat dissipation film 70, which has a higher thermal conductivity than the protective film 40, is disposed on the second main surface 10b, and therefore the heat transmitted to the second main surface 10b through the insulating substrate 10 is more easily dissipated. In this way, the chip resistor 100E further improves the heat dissipation properties of the resistor element 30.

[0102] (Additional Note) The fourth to sixth embodiments include the following configurations.

[0103] <Supplementary Note 1> A chip resistor comprising: an insulating substrate having a first main surface and a second main surface which are end surfaces in a thickness direction of the chip resistor, and a first side surface and a second side surface which are end surfaces in a longitudinal direction of the chip resistor; a resistor arranged on the first main surface; a first back surface electrode arranged on an end portion of the second main surface on the first side surface side; a second back surface electrode arranged on an end portion of the second main surface on the second side surface side; a first heat dissipation film arranged on the second main surface and extending along the longitudinal direction from the first back surface electrode toward the second back surface electrode; and a second heat dissipation film arranged on the second main surface and extending along the longitudinal direction from the second back surface electrode toward the first back surface electrode, wherein the first heat dissipation film and the second heat dissipation film are formed of an electrically conductive material and are spaced apart from each other in the longitudinal direction.

[0104] <Appendix 2> The chip resistor according to Appendix 1, wherein the width of the first heat dissipation film in the width direction of the chip resistor is smaller than the width of the first back surface electrode in the width direction, and the width of the second heat dissipation film in the width direction is smaller than the width of the second back surface electrode in the width direction.

[0105] <Appendix 3> The chip resistor according to Appendix 1 or Appendix 2, wherein the value obtained by dividing the distance between the first heat dissipation film and the second heat dissipation film in the longitudinal direction by the width of the chip resistor in the longitudinal direction is 0.4 or less, and the distance between the first heat dissipation film and the second heat dissipation film in the longitudinal direction is 300 μm or more.

[0106] <Supplementary Note 4> The chip resistor according to any one of Supplementary Note 1 to Supplementary Note 3, wherein the width of the first heat dissipation film in the longitudinal direction is different from the width of the second heat dissipation film in the longitudinal direction.

[0107] <Supplementary Note 5> The chip resistor according to Supplementary Note 4, wherein an end of the first heat dissipation film on the second heat dissipation film side is located closer to the second side surface than a center of the second main surface in the longitudinal direction.

[0108] <Appendix 6> The chip resistor according to any one of Appendices 1 to 5, wherein a trimming groove is formed in the resistor, and either the first heat dissipation film or the second heat dissipation film overlaps with the trimming groove in a planar view.

[0109] <Supplementary Note 7> The chip resistor according to any one of Supplementary Note 1 to Supplementary Note 6, wherein the first heat dissipation film and the second heat dissipation film are made of silver.

[0110] <Appendix 8> The chip resistor according to any one of Appendices 1 to 7, further comprising a third heat dissipation film formed of an electrically insulating material, the third heat dissipation film being disposed on the second main surface between the first heat dissipation film and the second heat dissipation film.

[0111] <Supplementary Note 9> The chip resistor according to Supplementary Note 8, wherein the third heat dissipation film is formed of an adhesive containing an insulating filler.

[0112] Seventh Embodiment A chip resistor according to the seventh embodiment will be described below. The chip resistor according to the seventh embodiment is referred to as chip resistor 100F. Here, differences from chip resistor 100 will be mainly described, and overlapping descriptions will not be repeated.

[0113] <Configuration of Chip Resistor 100F> FIG. 25 is a top view of the chip resistor 100F. FIG. 26 is a bottom view of the chip resistor 100F. FIG. 27 is a cross-sectional view taken along line XXVII-XXVII in FIG. 25. As shown in FIGS. 25, 26, and 27, the chip resistor 100F has an insulating substrate 10, a first surface electrode 21, a second surface electrode 22, a first back surface electrode 23, a second back surface electrode 24, a first side surface electrode 61, a second side surface electrode 62, a first plating layer 71, and a second plating layer 72. In this respect, the configuration of the chip resistor 100F is common to the configuration of the chip resistor 100.

[0114] The chip resistor 100F has a first resistor 31 and a second resistor 32 instead of the resistor 30. The chip resistor 100F has a first protective film 41 and a second protective film 42 instead of the protective film 40. The chip resistor 100F does not have a first conductive resin layer 51 or a second conductive resin layer 52.

[0115] In the chip resistor 100F, the insulating substrate 10 further has a third side surface 10e and a fourth side surface 10f. The third side surface 10e and the fourth side surface 10f are end surfaces of the insulating substrate 10 in the third direction DR3. The fourth side surface 10f is the surface opposite the third side surface 10e. In the chip resistor 100F, the center position of the insulating substrate 10 in the second direction DR2 is defined as a first position P1.

[0116] In the chip resistor 100F, the metal particles contained in the first surface electrode 21, the second surface electrode 22, the first back surface electrode 23, and the second back surface electrode 24 are preferably copper (Cu) particles. The copper particles may be mixed with nickel (Ni) particles. The metal particles may be silver (Ag) particles, and the silver particles may be mixed with palladium (Pd) particles.

[0117] In the chip resistor 100F, the first surface electrode 21 extends in the second direction DR2 from the end of the first main surface 10a on the first side surface 10c side toward the first resistor 31, and the second surface electrode 22 extends in the second direction DR2 from the end of the first main surface 10a on the second side surface 10d side toward the first resistor 31. In the chip resistor 100F, the width of the first surface electrode 21 in the second direction DR2 is smaller than the width of the second surface electrode 22 in the second direction.

[0118] In the chip resistor 100F, the first back surface electrode 23 extends in the second direction DR2 from the end of the second main surface 10b on the first side surface 10c side toward the second resistor 32, and the second back surface electrode 24 extends in the second direction DR2 from the end of the second main surface 10b on the second side surface 10d side toward the second resistor 32. The width of the first back surface electrode 23 in the second direction DR2 is greater than the width of the second back surface electrode 24 in the second direction.

[0119] The first resistor 31 and the second resistor 32 are made of a conductive material. The first resistor 31 and the second resistor 32 are formed by, for example, firing a paste containing metal particles. The metal particles are, for example, particles of a silver-palladium (Pd) alloy.

[0120] The first resistor 31 is disposed on the first main surface 10a between the first surface electrode 21 and the second surface electrode 22. The first resistor 31 is also disposed on the end of the first surface electrode 21 on the second side surface 10d side and on the end of the second surface electrode 22 on the first side surface 10c side. The first resistor 31 is electrically connected to the first surface electrode 21 and the second surface electrode 22.

[0121] The center position of the first resistor 31 in the second direction DR2 is defined as a second position P2. The second position P2 is shifted from the first position P1 toward the first side surface 10c in the second direction DR2.

[0122] The second resistor 32 is disposed on the second main surface 10b between the first back surface electrode 23 and the second back surface electrode 24. The second resistor 32 is also disposed on an end of the first back surface electrode 23 on the second side surface 10d side and an end of the second back surface electrode 24 on the first side surface 10c side. The second resistor 32 is electrically connected to the first back surface electrode 23 and the second back surface electrode 24.

[0123] The center position of the second resistor 32 in the second direction DR2 is defined as a third position P3. The third position P3 is shifted from the first position P1 toward the second side surface 10d in the second direction DR2. That is, the third position P3 is shifted from the first position P1 in the second direction DR2 on the side opposite to the second position P2.

[0124] A first trimming groove 31a is formed in the first resistor 31. The first trimming groove 31a is formed to adjust the electrical resistance value of the first resistor 31. The first trimming groove 31a penetrates the first resistor 31 along the first direction DR1. The first trimming groove 31a extends along the third direction DR3. The first trimming groove 31a extends, for example, from the third side surface 10e side toward the fourth side surface 10f side (see FIG. 25 ). The end of the first trimming groove 31a on the third side surface 10e side reaches the end of the first resistor 31 on the third side surface 10e side. The first trimming groove 31a is formed, for example, by irradiating the first resistor 31 with laser light to partially remove the first resistor 31.

[0125] A second trimming groove 32a is formed in the second resistor 32. The second trimming groove 32a is formed to adjust the electrical resistance value of the second resistor 32. The second trimming groove 32a penetrates the second resistor 32 along the first direction DR1. The second trimming groove 32a extends along the third direction DR3. The second trimming groove 32a extends, for example, from the fourth side surface 10f side toward the third side surface 10e side (see FIG. 26 ). The end of the second trimming groove 32a on the fourth side surface 10f side reaches the end of the second resistor 32 on the fourth side surface 10f side. That is, the first trimming groove 31a and the second trimming groove 32a are formed alternately. The second trimming groove 32a is formed, for example, by irradiating the second resistor 32 with laser light to partially remove the second resistor 32.

[0126] The position of the first trimming groove 31a in the second direction DR2 is defined as a fourth position P4. The position of the second trimming groove 32a in the second direction DR2 is defined as a fifth position P5. The fourth position P4 is shifted from the second position P2 toward the first side surface 10c in the second direction DR2. The fifth position P5 is shifted from the third position P3 toward the second side surface 10d in the second direction DR2. Although not shown, the fourth position P4 and the fifth position P5 may coincide with the second position P2 and the third position P3, respectively, in the second direction DR2.

[0127] The first protective film 41 and the second protective film 42 are made of an insulating material, such as a resin material such as an epoxy resin or a phenol resin.

[0128] The first protective film 41 is disposed on the first resistor 31. The first protective film 41 is also disposed on the first surface electrode 21 and the second surface electrode 22. However, the end of the first protective film 41 on the first side surface 10c side and the end of the second side surface 10d side are spaced apart from the end of the first surface electrode 21 on the first side surface 10c side and the end of the second side surface 10d side, respectively. The second protective film 42 is disposed on the second resistor 32. The second protective film 42 is also disposed on the first back surface electrode 23 and the second back surface electrode 24. However, the end of the second protective film 42 on the first side surface 10c side and the end of the second side surface 10d side are spaced apart from the end of the first back surface electrode 23 on the first side surface 10c side and the end of the second side surface 10d side, respectively.

[0129] The width in the second direction DR2 of the first plating layer 71 on the first back surface electrode 23 with the first side electrode 61 interposed therebetween and the width in the second direction DR2 of the second plating layer 72 on the second back surface electrode 24 with the second side electrode 62 interposed therebetween are defined as width W2. The width W2 is preferably 100 μm or greater. The width W2 is more preferably 200 μm or greater. In these respects, the configuration of the chip resistor 100F differs from the configuration of the chip resistor 100.

[0130] <Method of Manufacturing Chip Resistor 100F> The method of manufacturing the chip resistor 100F includes a preparation step S1, a first electrode formation step S2, a resistor formation step S3, a protective film formation step S4, a first division step S6, a second electrode formation step S7, a second division step S8, and a plating layer formation step S9. In this respect, the method of manufacturing the chip resistor 100F is common to the method of manufacturing the chip resistor 100.

[0131] The manufacturing method of the chip resistor 100C does not include the conductive resin layer forming step S5. In the manufacturing method of the chip resistor 100F, the order in which the resistor forming step S3 is performed may be reversed from the order in which the first electrode forming step S2 is performed. Figure 28 is a cross-sectional view illustrating the resistor forming step S3 in the manufacturing method of the chip resistor 100F. As shown in Figure 28, in the manufacturing method of the chip resistor 100F, in the resistor forming step S3, a first resistor 31 and a second resistor 32 are formed instead of the resistor 30.

[0132] The first resistor 31 is formed on a portion of the first main surface 10a between two adjacent front surface electrodes 25 so that both ends of the first resistor 31 in the second direction DR2 are located on the two adjacent front surface electrodes 25. The second resistor 32 is formed on a portion of the second main surface 10b between two adjacent back surface electrodes 26 so that both ends of the second resistor 32 in the second direction DR2 are located on the two adjacent back surface electrodes 26. The first resistor 31 and the second resistor 32 are formed by applying a paste containing metal particles such as silver-palladium alloy particles and firing the applied paste.

[0133] In the manufacturing method of the chip resistor 100F, in the resistor formation process S3, after the first resistor 31 and the second resistor 32 are formed, the electrical resistance values ​​of the first resistor 31 and the second resistor 32 are adjusted by forming a first trimming groove 31a and a second trimming groove 32a, for example, by irradiating with laser light.

[0134] FIG. 29 is a cross-sectional view illustrating the protective film formation step S4 in the manufacturing method of the chip resistor 100F. As shown in FIG. 29 , in the protective film formation step S4, a first protective film 41 and a second protective film 42 are formed instead of the protective film 40. The first protective film 41 is formed on the first resistor 31 so as to be positioned on two adjacent front surface electrodes 25, each of which has both ends of the first protective film 41 in the second direction DR2. The second protective film 42 is formed on the second resistor 32 so as to be positioned on two adjacent back surface electrodes 26, each of which has both ends of the second protective film 42 in the second direction DR2. The first protective film 41 and the second protective film 42 are formed by applying an uncured resin material and then heat-curing the applied resin material. In these respects, the manufacturing method of the chip resistor 100F differs from the manufacturing method of the chip resistor 100.

[0135] <Effects of Chip Resistor 100F> In the chip resistor 100F, the amount of heat generated by the first resistor 31 increases near the second position P2. In the chip resistor 100F, the second position P2 is shifted toward the first side surface 10c from the first position P1 in the second direction DR2, and the distance between the portion of the first resistor 31 that generates a large amount of heat and the bonding member 240 is reduced. This makes it easier for the heat generated by the first resistor 31 to be dissipated from the circuit board 200 via the bonding member 240. In this way, the chip resistor 100F improves the heat dissipation properties of the first resistor 31.

[0136] In the chip resistor 100F, the amount of heat generated by the second resistor 32 increases near the third position P3. In the chip resistor 100F, the third position P3 is shifted toward the second side surface 10d from the first position P1 in the second direction DR2, and the distance between the portion of the second resistor 32 generating a large amount of heat and the bonding member 250 decreases. Therefore, the heat generated by the second resistor 32 is more likely to be dissipated from the circuit board 200 via the bonding member 250.

[0137] In this way, the chip resistor 100F improves the heat dissipation of the second resistor 32. In particular, in the chip resistor 100F, the third position P3 is shifted from the first position P1 to the opposite side from the second position P2, so that the heat dissipation path from the first resistor 31 and the heat dissipation path from the second resistor 32 are separated, further improving the heat dissipation.

[0138] The heat generation amount of the first resistor 31 is also large near the fourth position P4. The heat generation amount of the second resistor 32 is also large near the fifth position P5. In the chip resistor 100F, the fourth position P4 is shifted closer to the first side surface 10c than the second position P2, and the fifth position P5 is shifted closer to the second side surface 10d than the third position P3. Therefore, the distance between the portion of the first resistor 31 that generates a large amount of heat and the bonding member 240 is reduced, and the distance between the portion of the second resistor 32 that generates a large amount of heat and the bonding member 250 is reduced. As a result, the chip resistor 100F has further improved heat dissipation properties.

[0139] When the second position P2 and the third position P3 are displaced from the first position P1, the width W2 decreases. When the width W2 is less than 100 μm, the width of the first plating layer 71 joined by the joining member 240 decreases, and the width of the heat transfer path from the chip resistor 100F to the circuit board 200 decreases.

[0140] When the width W2 is 100 μm or more (200 μm or more), the width of the first plating layer 71 joined by the joining member 240 increases, and the width of the heat transfer path from the chip resistor 100F to the circuit board 200 can be secured, thereby further improving the heat dissipation of the chip resistor 100F. In this case, the joining reliability between the chip resistor 100F and the circuit board 200 can also be improved.

[0141] Eighth Embodiment A chip resistor according to the eighth embodiment will be described below. The chip resistor according to the eighth embodiment is designated as chip resistor 100G. Here, differences from chip resistor 100F will be mainly described, and overlapping descriptions will not be repeated.

[0142] FIG. 30 is a cross-sectional view of the chip resistor 100G. FIG. 30 shows a cross-section of the chip resistor 100G perpendicular to the third direction DR3. As shown in FIG. 30, the chip resistor 100G includes an insulating substrate 10, a first surface electrode 21, a second surface electrode 22, a first back surface electrode 23, a second back surface electrode 24, a first resistor 31, a second resistor 32, a first protective film 41, a second protective film 42, a first side electrode 61, a second side electrode 62, a first plating layer 71, and a second plating layer 72. In these respects, the configuration of the chip resistor 100G is common to the configuration of the chip resistor 100F.

[0143] In the chip resistor 100G, the third position P3 is shifted from the first position P1 toward the first side surface 10c in the second direction DR2. That is, in the chip resistor 100G, the third position P3 is shifted from the first position P1 to the same side as the second position P2. Also, in the chip resistor 100G, the fifth position P5 is shifted from the third position P3 toward the first side surface 10c in the second direction DR2. In these respects, the configuration of the chip resistor 100G differs from the configuration of the chip resistor 100F.

[0144] In the chip resistor 100G, the distance between the portions of the second resistor 32 that generate a large amount of heat (near the third position P3 and near the fifth position P5) and the bonding member 240 is reduced. Therefore, in the chip resistor 100G, the heat generated by the second resistor 32 is more easily dissipated from the circuit board 200 via the bonding member 240, resulting in improved heat dissipation similar to that of the chip resistor 100F.

[0145] Ninth Embodiment A chip resistor according to a ninth embodiment will be described below. The chip resistor according to the ninth embodiment is designated as chip resistor 100H. Here, differences from chip resistor 100F will be mainly described, and overlapping descriptions will not be repeated.

[0146] FIG. 31 is a cross-sectional view of the chip resistor 100H. FIG. 31 shows a cross-section of the chip resistor 100H perpendicular to the third direction DR3. As shown in FIG. 31, the chip resistor 100H includes an insulating substrate 10, a first surface electrode 21, a second surface electrode 22, a first back surface electrode 23, a second back surface electrode 24, a first resistive element 31, a first protective film 41, a first side electrode 61, a second side electrode 62, a first plating layer 71, and a second plating layer 72. In this respect, the configuration of the chip resistor 100G is common to the configuration of the chip resistor 100F. The chip resistor 100H does not include a second resistive element 32 or a second protective film 42. In this respect, the configuration of the chip resistor 100H differs from the configuration of the chip resistor 100F.

[0147] In the chip resistor 100H, the distance between the portions of the first resistor 31 where the amount of heat generated is large (near the second position P2 and near the fourth position P4) and the bonding member 240 is small. Therefore, in the chip resistor 100H, the heat generated by the second resistor 32 is easily dissipated from the circuit board 200 via the bonding member 240, resulting in improved heat dissipation similar to that of the chip resistor 100F.

[0148] (Additional Note) The seventh to ninth embodiments include the following configurations.

[0149] <Supplementary Note 10> A chip resistor comprising: an insulating substrate having a first main surface and a second main surface which are end faces in a thickness direction of the chip resistor, and a first side surface and a second side surface which are end faces in a longitudinal direction of the chip resistor; and a first resistor arranged on the first main surface, wherein a center of the first resistor in the longitudinal direction is shifted toward the first side surface from a center of the insulating substrate in the longitudinal direction.

[0150] <Appendix 11> The chip resistor according to Appendix 10, further comprising a second resistor arranged on the second main surface, wherein a center of the second resistor in the longitudinal direction is shifted toward the first side surface or the second side surface from a center of the insulating substrate in the longitudinal direction.

[0151] <Supplementary Note 12> The chip resistor according to Supplementary Note 11, wherein a center of the second resistor in the longitudinal direction is shifted toward the second side surface from a center of the insulating substrate in the longitudinal direction.

[0152] <Appendix 13> The chip resistor according to Appendix 12, wherein a first trimming groove is formed in the first resistor, and a position of the first trimming groove in the longitudinal direction is shifted toward the first side surface side from a center of the first resistor in the longitudinal direction.

[0153] <Appendix 14> The chip resistor according to Appendix 13, wherein a second trimming groove is formed in the second resistor, and the position of the second trimming groove in the longitudinal direction is shifted toward the second side surface side from the center of the second resistor in the longitudinal direction.

[0154] <Appendix 15> The chip resistor according to Appendix 14, wherein the insulating substrate has a third side surface and a fourth side surface which are end faces in the width direction of the chip resistor, the first trimming groove extends along the width direction from the third side surface side toward the fourth side surface side in a planar view, and the second trimming groove extends along the width direction from the fourth side surface side toward the third side surface side in a planar view.

[0155] <Supplementary Note 16> The chip resistor further comprises a first surface electrode and a second surface electrode arranged on the first main surface, a first back surface electrode and a second back surface electrode arranged on the second main surface, a first side surface electrode, a second side surface electrode, a first plating layer, and a second plating layer, wherein the second main surface is a mounting surface of the chip resistor, the first surface electrode extends in the longitudinal direction from an end of the first main surface on the first side surface side toward the first resistor, the second surface electrode extends in the longitudinal direction from an end of the first main surface on the second side surface side toward the first resistor, the first back surface electrode extends in the longitudinal direction from an end of the second main surface on the first side surface side toward the second resistor, the second back surface electrode extends in the longitudinal direction from an end of the second main surface on the second side surface side toward the second resistor, and the first side surface electrode is arranged on the first side surface, the first surface electrode, and the first back surface electrode, The chip resistor described in any one of Appendix 12 to Appendix 15, wherein the second side electrode is arranged on the second side, the second surface electrode, and the second back surface electrode; the first plating layer and the second plating layer are arranged on the first side surface electrode and the second side surface, respectively; and the width in the longitudinal direction of the first plating layer on the first back surface electrode with the first side surface electrode interposed therebetween and the width in the longitudinal direction of the second plating layer on the second back surface electrode with the second side surface electrode interposed therebetween are 100 μm or more.

[0156] Although the embodiments of the present disclosure have been described above, the above-described embodiments can be modified in various ways. Furthermore, the scope of the present invention is not limited to the above-described embodiments. The scope of the present invention is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0157] 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H Chip resistor, 10 Insulating substrate, 10a First main surface, 10aa, 10aaa, 10aab First division groove, 10ab Second division groove, 10b Second main surface, 10ba, 10baa, 10bab First division groove, 10bb Second division groove, 10c First side surface, 10d Second side surface, 10e Third side surface, 10f Fourth side surface, 11 Sheet-like substrate, 12 Strip-like substrate, 21 First surface electrode, 22 Second surface electrode, 23 First back surface electrode, 24 Second back surface electrode, 25 Surface electrode, 25a Surface electrode, 25b Surface electrode, 26 Back surface electrode, 26a Back surface electrode, 26b Back surface electrode, 30 Resistor, 30a trimming groove, 31 first resistive film, 31a trimming groove, 32 second resistive film, 32a trimming groove, 40 protective film, 41 first protective film, 42 second protective film, 51 first conductive resin layer, 52 second conductive resin layer, 53 conductive resin layer, 53a conductive resin layer, 53b conductive resin layer, 54 first heat dissipation film, 55 second heat dissipation film, 61 first side electrode, 62 second side electrode, 71 first plating layer, 71a first layer, 71b second layer, 71c third layer, 72 second plating layer, 72a first layer, 72b second layer, 72c third layer, 200 circuit board, 210 base material, 220 first land, 230 second land, 240, 250 bonding member, DR1 first direction, DR2 second direction, DR3 Third direction, L1, L2, L3, L4 distance, S1 preparation process, S2 first electrode formation process, S3 resistor formation process, S4 protective film formation process, S5 conductive resin layer formation process, S6 first division process, S7 second electrode formation process, S8 second division process, S9 plating layer formation process, W, W1, W2 width.

Claims

1. A chip resistor, an insulating substrate having a first main surface which is an end surface of the chip resistor in a thickness direction, and a first side surface and a second side surface which are end surfaces of the chip resistor in a longitudinal direction; a first surface electrode disposed on an end portion of the first main surface on the first side surface side; a second surface electrode disposed on an end portion of the first main surface on the second side surface side; a resistor disposed on the first main surface and electrically connected to the first surface electrode and the second surface electrode; a protective film disposed on the resistor so as to partially cover the first surface electrode and the second surface electrode; a first conductive resin layer disposed across the first surface electrode and the protective film; a second conductive resin layer disposed across the second surface electrode and the protective film, A chip resistor, wherein the end of the first conductive resin layer on the second side surface side and the end of the second conductive resin layer on the first side surface side are spaced apart from each other.

2. The chip resistor according to claim 1 , wherein an end of the first conductive resin layer on the second side surface side and an end of the second conductive resin layer on the first side surface side overlap the resistor in a plan view.

3. The chip resistor according to claim 1, wherein the longitudinal distance between the end of the first conductive resin layer on the second side surface side and the end of the second conductive resin layer on the first side surface side is 300 μm or more and 700 μm or less.

4. 2. The chip resistor according to claim 1, wherein the end of the first conductive resin layer on the first side surface side and the end of the second conductive resin layer on the second side surface side are spaced apart from the end of the first surface electrode on the first side surface side and the end of the second surface electrode on the second side surface side, respectively.

5. a distance in the longitudinal direction between an end of the first conductive resin layer on the first side surface side and an end of the first surface electrode on the first side surface side, and a distance in the longitudinal direction between an end of the second conductive resin layer on the second side surface side and an end of the second surface electrode on the second side surface side are 100 μm or more, 5. The chip resistor according to claim 4, wherein the longitudinal width of the portion of the first conductive resin layer on the first surface electrode and the longitudinal width of the portion of the second conductive resin layer on the second surface electrode are 100 μm or more.

6. Further comprising a first plating layer and a second plating layer, The chip resistor according to claim 4 , wherein the first plating layer and the second plating layer are disposed on the first surface electrode and the second surface electrode, respectively.

7. The resistor has a trimming groove formed therein, The chip resistor according to any one of claims 1 to 6, wherein either the first conductive resin layer or the second conductive resin layer overlaps the trimming groove in a plan view.

8. The chip resistor according to claim 7 , wherein the trimming groove is offset from the center of the resistor in the longitudinal direction toward the first side surface or the second side surface.