Optical transmitter

Abstract

Provided is an optical transmitter that has high manufacturing stability and reflection suppressing effect. This optical transmitter comprises a monolithic integration, on a single substrate, of: a distributed-feedback (DFB) laser which includes an active region formed of a multiple quantum well that produces an optical gain by current injection, and a diffraction grating; an electroabsorption (EA) modulator having an absorption region formed of a multiple quantum well of a composition different than that of the DFB laser; a semiconductor amplifier (SOA) having an active region of the same composition as that of the DFB laser; a bending waveguide which rotates a light propagation direction only by an angle θwg; and a passive waveguide which is connected to the SOA and has a core having a bandgap wavelength shorter than the oscillation wavelength of the DFB laser. The passive waveguide includes a tapering region and a narrow waveguide region. The tapering region is configured to convert a width W1 of the passive waveguide connecting to the SOA into a width W2 of the narrow waveguide region. The passive waveguide adjoins an end surface of the substrate at an angle θwg with respect to the normal to the end surface of the substrate.

Description

Optical Transmitter

[0001] The present disclosure relates to an optical transmitter, and more particularly to a semiconductor laser device that integrates an electroabsorption (EA) optical modulator on an InP substrate, and more particularly to an optical transmitter that includes the EA modulator, a semiconductor optical amplifier (SOA), and a distributed feedback (DFB) laser.

[0002] In recent years, the spread of video streaming services and the growing demand for mobile traffic have led to an explosive increase in network traffic. In the optical transmission lines that support these networks, the trend is toward lower network costs through faster transmission rates, lower power consumption, and longer transmission distances. Semiconductor modulated light sources used within networks are also being required to achieve higher speeds and higher output power while suppressing excessive increases in power consumption.

[0003] Electroabsorption modulator integrated DFB (EADFB) lasers have been used in a wide range of applications because they have higher extinction characteristics and superior chirp characteristics compared to directly modulated lasers.

[0004] Furthermore, an SOA Assisted Extended Reach EADFB Laser (AXEL) has been proposed, which integrates a semiconductor optical amplifier (SOA) (see, for example, Non-Patent Document 1). AXEL can be used as an optical transmitter in optical communications.

[0005] W Kobayashi et al., “Novel approach for chirp and output power compensation applied to a 40-Gbit / s EADFB laser integrated with a short SOA,” Opt. Express, Vol. 23, No. 7, pp. 9533-9542, Apr. 2015

[0006] There is a demand for improved manufacturing stability of AXEL and a sufficient anti-reflection effect at the end face of a semiconductor chip on which AXEL is formed.

[0007] The present disclosure has been made in view of the above circumstances, and an object thereof is to provide an optical transmitter with high manufacturing stability and high reflection suppression effect.

[0008] In order to achieve this object, an optical transmitter according to one embodiment of the present invention is an optical transmitter monolithically integrated on a single substrate: a distributed feedback (DFB) laser having an active region formed of multiple quantum wells and a diffraction grating that generates optical gain when a current is injected; an electroabsorption (EA) modulator having an absorption region formed of multiple quantum wells with a different composition from that of the DFB laser; a semiconductor optical amplifier (SOA) having an active region with the same composition as that of the DFB laser; a bent waveguide that rotates the propagation direction of light by an angle θwg; and a passive waveguide connected to the SOA and having a core with a bandgap wavelength shorter than the oscillation wavelength of the DFB laser; the passive waveguide includes a tapered region and a narrow waveguide region, and the tapered region is configured to convert a width W1 of the passive waveguide connected to the SOA into a width W2 of the narrow waveguide region, and the passive waveguide is in contact with the end face of the substrate at an angle θwg with a normal to the end face of the substrate.

[0009] As described above, according to one embodiment of the present invention, it is possible to provide an optical transmitter with high manufacturing stability and high reflection suppression effect.

[0010] FIG. 1 is a cross-sectional view showing the schematic configuration of a general EADFB laser; FIG. 2 is a cross-sectional view showing the schematic configuration of an AXEL; FIG. 3 is a top view showing the schematic configuration of the emitting end face of an AXEL; FIG. 4 is a top view showing a plurality of semiconductor chips arranged on a wafer; (a) and (b) are diagrams explaining the chip yield during wafer manufacturing; (a) is a top view showing the schematic configuration near the emitting portion of an AXEL having a window region; (b) shows the results of evaluating the optical waveform quality of a plurality of modules mounting an AXEL; (a) is a diagram showing the schematic configuration of an optical beam shape near the end face of a semiconductor chip, where (a) is a top view and (b) is a cross-sectional view; (a), (b), and (c) are cross-sectional views showing part of the manufacturing process of the window region; (b) is a schematic view showing the schematic configuration of an AXEL having a window region formed by burying regrowth, where (a) is a top view and (b), (c), and (d) are cross-sectional views; (c) shows the results of evaluating the window region optical waveform quality of a plurality of modules mounting an AXEL having a window region. FIG. 1 is a diagram showing the vicinity of the output end of the SOA in the rear stage of an AXEL according to an embodiment of the present disclosure. FIG. 2 is a diagram showing the vicinity of the output end of the SOA in the rear stage of an AXEL according to an embodiment of the present disclosure. FIG. 3 is a diagram showing the dependence of the mask margin on the width of the narrow waveguide region. FIG. 4 is a diagram showing the results of evaluating optical loss for multiple modules mounted with an AXEL having a narrow waveguide region according to an embodiment of the present disclosure. FIG. 5 is a diagram explaining the miniaturization of chip size and the improvement of chip yield by an AXEL having a narrow waveguide region according to an embodiment of the present disclosure. FIG. 6 is a top view showing a schematic configuration of an AXEL according to an embodiment. FIG. 7 is a diagram showing a schematic example of the layout of an AXEL chip adopted in an embodiment. FIG. 8 is a diagram showing the state of the end of a mesa-shaped waveguide in the AXEL manufacturing process, where (a) is a cross-sectional view after dry etching, and (b) and (c) are cross-sectional views after wet etching. FIG. 9 is a diagram showing the schematic configuration of an AXEL chip according to an embodiment. FIG. 10 is a diagram showing the relationship between the width W3 of the waveguide end and the amount of side etching. FIG. 11 is a top view showing a schematic configuration of the vicinity of the waveguide end in an AXEL chip according to an embodiment.

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The same or similar reference numerals indicate the same or similar elements, and redundant explanations may be omitted. The numerical values ​​or materials in the following description are examples, and other numerical values ​​or materials may be used to implement the present disclosure without departing from the spirit of the present disclosure.

[0012]

[0013] Before describing the embodiments of the present disclosure, AXEL, which is an EADFB laser integrated with an SOA, will be described.

[0014] FIG. 1 is a cross-sectional view showing the schematic configuration of a typical EADFB laser. The typical EADFB laser 10 shown in FIG. 1 has a DFB laser 11 and an EA modulator 12 integrated on the same chip. The DFB laser 11 has an active layer 13 formed of a multiple quantum well (MQW) and oscillates at a single wavelength using a diffraction grating 14 formed in the resonator. The EA modulator 12 has a light absorption layer formed of a multiple quantum well (MQW) with a different composition from that of the DFB laser 11, and the amount of light absorption can be changed by voltage control. The EA modulator 12 blinks light by operating under conditions that allow it to transmit and absorb the output light from the DFB laser 11, converting the electrical signal into an optical signal.

[0015] The EADFB laser 10 has a problem in that it is difficult to achieve high output power because the EA modulator is accompanied by a large optical loss. The above-mentioned AXEL has been proposed as a solution to this problem.

[0016] FIG. 2 is a cross-sectional view showing the schematic configuration of an AXEL. The AXEL 20 shown in FIG. 2 modulates light from a DFB laser 11 into signal light using an EA modulator 12 and then amplifies the signal light using an SOA 16, thereby enabling increased output power. The AXEL achieves approximately twice the output power of a conventional EADFB laser. Furthermore, because the AXEL enables highly efficient operation due to the SOA integration effect, power consumption can be reduced by approximately 40% when driven under operating conditions that provide the same optical output as a conventional EADFB laser. Furthermore, in the AXEL, the SOA 16 and the active layer 13 of the DFB laser 11 are formed using the same MQW structure. Therefore, the AXEL 20 can be fabricated using the same manufacturing process as a conventional EADFB laser 10, without the need for an additional regrowth process for integrating the SOA 16.

[0017] AXEL suffers from a significant degradation of operating characteristics due to reflected light feedback, due to the high optical output characteristics associated with the integration of the SOA 16. In optical transmitters such as conventional semiconductor lasers, it is known that reflected light reflected from the semiconductor chip end face and returning to the chip interior adversely affects the device's operating characteristics. Therefore, semiconductor optical transmitters typically employ anti-reflection (AR) coatings on the chip end face to suppress reflected light from the chip end face to less than 0.1%. However, in the case of an EADFB laser (AXEL) integrated with an SOA, even a small amount of reflected light feedback significantly affects operating characteristics due to its high output characteristics. If the optical amplification effect of the SOA in the AXEL is +3 dB compared to a conventional EADFB laser, the average optical output power will increase by +3 dB, and the intensity of the reflected light will also increase by 3 dB. In addition, the reflected light from the end face of the AXEL is amplified again within the SOA, so the intensity of the reflected light reaching the DFB laser in the AXEL increases by +6 dB compared to the EADFB laser. For this reason, in order to deal with the reflected light in the AXEL, a structure combining a window structure and a curved waveguide is adopted in addition to the AR coating.

[0018] FIG. 3 is a top view showing the schematic configuration of the output end face of AXEL. A schematic diagram (top view) of this configuration is shown in [fig. 3]. FIG. 3 shows a portion of a waveguide 32 connected to an SOA of AXEL 20 fabricated as a chip. Signal light from the SOA of AXEL 20 in a semiconductor chip (also simply referred to as a chip in this specification) 31 is guided through the waveguide 32 and output from the output end face 33. Typically, the output end face of a semiconductor chip is a crystal plane formed by cleavage, and the waveguide in the semiconductor chip is formed at a perpendicular angle to this output end face. Therefore, light propagating through the waveguide is incident perpendicularly on the output face and is output from the semiconductor chip. In contrast, in the AXEL 20 shown in FIG. 3, a bend is provided in the waveguide 32 in the semiconductor chip 31. The signal light guided through the waveguide 32 is incident on the output end face 33 at an incident angle of θwg. This makes it difficult for the light reflected at the output end face 33 to be coupled back into the waveguide 32. In other words, it is possible to suppress light reflected back from the output end face 33. Generally, an incident angle θwg of the signal light from the waveguide 32 with respect to the output end face 33 to suppress reflection is set to 4 to 8 degrees.

[0019] Furthermore, in the structure shown in FIG. 3 , the waveguide 32 terminates inside the semiconductor chip 31. The signal light emitted from the waveguide 32 propagates through a bulk semiconductor known as the window region 35, reaches the output end face 33, and is emitted from the semiconductor chip 31 to the outside. At this time, the signal light propagates while expanding its beam diameter due to the diffraction effect in the window region 35. This reduces the proportion of the optical field reflected by the output end face 33 and overlapping with the waveguide 32 inside the semiconductor chip 31, further reducing the reflected back light coupled to the waveguide 32. Typically, the length of the window region 35 in the light propagation direction (X direction) is fabricated to be approximately 10 μm. Unless these measures against reflected back light are adequately implemented, the AXEL20 cannot achieve high-output characteristics and high-quality transmission characteristics at the same time.

[0020] As mentioned above, AXEL employs a curved waveguide and a window structure at the output end face to minimize reflected light at the end face of the chip. Here, the issues with this structure will be explained.

[0021] First, referring to FIG. 4, we will discuss the issues that arise when a curved waveguide is employed. FIG. 4 is a top view showing multiple semiconductor chips 31 arranged in the X and Y directions on a wafer. In this specification, a semiconductor substrate on which an AXEL is formed and formed into a chip is also referred to as an AXEL chip. In FIG. 4, two semiconductor chips 31 on which an AXEL having a waveguide 32 is formed face each other in the light propagation direction (X direction). The waveguide 32 includes a straight waveguide portion 32a and a curved waveguide portion 312b. FIG. 4 illustrates an AXEL chip that does not have a window region 35.

[0022] In optical semiconductor devices such as semiconductor lasers, multiple chips with the same emission facet are usually cleaved into bars to form the emission facets. Adjacent BARs in the light propagation direction are arranged so that their emission facets face each other, and the opposing chips are arranged so that they share the emission facet formed by cleavage.

[0023] As shown in FIG. 4 , the multiple chips 31 are arranged such that the curved waveguide portions 32b are formed so that the optical axis forms an angle θwg with respect to the output end face, and the curved waveguides 32b of two adjacent, opposing chips 31 in the X direction are connected to each other. That is, the two adjacent, opposing chips are arranged with the same optical axis. In other words, the two chips are fabricated continuously on the same waveguide. The two adjacent Bar1 and Bar2 are separated by cleavage to form an output end face 33 where the waveguide 32 terminates. In an actual semiconductor chip cleavage process, there is a limit to the accuracy of the cleavage position, and a misalignment of approximately ±10 μm typically occurs. As described above, by aligning the optical axes of the opposing chips and arranging them so that the waveguides are connected, even if an error occurs in the cleavage position, a structure in which the waveguides terminate at the output end face in both chips can be formed, thereby suppressing a decrease in yield during the cleavage process. However, this arrangement has the disadvantage of increasing the chip size.

[0024] The DFB laser 11, EA modulator 12, and SOA 16 in the AXEL are formed on a waveguide whose optical axis is perpendicular to the output facet 33 (the X direction). The optical axes of the DFB lasers 11 in the two opposing chips are not aligned, but are positioned parallel to each other at a distance ΔY apart. This ΔY is called the waveguide offset. As is clear from FIG. 4 , the size of the semiconductor chip 31 in the Y direction must be greater than or equal to the waveguide offset. Furthermore, it is desirable for the optical element portion, such as the DFB laser 11, and the light output position (the end position of the waveguide 32) of the cleaved end face to be located at the center of the chip. For this reason, the chip's size in the Y direction is designed to have a sufficient margin for the waveguide offset. The curved waveguide portion 32b of a typical AXEL requires a length of at least approximately 400 μm. Assuming a waveguide bending angle θwg of 5°, the waveguide offset is approximately ΔY = 70 μm. In this case, if a 100 μm margin is secured on both sides of the straight waveguide portion 32 a of each chip 31 in Bar 1 and Bar 2 (Margin 1 and Margin 2 in FIG. 4 ), a chip width (Y-reported length) of at least 270 μm is required. Thus, with conventional AXEL, it was difficult to reduce the width (size in the Y direction) of the AXEL chip to 250 μm or less in order to secure a sufficient margin (distance) within the chip relative to the waveguide position from the standpoint of manufacturing margins and long-term reliability. In addition, the conventional AXEL layout also poses a problem of chip yield during wafer manufacturing.

[0025] The chip yield during wafer manufacturing will be described with reference to Figure 5. Figure 5(a) shows a schematic diagram of the arrangement of four chips (Chips 1 to 4) formed consecutively on the same optical waveguide 32 on a semiconductor wafer during the manufacturing process of an AXEL chip. As described above, after the manufacturing process for each element within the chip, each chip is separated by a cleavage process. Chips 1 and 2 are arranged and connected facing each other so that the SOAs 16 that generate optical output are adjacent, and Chips 2 and 3 are connected so that the DFB lasers are adjacent. As described above, the chip emission facets and waveguide terminations are determined by cleavage. Therefore, taking into consideration the positional error of the cleavage, adjacent chips in the x direction are arranged with their waveguides 32 connected. This applies not only to the SOA side (boundary between Chip 1 and Chip 2), which is the emission end, but also to the DFB laser side (boundary between Chip 2 and Chip 3).

[0026] Here, due to the waveguide offset described above, a misalignment in the Y direction occurs between chip 2 and chip 3. While FIG. 5A illustrates only four chips arranged consecutively in the X direction, in an actual wafer, 10 or more chips are formed on the same consecutive waveguide 32. Therefore, the greater the number of consecutive chips, the greater the accumulation of misalignment in the Y direction due to the waveguide offset. When 10 chips are arranged together on a wafer, if the waveguide offset ΔY is 40 μm, the misalignment in the Y direction between chip 1 and chip 10 reaches 400 μm. Such misalignment on the wafer adversely affects the chip arrangement.

[0027] Figure 5(b) is a schematic diagram of a wafer manufactured with 10 x 10 AXEL chips arranged on it. Normally, in the manufacturing process of optical semiconductors, a basic unit called a shot, which is a rectangular (or square) array of multiple chips, is divided and arranged on the wafer. As shown in Figure 5(b), if a waveguide offset occurs, a dead zone (blank space) occurs within the shot where no chips can be arranged, which inevitably reduces the number of chips manufactured within the same wafer and reduces yield. In Figure 5(b), if the length (length in the X direction) of the AXEL chip is 1000 μm, the chip width (length in the Y direction) is 300 μm, and the waveguide offset is 70 μm, the dead zone will be 700,000 μm within the shot. ２ The size of the AXEL chip is 300,000 μm. ２ This leads to a decrease in the overall yield of about 2 to 3%.

[0028] Next, referring to FIG. 6, we will discuss the issues that arise when a window region is employed. FIG. 6 is a top view showing a schematic configuration of the vicinity of the emission section of an AXEL having a window region. To clarify the arrangement within the wafer, FIG. 6 shows adjacent chips within the same bar (Bar1) and adjacent chips within an opposing bar (Bar2). As described above with reference to FIG. 4, in FIG. 6, even in an AXEL having a window region, the optical axis of the waveguide 32 at the emission end is arranged to coincide with the optical axis of the waveguide 32 of the opposing chip.

[0029] Furthermore, the two opposing chips each have a window region 35, and the end of the waveguide 32 is located at a position separated from the planned cleavage position 44 by the length of the window region 35 (length in the X direction). The length of a typical window region is designed to be approximately 10 μm. As mentioned above, a positional deviation error of approximately ±10 μm occurs in the cleavage process. Therefore, if an error in the cleavage position occurs of 10 μm or more, the window region 35 in one of the two bars shown in FIG. 6 will disappear, and a sufficient reflection suppression effect will not be obtained.

[0030] Figure 7 shows the results of evaluating the optical waveform quality of multiple modules incorporating AXEL chips fabricated using the same process. The AXEL chips here all have the same structure, emitting at a wavelength in the 1.3 μm band. The only difference between the chips is the window region length due to manufacturing errors. After measuring the window region length for each chip in advance, each chip was mounted in a typical butterfly-type semiconductor module consisting of a two-lens system. The butterfly-type package also includes a high-frequency connector. Each fabricated module was modulated with a 25 Gbit / s NRZ signal, and the optical waveform (EYE waveform) was evaluated. The vertical axis of Figure 7 represents the mask margin, an index of optical waveform quality; a larger margin indicates a clearer eye opening. The horizontal axis of Figure 7 represents the deviation of the window region length of each fabricated AXEL chip from its design value, with the design value of the window region set to 10 μm. It can be seen that the mask margin tends to deteriorate as the window region length decreases. This is thought to be because as the length of the window region becomes smaller, the intensity of the light reflected back from the chip end face into the chip interior increases, causing the operation of the AXEL to become unstable. Figure 7 shows that the length of the window region must be at least 5 μm. Also, if the window region 35 is too long, it will have a negative effect on the characteristics of the AXEL.

[0031] FIG. 8 is a schematic diagram showing the optical beam shape near the end face when the length L of the window region 35 is longer than designed due to a manufacturing error in the cleavage position 44. FIG. 8(a) is a top view, and FIG. 8(b) is a cross-sectional view. For the 1.55 μm and 1.3 μm communication wavelength bands, the core layer thickness is approximately 200 nm to 300 nm. Typically, InP-based optical semiconductor devices have stronger optical confinement in the vertical direction (Z direction) of the waveguide than in the horizontal direction (XY direction) of the waveguide. Therefore, the vertical beam divergence angle in the window region 35 is larger than the horizontal beam divergence angle. For this reason, if the window region length is long, the upper end of the beam within the window region reaches the interface between the cladding layer and the outside of the semiconductor (air or electrodes), causing beam shape defects (vignetting) and optical loss (FIG. 8(b)). In typical InP-based optical semiconductor devices, the cladding layer above the waveguide is formed by regrowth, and the upper cladding layer thickness is approximately 2 μm. When providing a window structure, it is necessary to design the thickness of the clad layer above the core layer taking into consideration the beam spread due to the diffraction effect of the light beam.

[0032] The InP thickness of the window region 35 tends to be thinner than the upper cladding thickness of the waveguide portion, which particularly affects the optical field. The reason for this is explained below with reference to FIG. 9. As mentioned above, the typical window region 35 terminates at the waveguide, forming an InP region. The InP in the window region 35 is formed simultaneously during the upper cladding layer growth process or the buried growth process. Here, we will explain the case where the window region is formed during buried growth. FIG. 9 is a cross-sectional view showing part of the fabrication process of an AXEL having a buried heterostructure (BH structure). The DFB laser 11, EA modulator 12, and SOA 16 share a common buried waveguide structure. As shown in FIG. 9(a), an insulating film is first formed on the surfaces of the lower cladding layer, core layer 83, and upper cladding layer 84 stacked on an InP substrate 81, and then patterned to form a waveguide-shaped insulating layer mask 85. 9(b), a mesa formation process is performed using a dry or wet etching process to form a waveguide including a waveguide core 83a. Next, as shown in FIG. 9(c), an InP layer 86, which serves as a current blocking layer, is regrown to bury the waveguide, and then the insulating layer mask 85 is removed to complete the BH structure. The window region 35 described above is also formed simultaneously during the fabrication of this BH structure.

[0033] FIG. 10 is a schematic diagram showing the general configuration of an AXEL device having a window region formed by buried regrowth. FIG. 10(a) is a schematic diagram of the AXEL window region as viewed from above the substrate. FIG. 10(b) is a cross-sectional view of the AXEL waveguide, FIG. 10(c) is a cross-sectional view of the optical waveguide, and FIG. 10(d) is a cross-sectional view of the window region. For simplicity, a straight waveguide without a curved waveguide is shown. As shown in FIG. 10(b), current blocking layers (InP 86) are formed on both sides of the mesa-shaped waveguide by buried regrowth, resulting in a waveguide core 83a buried with InP 86. Furthermore, as shown in FIGS. 10(c) and 10(d), the window region is simultaneously etched during fabrication of the mesa-shaped waveguide, and an InP layer identical to the current blocking layer (InP) is buried during the buried regrowth process.

[0034] In a typical burying regrowth process, the thickness of the regrown InP layer is set according to the height of the mesa-shaped waveguide so that the waveguide is completely buried. If the regrown InP layer is too thick compared to the waveguide, the InP layer will pile up and deposit on top of the insulating layer mask 85 shown in FIG. 9(c). In contrast, as shown in the top view of FIG. 10(a), the window region is where the mesa shape terminates, so the opening area buried during regrowth is relatively larger than the other regions. Therefore, if the mesa-shaped waveguide and the window region are simultaneously buried with InP by regrowth, a portion of the window region where the InP thickness is thinner than the mesa-shaped waveguide portion will be created, as shown in FIG. 10(c). As mentioned above, the optical field propagates in the window region due to diffraction, and a thin InP film thickness can easily cause the optical field to come into contact with the upper air interface, resulting in optical loss.

[0035] Figure 11 shows the results of evaluating the relationship between optical loss within a module and the variation in window region length in multiple modules fabricated using AXEL chips with window regions fabricated using a conventional burying and regrowth process. The results are from the same module as shown in Figure 7. As mentioned above, each module uses an AXEL chip with the same structure, and the design window region length is 10 μm. The optical output characteristics of each AXEL chip were evaluated using a large-aperture photodetector before being mounted in a module. The AXEL chip was then mounted in the module and coupled to an optical fiber to evaluate the optical intensity, thereby estimating the optical loss resulting from mounting in the module. The module used here had a two-lens system and was mounted using an active alignment process. As is clear from Figure 11, there is a tendency for loss within the module to increase as the window region length increases. This is because, as the window region length increases, the upper end of the emitted beam reaches the boundary between the cladding layer and the outside of the chip, causing a defect in the beam shape and reducing the coupling efficiency to the optical fiber. To suppress optical loss within the module to 3.0 dB or less and create a stable optical module, the window region length of the Axel chip must be 15 μm or less, meaning the cleavage position deviation must be 5 μm or less. However, in the actual semiconductor chip cleavage process, a cleavage position error of approximately ±10 μm typically occurs. In order to manufacture an optical transmitter with sufficient performance using an Axel chip with a window structure, it is not possible to provide sufficient margin when forming the output facet through cleavage. Therefore, manufacturing errors in the cleavage position inevitably result in a certain number of defective products (chips with window region lengths outside the tolerance), which reduces manufacturing yields.

[0036] According to an embodiment of the present disclosure, it is possible to provide an AXEL, i.e., an optical transmitter, having high manufacturing stability and high anti-reflection effect. An AXEL according to an embodiment of the present disclosure will now be described.

[0037] (Embodiment) As described above, a light beam propagates through a window region due to diffraction. This reduces the proportion of the optical field distribution that recouples into the waveguide even when reflected at the end face, thereby reducing the amount of returning light. Therefore, in the present disclosure, the light beam shape is expanded by narrowing the waveguide using a tapered shape. In principle, if the width of the waveguide becomes sufficiently small, cutoff occurs, and light is radiated without being confined within the waveguide. In this state, the light beam propagates while expanding, achieving the same reflection suppression effect as in the window region. However, it is difficult to consistently manufacture a waveguide narrow enough to cut off propagating light in the communication wavelength band (1.3 μm or 1.55 μm). In the present disclosure, it is not necessary to use a waveguide narrow enough to achieve the cutoff condition; sufficient effects can be achieved by fabricating a waveguide width within the manufacturing margin that sufficiently increases the beam diameter of the guided light.

[0038] This state is shown in Figure 12. Figure 12 is a diagram illustrating the vicinity of the output end of the SOA in the rear stage of an AXEL according to one embodiment of the present disclosure. In this disclosure, a tapered region 32c and a narrow waveguide region 34d are provided by narrowing the waveguide width just before the output end of the curved waveguide portion 32b of the waveguide 32, through which light from the SOA is guided. The narrow waveguide region 32d has a fixed length and is positioned beyond the designed cleavage position 44. Here, the narrow waveguide region 32d is long enough to tolerate misalignment errors in the cleavage process. Therefore, even if the cleavage position is misaligned, an end face is always formed within the narrow waveguide region 32d, so the quality of the output beam is not affected. In addition, the waveguide termination 32e is positioned outside the intended cleavage position, i.e., outside the chip. This arrangement prevents the propagation light from being affected by the thinning of the InP 86 film thickness or deterioration of the surface flatness in the window region of the waveguide termination 32e, as described above with reference to Figure 10.

[0039] Here, the length required for the narrow waveguide region is explained using FIG. 13 . As mentioned above, a positional error of approximately ±10 μm occurs during the cleavage process. Therefore, the narrow waveguide region 32d must be at least 20 μm long to compensate for this error (M1 in FIG. 13 ). Furthermore, to obtain a sufficient anti-reflection effect, the narrow waveguide region 32d following the tapered region 32c must remain at least 5 μm long (M2 in FIG. 13 ). Furthermore, if a cleavage position error occurs, a margin of approximately 5 μm must be secured for the remaining waveguide 32f remaining in the adjacent chip (M3 in FIG. 13 ). From these points, the length of the narrow waveguide region 32d must be at least approximately 30 μm. In this case, taking into account the above-mentioned cleavage position error, the length of the narrow waveguide region 32d in the AXEL chip after cleavage is 5 μm to 25 μm, and the length of the remaining waveguide 32f, including the waveguide termination 32e in the adjacent chip, must be 5 μm to 15 μm.

[0040] In addition, by adjusting the position of the waveguides 32 between adjacent chips, it is possible to eliminate the waveguide offset. FIG. 13 shows adjacent chips arranged on a wafer before cleaving. In the present disclosure, the waveguide terminations 32e are arranged outside the chips. This means that the waveguide terminations 32e are arranged inside the adjacent chips facing each other. Therefore, by utilizing the waveguide offset, the positions of the waveguide terminations 32e are positioned sufficiently far from the optical axis propagating within each chip, so that the influence of the waveguide terminations 32e on the guided light is not exerted. Therefore, after cleaving, the waveguide terminations 32e of the remaining waveguides 32f of the adjacent chips on the wafer remain inside the chips. The waveguide terminations 32e of the remaining waveguides 32f do not affect the chip operation at all.

[0041] 13, the chip size restriction due to the waveguide offset is alleviated. That is, the waveguides are arranged so that the optical axes of opposing chips are not aligned, which makes it possible to reduce the chip size.

[0042] Adopting the narrow waveguide region 32d described above provides a sufficient anti-reflection effect. First, AXEL chips with different widths W perpendicular to the light propagation direction in the narrow waveguide region 32d were fabricated, and the impact of reflected back light was evaluated. As with the study described in Figure 7, a butterfly-type module incorporating a 1.3 μm wavelength band AXEL was fabricated, and the impact of the amount of reflected back light was evaluated based on the waveform quality of a 25 Gbit / s optical waveform. For the evaluation, AXEL chips with narrow waveguide regions of different widths W were used. The AXEL chips used had the same structure except for the width W of the narrow waveguide region.

[0043] Figure 14 shows the dependence of the evaluated mask margin on the width of the narrow waveguide region. The mask margin is an index that represents the waveform quality of the propagating light. A larger mask margin value indicates a higher waveform quality of the propagating light. The width W of the mesa-shaped narrow waveguide region was varied from 0.25 μm to 1.5 μm for evaluation. Here, W = 1.5 μm corresponds to a chip with a constant waveguide width, i.e., a chip with a waveguide of constant width all the way to the end face without a taper near the waveguide's output end. As is clear from Figure 14, the narrower the width W of the narrow waveguide region at the output end, the more suppressed the end face reflection and the better the waveform quality. When the width W of the narrow waveguide region is 0.7 μm or less, a mask margin of 30% or more can be ensured, which can be said to be a sufficient reflection suppression effect for practical use. However, when the width W of the narrow waveguide region is 0.25 μm, stable manufacturing is difficult using the photolithography process, which is a typical manufacturing process for optical semiconductor devices. As a structure that achieves both manufacturing stability and a sufficient reflection suppression effect, the width W of the narrow waveguide region is most effective when it is approximately 0.4 to 0.8 μm.

[0044] Next, we evaluated the effect of cleavage misalignment on chip characteristics for the AXEL chips with narrow waveguide regions according to the present disclosure. Figure 15 shows the results of evaluating the optical loss of multiple modules incorporating AXEL chips fabricated using a conventional cleavage process. The width W of the narrow waveguide region in these AXEL chips was 0.5 μm. The data shown for the conventional AXEL chip in Figure 15 is the same as that shown in Figure 11. The evaluation was the same as that described in Figure 11, where the optical loss within the module was calculated from the change in optical output before and after modularization. There is concern that the loss may increase if beam vignetting occurs above the cladding layer, as mentioned above. Figure 15 shows that the optical loss of the conventional AXEL chip increases as the cleavage misalignment increases, whereas the optical loss of the AXEL chips with narrow waveguide regions according to the present disclosure remains nearly constant regardless of the cleavage misalignment, generally below 2.5 dB. From these results, it was confirmed that the introduction of the narrow waveguide region of the present disclosure significantly suppresses variations in chip performance due to deviations in cleavage position, which has been a problem in the past.

[0045] Another advantage of the AXEL having a narrow waveguide region according to the present disclosure is that it enables chip size reduction and improved chip yield during wafer manufacturing. Figure 16 illustrates the chip size reduction and improved chip yield achieved by the AXEL having a narrow waveguide region. As shown in Figure 16, the straight waveguide portion 32a of the AXEL waveguide 32 can be positioned at the center of the chip in the Y direction. Therefore, even when the chip's Y-direction length is reduced, sufficient margin can be ensured on both sides of the waveguide. Here, the chip's Y-direction size is set to 200 μm, and the straight waveguide portion 32a is positioned at the center of the chip, ensuring sufficient margin of 100 μm on both the top and bottom sides of the waveguide. If the angle θwg between the optical axis of the curved waveguide portion 32b and the normal (X direction) to the cleavage plane (end face) is set to 5° and the length of the curved waveguide portion 32b is set to 400 μm, the positional deviation of the chip's output end is approximately 35 μm, which is a position that is fully acceptable for manufacturing.

[0046] In addition, in FIG. 16, the optical axes of the straight waveguide portions 32a of adjacent opposing chips are aligned. This allows the waveguide offset ΔY in the Y direction to be zero. This eliminates the chip yield problem caused by the waveguide offset described in FIG. 5. In a typical AXEL chip, the length of the curved waveguide portion 32b in FIG. 16 is approximately 150 μm to 500 μm. Furthermore, the angle θwg between the optical axis of the curved waveguide portion 32b and the normal to the cleavage plane (end face) is typically 4° to 8°, as described above. Therefore, assuming an angle θwg = 4°, the deviation D / 2 of the emission position in FIG. 16 is 10 μm < D / 2 < 35 μm. Furthermore, assuming an angle θwg = 8°, the deviation is 21 μm < D / 2 < 70 μm. Therefore, the narrow waveguide regions 32d of adjacent AXEL chips are separated on the cleavage plane by a distance D, where D satisfies the relationship 10 μm<D<140 μm. However, in actual use, the surface flatness of the waveguide termination 32e decreases during regrowth as described above, so it is necessary to maintain a distance of at least 30 μm from the curved waveguide portion 32b through which light is guided, and therefore 30 μm<D<140 μm is desirable.

[0047] (Example 1) An AXEL of Example 1 will be described with reference to Fig. 17. This example realizes an optical transmitter capable of generating a 25 Gbit / s modulated signal, in which the optical output during modulation is increased to 9 dBm or more in order to accommodate a system with a high loss budget.

[0048] FIG. 17 is a top view showing a schematic configuration of an AXEL according to this embodiment. The semiconductor chip 31 shown in FIG. 17 includes a waveguide 32, a DFB laser 11, an EA modulator 12, and an SOA 16 connected by the waveguide 32. As described above, the waveguide 32 has a curved waveguide portion. The curved waveguide portion has a tapered region and a narrow waveguide region. The semiconductor chip 31 is an AXEL chip that monolithically integrates the DFB laser 11, the EA modulator 12, and the SOA 16, and constitutes an optical transmitter. To facilitate understanding of the process of forming an output facet by cleavage, FIG. 17 also shows another AXEL chip (semiconductor chip 31) adjacent on the wafer.

[0049] In the optical transmitter (semiconductor chip 31) of this embodiment, the length of the DFB laser 11 (length along the waveguide 32; the same applies below) is 300 μm, the length of the EA modulator 12 is 150 μm, and the length of the SOA 16 is 200 μm. The waveguide 32 employs a buried heterostructure using semi-insulating InP, which provides high heat dissipation and current confinement effects. As described above, the AXEL chip of this embodiment includes a tapered region 32 c and a narrow waveguide region 32 d in the curved waveguide section 32 b to achieve sufficient reflection suppression. The narrow waveguide region 32 d is located near the output end face. The AXEL chip is formed on an InP substrate (100) surface, and the DFB laser 11 is positioned so that light is output in the substrate

[011] orientation. Light from the DFB laser 11 passes through the EA modulator 12, which is on the same optical axis as the DFB laser 11, before changing its propagation direction in the bent waveguide section to form an angle θ wg with respect to the crystal orientation

[011] and entering the SOA 16. The light emitted from the SOA 16 is converted to a narrow waveguide region with a width W in the tapered region while maintaining the angle θ wg. The light propagating through the narrow waveguide region passes through the planned cleavage position 44 and then terminates inside the adjacent chip 31. Here, the angle θ wg is set to 5° as a bending angle that provides a sufficient reflection suppression effect. Furthermore, the width W of the narrow waveguide region is set to 0.5 μm, which is within the range that allows stable manufacturing in the semiconductor processing process to obtain a sufficient reflection suppression effect.

[0050] Under these conditions, the narrow waveguide region does not reach the cutoff condition. Therefore, light propagates through the narrow waveguide region without radiating. Furthermore, two AXEL chips adjacent in the X direction face each other. Furthermore, within the two AXEL chips, the straight waveguide sections in which the DFB laser 11 and the EA modulator 12 are formed are arranged parallel and with the same optical axis. The curved waveguide sections of the two AXEL chips are arranged parallel and spaced apart by a distance D above the planned cleavage position. Here, the length L_bend of the curved waveguide section of the AXEL chip is 400 μm. Therefore, the waveguide distance D is 70 μm. The two AXEL chips are separated by a cleavage process. As mentioned above, the cleavage process typically involves a positional error of approximately ±10 μm. Therefore, the final light emission position of the chip is determined once the cleavage process is complete.

[0051] To achieve sufficient reflection suppression, the length of the narrow waveguide region following the tapered region within the AXEL chip must be at least 5 μm (M2 in FIG. 13). Furthermore, taking into account misalignment errors during the cleaving process, the cleavage error compensation region L_scr must be at least 20 μm (M1 in FIG. 13), and the length of the remaining waveguide within the adjacent AXEL chip must be at least 5 μm (M3 in FIG. 13). Therefore, in this embodiment, the narrow waveguide length L_nar is designed to be 30 μm. If misalignment during the cleaving process were zero, 15 μm of the narrow waveguide portion would remain within the AXEL chip. Even if the narrow waveguide region is shortened due to misalignment of the cleavage position, a narrow waveguide region of at least 5 μm remains within the chip as long as the cleavage error is within the range of ±10 μm. Conversely, even if the narrow waveguide region becomes longer due to a misalignment in the cleavage position, the length of the narrow waveguide region within the chip is 25 μm or less, and the length of the remaining waveguide remaining in the opposing AXEL chip is always 5 μm or more.

[0052] Next, the fabrication process of the optical transmitter (semiconductor chip 31) of this embodiment will be described. The semiconductor chip 31 was fabricated using an initial substrate in which a lower SCH (Separated Confinement Heterostructure) layer, a multiple quantum well active layer (MQW1), and an upper SCH layer were sequentially grown on an n-InP substrate (100) surface. The multiple quantum well layer is configured to have optical gain in the 1.3 μm oscillation wavelength band. Here, the multiple quantum well includes six quantum well layers. The initial substrate has a structure optimized for high-efficiency operation of the DFB laser 11.

[0053] First, the portions that will become the DFB laser 11 and the SOA 16 are left, and the remaining active layers are selectively etched. Next, a multi-quantum well layer (MQW2) is grown by butt-joint regrowth on the portion that will become the EA modulator 12. Here, the DFB laser 11, the EA modulator 12, and the SOA 16 are arranged so that light propagates in this order. The SOA 16 also utilizes the layer structure of the core layer formed on the initial substrate. Therefore, the layer structure of the SOA 16 is identical to that of the DFB laser 11. Ultimately, the only difference between the layer structures of the DFB laser 11 and the SOA 16 is the presence or absence of a diffraction grating. This reduces the number of regrowths, even though the structure integrates multiple regions, enabling low-cost manufacturing.

[0054] Next, the boundary region between the DFB laser 11 and the EA modulator 12, the boundary region between the EA modulator 12 and the SOA 16, and the region from the end of the region that will become the SOA 16 to the output facet are selectively etched again, and butt-joint regrowth is performed to grow a bulk semiconductor that will become the core layer of the passive region. The core layer of the passive region has a bandgap wavelength shorter than the oscillation wavelength of the DFB laser. In this specification, a waveguide including a passive region connected to the end of the region that will become the SOA 16 is also referred to as a passive waveguide.

[0055] Next, a diffraction grating 14 (not shown) operating in the 1.3 μm wavelength band was formed in the portion that would become the DFB laser 11. The diffraction grating 14 was configured so that the resonator of the DFB laser 11 would output light in the

[011] substrate direction. After that, a p-InP cladding layer and contact layer were grown over the entire surface of the semiconductor chip 31 by regrowth. Next, a mesa structure was formed in the portion that would become the waveguide 32. The waveguide width of the DFB laser 11, EA modulator 12, and SOA 16 was 1.5 μm, the same as that of a typical semiconductor device. In this process, the tapered region and narrow waveguide region of the curved waveguide section, as well as the waveguide termination, were also simultaneously formed. An insulating layer mask 85 was formed in the portion that would become the waveguide 32, and a mesa structure was formed by dry etching.

[0056] Next, the mesa structure was buried with InP 86 by burying regrowth, leaving the insulating layer mask in place. The amount of InP grown during burying regrowth was adjusted so that the mesa waveguide 32 was completely buried. If the amount of semi-insulating InP grown was too small, the current blocking effect would be insufficient, and current would not be efficiently injected into the DFB laser 11 and SOA 16, resulting in insufficient performance. Furthermore, if the amount of semi-insulating InP grown was too large, abnormal growth would occur, with the regrown InP climbing up onto the insulating film above the waveguide 32, making it difficult to form electrodes for the DFB laser 11 and SOA 16. Therefore, to ensure sufficient current confinement and flatness of the upper waveguide, the amount of InP grown during burying growth was adjusted so that the mesa waveguide 32 was completely buried and the semi-insulating InP reached approximately the same height as the mesa waveguide 32 in the waveguide cross section. During this process, the InP film thickness would be reduced at the waveguide termination 32e in the normal window region, affecting the optical field (see Figures 10(c) and 10(d)). However, in the present disclosure, since the waveguide termination 32e is disposed outside the chip (on an adjacent chip), the light propagating within the chip is not affected by the waveguide termination.

[0057] Next, after removing the insulating layer mask 85, the contact layers between the DFB laser 11, EA modulator 12, and SOA 16 regions were removed by wet etching to electrically isolate each region. Next, P-side electrodes were formed to inject current through the contact layers on each region on the upper surface of the semiconductor substrate. After that, the InP substrate 81 was polished to about 150 μm, and an electrode was formed on the backside of the substrate, completing the process on the semiconductor wafer.

[0058] Next, a semiconductor bar including multiple chips 31 was fabricated by cleaving the (011) crystal plane. Here, a typical semiconductor chip cleavage process was used, and the cleavage position accuracy was ±10 μm or less as described above. A semiconductor bar in which multiple chips fabricated by the cleavage process were aligned in the Y direction was used, and an AR coating was applied to the output end face, and a high-reflection coating (HR) was applied to the end face on the DFB laser 11 side.

[0059] To confirm the effectiveness of this example, 20 AXEL chips fabricated using the same process were assembled into a module and evaluated. First, the optical output of the AXEL chips before assembly into the module was evaluated using a large-aperture PD. The input currents to the DFB laser 11 and SOA 16 were set to 80 mA and 40 mA, respectively, and a 0.6 V applied voltage and a 25 Gbit / s electrical signal were input to the EA modulator 12. As a result, the net optical output of the fabricated AXEL chips averaged approximately 12 dBm in modulated output power, Pavg. Next, the optical output was evaluated after assembly into the module. The module was fabricated using the active alignment process described above. As a result, it was confirmed that all 20 modules had modulated optical output power, Pavg, exceeding 9 dBm when optically coupled. As in the evaluation shown in Figure 15, the loss within the module obtained by comparing the optical output intensity before and after mounting in a module was below 2.5 dB in both cases, significantly improving the module manufacturing yield compared to conventional AXEL chips without window regions. If conventional AXEL chips were mounted in a module, a loss of 3 dB or more would be expected during mounting, making it difficult to manufacture an optical transmitter that achieves the target +9 dBm optical output. With conventional AXEL chips, the yield when modularizing chips manufactured within a wafer is approximately 40%, whereas with the AXEL module of this embodiment, the module manufacturing yield was improved to 65%.

[0060] Next, a module equipped with the AXEL chip of this embodiment was used to evaluate the modulation characteristics at 25 Gbit / s and confirm the operation quality. The modulation signal was NRZ, PRBS2. ３１-1 was used. The AXEL driving conditions were the same as those described above. Here, the EYE waveform quality was evaluated at 25 Gbit / s, and an average dynamic extinction ratio of 9.1 dB was obtained. Furthermore, the mask margin calculated from the EYE waveform was 30% or more for all modules. In this example, the width of the narrow waveguide region was set to 0.5 μm, and the results above support the results described in Figure 14. Furthermore, these results demonstrate that the optical transmitter formed using the module according to this example achieved a stable mask margin of >30%, regardless of the misalignment of the cleavage position, which is comparable to the level of modules that achieved good quality using conventional AXEL chips. In modules incorporating the AXEL chip of this example, there was no degradation in the waveform quality of the optical signal, and only the manufacturing yield was dramatically increased.

[0061] Finally, when the transmission characteristics of a 40 km single-mode fiber were evaluated using the operating conditions described above, a bit error rate of 10 －１２ From these results, it was confirmed that AXEL, which introduces a dummy mesa structure into the window region, dramatically improves the module manufacturing yield without degrading the performance of conventional modules.

[0062] (Example 2) AXEL of Example 2 will be described with reference to Figure 18. In this example, a chip design that can increase the number of 1.5 μm band AXEL chips produced within the same wafer surface is adopted. Figure 18 is a diagram that shows a schematic example of the layout of the AXEL chips adopted in this example.

[0063] As described above with reference to FIG. 4 , when two opposing AXWL chips (two semiconductor chips 31) are arranged on a wafer so that their optical axes near the output regions are aligned (i.e., the waveguides are continuous), as in the conventional AXEL chips, the Y-direction positions of the DFB laser 11 and EA modulator 12, which have waveguides 32 aligned along the

[011] crystal orientation of the substrate, do not match between the two AXEL chips, resulting in a large offset. From the viewpoint of ensuring a sufficient margin for cleaving the chip sidewalls and sufficient electrode area, it is desirable to arrange the DFB laser 11 and EA modulator 12 at the chip center, far from the chip sidewalls. Therefore, this chip arrangement necessitates a relatively large chip width. When this arrangement is adopted for a typical AXEL chip, the chip width (length in the Y-direction) must be at least approximately 300 μm.

[0064] In contrast to this, in the AXEL of this embodiment, as shown in Fig. 18, the two opposing AXEL chips are arranged on the wafer so that the optical axes of the curved waveguide portions 32b of the waveguides 32 do not coincide, but the optical axes of the straight waveguide portions 32a of the waveguides 32 coincide. This allows the waveguides of the DFB laser 11 and the EA modulator 12 in the direction of the substrate crystal orientation

[011] to be arranged near the center of the AXEL chip, making it possible to reduce the chip width.

[0065] The fabrication process for the AXEL chip according to this embodiment is almost identical to that for the AXEL chip according to the first embodiment. The lengths of the DFB laser 11, EA modulator 12, and SOA 16 within the AXEL chip are 350 μm, 200 μm, and 300 μm, respectively. The diffraction grating 14 (not shown) formed on the DFB laser 11 has a period designed to achieve an oscillation wavelength of 1.55 μm. The length L_bend of the bent waveguide portion, including the 300 μm length of the SOA 16, is 500 μm, and the angle θwg is 5°. Therefore, the waveguide offset ΔY is 44 μm, and the waveguide distance D is 88 μm. The two AXEL chips (two semiconductor chips 31) are separated by a cleaving process. As mentioned above, the cleaving process typically results in a positional error of approximately ±10 μm. As in Example 1, in this example, the narrow waveguide L_nar is designed to be 30 μm, taking into account positional misalignment errors during the cleavage process, and the cleavage error compensation region L_scr is secured to be 20 μm or more. Furthermore, in this example, the chip width (length in the Y direction) is reduced to 200 μm, which was difficult with conventional AXEL chips. As mentioned above, this is due to the mitigation of chip size constraints imposed by waveguide offset, as achieved by the present disclosure. In the AXEL chip in this example, the straight waveguide portion is positioned at the center of the chip in the Y direction, and margins 1 and 2 of 100 μm are secured on both sides of the straight waveguide portion in the Y direction. While the width of conventional AXEL chips was limited to approximately 300 μm, the reduction in chip size achieved by the invention of this example successfully increased the number of AXEL chips that can be fabricated on the same wafer by 50%.

[0066] Next, the basic characteristics of the fabricated AXEL chip were evaluated. At an operating temperature of 55°C, currents of 80 mA and 100 mA were applied to the DFB laser 11 and SOA 16, respectively. Modulation was performed using a 10 Gbit / s NRZ signal in the EA modulator 12 with an applied voltage of -1.5 V and an amplitude voltage Vpp of 1.5 V. High output power characteristics were confirmed, with the maximum optical output power during modulation reaching 11 dBm. The manufacturing yield of modules incorporating the AXEL chip of this example was evaluated, and excellent results were confirmed, with the module manufacturing yield of approximately 60% for the AXEL chip with the narrow waveguide region of this example, compared to the target optical output power during modulation of 10 dBm or more.

[0067] Example 3 Example 3 will be described with reference to Figures 19, 20, and 21. In this example, a structure in which the width of the waveguide near the termination is expanded is adopted to improve the manufacturing stability of the window structure. First, the manufacturing stability problem that this example aims to solve will be described. In the AXEL according to this example, the passive waveguide of the waveguide 32 terminates inside the chip. During the manufacturing process of the AXEL, collapse and disappearance of the passive waveguide occur starting from the termination. The collapse and disappearance of the passive waveguide contributes to the manufacturing yield of the AXEL. Furthermore, the problem caused by the termination of the passive waveguide occurs more significantly, particularly in narrow waveguides such as those used in the present disclosure. The reason for this will be explained with reference to Figure 19.

[0068] 19(a) is a cross-sectional view showing a mesa shape formed by dry etching in the manufacturing process of AXEL. The cross section of FIG. 19(a) is a view of the mesa structure viewed from the Y' direction, which intersects with the Y direction at an angle θwg. This FIG. 19(a) is the same as FIG. 9(b). In the actual manufacturing process of AXEL, a wet etching process is performed to remove the damaged layer on the sidewall of the mesa shape caused by dry etching before burying and regrowth, and to expose a normal semiconductor surface on the sidewall.

[0069] FIG. 19(b) is a cross-sectional view showing the mesa shape after wet etching. Similar to FIG. 19(a), the cross section in FIG. 19(b) is a view of the mesa structure from the Y' direction, which intersects with the Y direction at an angle θwg. This wet etching process typically involves the use of multiple etching solutions, one of which is typically a solution that selectively etches the core layer. This selective etching not only removes the passive waveguide, but also simultaneously removes the core layer of the DFB laser 11, the core layer (MQW1) of the SOA 16, and the core layer (MQW2) of the EA modulator 12. As a result, particularly in the light-emitting region of the DFB laser 11, the removal of damaged layers on the sidewalls of the mesa structure suppresses non-radiative recombination that does not contribute to oscillation during current injection, improving light-emitting efficiency and resulting in improved optical output characteristics and long-term reliability. As shown in FIG. 19(b), even in the passive waveguide, the waveguide core 83a is selectively etched by this wet etching process. As a result, side etching progresses from both sides of the waveguide core 83a, narrowing the core width (length in the Y' direction) relative to the width W1 of the top of the mesa structure. When a narrower-than-normal waveguide is used as in the present disclosure, the width of the waveguide core 83a remaining after the wet etching process becomes even narrower. This makes the waveguide prone to abnormalities during the AXEL fabrication process. Figure 19(c) shows the waveguide termination break near the end face. Figure 19(c) shows the mesa structure viewed from the light propagation direction (the X' direction perpendicular to Y'). The aforementioned side etching also progresses in the same way at the waveguide termination. Therefore, near the waveguide termination, the etching solution advances from three directions: both sides of the waveguide and the termination face, making side etching more likely to progress. This results in the waveguide core 83a being significantly retracted toward the SOA 16 relative to its original waveguide termination position. This phenomenon is particularly pronounced when a narrower-than-normal waveguide width is used as in the present disclosure. The phenomenon occurs in which the mesa structure waveguide is damaged or lost starting from the waveguide end where the end position of the waveguide core 83a is set back. The damage or loss of the mesa structure waveguide leads to a decrease in the manufacturing yield of AXEL chips.A fundamental way to prevent the waveguide from being damaged or lost is to shorten the wet etching time before burying and regrowth. However, since the wet etching process is an essential step for ensuring the high output and high reliability of the DFB laser section mentioned above, it is difficult to solve the problem by adjusting the fabrication conditions alone.

[0070] Therefore, in this embodiment, a structure is adopted in which the narrow width of the narrow waveguide at the cleavage position 34 of the AXEL chip is converted back to a wide width in a tapered region provided near the end of the waveguide. This structure prevents damage and loss of the waveguide due to side etching during wet etching and enables stable manufacturing.

[0071] FIG. 20 shows the schematic configuration of the AXEL chip according to this embodiment. This embodiment improves the yield of AXEL chips, which have broadband capabilities capable of high-speed modulation of 50 Gbaud and high output power of 10 dBm or more. However, the improved manufacturing yield achieved by this embodiment is not dependent on the operating speed or optical output characteristics of the AXEL chip, and can be applied to AXEL chips with various specifications. As mentioned above, the width W2 of the waveguide 32 is narrowed near the cleavage position 34 to achieve sufficient reflection suppression. This achieves the same reflection suppression effect as in the first embodiment. The narrowing of the waveguide 32 is achieved by gradually widening the width of the waveguide along the optical waveguide direction using a tapered region. The AXEL chip 31 of this embodiment, which constitutes the optical transmitter, is a semiconductor chip monolithically integrating a 300 μm-long DFB laser 11, a 125 μm-long EA modulator 12, and a 150 μm-long SOA. The waveguide 32 employs a buried heterostructure using semi-insulating InP, which provides high heat dissipation and current confinement effects.

[0072] In this embodiment, the quantum well structure and length of the EA modulator 12 are optimized to support high-speed modulation operations of 50 Gbaud. As described above, to achieve sufficient reflection suppression, the AXEL chip of this embodiment includes a tapered region 32c and a narrow waveguide region 32d in the curved waveguide section 32b. The narrow waveguide section 32d is located near the output end facet. The AXEL chip is formed on the (100) surface of an InP substrate, and the DFB laser 11 is positioned so as to output light in the direction of the substrate orientation

[011] . After passing through the EA modulator 12, which is on the same optical axis as the DFB laser 11, the light from the DFB laser 11 is propagated through the curved waveguide section at an angle θ wg relative to the crystal orientation

[011] , and then enters the SOA 16. Light emitted from the SOA 16 is converted into a narrow waveguide with width W2 in the tapered region while maintaining angle θwg. After passing through the planned cleavage position 44, the light is widened along the propagation direction of the light by another tapered region disposed in an adjacent chip, converted into a wide waveguide with width W3, and then reaches the end of the waveguide in the extended waveguide section 32g. Here, angle θwg is set to 5° as a bending angle that provides a sufficient anti-reflection effect. Furthermore, the width W2 of the narrow waveguide region is set to 0.5 μm, which is within the range that allows stable manufacturing in the semiconductor processing process to obtain a sufficient anti-reflection effect.

[0073] Under these conditions, the narrow waveguide region does not reach the cutoff condition. Therefore, light propagates through the narrow waveguide region without radiating. Furthermore, two AXEL chips adjacent in the X direction face each other. Furthermore, within the two AXEL chips, the straight waveguide sections in which the DFB laser 11 and the EA modulator 12 are formed are arranged parallel and with their optical axes aligned. The bent waveguide sections of the two AXEL chips are arranged parallel and spaced apart by a distance D above the planned cleavage position. Here, the length L_bend of the bent waveguide section of the AXEL chip is 400 μm. Therefore, the waveguide distance D is 70 μm. The two AXEL chips are separated by a cleavage process. As mentioned above, the cleavage process typically results in a positional error of approximately ±10 μm. Therefore, the final chip light emission position is determined upon completion of the cleavage process.

[0074] The length of the narrow waveguide region following the tapered region within the AXEL chip must be at least 5 μm (M2 in FIG. 13). Furthermore, taking into account misalignment errors during the cleaving process, the cleavage error compensation region L_scr must be at least 20 μm (M1 in FIG. 13), and the length of the remaining waveguide within the adjacent AXEL chip must be at least 5 μm (M3 in FIG. 13). Therefore, in this embodiment, the narrow waveguide length L_nar is designed to be 30 μm. If misalignment during the cleaving process were zero, 15 μm of the narrow waveguide portion would remain within the AXEL chip. Even if the narrow waveguide region is shortened due to misalignment of the cleavage position, a narrow waveguide region of at least 5 μm remains within the chip as long as the cleavage error is within the range of ±10 μm. Conversely, even if the narrow waveguide region becomes longer due to a misalignment in the cleavage position, the length of the narrow waveguide region within the chip is 25 μm or less, and the length of the remaining waveguide remaining in the opposing AXEL chip is always 5 μm or more.

[0075] The extended waveguide portion 32g of the waveguide 32 is located far enough away from the planned cleavage position to prevent light propagation through the AXEL chip. The size of the extended waveguide portion 32g is 5 μm in length L_wide and 4 μm in width W3. Because light does not propagate through L_wide and W3, there is no need to consider their optical characteristics during design. From the perspective of manufacturing stability of the AXEL chip, a mesa structure is adopted that is less susceptible to side etching during wet etching and less prone to collapse or loss during the processing process. Furthermore, the structure of the waveguide termination in this embodiment can be changed by changing the insulating layer mask 85 ( FIG. 19 ) used during mesa formation, which is characterized by the fact that it requires almost no additional manufacturing steps or increased costs.

[0076] To compare the effects of these techniques, we fabricated two prototypes using the same lot and process: one with a narrow waveguide termination width (W3 = W2 = 0.5 μm) and one with a wide width (W3 = 4 μm). First, we compared the side etching depth after wet etching during the mesa fabrication process. In a typical fabrication process, side etching proceeds by approximately 0.25 μm on each side in the waveguide cross-sectional direction (Figure 19(b)). Therefore, to achieve a waveguide width W2 = 0.5 μm, a mesa width of 1.0 μm must be achieved during dry etching to form the mesa. When the waveguide termination is this narrow, the side etching depth at the cross section relative to the light propagation direction at the termination was 0.6 μm. Because etching proceeds from three directions at the waveguide termination, deep side etching can potentially lead to the collapse and loss of the waveguide core. In contrast, when the waveguide width W3 was increased to 4 μm, the amount of side etching at the end of the waveguide in the cross section in the direction of light propagation was reduced to 0.3 μm. Increasing the waveguide width W3 not only reduced the amount of side etching at the end of the waveguide, but also increased the area of ​​the remaining waveguide core 83 a, resulting in a physically stable structure. This makes it less likely that the waveguide will be damaged starting from the end of the waveguide.

[0077] Fig. 21 shows the results of investigating the relationship between the width W3 of the waveguide termination and the amount of side etching in samples fabricated on the same wafer. In this example, the width W3 of the waveguide termination is set to 4 μm, but Fig. 21 confirms that the amount of side etching is sufficiently suppressed if the width W3 of the waveguide termination is 3 μm or more.

[0078] Next, we completed the actual AXEL fabrication process and performed visual inspections of AXEL chips fabricated from the same wafer to compare chip yields. Here, we performed a standard visual inspection and compared the percentage of chips with defects due to waveguide breakage originating from the waveguide termination. As a result, we confirmed that the yield of chips with defects due to waveguide breakage in the AXEL chip of this example (waveguide termination width W3 = 4 μm) was improved by approximately 15% compared to the AXEL chip of Example 1 (waveguide termination width W3 = W2 = 0.5 μm).

[0079] Next, the basic characteristics of the fabricated AXEL chip were evaluated. At an operating temperature of 55°C, currents of 60 mA and 100 mA were applied to the DFB laser 11 and SOA 16, respectively, and modulation with a 50 Gbit / s NRZ signal was performed in the EA modulator 12 with an applied voltage of -1.5 V and an amplitude voltage Vpp = 1.5 V. This confirmed high output characteristics, with the optical output reaching a maximum of 10.5 dBm during modulation. Even when the width of the waveguide termination was increased, no effect was observed on the basic characteristics of the AXEL chip, and performance equivalent to that of conventional chips was confirmed.

[0080] Example 4 Example 4 will be described with reference to FIG. 22 . In this example, the amount of side etching was reduced by adjusting the crystal plane orientation at the waveguide termination, thereby improving manufacturing stability. As described above, in the AXEL chip according to the present disclosure, the passive waveguide terminates inside the chip. The collapse and disappearance of the waveguide, which occurs starting from this termination during the process, is one of the causes of reduced yield. The collapse and disappearance of the waveguide is caused by side etching of the waveguide core 83 a due to the wet etching process described with reference to FIG. 19( b). The progress of side etching is particularly noticeable at the waveguide termination.

[0081] Therefore, in this embodiment, in addition to expanding the width of the waveguide termination shown in the above-mentioned embodiment 3, the surface of the waveguide termination is made a (011) crystal plane. The basic structure of the AXEL chip is the same as that of the above-mentioned embodiment 3, but in this embodiment, the surface of the waveguide termination is changed.

[0082] FIG. 22 is a top view showing a schematic configuration near the end of the waveguide in the AXEL chip according to this embodiment. To achieve sufficient reflection suppression, a narrow waveguide region 32d with a narrow width W2 is provided in the waveguide 32 near the cleavage position. This allows for the same reflection suppression effect as in the first or third embodiment. A tapered region is also provided in the waveguide 32, gradually narrowing the width W2 along the light propagation direction. The AXEL chip is formed on an InP substrate (100) surface, and a DFB laser 11 is positioned to output light in the direction of the substrate orientation

[011] . Light from the DFB laser 11 passes through an EA modulator 12 on the same optical axis as the DFB laser 11, then changes its propagation direction by a bent waveguide section at an angle θwg relative to the crystal orientation

[011] , and enters the SOA 16. The light emitted from the SOA 16 is converted into a narrow waveguide with width W2 in the tapered region while maintaining the angle θwg. After passing through the planned cleavage position 44, the light is widened along the light propagation direction by another tapered region disposed in the adjacent chip, converted into a wide waveguide with width W3, and then reaches the waveguide termination of the extended waveguide section 32g. Here, the termination surface of the extended waveguide section 32g of the waveguide 32 is one of the sidewall surfaces formed by dry etching, and the waveguide termination surface is usually formed as a surface perpendicular to the optical axis. Therefore, if the waveguide itself forms an angle θwg with respect to the crystal orientation

[011] , the termination surface will be a surface inclined θwg from the crystal plane (011).

[0083] In this embodiment, the termination face of the extended waveguide portion 32g is not a face perpendicular to the optical axis but a face aligned with the (011) crystal orientation. Changing the termination face of the extended waveguide portion 32g is possible by changing the insulating layer mask 85 ( FIG. 19 ) used during mesa formation, which has the advantage of requiring almost no additional fabrication steps or increased costs. The amount of side etching of the waveguide core 83a by the wet etching described above depends on the plane orientation. That is, the amount of side etching is smallest on the (011) plane, and tends to increase as the angle relative to the (011) plane increases. As described above, side etching progresses most significantly at the waveguide termination because it occurs from three directions. In this embodiment, by forming the termination face of the extended waveguide portion 32g, which corresponds to the waveguide termination face, as the (011) plane, side etching of the waveguide core 83a is suppressed, preventing the collapse or disappearance of the waveguide during the fabrication process, enabling stable manufacturing and improved yield.

[0084] The AXEL chip according to this example was fabricated and its basic characteristics were evaluated. The structure and fabrication process of the AXEL chip were the same as those of the AXEL chip shown in Example 3, except for the waveguide termination structure described above. Furthermore, the basic characteristics of the fabricated AXEL chip were confirmed to have high output power and modulation characteristics comparable to those of the AXEL chip of Example 3 described above. Additionally, the AXEL chip according to this example had a chip defect rate due to abnormalities in the waveguide termination portion reduced by approximately 5% compared to the AXEL chip according to Example 3, confirming that this chip has a sufficient effect on improving manufacturing yield.

[0085] This makes it possible to improve the manufacturing stability and the reflection suppression effect of the optical transmitter.

[0086] 10 EADFB laser 11 DFB laser 12 EA modulator 13 active layer 14 diffraction grating 15 absorption layer 16 SOA 20 AXEL 31 semiconductor chip 32 waveguide 32a straight waveguide section 32b curved waveguide section 32c tapered region 32d narrow waveguide region 32e waveguide termination 32f remaining waveguide 32g extended waveguide section 33 emission end face 34 cleavage position 35 window region 44 planned cleavage position 81 InP substrate 82 lower cladding layer 83 core layer 83a waveguide core 84 upper cladding layer 85 insulating layer mask 86 current block (InP) layer

Claims

1. An optical transmitter monolithically integrated on a single substrate: a distributed feedback (DFB) laser having an active region formed of multiple quantum wells and a diffraction grating that generates optical gain when current is injected; an electroabsorption (EA) modulator having an absorption region formed of multiple quantum wells with a different composition from that of the DFB laser; a semiconductor optical amplifier (SOA) having an active region with the same composition as that of the DFB laser; a bent waveguide that rotates the propagation direction of light by an angle θwg; and a passive waveguide connected to the SOA and having a core with a bandgap wavelength shorter than the oscillation wavelength of the DFB laser, wherein the passive waveguide includes a tapered region and a narrow waveguide region, and the tapered region is configured to convert a width W1 of the passive waveguide connected to the SOA to a width W2 of the narrow waveguide region, W1 > W2, and the passive waveguide is in contact with the end face of the substrate at an angle θwg with a normal to the end face of the substrate.

2. The optical transmitter of claim 1, further comprising a second passive waveguide, the second passive waveguide being located at a distance D from the passive waveguide, having a core of the same composition as the passive waveguide, contacting the end face of the substrate at an angle θwg with respect to a normal to the end face of the substrate, terminating within the substrate, and having a width W2 and a length L_d.

3. The optical transmitter according to claim 2, wherein the substrate is an InP substrate, the DFB laser, the EA modulator, and the SOA are formed on a (100) surface of the InP substrate, the optical axis of the DFB laser is in the direction of the substrate crystal orientation [011], and the passive waveguide is in contact with the end face of the substrate at an angle θw with the substrate crystal orientation [011].

4. An optical transmitter according to claim 3, wherein the second passive waveguide has a width W2 at a position where it contacts the end face of the substrate, and has an extended waveguide section at its terminal end, the width of the extended waveguide section being W3, and W2<W3.

5. The optical transmitter according to claim 4, wherein W3>3 μm.

6. An optical transmitter according to claim 5, wherein the end face of said extended waveguide section coincides with the (011) crystal face of the substrate.

7. The optical transmitter according to claim 2, wherein 5 μm<L_d<25 μm.

8. The optical transmitter of claim 1, wherein 0.4 μm<W2<0.8 μm.

9. The optical transmitter according to claim 1, wherein 4°<θwg<8°.

10. The optical transmitter of claim 2, wherein 30 μm<D<140 μm.