Multilayer ceramic electronic component, method for producing same and circuit board

Abstract

A multilayer ceramic electronic component according to the present invention is provided with a ceramic element and an external electrode. The ceramic element has: a plurality of internal electrodes which are stacked in a first axis direction; and an end face from which the plurality of internal electrodes are led out, and which is perpendicular to a second axis that is orthogonal to the first axis. The external electrode comprises a base layer that is connected to the plurality of internal electrodes, while covering the end face. The plurality of internal electrodes and the base layer are configured from a polycrystalline body that is mainly composed of Cu. The average crystal grain size of the base layer is not less than 1.2 times those of the plurality of internal electrodes.　

Description

Multilayer ceramic electronic component, manufacturing method thereof, and circuit board

[0001] The present invention relates to a multilayer ceramic electronic component having external electrodes, a method for manufacturing the same, and a circuit board.

[0002] In recent years, the demand for high-frequency multilayer ceramic capacitors has increased due to the increasing frequency of electronic devices associated with faster and larger-capacity communications. High-frequency multilayer ceramic capacitors are required to have low ESR (equivalent series resistance) and low loss in the high-frequency range (i.e., a high Q factor).

[0003] In a multilayer ceramic capacitor for high frequencies, it is preferable that both the internal electrodes and the external electrodes are made primarily of Cu, which is a base metal with low resistivity, from the viewpoint of improving the Q value and also from the viewpoint of reducing manufacturing costs. Patent Document 1 discloses a configuration in which Cu is used for both the internal electrodes and the external electrodes.

[0004] Specifically, in the technology described in Patent Document 1, a Cu baked film is provided as a base layer for the external electrodes. In this technology, a four-layer plating film including a noble metal plating film using Au, Pt, Ag, or Pd is provided on the Cu baked film to suppress the occurrence of poor moisture resistance due to the penetration of moisture into the Cu baked film.

[0005] Japanese Patent Application Laid-Open No. 2004-055679

[0006] The technology described in Patent Document 1 uses a precious metal such as Au, Pt, Ag, or Pd for the external electrodes, which results in extremely high manufacturing costs. Furthermore, this technology cannot adequately prevent the plating solution from penetrating into the baked Cu film during plating film formation. Penetration of the plating solution into the baked Cu film can cause defects such as a decrease in insulation resistance.

[0007] In view of the above circumstances, an object of the present invention is to provide a technique for improving the reliability of multilayer ceramic electronic components.

[0008] To achieve the above object, one aspect of the present invention provides a multilayer ceramic electronic component comprising a ceramic body and external electrodes. The ceramic body has a plurality of internal electrodes stacked in a first axial direction and an end surface perpendicular to a second axis orthogonal to the first axis, from which the plurality of internal electrodes are extended. The external electrode includes a base layer covering the end surface and connected to the plurality of internal electrodes. The plurality of internal electrodes and the base layer are composed of a polycrystalline material primarily composed of Cu. The average crystal grain size of the base layer is at least 1.2 times that of the plurality of internal electrodes.

[0009] In the external electrodes of this multilayer ceramic electronic component, the base layer is made of a polycrystalline material with large crystal grain sizes, which reduces the number of grain boundaries that serve as paths for moisture penetration. This makes it difficult for moisture to penetrate the base layer of the external electrodes, improving moisture resistance and resulting in high reliability.

[0010] The base layer may not contain a glass phase. In this configuration, the conductivity of the base layer is not impaired by the influence of a glass phase with high electrical resistance. Furthermore, a base layer without a glass phase promotes crystal growth during firing, making it more likely to become a polycrystalline body with large crystal grains.

[0011] The external electrode may further include a plating layer covering the base layer. The plating layer may include a Cu layer adjacent to the base layer. In this case, it is preferable that the average particle size of the base layer is larger than that of the Cu layer. These configurations can prevent the plating solution from penetrating into the base layer during the plating process of forming the plating layer. Therefore, this configuration can achieve the effect of improving moisture resistance by the plating layer without being affected by the plating solution.

[0012] The polycrystalline ceramic body is made of CaZrO ３ (0.90≦x≦1.15) may be used as the main component. With this configuration, a multilayer ceramic electronic component that can be suitably used in the frequency range of 100 MHz to 2 GHz is obtained.

[0013] A circuit board according to one aspect of the present invention is used in a frequency range of 100 MHz to 2 GHz. The circuit board includes the multilayer ceramic electronic component and a mounting substrate. The mounting substrate has a mounting surface and a pair of connection electrodes provided on the mounting surface and connected to the first and second external electrodes of the multilayer ceramic electronic component via solder.

[0014] In one embodiment of the present invention, a method for manufacturing a multilayer ceramic electronic component includes producing an unsintered ceramic body made of a first conductive paste primarily containing Cu powder, the ceramic body having a plurality of internal electrodes stacked in a first axial direction and an end surface perpendicular to a second axis orthogonal to the first axis and from which the plurality of internal electrodes are drawn. An intermediate body is produced by forming a base layer on the end surface of the ceramic body using a second conductive paste primarily containing Cu powder. By firing the intermediate body, the base layer becomes a polycrystalline body having a crystal grain size 1.2 times or more the average crystal grain size of the plurality of internal electrodes. A plating layer is formed on the base layer of the fired intermediate body. It is preferable that the second conductive paste does not contain Si. The Cu powder constituting the second conductive paste may have an average grain size larger than that of the Cu powder constituting the first conductive paste.

[0015] As described above, the present invention can provide a technique for improving the reliability of multilayer ceramic electronic components.

[0016] 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention; FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor taken along line AA'; FIG. 3 is a cross-sectional view of the multilayer ceramic capacitor taken along line BB'; FIG. 4 is a partial cross-sectional view of the multilayer ceramic capacitor, showing an enlarged region R in FIG. 2; FIG. 5 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor; FIG. 6 is a view showing step S01 of the manufacturing method; FIG. 7 is a view showing step S02 of the manufacturing method; and FIG. 8 is a side view of a circuit board including the multilayer ceramic capacitor.

[0017] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, X-axis, Y-axis, and Z-axis, which are mutually orthogonal, are shown as appropriate. The X-axis, Y-axis, and Z-axis are common to all the drawings.

[0018] 1 to 3 are diagrams showing a multilayer ceramic capacitor 10 according to one embodiment of the present invention. Fig. 1 is a perspective view of the multilayer ceramic capacitor 10. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line AA' in Fig. 1. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor 10 taken along line BB' in Fig. 1.

[0019] The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The surface of the ceramic body 11 is typically configured as a hexahedron having a pair of end faces E perpendicular to the X axis, a pair of side faces S perpendicular to the Y axis, and a pair of main faces M perpendicular to the Z axis.

[0020] The pair of end faces E, the pair of side faces S, and the pair of main faces M of the ceramic body 11 are all configured as flat surfaces. The flat surfaces according to this embodiment do not have to be strictly planar as long as they are recognized as flat when viewed overall, and include, for example, surfaces having minute irregularities or gently curved shapes.

[0021] The ceramic body 11 has ridges that interconnect a pair of end faces E, a pair of side faces S, and a pair of main faces M. The ridges of the ceramic body 11 may be rounded by being chamfered. A known method such as barrel polishing can be used to chamfer the ceramic body 11.

[0022] The ceramic body 11 is made of dielectric ceramic and has a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13 covered with dielectric ceramic and stacked in the Z-axis direction. The plurality of internal electrodes 12, 13 are both sheet-shaped and extend along the X-Y plane, and are arranged alternately along the Z-axis direction.

[0023] That is, the ceramic body 11 has an opposing region where the internal electrodes 12, 13 face each other in the Z-axis direction with the ceramic layer 16 sandwiched therebetween. The first internal electrode 12 is drawn from the opposing region to one end face E and connected to the first external electrode 14. The second internal electrode 13 is drawn from the opposing region to the other end face E and connected to the second external electrode 15.

[0024] With this configuration, when a voltage is applied between the first external electrode 14 and the second external electrode 15 in the multilayer ceramic capacitor 10, the voltage is applied to the plurality of ceramic layers 16 in the opposing regions of the internal electrodes 12, 13. As a result, a charge corresponding to the voltage between the first external electrode 14 and the second external electrode 15 is stored in the multilayer ceramic capacitor 10.

[0025] The multilayer ceramic capacitor 10 is configured so as to be suitable for use in the high frequency range of 100 MHz to 2 GHz, and can be used, for example, as a high frequency dielectric resonator, filter, etc. The multilayer ceramic capacitor 10 is configured so as to obtain a high Q value (quality factor) in the high frequency range.

[0026] The multilayer ceramic capacitor 10 is required to have a small change in capacitance with temperature so that it can exhibit stable performance in the high frequency range. For this reason, the ceramic body 11 must use a dielectric ceramic whose dielectric constant changes little with temperature so that the change in capacitance of each ceramic layer 16 with temperature is small.

[0027] For this reason, the ceramic body 11 contains, for example, calcium (Ca) and zirconium (Zr), which have a small temperature change in dielectric constant, and is represented by the general formula ABO ３ It is preferable that the perovskite structure be a polycrystalline material having a perovskite structure represented by the formula (where "A" represents an A-site element and "B" represents a B-site element) as the main phase.

[0028] In the perovskite structure of the main phase of this polycrystalline body, calcium (Ca) is an A-site element and zirconium (Zr) is a B-site element. Specifically, the main phase of the polycrystalline body constituting the ceramic body 11 is CaZrO ３The composition can be expressed as (0.90≦x≦1.15).

[0029] In the multilayer ceramic capacitor 10, the internal electrodes 12, 13 are formed as polycrystalline bodies primarily composed of copper (Cu), a base metal with low resistivity. The internal electrodes 12, 13 form a sintered body integral with the ceramic layers 16 as the ceramic body 11. This increases the conductivity of the internal electrodes 12, 13 in the multilayer ceramic capacitor 10, reducing the ESR (equivalent series resistance), and thereby achieving a high Q value.

[0030] The first external electrode 14 is disposed on the surface of the ceramic body 11 and covers one end face E. The second external electrode 15 is disposed on the surface of the ceramic body 11 and covers the other end face E. The external electrodes 14, 15 face each other in the X-axis direction with the ceramic body 11 in between, and function as terminals of the multilayer ceramic capacitor 10.

[0031] The external electrodes 14, 15 extend inward in the X-axis direction from a pair of end faces E of the ceramic body 11 along a pair of main faces M and a pair of side faces S, respectively, and are spaced apart from each other on the pair of main faces M and the pair of side faces S. As a result, the cross sections of both the external electrodes 14, 15 along the X-Y plane and the X-Z plane are U-shaped.

[0032] The first external electrode 14 has a first base layer 14a and a first plating layer 14b. The first base layer 14a constitutes the inner layer of the first external electrode 14 and is connected to the first internal electrode 12 on the end face E. The first plating layer 14b constitutes the outer layer of the first external electrode 14 and covers the first base layer 14a.

[0033] The second external electrode 15 has a second base layer 15a and a second plating layer 15b. The second base layer 15a constitutes the inner layer of the second external electrode 15 and is connected to the second internal electrode 13 on the end face E. The second plating layer 15b constitutes the outer layer of the second external electrode 15 and covers the second base layer 15a.

[0034] In the external electrodes 14, 15, the base layers 14a, 15a are formed as polycrystalline bodies primarily composed of Cu, a base metal with low resistivity, and are formed into dense sintered bodies with few voids by being fired together with the ceramic body 11. As a result, in the multilayer ceramic capacitor 10, the conductivity of the base layers 14a, 15a is increased and the ESR (equivalent series resistance) is reduced, resulting in a high Q value.

[0035] The plating layers 14b, 15b are formed by wet plating on the external electrodes 14, 15. The plating layers 14b, 15b may have a single-layer structure or a multi-layer structure, such as a two-layer structure having, from the inside out, a Ni layer and a Sn layer, or a three-layer structure having, from the inside out, a Cu layer, a Ni layer, and a Sn layer.

[0036] The external electrodes 14, 15 are configured to prevent moisture from penetrating the end faces E of the ceramic body 11. Specifically, in the external electrodes 14, 15, the base layers 14a, 15a are covered with plating layers 14b, 15b to block moisture, and the base layers 14a, 15a themselves are configured to prevent moisture from penetrating.

[0037] 4 is a partial cross-sectional view of the multilayer ceramic capacitor 10, showing an enlarged view of a region R surrounded by a dashed line in FIG. 2. The region R is located in a portion where the first internal electrode 12 and the first base layer 14a are connected. The portion where the second internal electrode 13 and the second base layer 15a are connected is configured similarly to the region R.

[0038] In the external electrodes 14, 15, the base layers 14a, 15a are made of polycrystalline materials with large crystal grain sizes, thereby reducing the number of grain boundaries that serve as paths for moisture penetration. As a result, the multilayer ceramic capacitor 10 is less susceptible to moisture penetration through the base layers 14a, 15a, thereby improving moisture resistance and achieving high reliability.

[0039] On the other hand, it is not preferable for the internal electrodes 12, 13, which are made of polycrystalline material containing Cu as a main component like the base layers 14a, 15a, to have a large crystal grain size in order to ensure high continuity along the X-Y plane, etc. For this reason, in the multilayer ceramic capacitor 10, it is necessary to keep the crystal grain size of the internal electrodes 12, 13 small.

[0040] Therefore, in the multilayer ceramic capacitor 10, the average crystal grain size of the base layers 14a, 15a is at least 1.2 times, and preferably at least 1.35 times, the average crystal grain size of the internal electrodes 12, 13. This makes it possible to prevent moisture from penetrating the base layers 14a, 15a without impairing the continuity of the internal electrodes 12, 13.

[0041] Furthermore, from the viewpoint of mechanical strength, etc., it is undesirable for the crystal grain size of the base layers 14 a, 15 a to be too large in the external electrodes 14, 15. For this reason, in the multilayer ceramic capacitor 10, the average crystal grain size of the base layers 14 a, 15 a is preferably 1.75 times or less, and more preferably 1.6 times or less, the average crystal grain size of the internal electrodes 12, 13.

[0042] The average crystal grain size of the base layers 14 a, 15 a and the internal electrodes 12, 13 can be determined from a microstructure image of a cross section. To determine the average crystal grain size, for example, a microstructure image of a cross section of each portion exposed by scanning and grinding with a focused ion beam (FIB) and taken with a scanning ion microscope (SIM) can be used.

[0043] As an example, to determine the average grain size, a line segment of a predetermined length is drawn on a microstructure image captured at a predetermined magnification, and the number of grains passing through the line segment is counted. The average grain size can then be determined by dividing the length of the line segment by the number of grains passing through the line segment and the magnification at which the microstructure image was captured. The length of the line segment is preferably set so that the number of grains passing through the line segment is 20 or more.

[0044] Furthermore, it is preferable that the base layers 14a, 15a of the external electrodes 14, 15 do not contain a glass phase. This prevents the conductivity of the base layers 14a, 15a from being hindered by the influence of the glass phase, which has high electrical resistance. Furthermore, in the base layers 14a, 15a that do not contain a glass phase, crystal growth during firing is promoted, making them more likely to become polycrystalline bodies with large crystal grain sizes.

[0045] Furthermore, in the external electrodes 14, 15, when the plating layers 14b, 15b include a Cu layer as the innermost layer adjacent to the base layers 14a, 15a, it is preferable that the average crystal grain size of the Cu layer be smaller than the average crystal grain size of the base layers 14a, 15a, thereby making it easier to obtain high bonding strength between the plating layers 14b, 15b and the base layers 14a, 15a.

[0046] [Method of Manufacturing Multilayer Ceramic Capacitor 10] Fig. 5 is a flowchart showing a method of manufacturing the multilayer ceramic capacitor 10 according to this embodiment. Figs. 6 and 7 are views showing the manufacturing process of the multilayer ceramic capacitor 10. The method of manufacturing the multilayer ceramic capacitor 10 will be described below along Fig. 5 with appropriate reference to Figs. 6 and 7.

[0047] (Step S01: Fabrication of Ceramic Body) In step S01, an unsintered ceramic body 111 is fabricated. The ceramic body 111 corresponds to the ceramic body 11 in a state before firing. The ceramic body 111 is obtained by stacking a first ceramic sheet S1, a second ceramic sheet S2, and a third ceramic sheet S3 as shown in FIG.

[0048] The ceramic sheets S1, S2, and S3 are all formed as unsintered dielectric green sheets whose main component is a dielectric ceramic. Unsintered internal electrodes 112 and 113 corresponding to the internal electrodes 12 and 13 are formed on the ceramic sheets S1 and S2, respectively. Unsintered internal electrodes 112 and 113 are not formed on the third ceramic sheet S3.

[0049] The internal electrodes 112, 113 are formed by applying a first conductive paste, mainly composed of Cu powder, to the ceramic sheets S1, S2 in a predetermined pattern. Various printing methods, such as screen printing, can be used to apply the first conductive paste to the ceramic sheets S1, S2.

[0050] In the ceramic body 111, the ceramic sheets S1 and S2 are alternately stacked, and a third ceramic sheet S3 is stacked above and below them in the Z-axis direction. The ceramic sheets S1, S2, and S3 are pressure-bonded together to form the ceramic body 111. The number of ceramic sheets S1, S2, and S3 is not limited to the example shown in FIG.

[0051] Although the above describes an example in which the ceramic bodies 111 are produced one by one, it is preferable to produce a plurality of ceramic bodies 111 at a time. That is, a laminated sheet in which large ceramic sheets S1, S2, and S3 are stacked is cut into individual pieces, so that a plurality of ceramic bodies 111 can be produced at a time.

[0052] (Step S02: Formation of Base Layer) In step S02, unsintered base layers 114a, 115a are formed on the unsintered ceramic body 111 produced in step S01. As a result, as shown in FIG. 7 , an intermediate body 120 is obtained in which both end faces E of the unsintered ceramic body 111 are covered with the unsintered base layers 114a, 115a.

[0053] The unsintered base layers 114a, 115a are formed by applying a second conductive paste containing Cu powder as a main component to predetermined regions of the ceramic body 111. The second conductive paste can be applied to the ceramic body 111 by, for example, a dipping method or a screen printing method.

[0054] The average particle size of the Cu powder in the second conductive paste constituting the base layers 114a, 115a is preferably larger than the average particle size of the Cu powder in the first conductive paste constituting the internal electrodes 112, 113. This makes it easier to obtain the base layers 14a, 15a having an average crystal grain size larger than that of the internal electrodes 12, 13 after firing.

[0055] Furthermore, the second conductive paste constituting the base layers 114a, 115a preferably does not contain silicon (Si), which easily forms a glass phase while incorporating other components during firing. By not including Si in the base layers 114a, 115a, it becomes easier to obtain base layers 14a, 15a that do not contain a glass phase after firing.

[0056] (Step S03: Firing) In step S03, the intermediate body 120 obtained in step S02 is fired. As a result, the ceramic body 111 and the base layers 14 a, 15 a that constitute the intermediate body 120 are sintered as a single unit, whereby the ceramic body 111 becomes the ceramic body 11, and the base layers 114 a, 115 a become the base layers 14 a, 15 a.

[0057] At this time, the internal electrodes 12, 13 and the base layers 14a, 15a are all polycrystalline bodies mainly composed of Cu. The average crystal grain size of the base layers 14a, 15a formed from the second conductive paste is 1.2 times or more the average crystal grain size of the internal electrodes 12, 13 formed from the first conductive paste.

[0058] In a typical method, the ceramic body 11 is fired first, and then the base layers 14a, 15a are formed by baking the second conductive paste onto the fired ceramic body 11. In this method, a glass component such as glass frit needs to be added to the second conductive paste in order to connect the base layers 14a, 15a to the internal electrodes 12, 13.

[0059] In this regard, in the present embodiment, the ceramic body 11 and the base layers 14 a, 15 a are fired together at the same time, so that the connection between the internal electrodes 12, 13 and the base layers 14 a, 15 a is maintained during the sintering process, and therefore the multilayer ceramic capacitor 10 can be configured such that the base layers 14 a, 15 a do not contain a glass phase.

[0060] The firing conditions in step S03 can be determined as appropriate. For example, the firing temperature is preferably lower than the melting point (1084° C.) of copper (Cu), which is the main component of the internal electrodes 12, 13 and the base layers 14 a, 15 a, and can be set to, for example, 915° C. The firing time can be set to, for example, 2.5 hours.

[0061] (Step S04: Formation of plating layers) In step S04, plating layers 14b, 15b are formed on the base layers 14a, 15a of the fired intermediate body 120. As a result, the plating layers 14b, 15b, together with the base layers 14a, 15a, form the external electrodes 14, 15, thereby obtaining the ceramic body 11. The plating layers 14b, 15b can be formed by electrolytic plating.

[0062] In step S04, the base layers 14 a, 15 a are exposed to the plating solution, but the base layers 14 a, 15 a have a large average crystal grain size, so there are few grain boundaries that serve as paths for the plating solution to penetrate. This prevents a decrease in reliability of the multilayer ceramic capacitor 10 due to the plating solution penetrating the end face E of the ceramic body 11.

[0063] 8 is a side view of a circuit board 200 including the multilayer ceramic capacitor 10 according to this embodiment. The circuit board 200 according to this embodiment is typically used in the frequency range of 100 MHz to 2 GHz. However, the circuit board 200 can be configured to be suitable for use in various frequency ranges.

[0064] The circuit board 200 has a mounting substrate 210 on which the multilayer ceramic capacitor 10 is mounted. The mounting substrate 210 has a base material 211 and a pair of connection electrodes 212. The base material 211 has a mounting surface G that extends along the XY plane and is perpendicular to the Z axis. The pair of connection electrodes 212 are provided on the mounting surface G of the base material 211.

[0065] In the circuit board 200, the external electrodes 14, 15 of the multilayer ceramic capacitor 10 are connected to a pair of connection electrodes 212 of the mounting substrate 210 via solder H. As a result, in the circuit board 200, the multilayer ceramic capacitor 10 is fixed to and electrically connected to the mounting substrate 210.

[0066] [Examples] Samples of multilayer ceramic capacitors were fabricated by the above manufacturing method as Examples 1, 2, and 3 of the above embodiment. In Examples 1 and 3, the plating layers of the external electrodes had a two-layer structure having a Ni layer and a Sn layer in that order from the inside. In Example 2, the plating layers of the external electrodes had a three-layer structure having a Cu layer, a Ni layer, and a Sn layer in that order from the inside.

[0067] The average crystal grain size of the polycrystalline bodies constituting the base layers of the internal electrodes and external electrodes of the ceramic body was determined for the samples according to Examples 1, 2, and 3. The average crystal grain size of the internal electrodes and the base layer was determined by the same method as above, using microstructure images of the cross sections taken with a scanning ion microscope.

[0068] Furthermore, the samples according to Examples 1, 2, and 3 were evaluated by measuring the Q value and performing an accelerated life test. The Q value was measured at a frequency of 1 GHz and a voltage of 1.0 V. In the accelerated life test, the temperature was set to 125° C. and the voltage was set to 300 V, and the time until leakage current occurred was measured.

[0069] Furthermore, as a comparative example to the above embodiment, a second conductive paste containing Cu powder as a main component was baked onto the fired ceramic body to form a base layer, and a two-layer plating layer having a Ni layer and a Sn layer in that order from the inside out was formed on the base layer to produce a multilayer ceramic capacitor sample, and evaluations similar to those of Examples 1, 2, and 3 were performed.

[0070] Table 1 shows the average crystal grain sizes of the internal electrodes and base layers of the samples according to Examples 1, 2, and 3 and the Comparative Example. In all of the samples according to Examples 1, 2, and 3, the average crystal grain size of the base layer was 1.2 times or more that of the internal electrodes. On the other hand, in the sample according to the Comparative Example, the average crystal grain size of the base layer was smaller than that of the internal electrodes.

[0071] Table 1 also shows the measurement results of the Q values ​​of the samples according to Examples 1, 2, and 3 and the Comparative Example. A large Q value of 200 or more was obtained for all of the samples according to Examples 1, 2, and 3. On the other hand, the Q value of the sample according to the Comparative Example was less than 200, which is thought to be due to the high electrical resistance of the base layer.

[0072] Furthermore, Table 1 shows the results of accelerated life tests of the samples according to Examples 1, 2, and 3 and the comparative example. High durability of 100 hours or more was obtained for all of the samples according to Examples 1, 2, and 3. In contrast, the sample according to the comparative example only lasted for less than 100 hours, which is thought to be due to early occurrence of leakage current due to moisture penetration into the base layer.

[0073]

[0074] [Other Embodiments] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications can be made within the scope of the gist of the present invention.

[0075] For example, in the multilayer ceramic capacitor 10, the plating layers 14b, 15b may not be provided on the external electrodes 14, 15. In this case, the external electrodes 14, 15 may be configured such that another layer, such as a sputtering film, is provided on the base layers 14a, 15a, or may be configured only by the base layers 14a, 15a.

[0076] The multilayer ceramic capacitor 10 does not have to be configured for high frequencies as long as the internal electrodes 12, 13 and the base layers 14a, 15a are made of polycrystalline material mainly containing Cu. The multilayer ceramic capacitor 10 may be configured to obtain a large capacitance by using, for example, a barium titanate-based material.

[0077] Furthermore, the present invention is applicable not only to the multilayer ceramic capacitor 10 but also to all multilayer ceramic electronic components having internal electrodes and external electrodes. Examples of multilayer ceramic electronic components to which the present invention can be applied include, in addition to the multilayer ceramic capacitor, chip varistors, chip thermistors, and multilayer inductors.

[0078]

[0079] REFERENCE SIGNS LIST 10... Multilayer ceramic capacitor 11... Ceramic element body 12, 13... Internal electrodes 14, 15... External electrodes 14a, 15a... Base layers 14b, 15b... Plating layers 16... Ceramic layer

Claims

1. a ceramic body including a plurality of internal electrodes stacked in a first axial direction and an end surface perpendicular to a second axis perpendicular to the first axis and from which the plurality of internal electrodes are drawn; an outer electrode including a base layer covering the end surface and connected to the plurality of inner electrodes; Equipped with the plurality of internal electrodes and the base layer are made of a polycrystalline material containing Cu as a main component, The average crystal grain size of the base layer is 1.2 times or more that of the internal electrodes. Multilayer ceramic electronic components.

2. 2. The multilayer ceramic electronic component according to claim 1, The base layer does not contain a glass phase. Multilayer ceramic electronic components.

3. 3. The multilayer ceramic electronic component according to claim 1, The external electrode further includes a plating layer that covers the base layer. Multilayer ceramic electronic components.

4. 4. The multilayer ceramic electronic component according to claim 3, the plating layer includes a Cu layer adjacent to the base layer, The average crystal grain size of the base layer is larger than that of the Cu layer. Multilayer ceramic electronic components.

5. A multilayer ceramic electronic component according to claim 1 or 2, the external electrode includes a sputtered layer adjacent to the base layer; The average crystal grain size of the base layer is larger than that of the sputtered layer. Multilayer ceramic electronic components.

6. A multilayer ceramic electronic component according to claim 4 or 5, The average crystal grain size is a value obtained by drawing a line segment of a predetermined length in a microstructure image obtained by capturing a cross section of the base layer, the Cu layer, or the sputtered layer at a predetermined magnification, and dividing the predetermined length by the number of crystal grains through which the line segment passes and the predetermined magnification. Multilayer ceramic electronic components.

7. 3. The multilayer ceramic electronic component according to claim 1, The polycrystalline material constituting the ceramic body is CaZrO ３ (0.90≦x≦1.15) is the main component Multilayer ceramic electronic components.

8. A circuit board used in a frequency range of 100 MHz to 2 GHz, A multilayer ceramic electronic component according to claim 1 or 2; a mounting substrate having a mounting surface and a pair of connection electrodes provided on the mounting surface and connected to the first and second external electrodes of the multilayer ceramic electronic component via solder. Circuit board.

9. A green ceramic body is produced, the green ceramic body being formed of a first conductive paste containing Cu powder as a main component, the green ceramic body having a plurality of internal electrodes stacked in a first axial direction, and an end surface perpendicular to a second axis perpendicular to the first axis and from which the plurality of internal electrodes are drawn out; forming a base layer on the end surface of the ceramic body using a second conductive paste containing Cu powder as a main component to produce an intermediate body; The intermediate body is fired to form the base layer into a polycrystalline body having a grain size 1.2 times or more larger than the average grain size of the plurality of internal electrodes; A plating layer is formed on the base layer of the intermediate body after firing. A method for manufacturing multilayer ceramic electronic components.

10. 10. A method for producing a multilayer ceramic electronic component according to claim 9, comprising the steps of: The second conductive paste does not contain Si. A method for manufacturing multilayer ceramic electronic components.

11. 11. A method for producing a multilayer ceramic electronic component according to claim 9, further comprising the steps of: The Cu powder constituting the second conductive paste has a larger average particle size than the Cu powder constituting the first conductive paste. A method for manufacturing multilayer ceramic electronic components.