Semiconductor device and manufacturing method of semiconductor device

Abstract

This semiconductor device comprises two conductive members, a semiconductor element joined to either of the two conductive members, and a relay terminal joined to the two conductive members. The relay terminal has a first band-shaped part and a second band-shaped part joined to the two conductive members, and a linking part linking the first band-shaped part and the second band-shaped part. The first band-shaped part has a first side. The linking part has a first intermediate side and a first linking side linking the first side and the first intermediate side. When viewed in the thickness direction, the first linking side is positioned away from a first virtual intersection, which is an intersection between a first virtual line overlapping the first side and a second virtual line overlapping the first intermediate side.

Description

Semiconductor device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor device including two adjacent conductive members and a relay terminal joined to the two conductive members by ultrasonic vibration, and a method for manufacturing the same.

[0002] Patent Document 1 discloses an example of a semiconductor device having a plurality of terminals. The plurality of terminals are bonded to a substrate on which a circuit is formed by ultrasonic vibration. This allows electrical conduction between the substrate and the plurality of terminals. Bonding using ultrasonic vibration is suitable for passing a larger current through objects to be bonded compared to solder bonding.

[0003] However, when the objects to be joined using ultrasonic vibrations are flat conductive members, the bending rigidity of the conductive members is relatively low. As a result, the ultrasonic vibrations apply relatively large repeated stresses to the conductive members, which causes stress concentrations in the conductive members. This can lead to cracks in the conductive members. When cracks occur in the conductive members, the electrical resistance of the conductive members increases, which increases the loss of power supplied to the semiconductor device.

[0004] JP 2013-235882 A

[0005] In view of the above circumstances, one objective of the present disclosure is to provide a semiconductor device and a manufacturing method thereof that can suppress cracks that occur in relay terminals that are joined to two conductive members during the manufacturing of the device.

[0006] A semiconductor device provided by a first aspect of the present disclosure includes two conductive members adjacent to each other in a first direction orthogonal to a thickness direction, a semiconductor element joined to one of the two conductive members, and a relay terminal joined to the two conductive members, wherein the relay terminal has a first strip-shaped portion and a second strip-shaped portion joined to the two conductive members, and a connecting portion connecting the first strip-shaped portion and the second strip-shaped portion, and the first strip-shaped portion and the second strip-shaped portion extend in the first direction and are connected to a semiconductor element orthogonal to the thickness direction and the first direction. They are adjacent to each other in two directions, and the connecting portion is located between the first band portion and the second band portion in the second direction, the first band portion has a first side extending in the first direction, and the connecting portion has a first intermediate side extending in the second direction and a first connecting side connecting the first side and the first intermediate side, and when viewed in the thickness direction, the first connecting side is located away from a first virtual intersection which is the intersection of a first virtual line extending in the first direction and overlapping the first side, and a second virtual line extending in the second direction and overlapping the first intermediate side.

[0007] A second aspect of the present disclosure provides a method for manufacturing a semiconductor device, comprising: a step of joining a relay terminal to two conductive members adjacent to each other in a first direction orthogonal to a thickness direction by ultrasonic vibration; and a step of joining a semiconductor element to one of the two conductive members, wherein the relay terminal includes a first strip portion and a second strip portion extending in the first direction and adjacent to each other in a second direction orthogonal to the thickness direction and the first direction; and a connecting portion located between the first strip portion and the second strip portion in the second direction and connecting the first strip portion and the second strip portion. The step of joining the relay terminal includes a step of forming a plurality of first bonding marks on the first band-shaped portion and the second band-shaped portion by sequentially pressing a capillary against regions of the first band-shaped portion and the second band-shaped portion that overlap the two conductive members when viewed in the thickness direction, and a step of forming a second bonding mark on either the first band-shaped portion or the second band-shaped portion by pressing the capillary so as to overlap a first bonding mark that is formed first among the plurality of first bonding marks, and in the step of forming the second bonding mark, the capillary is pressed across the periphery of the first bonding mark.

[0008] According to the semiconductor device and the manufacturing method thereof according to the present disclosure, it is possible to suppress cracks from occurring in the relay terminals joined to the two conductive members during the manufacturing of the device.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0010] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a plan view corresponding to FIG. 2, seen through a top plate. FIG. 4 is a front view of the semiconductor device shown in FIG. 1. FIG. 5 is a right side view of the semiconductor device shown in FIG. 1. FIG. 6 is a left side view of the semiconductor device shown in FIG. 1. FIG. 7 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 8 is a partial enlarged view of one side in the first direction of FIG. 3. FIG. 9 is a partial enlarged view of the other side in the first direction of FIG. 3. FIG. 10 is a partial enlarged view of the central portion of FIG. 3. FIG. 11 is a cross-sectional view taken along line XI-XI of FIG. 3. FIG. 12 is a cross-sectional view taken along line XII-XII of FIG. 3. FIG. 13 is a cross-sectional view taken along line XIII-XIII of FIG. 3. FIG. 14 is a partial enlarged view of FIG. 10. FIG. 15 is a partial enlarged view of one side in the first direction of FIG. 14. 16 is a partial enlarged view of the other side in the first direction of FIG. 14 . FIG. 17 is a cross-sectional view illustrating a method for joining the relay terminal illustrated in FIG. 14 . FIG. 18 is a partial enlarged view of the first semiconductor element and its periphery illustrated in FIG. 8 . FIG. 19 is a partial enlarged view of the second semiconductor element and its periphery illustrated in FIG. 8 . FIG. 20 is a circuit diagram of the semiconductor device illustrated in FIG. 1 . FIG. 21 is a partial enlarged plan view of a first modified example of the semiconductor device illustrated in FIG. 1 . FIG. 22 is a partial enlarged plan view of a second modified example of the semiconductor device illustrated in FIG. 1 . FIG. 23 is a partial enlarged plan view of a semiconductor device according to a second embodiment of the present disclosure. FIG. 24 is a partial enlarged plan view illustrating a manufacturing process of the semiconductor device illustrated in FIG. 23 . FIG. 25 is a partial enlarged plan view illustrating a manufacturing process of the semiconductor device illustrated in FIG. 23 . FIG. 26 is a partial enlarged plan view illustrating a manufacturing process of the semiconductor device illustrated in FIG. 23 . FIG. 27 is a partial enlarged plan view illustrating a manufacturing process of the semiconductor device illustrated in FIG. 23 . FIG. 28 is a partial enlarged plan view illustrating a manufacturing process of the semiconductor device illustrated in FIG. 23 .

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0012] A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 19. The semiconductor device A10 includes a plurality of substrates 11, a plurality of conductive members 20, a plurality of input terminals 41, an output terminal 42, a plurality of relay terminals 26, and a plurality of semiconductor elements 31. The semiconductor device A10 further includes a plurality of gate wirings 24, a plurality of detection wirings 25, a plurality of gate terminals 43, a plurality of detection terminals 44, a plurality of diodes 32, a heat dissipation member 13, and a case 60. For ease of understanding, FIG. 3 and FIGS. 8 to 11 are shown transparently through the top plate 69. In FIG. 3, line XI-XI is indicated by a dashed line.

[0013] The semiconductor device A10 shown in FIG. 1 is a power module. The semiconductor device A10 is used in inverters for various electrical products, hybrid vehicles, and the like. As shown in FIGS. 1 and 2 , the semiconductor device A10 is rectangular (or approximately rectangular) when viewed in the thickness direction z. The thickness direction z refers to the direction along the thickness of the multiple first conductive members 20A. Here, for convenience of explanation, the direction perpendicular to the thickness direction z is referred to as the first direction x. The direction perpendicular to both the thickness direction z and the first direction x is referred to as the second direction y. The first direction x is the longitudinal direction of the semiconductor device A10.

[0014] As shown in FIG. 11 , the multiple substrates 11 are electrically insulating members supported by a heat dissipation member 13. In the semiconductor device A10, the multiple substrates 11 include two substrates 11 adjacent to each other in the first direction x. In the description of the semiconductor device A10, the two substrates 11 are referred to as a first substrate 11A and a second substrate 11B. The substrate 11 may be a single substrate, in addition to a multiple substrate as in the semiconductor device A10. The first substrate 11A and the second substrate 11B have a main surface 111 and a back surface 112 facing opposite each other in the thickness direction z. As shown in FIG. 10 , a gap S is provided between the first substrate 11A and the second substrate 11B.

[0015] The plurality of base materials 11 are made of a material containing ceramics with excellent thermal conductivity. Examples of such ceramics include aluminum nitride (AlN). Direct bonded copper (DBC) substrates may be used as the plurality of base materials 11. A DBC substrate is formed by directly bonding copper (Cu) foils to both sides of a substrate containing aluminum nitride in the thickness direction z.

[0016] As shown in FIG. 3 , each of the plurality of conductive members 20 is disposed on one of the main surfaces 111 of the plurality of base materials 11. The plurality of conductive members 20 includes a plurality of first conductive members 20A, a plurality of second conductive members 20B, and a plurality of third conductive members 20C. The composition of the plurality of conductive members 20 includes copper. When DBC substrates are used as the plurality of base materials 11, the plurality of conductive members 20 can be easily obtained by patterning copper foil bonded to the main surface 111. The surfaces of the plurality of conductive members 20 may be plated with silver (Ag).

[0017] As shown in FIG. 3 , the plurality of first conductive members 20A includes two first conductive members 20A adjacent to each other in the first direction x. The plurality of first conductive members 20A are individually arranged on the main surfaces 111 of the plurality of substrates 11 (first substrates 11A and second substrates 11B). The plurality of second conductive members 20B includes two second conductive members 20B adjacent to each other in the first direction x and is located adjacent to the plurality of first conductive members 20A in the second direction y. The plurality of second conductive members 20B are individually arranged on the main surfaces 111 of the plurality of substrates 11. The plurality of third conductive members 20C includes two third conductive members 20C adjacent to each other in the first direction x and is located on the opposite side of the plurality of first conductive members 20A in the second direction y, with the plurality of second conductive members 20B sandwiched therebetween. The plurality of third conductive members 20C are individually arranged on the main surfaces 111 of the plurality of substrates 11.

[0018] As shown in FIG. 3 , the multiple gate wirings 24 are arranged on the main surfaces 111 of the multiple base materials 11. The multiple gate wirings 24 include multiple first gate wirings 24A and multiple second gate wirings 24B. The multiple first gate wirings 24A are arranged individually on the multiple base materials 11 and adjacent to each other in the first direction x. The multiple first gate wirings 24A are close to the multiple first conductive members 20A in the second direction y. The multiple second gate wirings 24B are arranged individually on the multiple base materials 11 and adjacent to each other in the first direction x. The multiple second gate wirings 24B are close to the multiple third conductive members 20C in the second direction y.

[0019] As shown in FIG. 3 , the multiple detection wirings 25 are arranged on the main surfaces 111 of the multiple base materials 11. The multiple detection wirings 25 include multiple first detection wirings 25A and multiple second detection wirings 25B. The multiple first detection wirings 25A are arranged individually on the multiple base materials 11 and adjacent to one another in the first direction x. The multiple first detection wirings 25A are located between the multiple first conductive members 20A and the multiple first gate wirings 24A in the second direction y. The multiple second detection wirings 25B are arranged individually on the multiple base materials 11 and adjacent to one another in the first direction x. The multiple second detection wirings 25B are located between the multiple third conductive members 20C and the multiple second gate wirings 24B in the second direction y.

[0020] As shown in FIGS. 3 and 10 , each of the relay terminals 26 is joined to two of the conductive members 20 that are adjacent to each other in the first direction x. The relay terminals 26 are flat and perpendicular to the thickness direction z. The relay terminals 26 are made of a metal plate. The metal plate contains copper. The thickness of each of the relay terminals 26 is, for example, 0.3 mm or more and 0.5 mm or less. Therefore, the thickness of each of the relay terminals 26 is thinner than the thickness of each of the input terminals 41 and the output terminals 42. Furthermore, the thickness of each of the relay terminals 26 is thicker than the thickness of each of the conductive members 20.

[0021] As shown in FIG. 10 , the multiple relay terminals 26 include a first relay terminal 26A, a second relay terminal 26B, and a third relay terminal 26C. The shapes of the second relay terminal 26B and the third relay terminal 26C are the same as the shape of the first relay terminal 26A. The first relay terminal 26A is joined to the multiple first conductive members 20A across a gap S, thereby providing mutual conduction among the multiple first conductive members 20A. The second relay terminal 26B is joined to the multiple second conductive members 20B across the gap S, thereby providing mutual conduction among the multiple second conductive members 20B. The third relay terminal 26C is joined to the multiple third conductive members 20C across the gap S, thereby providing mutual conduction among the multiple third conductive members 20C. The first relay terminal 26A, the second relay terminal 26B, and the third relay terminal 26C are arranged along the second direction y.

[0022] 14 , each of the multiple relay terminals 26 has a first strip-shaped portion 261, a second strip-shaped portion 262, and a connecting portion 263. While Fig. 14 shows the first relay terminal 26A of the multiple relay terminals 26, the configurations of the second relay terminal 26B and the third relay terminal 26C are also the same as the configuration of the first relay terminal 26A. Therefore, the specific configuration of the multiple relay terminals 26 will be described using the first relay terminal 26A as a representative of the multiple relay terminals 26.

[0023] 14 , the first band-shaped portion 261 and the second band-shaped portion 262 are joined to two of the plurality of conductive members 20 (plurality of first conductive members 20A) that are adjacent to each other in the first direction x. The first band-shaped portion 261 and the second band-shaped portion 262 extend in the first direction x and are adjacent to each other in the second direction y. The connecting portion 263 connects the first band-shaped portion 261 and the second band-shaped portion 262. The connecting portion 263 is located between the first band-shaped portion 261 and the second band-shaped portion 262 in the second direction y.

[0024] 14 , the first band-shaped portion 261 has a first side 261A and a third side 261B. The first side 261A and the third side 261B extend in the first direction x. The third side 261B is located on the opposite side of the first side 261A in the first direction x, with the connecting portion 263 sandwiched therebetween.

[0025] 14 , the second band-shaped portion 262 has a second side 262A and a fourth side 262B. The second side 262A and the fourth side 262B extend in the first direction x. The fourth side 262B is located on the opposite side of the second side 262A in the first direction x, with the connecting portion 263 sandwiched therebetween. The second side 262A faces the first side 261A of the first band-shaped portion 261 in the second direction y. The fourth side 262B faces the third side 261B of the first band-shaped portion 261 in the second direction y.

[0026] 14 and 15 , the connecting portion 263 has a first intermediate side 263A, a first connecting side 263B, and a second connecting side 263C. The first intermediate side 263A extends in the second direction y. The first connecting side 263B connects the first intermediate side 263A to the first side 261A of the first band-shaped portion 261. The second connecting side 263C connects the first intermediate side 263A to the second side 262A of the second band-shaped portion 262.

[0027] 14 and 16 , the connecting portion 263 has a second intermediate side 263D, a third connecting side 263E, and a fourth connecting side 263F. The second intermediate side 263D extends in the second direction y. The second intermediate side 263D is located on the opposite side of the first intermediate side 263A in the first direction x. The third connecting side 263E connects the second intermediate side 263D to the third side 261B of the first band-shaped portion 261. The fourth connecting side 263F connects the second intermediate side 263D to the fourth side 262B of the second band-shaped portion 262.

[0028] 14 , a first imaginary line 267A, a second imaginary line 267B, a third imaginary line 267C, and a fourth imaginary line 267D are defined in the relay terminal 26. The first imaginary line 267A extends in the first direction x and overlaps the first side 261A and the third side 261B of the first band-shaped portion 261 when viewed in the thickness direction z. The second imaginary line 267B extends in the second direction y and overlaps the first intermediate side 263A of the connecting portion 263 when viewed in the thickness direction z. The third imaginary line 267C extends in the first direction x and overlaps the second side 262A and the fourth side 262B of the second band-shaped portion 262 when viewed in the thickness direction z. The fourth imaginary line 267D extends in the second direction y and overlaps the second intermediate side 263D of the connecting portion 263 when viewed in the thickness direction z.

[0029] 15 , when viewed in the thickness direction z, the first connecting side 263B of the connecting portion 263 is located away from the first virtual intersection 268A. The first virtual intersection 268A is the intersection of the first virtual line 267A and the second virtual line 267B. When viewed in the thickness direction z, the second connecting side 263C of the connecting portion 263 is located away from the second virtual intersection 268B. The second virtual intersection 268B is the intersection of the second virtual line 267B and the third virtual line 267C.

[0030] 16 , when viewed in the thickness direction z, the third connecting side 263E of the connecting portion 263 is located away from the third virtual intersection 268C. The third virtual intersection 268C is the intersection of the first virtual line 267A and the fourth virtual line 267D. When viewed in the thickness direction z, the fourth connecting side 263F of the connecting portion 263 is located away from the fourth virtual intersection 268D. The fourth virtual intersection 268D is the intersection of the third virtual line 267C and the fourth virtual line 267D.

[0031] 15 and 16 , in the semiconductor device A10, the first connecting side 263B, the second connecting side 263C, the third connecting side 263E, and the fourth connecting side 263F of the connecting portion 263 form curves that are recessed inward of the first relay terminal 26A as viewed in the thickness direction z. As viewed in the thickness direction z, a portion of the connecting portion 263 is surrounded by the first connecting side 263B, the first imaginary line 267A, and the second imaginary line 267B.

[0032] The first strip portion 261 and the second strip portion 262 of each of the multiple relay terminals 26 are joined to two of the multiple conductive members 20 that are adjacent to each other in the first direction x by ultrasonic vibrations as shown in FIG. 17 . As shown in FIG. 17 , one side of the first strip portion 261 and the second strip portion 262 in the first direction x contacts one of the two conductive members 20 that are adjacent to each other in the first direction x. In this state, a compressive load in the thickness direction z is applied by the capillary 81 to each end of the first strip portion 261 and the second strip portion 262 that overlaps the conductive member 20 in the thickness direction z. Next, ultrasonic vibrations along the second direction y are generated in the capillary 81. The frequency of the ultrasonic vibrations is, for example, 20 kHz or more and 60 kHz or less. As a result, each end of the first strip portion 261 and the second strip portion 262 is joined to one of the multiple conductive members 20. In addition, the multiple teeth provided on each of the internal connection portions 412 of the multiple input terminals 41 and the internal connection portion 422 of the output terminal 42 mentioned above can also be joined to the object by applying ultrasonic vibrations along the second direction y shown in Figure 17 to the multiple teeth.

[0033] 10 , the semiconductor device A10 includes a plurality of first conductive members 27A. The plurality of first conductive members 27A are joined to a plurality of gate wirings 24 so as to straddle a gap S. This allows the plurality of first gate wirings 24A to be electrically connected to one another, and the plurality of second gate wirings 24B to be electrically connected to one another. In the semiconductor device A10, each of the plurality of first conductive members 27A is composed of a plurality of wires. The plurality of wires is made of, for example, aluminum (Al). The plurality of first conductive members 27A are aligned along the first direction x.

[0034] 10 , the semiconductor device A10 includes a plurality of second conductive members 27B. The plurality of second conductive members 27B are joined to the plurality of detection wirings 25 so as to straddle the gap S. This allows the plurality of first detection wirings 25A to be electrically connected to one another, and the plurality of second detection wirings 25B to be electrically connected to one another. In the semiconductor device A10, each of the plurality of second conductive members 27B is made up of a plurality of metal wires. The plurality of wires is made of aluminum, for example. The plurality of second conductive members 27B are aligned along the first direction x.

[0035] 8, the semiconductor device A10 includes a pair of pads 28. The pair of pads 28 are adjacent to each other in the first direction x. The pair of pads 28 are located at corners of the first substrate 11A. The pair of pads 28 are adjacent to a first conductive member 20A that is bonded to the first substrate 11A among the multiple first conductive members 20A.

[0036] As shown in Figures 2 and 3, the multiple input terminals 41 are part of external connection terminals provided on the semiconductor device A10. The multiple input terminals 41 are connected to a DC power supply arranged outside the semiconductor device A10. The multiple input terminals 41 are supported by a case 60. The multiple input terminals 41 are made of a metal plate. The metal plate includes, for example, copper. The multiple input terminals 41 have a thickness of 1.0 mm.

[0037] The multiple input terminals 41 include a first input terminal 41A and a second input terminal 41B. The first input terminal 41A is a positive electrode (P terminal). The first input terminal 41A is bonded to a first pad portion 21 of one of the multiple first conductive members 20A that is disposed on the first substrate 11A. This allows the first input terminal 41A to be electrically connected to the multiple first conductive members 20A. The second input terminal 41B is a negative electrode (N terminal). The second input terminal 41B is bonded to a third pad portion 23 of one of the multiple third conductive members 20C that is disposed on the first substrate 11A. This allows the second input terminal 41B to be electrically connected to the multiple third conductive members 20C. The first input terminal 41A and the second input terminal 41B are adjacent to each other in the second direction y.

[0038] As shown in FIGS. 8 and 12, each of the first input terminal 41A and the second input terminal 41B has an external connection portion 411, an internal connection portion 412, and an intermediate portion 413.

[0039] The external connection portion 411 is exposed from the semiconductor device A10 and has a flat plate shape perpendicular to the thickness direction z. A DC power cable or the like is joined to the external connection portion 411. The external connection portion 411 is supported by the case 60. The external connection portion 411 is provided with a connection hole 411A that penetrates in the thickness direction z. A fastening member such as a bolt is inserted into the connection hole 411A. The surface of the external connection portion 411 may be nickel (Ni) plated.

[0040] The internal connection portion 412 has a comb-like shape, being joined to the first pad portion 21 of the first conductive member 20A at the first input terminal 41A and to the third pad portion 23 of the third conductive member 20C at the second input terminal 41B. In the semiconductor device A10, the internal connection portion 412 has three teeth, which are arranged along the second direction y. The teeth are bent in the thickness direction z. Therefore, the teeth are hook-shaped when viewed in the second direction y. All of the teeth are joined to the first pad portion 21 and the third pad portion 23 by ultrasonic vibration.

[0041] The intermediate portion 413 interconnects the external connection portion 411 and the internal connection portion 412. The cross section of the intermediate portion 413 in the first direction x is L-shaped. The intermediate portion 413 has a base portion 413A and an upright portion 413B. The base portion 413A extends along the first direction x and the second direction y. One end of the base portion 413A in the first direction x is connected to the internal connection portion 412. The upright portion 413B stands up from the base portion 413A in the thickness direction z. One end of the upright portion 413B in the thickness direction z is connected to the external connection portion 411.

[0042] 2 and 3, the output terminal 42 is part of an external connection terminal provided on the semiconductor device A10. The output terminal 42 is connected to a power supply target (such as a motor) located outside the semiconductor device A10. The output terminal 42 is supported by the case 60 and is located on the opposite side of the multiple bases 11 from the multiple input terminals 41 in the first direction x. The output terminal 42 is made of a metal plate. The metal plate includes, for example, copper. The thickness of the output terminal 42 is 1.0 mm.

[0043] In the semiconductor device A10, the output terminal 42 is separated into two parts, a first terminal portion 42A and a second terminal portion 42B. Alternatively, the output terminal 42 may be a single member in which the first terminal portion 42A and the second terminal portion 42B are integrated. The first terminal portion 42A and the second terminal portion 42B are joined to the second pad portion 22 of the second conductive member 20B that is disposed on the second substrate 11B among the plurality of second conductive members 20B. This establishes electrical continuity between the output terminal 42 and the plurality of second conductive members 20B. The first terminal portion 42A and the second terminal portion 42B are adjacent to each other in the second direction y.

[0044] As shown in FIGS. 9 and 13, each of the first terminal portion 42A and the second terminal portion 42B has an external connection portion 421, an internal connection portion 422, and an intermediate portion 423.

[0045] The external connection portion 421 is exposed from the semiconductor device A10 and has a flat plate shape perpendicular to the thickness direction z. A cable or the like that is electrically connected to a power supply target is joined to the external connection portion 421. The external connection portion 421 is supported by the case 60. A connection hole 421A that penetrates the external connection portion 421 in the thickness direction z is provided. A fastening member such as a bolt is inserted into the connection hole 421A. The surface of the external connection portion 421 may be nickel plated.

[0046] The internal connection portion 422 has a comb-like shape and is joined to the second pad portion 22 of the second conductive member 20B. In the semiconductor device A10, the internal connection portion 422 has three teeth, which are arranged along the second direction y. The teeth are bent in the thickness direction z. As a result, the teeth are hook-shaped when viewed in the second direction y. All of the teeth are joined to the second pad portion 22 by ultrasonic vibration.

[0047] The intermediate portion 423 interconnects the external connection portion 421 and the internal connection portion 422. The cross section of the intermediate portion 423 in the first direction x is L-shaped. The intermediate portion 423 has a base portion 423A and an upright portion 423B. The base portion 423A extends along the first direction x and the second direction y. One end of the base portion 423A in the first direction x is connected to the internal connection portion 422. The upright portion 423B stands up from the base portion 423A in the thickness direction z. One end of the upright portion 423B in the thickness direction z is connected to the external connection portion 421.

[0048] As shown in FIGS. 2 to 4 , the gate terminals 43 are part of external connection terminals provided on the semiconductor device A10. The gate terminals 43 are electrically connected to the gate wirings 24. The gate terminals 43 are connected to an external drive circuit (such as a gate driver) for the semiconductor device A10. The gate terminals 43 are supported by a case 60. The gate terminals 43 are made of metal rods. The metal rods may contain, for example, copper. The surfaces of the gate terminals 43 may be plated with tin (Sn), or nickel and tin. As shown in FIG. 11 , the gate terminals 43 have an L-shaped cross section in the first direction x. A portion of each of the gate terminals 43 protrudes from the case 60 in the thickness direction z toward the main surfaces 111 of the substrates 11.

[0049] The multiple gate terminals 43 include a first gate terminal 43A and a second gate terminal 43B. As shown in Fig. 10 , the first gate terminal 43A is adjacent to the multiple first gate wirings 24A in the second direction y. As shown in Fig. 10 , the second gate terminal 43B is located on the opposite side of the multiple base materials 11 from the first gate terminal 43A in the second direction y. The second gate terminal 43B is adjacent to the multiple second gate wirings 24B.

[0050] As shown in FIGS. 2 to 4 , the multiple detection terminals 44 are part of external connection terminals provided on the semiconductor device A10. The multiple detection terminals 44 are electrically connected to the multiple detection wirings 25. The multiple detection terminals 44 are connected to an externally disposed control circuit of the semiconductor device A10. The multiple detection terminals 44 are supported by the case 60. The multiple detection terminals 44 are made of metal rods. The metal rods may contain, for example, copper. Note that the surfaces of the multiple detection terminals 44 may be tin-plated or nickel-plated and tin-plated. As shown in FIG. 11 , the multiple detection terminals 44 have an L-shaped cross section in the first direction x. A portion of each of the multiple detection terminals 44 protrudes from the case 60 in the thickness direction z toward the main surfaces 111 of the multiple substrates 11.

[0051] The plurality of detection terminals 44 include a first detection terminal 44A and a second detection terminal 44B. As shown in Fig. 10 , the first detection terminal 44A is located adjacent to the first gate terminal 43A in the first direction x. As shown in Fig. 10 , the second detection terminal 44B is located adjacent to the second gate terminal 43B in the first direction x.

[0052] As shown in FIGS. 2 to 4 and 9 , the semiconductor device A10 includes an input current detection terminal 45. The input current detection terminal 45 is part of an external connection terminal provided on the semiconductor device A10. The input current detection terminal 45 is connected to an externally disposed control circuit for the semiconductor device A10. The input current detection terminal 45 is supported by the case 60. The input current detection terminal 45 is made of a metal rod. The metal rod may contain, for example, copper. Note that the surface of the input current detection terminal 45 may be tin-plated or nickel-plated and tin-plated. The shape of the input current detection terminal 45 is the same as that of the multiple gate terminals 43 shown in FIG. 11 . Like the multiple gate terminals 43 shown in FIG. 11 , a portion of the input current detection terminal 45 protrudes from the case 60 in the thickness direction z toward the main surfaces 111 of the multiple substrates 11. In the second direction y, the position of the input current detection terminal 45 is the same as that of the first gate terminal 43A. The input current detection terminal 45 is located away from the first gate terminal 43A in the first direction x on the side where the output terminal 42 is located.

[0053] 9, the semiconductor device A10 includes an input current detection wire 54. The input current detection wire 54 is joined to the input current detection terminal 45 and one of the multiple first conductive members 20A. In the semiconductor device A10, one end of the input current detection wire 54 is joined to one of the multiple first conductive members 20A that is disposed on the second substrate 11B. This allows the input current detection terminal 45 to be electrically connected to the multiple first conductive members 20A. The input current detection wire 54 is made of, for example, aluminum.

[0054] As shown in FIGS. 2 to 4 and 8 , the semiconductor device A10 includes a pair of thermistor terminals 46. The pair of thermistor terminals 46 are part of external connection terminals provided on the semiconductor device A10. The pair of thermistor terminals 46 are connected to an externally disposed control circuit for the semiconductor device A10. The pair of thermistor terminals 46 are supported by a case 60. The pair of thermistor terminals 46 are formed from metal rods. The metal rods may contain, for example, copper. Note that the surfaces of the pair of thermistor terminals 46 may be tin-plated or nickel-plated and tin-plated. The shape of the pair of thermistor terminals 46 is the same as that of the multiple gate terminals 43 shown in FIG. 11 . Like the multiple gate terminals 43 shown in FIG. 11 , portions of the pair of thermistor terminals 46 protrude from the case 60 in the thickness direction z toward the main surfaces 111 of the multiple substrates 11. In the second direction y, the position of the pair of thermistor terminals 46 is the same as that of the first gate terminals 43A. The pair of thermistor terminals 46 are located away from the first gate terminal 43A in the first direction x on the side where the plurality of input terminals 41 are located. The pair of thermistor terminals 46 are adjacent to each other in the first direction x.

[0055] 8, the semiconductor device A10 includes a pair of thermistor wires 55. The pair of thermistor wires 55 are individually bonded to a pair of thermistor terminals 46 and a pair of pads 28. As a result, the pair of input current detection terminals 45 are electrically connected to the pair of pads 28. The pair of thermistor wires 55 is made of, for example, aluminum.

[0056] As shown in FIG. 3 , the semiconductor elements 31 are bonded to the first conductive members 20A and the second conductive members 20B. The semiconductor elements 31 include the first semiconductor elements 31A and the second semiconductor elements 31B. The first semiconductor elements 31A are bonded to the first conductive members 20A and arranged along the first direction x. The second semiconductor elements 31B are bonded to the second conductive members 20B and arranged along the first direction x. The semiconductor elements 31 are insulated gate bipolar transistors (IGBTs) primarily composed of silicon (Si) or silicon carbide (SiC). The semiconductor elements 31 may also be metal-oxide-semiconductor field-effect transistors (MOSFETs). The semiconductor device A10 will be described assuming that the semiconductor elements 31 are IGBTs.

[0057] As shown in FIGS. 11, 18 and 19, the plurality of semiconductor elements 31 have a first electrode 311, a second electrode 312 and a gate electrode 313.

[0058] 18 and 19 , the first electrode 311 is provided on the upper end of the semiconductor element 31 located on the side facing the main surfaces 111 of the multiple base materials 11 in the thickness direction z. An emitter current flows through the first electrode 311 from inside the semiconductor element 31. In the semiconductor device A10, the first electrode 311 includes a pair of regions adjacent to each other in the second direction y.

[0059] 11 , the second electrode 312 is provided at the lower end of the semiconductor element 31 located on the side opposite to the side to which the main surfaces 111 of the plurality of base materials 11 face in the thickness direction z. A collector current flows through the second electrode 312 toward the inside of the semiconductor element 31.

[0060] The second electrodes 312 are joined to either the plurality of first conductive members 20A or the plurality of second conductive members 20B via a conductive bonding layer 39. As a result, the second electrodes 312 of the plurality of first semiconductor elements 31A are electrically connected to the plurality of first conductive members 20A. The second electrodes 312 of the plurality of second semiconductor elements 31B are electrically connected to the plurality of second conductive members 20B. The conductive bonding layer 39 is made of lead-free solder containing tin as its main component, or the like.

[0061] 18 and 19 , the gate electrode 313 is provided at the upper end of the semiconductor element 31 located on the side toward which the main surfaces 111 of the plurality of base materials 11 face in the thickness direction z. In the semiconductor device A10, the gate electrode 313 is sandwiched between a pair of regions of the first electrode 311. A gate voltage for driving the semiconductor element 31 is applied to the gate electrode 313. When viewed in the thickness direction z, the area of ​​the gate electrode 313 is smaller than the area of ​​the first electrode 311.

[0062] 3, the plurality of diodes 32 are joined to the plurality of first conductive members 20A and the plurality of second conductive members 20B. The number of the plurality of diodes 32 corresponds to the number of the plurality of semiconductor elements 31. The plurality of diodes 32 are individually connected to the plurality of semiconductor elements 31. In the semiconductor device A10, the plurality of diodes 32 are Schottky barrier diodes.

[0063] As shown in FIGS. 11 , 18 , and 19 , the multiple diodes 32 have an anode electrode 321 and a cathode electrode 322. The anode electrode 321 is provided at the upper end of the diode 32, which is located on the side facing the main surfaces 111 of the multiple substrates 11 in the thickness direction z. The cathode electrode 322 is provided at the lower end of the diode 32, which is located on the side opposite the side facing the main surfaces 111 of the multiple substrates 11 in the thickness direction z. The cathode electrode 322 is bonded to either the multiple first conductive members 20A or the multiple second conductive members 20B via a conductive bonding layer 39. As a result, each of the cathode electrodes 322 of the multiple diodes 32 is electrically connected to either the multiple first conductive members 20A or the multiple second conductive members 20B.

[0064] As shown in FIGS. 3 and 8 , the semiconductor device A10 includes a thermistor 33. The thermistor 33 is electrically connected to a pair of pads 28. In the semiconductor device A10, the thermistor 33 is an NTC (Negative Temperature Coefficient) thermistor. NTC thermistors have the characteristic of gradually decreasing resistance with increasing temperature. The thermistor 33 is used as a temperature detection sensor for the semiconductor device A10. The thermistor 33 is electrically connected to a pair of thermistor terminals 46 via the pair of pads 28 and a pair of thermistor wires 55.

[0065] 18 and 19, the semiconductor device A10 includes a plurality of first wires 511 to a plurality of sixth wires 516, a plurality of first gate wires 521, and a plurality of first detection wires 531. These wires are individually bonded to a plurality of semiconductor elements 31 and a plurality of diodes 32. The composition of these wires includes, for example, aluminum.

[0066] 18 , the multiple first wires 511, multiple second wires 512, and multiple third wires 513 individually bonded to the multiple first semiconductor elements 31A and the multiple diodes 32 bonded to the multiple first conductive members 20A will be described. The multiple first wires 511 are individually bonded to the first electrodes 311 of the multiple first semiconductor elements 31A and the multiple first conductive members 20A. The multiple second wires 512 are individually bonded to the anode electrodes 321 of the multiple diodes 32 and the multiple second conductive members 20B. As a result, the first electrodes 311 of the multiple first semiconductor elements 31A and the anode electrodes 321 of the multiple diodes 32 individually corresponding to these electrodes are electrically connected to the multiple second conductive members 20B. The multiple third wires 513 are bonded to the first electrodes 311 of the multiple first semiconductor elements 31A and the anode electrodes 321 of the multiple diodes 32 individually corresponding to these electrodes. As a result, the anode electrodes 321 of the plurality of diodes 32 joined to the plurality of first conductive members 20A are individually electrically connected to the first electrodes 311 of the plurality of first semiconductor elements 31A.

[0067] 18 , the multiple first gate wires 521 and multiple first detection wires 531 individually bonded to the multiple first semiconductor elements 31A will be described. The multiple first gate wires 521 are individually bonded to the gate electrodes 313 of the multiple first semiconductor elements 31A and the multiple first gate wirings 24A. The multiple first detection wires 531 are individually bonded to the first electrodes 311 of the multiple first semiconductor elements 31A and the multiple first detection wirings 25A.

[0068] 19 , the multiple fourth wires 514, multiple fifth wires 515, and multiple sixth wires 516 individually bonded to the multiple second semiconductor elements 31B and the multiple diodes 32 bonded to the multiple second conductive members 20B will be described. The multiple fourth wires 514 are individually bonded to one region of the first electrodes 311 of the multiple second semiconductor elements 31B and to the multiple third conductive members 20C. The multiple fifth wires 515 are individually bonded to the other region of the first electrodes 311 of the multiple second semiconductor elements 31B and to the multiple third conductive members 20C. As a result, the first electrodes 311 of the multiple second semiconductor elements 31B are electrically connected to the multiple third conductive members 20C. The multiple sixth wires 516 are individually bonded to the other region of the first electrodes 311 of the multiple second semiconductor elements 31B and to the anode electrodes 321 of the multiple diodes 32. As a result, the anode electrodes 321 of the multiple diodes 32 joined to the multiple second conductive members 20B are individually conductive to the first electrodes 311 of the multiple second semiconductor elements 31B, and are also conductive to the multiple third conductive members 20C via the multiple fifth wires 515.

[0069] 19, the first electrodes 311 of the plurality of second semiconductor elements 31B are electrically connected to the plurality of third conductive members 20C via the plurality of fourth wires 514 and the plurality of fifth wires 515. Therefore, the second input terminal 41B is electrically connected to the first electrodes 311 of the plurality of second semiconductor elements 31B.

[0070] 8 and 19, the multiple first gate wires 521 and multiple first detection wires 531 individually bonded to the multiple second semiconductor elements 31B will be described. The multiple first gate wires 521 are individually bonded to the gate electrodes 313 of the multiple second semiconductor elements 31B and the multiple second gate wirings 24B. The multiple first detection wires 531 are individually bonded to the first electrodes 311 of the multiple second semiconductor elements 31B and the multiple second detection wirings 25B.

[0071] 10, the semiconductor device A10 includes a pair of second gate wires 522. The pair of second gate wires 522 is bonded to a plurality of gate terminals 43 and a plurality of gate wirings 24. The plurality of second gate wires 522 is made of, for example, aluminum.

[0072] 10 , one second gate wire 522 is bonded to the first gate terminal 43A and to one of the multiple first gate wirings 24A that is arranged on the first substrate 11A. This provides electrical continuity between the first gate terminal 43A and the gate electrodes 313 of the multiple first semiconductor elements 31A. As shown in FIG. 10 , the other second gate wire 522 is bonded to the second gate terminal 43B and to one of the multiple second gate wirings 24B that is arranged on the second substrate 11B. This provides electrical continuity between the second gate terminal 43B and the gate electrodes 313 of the multiple second semiconductor elements 31B.

[0073] 10, the semiconductor device A10 includes a pair of second detection wires 532. The pair of second detection wires 532 is joined to the plurality of detection terminals 44 and the plurality of detection wirings 25. The plurality of second detection wires 532 is made of, for example, aluminum.

[0074] 10 , one second detection wire 532 is joined to the first detection terminal 44A and to one of the multiple first detection wires 25A that is arranged on the second base material 11B. This provides electrical continuity between the first detection terminal 44A and the first electrodes 311 of the multiple first semiconductor elements 31A. As shown in FIG. 10 , the other second detection wire 532 is joined to the second detection terminal 44B and to one of the multiple second detection wires 25B that is arranged on the first base material 11A. This provides electrical continuity between the second detection terminal 44B and the first electrodes 311 of the multiple second semiconductor elements 31B.

[0075] As shown in FIG. 11 , the heat dissipation member 13 is bonded to the rear surface 112 of the first substrate 11A and the rear surface 112 of the second substrate 11B. As a result, the first substrate 11A and the second substrate 11B are supported by the heat dissipation member 13. The heat dissipation member 13 is made of a flat metal plate. The metal is, for example, copper. Nickel plating may be applied to the surface of the heat dissipation member 13. A cooling member different from the heat dissipation member 13 may be attached to the portion of the heat dissipation member 13 exposed from the semiconductor device A10. As shown in FIGS. 7 to 9 , a plurality of support holes 131 are provided at the four corners of the heat dissipation member 13 when viewed in the thickness direction z. The plurality of support holes 131 penetrate the heat dissipation member 13 in the thickness direction z. The plurality of support holes 131 are used to support the heat dissipation member 13, which supports the first substrate 11A and the second substrate 11B, on the case 60.

[0076] 11 , the heat transfer member 12 is disposed on the rear surface 112 of the first base material 11A and the rear surface 112 of the second base material 11B. The heat transfer member 12 is made of a metal material such as copper foil. The heat transfer member 12 conducts heat generated from the plurality of semiconductor elements 31 to the heat dissipation member 13.

[0077] As shown in Fig. 11 , the adhesive layer 19 is interposed between the heat dissipation member 13 and the heat transfer member 12. The adhesive layer 19 is used to bond the heat dissipation member 13 to both the first substrate 11A and the second substrate 11B. The adhesive layer 19 is made of lead-free solder containing tin as its main component, or the like. The heat dissipation member 13 is bonded to both the first substrate 11A and the second substrate 11B via the heat transfer member 12 and the adhesive layer 19.

[0078] 2 to 6, the case 60 is an electrically insulating member that surrounds the first base material 11A and the second base material 11B when viewed in the thickness direction z. The case 60 is made of a material containing a synthetic resin with excellent heat resistance, such as PPS (polyphenylene sulfide). The case 60 has a pair of first side walls 611, a pair of second side walls 612, a plurality of mounting portions 62, an input terminal block 63, and an output terminal block 64.

[0079] 2 and 3 , the pair of first side walls 611 are spaced apart from each other in the first direction x. The pair of first side walls 611 are arranged along both the second direction y and the thickness direction z, and one end of each of the pair of first side walls 611 in the thickness direction z is in contact with the heat dissipation member 13.

[0080] As shown in FIGS. 2 and 3 , the pair of second side walls 612 are spaced apart from each other in the second direction y. The pair of second side walls 612 are arranged along both the first direction x and the thickness direction z, and one end in the thickness direction z is in contact with the heat dissipation member 13. Both ends of the pair of second side walls 612 in the first direction x are connected to the pair of first side walls 611. The first gate terminal 43A, the first detection terminal 44A, the input current detection terminal 45, and a pair of thermistor terminals 46 are arranged inside one of the second side walls 612. The second gate terminal 43B and the second detection terminal 44B are arranged inside the other second side wall 612. As shown in FIGS. 8 to 10 , the ends of these terminals that are adjacent to the first substrate 11A and the second substrate 11B in the thickness direction z are supported by the pair of second side walls 612.

[0081] 2 , 8 , and 9 , the multiple mounting portions 62 are portions provided at the four corners of the case 60 when viewed in the thickness direction z. The heat dissipation member 13 is in contact with the lower surfaces of the multiple mounting portions 62. Each of the multiple mounting portions 62 has a mounting hole 621 that penetrates in the thickness direction z. The positions of the multiple mounting holes 621 correspond to the positions of the multiple support holes 131 in the heat dissipation member 13. The heat dissipation member 13 is supported by the case 60 by fitting fastening members such as pins into the multiple mounting holes 621 and the multiple support holes 131.

[0082] As shown in FIGS. 2 , 5 , and 8 , the input terminal block 63 protrudes outward in the first direction x from one of the first side walls 611. A plurality of input terminals 41 are supported on the input terminal block 63. The input terminal block 63 includes a first terminal block 631 and a second terminal block 632. The first terminal block 631 and the second terminal block 632 are spaced apart from each other in the second direction y. The first terminal block 631 supports the first input terminal 41A. The external connection portion 411 of the first input terminal 41A is exposed from the first terminal block 631. The second terminal block 632 supports the second input terminal 41B. The external connection portion 411 of the second input terminal 41B is exposed from the second terminal block 632. A plurality of grooves 633 extending in the first direction x are formed between the first terminal block 631 and the second terminal block 632. 8 and 12 , a pair of nuts 634 are disposed inside the first terminal block 631 and the second terminal block 632. The pair of nuts 634 correspond to a pair of connection holes 411A provided in the first input terminal 41A and the second input terminal 41B. Fastening members such as bolts inserted into the pair of connection holes 411A fit into the pair of nuts 634.

[0083] As shown in FIGS. 2 , 6 , and 9 , the output terminal block 64 protrudes outward in the first direction x from the other first side wall 611. The output terminal 42 is supported on the output terminal block 64. The output terminal block 64 has a first terminal block 641 and a second terminal block 642. The first terminal block 641 and the second terminal block 642 are spaced apart from each other in the second direction y. The first terminal block 641 supports the first terminal portion 42A of the output terminal 42. The external connection portion 421 of the first terminal portion 42A is exposed from the first terminal block 641. The second terminal block 642 supports the second terminal portion 42B of the output terminal 42. The external connection portion 421 of the second terminal portion 42B is exposed from the second terminal block 642. A plurality of grooves 643 extending in the first direction x are formed between the first terminal block 641 and the second terminal block 642. 9 and 13, a pair of nuts 644 are disposed inside the first terminal block 641 and the second terminal block 642. The pair of nuts 644 correspond to a pair of connection holes 421A provided in the first terminal portion 42A and the second terminal portion 42B. Fastening members such as bolts inserted into the pair of connection holes 421A fit into the pair of nuts 644.

[0084] 2, the top plate 69 is a member that closes the internal region of the semiconductor device A10 formed by the heat dissipation member 13 and the case 60. The top plate 69 faces the main surfaces 111 of the plurality of base materials 11. The top plate 69 is supported by a pair of first side walls 611 and a pair of second side walls 612 of the case 60. The top plate 69 is made of a material that contains an electrically insulating synthetic resin. Note that instead of the top plate 69, the internal region of the semiconductor device A10 may be filled with silicone gel or the like.

[0085] Next, the circuit configuration of the semiconductor device A10 will be described with reference to FIG.

[0086] 20 , the semiconductor device A10 is configured with two switching circuits: an upper arm circuit 71 and a lower arm circuit 72. The upper arm circuit 71 is configured with a plurality of first conductive members 20A, a plurality of first semiconductor elements 31A, and a plurality of diodes 32 joined to the plurality of first conductive members 20A. The plurality of first semiconductor elements 31A and the plurality of diodes 32 constituting the upper arm circuit 71 are connected in parallel between a first input terminal 41A and an output terminal 42. The gate electrodes 313 of the plurality of first semiconductor elements 31A are connected in parallel to a first gate terminal 43A. A gate voltage is applied to the first gate terminal 43A by a drive circuit, such as a gate driver, arranged outside the semiconductor device A10, thereby simultaneously driving the plurality of first semiconductor elements 31A.

[0087] The first electrodes 311 of the multiple first semiconductor elements 31A are connected in parallel to the first detection terminal 44A. The emitter current flowing through the multiple first semiconductor elements 31A is input to a control circuit disposed outside the semiconductor device A10 via the first detection terminal 44A.

[0088] In the upper arm circuit 71, the voltage applied to the plurality of first conductive members 20A by the first input terminal 41A and the second input terminal 41B is input to the control circuit of the externally arranged semiconductor device A10 via the input current detection terminal 45.

[0089] The lower arm circuit 72 is composed of a plurality of second conductive members 20B, a plurality of second semiconductor elements 31B, and a plurality of diodes 32 joined to the plurality of second conductive members 20B. The plurality of second semiconductor elements 31B and the plurality of diodes 32 constituting the lower arm circuit 72 are connected in parallel between the output terminal 42 and the second input terminal 41B. The gate electrodes 313 of the plurality of second semiconductor elements 31B are connected in parallel to the second gate terminal 43B. A drive circuit such as a gate driver arranged outside the semiconductor device A10 applies a gate voltage to the second gate terminal 43B, thereby simultaneously driving the plurality of second semiconductor elements 31B.

[0090] The first electrodes 311 of the second semiconductor elements 31B are connected in parallel to the second detection terminal 44B. The emitter current flowing through the second semiconductor elements 31B is input to a control circuit disposed outside the semiconductor device A10 via the second detection terminal 44B.

[0091] When a DC voltage is applied to the first input terminal 41A and the second input terminal 41B and the plurality of semiconductor elements 31 in the upper arm circuit 71 and the lower arm circuit 72 are driven, AC voltages of various frequencies are output from the output terminal 42. The AC voltages are supplied to a power supply target such as a motor.

[0092] Next, a semiconductor device A11, which is a first modification of the semiconductor device A10, will be described with reference to FIG.

[0093] 21 , the semiconductor device A11 differs from the semiconductor device A10 in the configuration of the multiple relay terminals 26. While Fig. 21 shows the first relay terminal 26A of the multiple relay terminals 26, the configurations of the second relay terminal 26B and the third relay terminal 26C are also the same as the configuration of the first relay terminal 26A. Therefore, in the description of the semiconductor device A11, the first relay terminal 26A will be used as a representative of the multiple relay terminals 26.

[0094] 21 , in the semiconductor device A11, the first connecting side 263B, the second connecting side 263C, the third connecting side 263E, and the fourth connecting side 263F of the connecting portion 263 of the first relay terminal 26A are all straight lines. The first connecting side 263B, the second connecting side 263C, the third connecting side 263E, and the fourth connecting side 263F are inclined with respect to the first direction x and the second direction y. When viewed in the thickness direction z, a portion of the connecting portion 263 is surrounded by the first connecting side 263B, the first virtual line 267A, and the second virtual line 267B.

[0095] Next, a semiconductor device A12, which is a second modification of the semiconductor device A10, will be described with reference to FIG.

[0096] 22 , the semiconductor device A12 differs from the semiconductor device A10 in the configuration of the first relay terminal 26A. While Fig. 22 shows the first relay terminal 26A among the multiple relay terminals 26, the configurations of the second relay terminal 26B and the third relay terminal 26C are also the same as the configuration of the first relay terminal 26A. Therefore, in describing the semiconductor device A12, the first relay terminal 26A will be used as a representative of the multiple relay terminals 26.

[0097] 22 , in the semiconductor device A12, the first connecting side 263B, the second connecting side 263C, the third connecting side 263E, and the fourth connecting side 263F of the connecting portion 263 of the first relay terminal 26A form curves that are concave inward of the first relay terminal 26A when viewed in the thickness direction z. When viewed in the thickness direction z, the first connecting side 263B straddles the first imaginary line 267A and the second imaginary line 267B.

[0098] Next, the effects of the semiconductor device A10 will be described.

[0099] The semiconductor device A10 includes a relay terminal 26 joined to two conductive members 20 adjacent to each other in the first direction x. The relay terminal 26 has a first band-shaped portion 261, a second band-shaped portion 262, and a connecting portion 263. The first band-shaped portion 261 has a first side 261A. The connecting portion 263 has a first intermediate side 263A and a first connecting side 263B connecting the first side 261A to the first intermediate side 263A. When viewed in the thickness direction z, the first connecting side 263B is located away from a first virtual intersection 268A, which is the intersection of a first virtual line 267A overlapping the first side 261A and a second virtual line 267B overlapping the first intermediate side 263A. 17 , when the relay terminal 26 is joined to the two conductive members 20 by the ultrasonic vibrations shown in FIG. 17 , repeated stress caused by the ultrasonic vibrations transmitted from the capillary 81 to the relay terminal 26 is concentrated at the boundary between either the first band-shaped portion 261 or the second band-shaped portion 262 and the connecting portion 263. Therefore, by adopting this configuration, it is possible to reduce the concentration of the repeated stress. Therefore, according to the semiconductor device A10, it is possible to suppress cracks from occurring in the relay terminal 26 joined to the two conductive members 20 during the manufacture of the semiconductor device A10.

[0100] The concentration of repeated stress acting on the boundary between either the first band portion 261 or the second band portion 262 and the connecting portion 263 can be reduced not only by the configuration of the relay terminal 26 of the semiconductor device A10, but also by the configuration of the relay terminal 26 of each of the semiconductor devices A11 and A12.

[0101] The thickness of the relay terminal 26 is greater than the thickness of each of the two conductive members 20. This reduces the electrical resistance of the relay terminal 26, thereby reducing the internal resistance (parasitic resistance) of the semiconductor device A10 caused by the relay terminal 26. Furthermore, the thermal conductivity of the relay terminal 26 is improved, thereby mitigating the uneven heat distribution in the two conductive members 20 caused by the heat generated by the semiconductor element 31. This reduces the concentration of thermal stress in the two base materials 11 on which the two conductive members 20 are individually arranged.

[0102] The semiconductor device A10 further includes a first input terminal 41A electrically connected to two conductive members 20 (plurality of first conductive members 20A) and a second input terminal 41B electrically connected to a semiconductor element 31 (one of plural second semiconductor elements 31B). The first input terminal 41A and the second input terminal 41B are adjacent to each other. As a result, when a voltage is applied to the first input terminal 41A and the second input terminal 41B, mutual inductance occurs between the first input terminal 41A and the second input terminal 41B. This reduces the parasitic inductance of the semiconductor device A10.

[0103] The semiconductor device A10 further includes a heat dissipation member 13 located on the opposite side of the two conductive members 20 in the thickness direction z, with the two bases 11 sandwiched between them. The two bases 11 are supported by the heat dissipation member 13. This makes it easier for heat conducted from the semiconductor element 31 to one of the two conductive members 20 to be released to the outside, thereby more efficiently reducing the concentration of thermal stress in the multiple bases 11.

[0104] A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Fig. 23. In this figure, elements that are the same as or similar to those of the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0105] The semiconductor device A20 differs from the semiconductor device A10 in the configuration of the multiple relay terminals 26. While Fig. 23 shows the first relay terminal 26A of the multiple relay terminals 26, the configurations of the second relay terminal 26B and the third relay terminal 26C are also the same as the configuration of the first relay terminal 26A. Therefore, in describing the semiconductor device A20, the first relay terminal 26A will be used as a representative of the multiple relay terminals 26.

[0106] 23 , any one of the multiple bonding marks 264 of the first relay terminal 26A includes a first region 264A and a second region 264B. The second region 264B overlaps the first region 264A. The stacking order of the first region 264A and the second region 264B does not matter. When viewed in the thickness direction z, the first region 264A and the second region 264B are surrounded by the periphery of any one of the multiple first conductive members 20A.

[0107] 23 , the second region 264B has a protruding portion 264C located outward from the first region 264A. The area of ​​the protruding portion 264C is smaller than the area of ​​the first region 264A. The protruding portion 264C is located between the first region 264A and one of the multiple bonding marks 264 located adjacent to the first region 264A in the first direction x.

[0108] Next, a manufacturing method of the semiconductor device A20 will be described. The semiconductor device A20 includes a first step and a second step. In the first step, relay terminals 26 (first relay terminals 26A) are bonded to two conductive members 20 (plurality of first conductive members 20A) adjacent to each other in the first direction x using ultrasonic vibration as shown in FIG. 17 . In the second step, plural semiconductor elements 31 (plurality of first semiconductor elements 31A) are bonded to the two conductive members 20. While the order of the first and second steps is not limited, it is preferable to perform the first step before the second step to prevent vibrations from being transmitted to the plural semiconductor elements 31 due to the bonding of the relay terminals 26. Below, the first step will be described in detail with reference to FIGS. 24 to 28 . A detailed description of the second step will be omitted.

[0109] 24 , after the relay terminal 26 is placed on the two conductive members 20, a clamp 82 is used to press the relay terminal 26 against the two conductive members 20. Thereafter, when viewed in the thickness direction z, a capillary 81 is pressed against a region of either the first strip-shaped portion 261 or the second strip-shaped portion 262 of the relay terminal 26 that overlaps one of the two conductive members 20 (the region of the second strip-shaped portion 262 in FIG. 24 ), thereby forming a first bonding mark 265 in that region.

[0110] 25 to 27 , a capillary 81 is sequentially pressed against the regions of the first strip-shaped portion 261 and the second strip-shaped portion 262 of the relay terminal 26 that overlap the two conductive members 20, thereby forming a plurality of first bonding marks 265 on the first strip-shaped portion 261 and the second strip-shaped portion 262. When forming the plurality of first bonding marks 265, the capillary 81 and the clamp 82 are moved to predetermined positions. In the semiconductor device A20, four first bonding marks 265 are formed. As shown in FIG. 27 , when forming the fourth first bonding mark 265 in the process of forming the plurality of first bonding marks 265, the clamp 82 is not required.

[0111] 28 , the capillary 81 is pressed against the first bonding mark 265 formed first among the plurality of first bonding marks 265, thereby forming a second bonding mark 266 on either the first band-shaped portion 261 or the second band-shaped portion 262 of the relay terminal 26. In this step, the capillary 81 is pressed across the periphery of the first bonding mark 265. Furthermore, the compressive load applied to the capillary 81 when forming the first bonding mark 265 is greater than the compressive load applied to the capillary 81 when forming each of the plurality of first bonding marks 265. This completes the first step.

[0112] Next, the effects of the semiconductor device A20 will be described.

[0113] The semiconductor device A20 includes a relay terminal 26 joined to two conductive members 20 adjacent to each other in the first direction x. The relay terminal 26 has a first band-shaped portion 261, a second band-shaped portion 262, and a connecting portion 263. The first band-shaped portion 261 has a first side 261A. The connecting portion 263 has a first intermediate side 263A and a first connecting side 263B connecting the first side 261A to the first intermediate side 263A. When viewed in the thickness direction z, the first connecting side 263B is located away from a first virtual intersection 268A, which is the intersection of a first virtual line 267A overlapping the first side 261A and a second virtual line 267B overlapping the first intermediate side 263A. Therefore, the semiconductor device A20 also makes it possible to suppress cracks from occurring in the relay terminal 26 joined to two conductive members 20 during manufacturing of the semiconductor device A20.

[0114] A plurality of bonding marks 264 that overlap two conductive members 20 when viewed in the thickness direction z are formed on the first strip portion 261 and the second strip portion 262 of the relay terminal 26. Each of the plurality of bonding marks 264 includes a first region 264A and a second region 264B that overlaps the first region 264A. The second region 264B has a protruding portion 264C that is located outward of the first region 264A. The protruding portion 264C is a mark obtained by forming a second bonding mark 266 that overlaps the first bonding mark 265 that was formed first among the plurality of first bonding marks 265 in the first step described above and illustrated in FIGS. 24 to 28. This allows the relay terminal 26 to be more firmly bonded to the two conductive members 20 while shortening the total time that ultrasonic vibrations are applied to the relay terminal 26. When this manufacturing method is used, the number of times the stress amplitude of the repeated stress acting on the relay terminal 26 is reduced, so that the occurrence of cracks in the relay terminal 26 can be suppressed.

[0115] The protruding portion 264C is preferably located between the first region 264A and one of the multiple bonding marks 264 located adjacent to the first region 264A in the first direction x. This allows the end of either the first strip portion 261 or the second strip portion 262 of the relay terminal 26, on which the first region 264A and the second region 264B are formed, to be more firmly bonded to one of the two first conductive members 20A. This prevents the end from being turned up.

[0116] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0117] The present disclosure includes embodiments described in the following supplementary notes. Supplementary note 1. A semiconductor device comprising: two conductive members adjacent to each other in a first direction orthogonal to a thickness direction; a semiconductor element bonded to one of the two conductive members; and a relay terminal bonded to the two conductive members, wherein the relay terminal has a first strip-shaped portion and a second strip-shaped portion bonded to the two conductive members and a connecting portion connecting the first strip-shaped portion and the second strip-shaped portion, wherein the first strip-shaped portion and the second strip-shaped portion extend in the first direction and are adjacent to each other in a second direction orthogonal to the thickness direction and the first direction, wherein the connecting portion is located between the first strip-shaped portion and the second strip-shaped portion in the second direction, wherein the first strip-shaped portion has a first side extending in the first direction, and the connecting portion has a first intermediate side extending in the second direction and a first connecting side connecting the first side and the first intermediate side, The semiconductor device according to Supplementary Note 1, wherein, when viewed in the thickness direction, the first connecting side is located away from a first virtual intersection point which is an intersection point of a first virtual line which extends in the first direction and overlaps the first side, and a second virtual line which extends in the second direction and overlaps the first intermediate side. Supplementary Note 2. The semiconductor device according to Supplementary Note 1, wherein the first connecting side forms a straight line. Supplementary Note 3. The semiconductor device according to Supplementary Note 1, wherein the first connecting side forms a curve which is recessed inward of the relay terminal when viewed in the thickness direction. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein, when viewed in the thickness direction, a part of the connecting portion is surrounded by the first connecting side, the first virtual line, and the second virtual line. Supplementary Note 5. The semiconductor device according to Supplementary Note 3, wherein, when viewed in the thickness direction, the first connecting side straddles the first virtual line and the second virtual line. Supplementary Note 6. The semiconductor device of any one of appendixes 1 to 5, wherein the second band-shaped portion has a second side that extends in the first direction and faces the first side; the connecting portion has a second connecting side that connects the second side and the first intermediate side; and when viewed in the thickness direction, the second connecting side is located away from a second virtual intersection that is an intersection of the second virtual line and a third virtual line that extends in the first direction and overlaps the second side.Supplementary Note 7. The semiconductor device according to Supplementary Note 6, wherein the first strip portion has a third side located opposite the first side in the first direction with the connecting portion therebetween and overlapping the first virtual line when viewed in the thickness direction, the connecting portion has a second intermediate side located opposite the first intermediate side in the first direction and extending in the second direction, and a third connecting side connecting the third side and the second intermediate side, and the third connecting side is located away from a third virtual intersection which is an intersection of the first virtual line and a fourth virtual line extending in the second direction and overlapping the second intermediate side when viewed in the thickness direction. The semiconductor device according to Supplementary Note 7, wherein the second band-shaped portion has a fourth side located on the opposite side of the second side in the first direction with the connecting portion therebetween and overlapping the third imaginary line when viewed in the thickness direction, the connecting portion has a fourth connecting side connecting the fourth side and the second intermediate side, and when viewed in the thickness direction, the fourth connecting side is located away from a fourth imaginary intersection point where the third imaginary line intersects with the fourth imaginary line.Supplementary Note 9. The semiconductor device according to any of Supplementary Notes 1 to 8, wherein the first band-shaped portion and the second band-shaped portion have a plurality of bonding marks formed on them that overlap either of the two conductive members, one of the plurality of bonding marks including a first region and a second region overlapping the first region, and the second region has a protruding portion located outward from the first region.Supplementary Note 10. The semiconductor device according to Supplementary Note 9, wherein when viewed in the thickness direction, the first region and the second region are surrounded by a periphery of either of the two conductive members.Supplementary Note 11. Supplementary Note 10: The semiconductor device according to Supplementary Note 12, wherein the protruding portion is located between the first region and any one of the plurality of bonding marks located adjacent to the first region in the first direction. Supplementary Note 13: The semiconductor device according to any one of Supplementary Notes 1 to 12, wherein the thickness of the relay terminal is greater than the thickness of each of the two conductive members.Appendix 14. The semiconductor device according to any one of Appendixes 1 to 13, further comprising two substrates adjacent to each other in the first direction, the two conductive members being individually disposed on the two substrates, and the connecting portion overlapping a gap provided between the two substrates as viewed in the thickness direction. Appendix 15. The semiconductor device according to Appendix 14, further comprising a heat dissipation member located on the opposite side of the two conductive members with the two substrates sandwiched therebetween in the thickness direction, the two substrates being supported by the heat dissipation member. Appendix 16. The semiconductor device according to Appendix 14 or 15, further comprising a first input terminal and a second input terminal electrically connected to the two conductive members, the first input terminal and the second input terminal being located on one side in the first direction and adjacent to each other in the second direction. Appendix 17. The semiconductor device according to Appendix 16, further comprising an output terminal, the output terminal being located on the opposite side of the first input terminal and the second input terminal with the two substrates sandwiched therebetween in the first direction. Appendix 18. a step of joining a relay terminal to two conductive members adjacent to each other in a first direction perpendicular to a thickness direction by ultrasonic vibration; and a step of joining a semiconductor element to one of the two conductive members, wherein the relay terminal has a first band-shaped portion and a second band-shaped portion extending in the first direction and adjacent to each other in a second direction perpendicular to the thickness direction and the first direction, and a connecting portion located between the first band-shaped portion and the second band-shaped portion in the second direction and connecting the first band-shaped portion and the second band-shaped portion, and the step of joining the relay terminal includes a step of sequentially pressing a capillary against regions of the first band-shaped portion and the second band-shaped portion that overlap the two conductive members when viewed in the thickness direction, thereby forming a plurality of first bonding marks on the first band-shaped portion and the second band-shaped portion, and a step of pressing the capillary so as to overlap a first-formed first bonding mark among the plurality of first bonding marks, thereby forming a second bonding mark on one of the first band-shaped portion and the second band-shaped portion, In the step of forming the second bonding mark, the capillary is pressed across the periphery of the first bonding mark.Appendix 19. The method for manufacturing a semiconductor device according to Appendix 18, wherein a compressive load applied to the capillary when forming the second bonding mark is greater than a compressive load applied to the capillary when forming each of the plurality of first bonding marks.

[0118] A10, A20: semiconductor device 11: base material 11A: first base material 11B: second base material 111: main surface 112: back surface 12: heat transfer member 13: heat dissipation member 131: support hole 19: adhesive layer 20: conductive member 20A: first conductive member 20B: second conductive member 20C: third conductive member 21: first pad portion 22: second pad portion 23: third pad portion 24: gate wiring 24A: first gate wiring 24B: second gate wiring 25: detection wiring 25A: first detection wiring 25B: second detection wiring 26: relay terminal 26A: first relay terminal 26B: second relay terminal 26C: third relay terminal 261: first strip-shaped portion 261A: first side 261B: third side 262: Second band-shaped portion 262A: Second side 262B: Fourth side 263: Connecting portion 263A: First intermediate side 263B: First connecting side 263C: Second connecting side 263D: Second intermediate side 263E: Third connecting side 263F: Fourth connecting side 264: Bonding mark 264A: First region 264B: Second region 264C: Protruding portion 265: First bonding mark 266: Second bonding mark 267A: First virtual line 267B: Second virtual line 267C: Third virtual line 267D: Fourth virtual line 268A: First virtual intersection 268B: Second virtual intersection 268C: Third virtual intersection 268D: Fourth virtual intersection 27A: First conductive member 27B: Second conductive member 28: Pad 31: Semiconductor element 31A: First semiconductor element 31B: Second semiconductor element 311: First electrode 312: Second electrode 313: Gate electrode 32: Diode 321: Anode electrode 322: Cathode electrode 33: Thermistor 39: Conductive bonding layer 41: Input terminal 41A: First input terminal 41B: Second input terminal 411: External connection portion 411A: Connection hole 412: Internal connection portion 413: Intermediate portion 413A: Base portion 413B: Upright portion 42: Output terminal 42A: First terminal portion 42B: Second terminal portion 421: External connection portion 421A: Connection hole 422: Internal connection portion 423: Intermediate portion 423A: Base portion 423B: Upright portion 43: Gate terminal 43A: First gate terminal43B: Second gate terminal 44: Detection terminal 44A: First detection terminal 44B: Second detection terminal 45: Input current detection terminal 46: Thermistor terminal 511 to 516: First to sixth wires 521: First gate wire 522: Second gate wire 531: First detection wire 532: Second detection wire 54: Input current detection wire 55: Thermistor wire 60: Case 611: First side wall 612: Second side wall 62: Mounting base 621: Mounting hole 63: Input terminal block 631: First terminal block 632: Second terminal block 633: Groove 634: Nut 64: Output terminal block 641: First terminal block 642: Second terminal block 643: Groove 644: Nut 69: Top plate 71: Upper arm circuit 72: Lower arm circuit 81: Capillary 82: Clamp z: Thickness direction x: First direction y: Second direction

Claims

1. Two conductive members adjacent to each other in a first direction orthogonal to the thickness direction, A semiconductor element joined to any one of the two conductive members, And a relay terminal joined to the two conductive members, The relay terminal has a first strip portion and a second strip portion joined to the two conductive members, and a connecting portion connecting the first strip portion and the second strip portion, The first strip portion and the second strip portion extend in the first direction and are adjacent to each other in a second direction orthogonal to the thickness direction and the first direction, The connecting portion is located between the first strip portion and the second strip portion in the second direction, The first strip portion has a first side extending in the first direction, The connecting portion has a first intermediate side extending in the second direction and a first connecting side connecting the first side and the first intermediate side, When viewed in the thickness direction, the first connecting side is located away from a first virtual intersection that is an intersection of a first virtual line extending in the first direction and overlapping the first side and a second virtual line extending in the second direction and overlapping the first intermediate side. A semiconductor device.

2. The first connecting side forms a straight line. The semiconductor device according to claim 1.

3. The first connecting side forms a curve that is recessed inward of the relay terminal when viewed in the thickness direction. The semiconductor device according to claim 1.

4. When viewed in the thickness direction, a part of the connecting portion is surrounded by the first connecting side, the first virtual line, and the second virtual line. The semiconductor device according to claim 3.

5. When viewed in the thickness direction, the first connecting side straddles the first virtual line and the second virtual line. The semiconductor device according to claim 3.

6. The second strip portion extends in the first direction and has a second side facing the first side. The connecting portion has a second connecting side that connects the second side and the first intermediate side. When viewed in the thickness direction, the second connecting side is located away from a second virtual intersection point that is an intersection of the second virtual line and a third virtual line that extends in the first direction and overlaps the second side. The semiconductor device according to claim 1.

7. The first strip portion is located on the side opposite to the first side with the connecting portion interposed therebetween in the first direction, and has a third side that overlaps the first virtual line when viewed in the thickness direction. The connecting portion is located on the side opposite to the first intermediate side in the first direction, and has a second intermediate side that extends in the second direction and a third connecting side that connects the third side and the second intermediate side. When viewed in the thickness direction, the third connecting side is located away from a third virtual intersection point that is an intersection of the first virtual line and a fourth virtual line that extends in the second direction and overlaps the second intermediate side. The semiconductor device according to claim 6.

8. The second strip portion is located on the side opposite to the second side with the connecting portion interposed therebetween in the first direction, and has a fourth side that overlaps the third virtual line when viewed in the thickness direction. The connecting portion has a fourth connecting side that connects the fourth side and the second intermediate side. When viewed in the thickness direction, the fourth connecting side is located away from a fourth virtual intersection point that is an intersection of the third virtual line and the fourth virtual line. The semiconductor device according to claim 7.

9. A plurality of bonding marks overlapping either of the two conductive members are formed on the first strip portion and the second strip portion. Any one of the plurality of bonding marks includes a first region and a second region overlapping the first region. The second region has an overhanging portion located outward of the first region. The semiconductor device according to claim 1.

10. The semiconductor device according to claim 9, wherein, when viewed in the thickness direction, the first region and the second region are surrounded by the periphery of one of the two conductive members.

11. The semiconductor device according to claim 10, wherein the area of the protruding portion is smaller than the area of the first region.

12. The semiconductor device according to claim 10, wherein the protruding portion is located between the first region and any one of the plurality of bonding marks located adjacent to the first region in the first direction.

13. The semiconductor device according to any one of claims 1 to 12, wherein the thickness of the relay terminal is greater than the thickness of each of the two conductive members.

14. Further comprising two base materials adjacent to each other in the first direction, The two conductive members are individually disposed on the two base materials, The semiconductor device according to any one of claims 1 to 12, wherein, when viewed in the thickness direction, the connecting portion overlaps a gap provided between the two base materials.

15. Further comprising a heat dissipation member located on the opposite side of the two conductive members with the two base materials interposed therebetween in the thickness direction, The semiconductor device according to claim 14, wherein the two base materials are supported by the heat dissipation member.

16. A first input terminal electrically connected to the two conductive members, And a second input terminal, The semiconductor device according to claim 14, wherein the first input terminal and the second input terminal are located on one side in the first direction and are adjacent to each other in the second direction.

17. Further comprising an output terminal, The semiconductor device according to claim 16, wherein the output terminal is located on the opposite side of the first input terminal and the second input terminal with the two base materials interposed therebetween in the first direction.

18. A step of joining relay terminals to two conductive members adjacent to each other in a first direction orthogonal to the thickness direction by ultrasonic vibration; A step of joining a semiconductor element to any one of the two conductive members, the method comprising: The relay terminal extends in the first direction and includes a first strip portion and a second strip portion adjacent to each other in a second direction orthogonal to the thickness direction and the first direction, and is located between the first strip portion and the second strip portion in the second direction and has a connecting portion connecting the first strip portion and the second strip portion; In the step of joining the relay terminal, a step of forming a plurality of first joining marks on the first strip portion and the second strip portion by sequentially pressing a capillary against regions of the first strip portion and the second strip portion overlapping the two conductive members when viewed in the thickness direction, and a step of forming a second joining mark on either the first strip portion or the second strip portion by pressing the capillary so as to overlap the first joining mark formed first among the plurality of first joining marks, the method including: In the step of forming the second joining mark, the capillary is pressed across the periphery of the first joining mark, a method for manufacturing a semiconductor device.

19. The compression load applied to the capillary when forming the second joining mark is greater than the compression load applied to the capillary when forming each of the plurality of first joining marks, the method for manufacturing a semiconductor device according to claim 18.