Multilayered semiconductor object and optical semiconductor element

JPWO2024237161A5Pending Publication Date: 2025-09-10
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Patent Information

Application Number
JP2025520537
Authority / Receiving Office
JP · JP
Patent Type
Applications
Priority Date
2024-05-09
Filing Date
2024-05-09
Publication Date
2025-09-10

AI Technical Summary

Technical Problem

The interdiffusion of impurities between p-type and n-type semiconductor layers in semiconductor stacks leads to increased resistance at the pn junction, affecting the performance of semiconductor devices.

Method used

Incorporating carbon as an acceptor in the p-type semiconductor layer and a donor in the n-type semiconductor layer, where carbon functions as a donor in the n-type layer and an acceptor in the p-type layer, thereby maintaining high carrier concentrations and reducing resistance.

Benefits of technology

This configuration effectively suppresses the increase in resistance due to impurity diffusion, enhancing the performance of semiconductor devices by maintaining high carrier concentrations and reducing the influence of interdiffusion on the pn junction.

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Abstract

This multilayered semiconductor object comprises: a first p-type semiconductor layer which is made of a III-V Group element compound semiconductor and has a p-type conductivity; and a first n-type semiconductor layer which is formed on the first p-type semiconductor layer so as to be in contact with the first p-type semiconductor layer and which is made of a III-V Group element compound semiconductor and has an n-type conductivity. The first p-type semiconductor layer contains carbon as an acceptor. In the first n-type semiconductor layer, carbon functions as a donor.
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Description

Semiconductor laminate and optical semiconductor element

[0001] The present disclosure relates to a semiconductor laminate and an optical semiconductor element.

[0002] This application claims priority based on Japanese Application No. 2023-079312 filed on May 12, 2023, and incorporates by reference all of the contents of the aforementioned Japanese application.

[0003] A semiconductor laminate including a structure (pn junction) in which an n-type semiconductor layer having an n-type conductivity and a p-type semiconductor layer having a p-type conductivity are stacked in contact with each other can be used in the manufacture of various semiconductor devices. For example, a laser diode structure including a p-type semiconductor layer and an n-type semiconductor layer forming a tunnel junction has been proposed (Non-Patent Document 1).

[0004] M. Arzberger et. al. , “Low-resistivity p-side contacts for InP-based devices using buried InGaAs tunnel junction”, Electronics Letter 6th vol. 36, No. 1 (2000)

[0005] A semiconductor stack according to the present disclosure includes a first p-type semiconductor layer made of a III-V compound semiconductor and having a p-type conductivity, and a first n-type semiconductor layer made of a III-V compound semiconductor and having an n-type conductivity, stacked on the first p-type semiconductor layer so as to be in contact with the first p-type semiconductor layer. The first p-type semiconductor layer contains carbon as an acceptor. In the first n-type semiconductor layer, carbon functions as a donor.

[0006] Fig. 1 is a schematic cross-sectional view showing the structure of a semiconductor laminate, Fig. 2 is a schematic view showing the structure of a semiconductor laser, and Fig. 3 is a flowchart showing an outline of a method for manufacturing the semiconductor laminate and the semiconductor laser.

[0007] [Problem to be Solved by the Present Disclosure] The n-type semiconductor layer contains donors (n-type impurities that generate electrons, which are majority carriers). The p-type semiconductor layer contains acceptors (p-type impurities that generate holes, which are majority carriers). Between the n-type and p-type semiconductor layers that constitute the p-n junction, donors in the n-type semiconductor layer diffuse from the n-type semiconductor layer to the p-type semiconductor layer. Also, acceptors in the p-type semiconductor layer diffuse from the p-type semiconductor layer to the n-type semiconductor layer. As such, the mutual diffusion of impurities reduces the carrier concentration in the p-type semiconductor layer and the n-type semiconductor layer, resulting in a problem of increased resistance at the p-n junction.

[0008] Therefore, it is an object of the present disclosure to provide a semiconductor laminate and an optical semiconductor element that can suppress an increase in resistance due to interdiffusion of impurities between a p-type semiconductor layer and an n-type semiconductor layer.

[0009] Effect of the Present Disclosure According to the semiconductor laminate, it is possible to suppress an increase in resistance due to interdiffusion of impurities between the p-type semiconductor layer and the n-type semiconductor layer.

[0010] [Description of Embodiments of the Present Disclosure] First, embodiments of the present disclosure will be listed and described. The semiconductor laminate of the present disclosure includes: (1) a first p-type semiconductor layer made of a III-V compound semiconductor and having a p-type conductivity; and a first n-type semiconductor layer made of a III-V compound semiconductor and having an n-type conductivity, stacked on the first p-type semiconductor layer so as to be in contact with the first p-type semiconductor layer. The first p-type semiconductor layer contains carbon as an acceptor. In the first n-type semiconductor layer, carbon functions as a donor.

[0011] In the semiconductor laminate of the present disclosure, carbon contained as an acceptor in the first p-type semiconductor layer functions as a donor in the first n-type semiconductor layer when it diffuses into the first n-type semiconductor layer. That is, the carbon diffused into the first n-type semiconductor layer generates electrons, which are majority carriers in the first n-type semiconductor layer. Here, electrons, which are majority carriers in the first n-type semiconductor layer, have a higher mobility than holes, which are majority carriers in the first p-type semiconductor layer, and have a greater effect on the resistance at the pn junction. Therefore, the semiconductor laminate of the present disclosure can suppress an increase in resistance due to interdiffusion of impurities between the first p-type semiconductor layer and the first n-type semiconductor layer.

[0012] (2) In the above (1), the first n-type semiconductor layer may contain silicon, tellurium, or sulfur as a donor. Silicon, tellurium, and sulfur are all suitable donors to be contained in the first n-type semiconductor layer.

[0013] (3) In the above (1), the first n-type semiconductor layer may contain carbon as a donor. With this configuration, when the carbon contained as a donor in the first n-type semiconductor layer diffuses into the first p-type semiconductor layer, it functions as an acceptor in the first p-type semiconductor layer. Therefore, an increase in resistance due to interdiffusion of impurities between the first p-type semiconductor layer and the first n-type semiconductor layer can be further suppressed.

[0014] (4) In any one of the above (1) to (3), the first n-type semiconductor layer is In 1-x Ga x As y P 1-y and 0<x<0.3 and 0<y<1 are satisfied. In such a first n-type semiconductor layer, carbon functions as a donor. Therefore, such a first n-type semiconductor layer is suitable as the first n-type semiconductor layer of the present disclosure.

[0015] (5) In any one of (1) to (4) above, the carrier concentration of the first n-type semiconductor layer is 1×10 18 cm -3 The carrier concentration of the first p-type semiconductor layer may be 1×10 18 cm -3In this way, in a pn junction formed by a semiconductor layer with a high carrier concentration, the mutual diffusion of impurities has a large effect on the resistance. Therefore, when the semiconductor laminate of the present disclosure is applied to such a configuration, the effect is large.

[0016] (6) In any one of the above (1) to (4), the carrier concentration of the first n-type semiconductor layer is 1×10 19 cm -3 The carrier concentration of the first p-type semiconductor layer may be 1×10 19 cm -3 or more. The first n-type semiconductor layer and the first p-type semiconductor layer may form a tunnel junction. As such, the semiconductor stack of the present disclosure is particularly suitable for a semiconductor stack including a tunnel junction that requires a first n-type semiconductor layer and a first p-type semiconductor layer with high carrier concentrations.

[0017] (7) In the above (6), the semiconductor laminate may further include a second n-type semiconductor layer made of a III-V compound semiconductor and having an n-type conductivity, an active layer made of a III-V compound semiconductor, a second p-type semiconductor layer made of a III-V compound semiconductor and having a p-type conductivity, and a third n-type semiconductor layer made of a III-V compound semiconductor and having an n-type conductivity. The second n-type semiconductor layer, the active layer, the second p-type semiconductor layer, the first p-type semiconductor layer, the first n-type semiconductor layer, and the third n-type semiconductor layer may be laminated in this order. Such a semiconductor laminate may be used in the manufacture of an optical semiconductor element.

[0018] The optical semiconductor element of the present disclosure includes: (8) the semiconductor laminate of (7) above; and an electrode disposed on the third n-type semiconductor layer. By including the semiconductor laminate of the present disclosure, the optical semiconductor element of the present disclosure can suppress an increase in resistance due to interdiffusion of impurities between the first p-type semiconductor layer and the first n-type semiconductor layer.

[0019] (9) In the above (8), the composition wavelengths of the first n-type semiconductor layer and the first p-type semiconductor layer may be shorter than the emission wavelength of the optical semiconductor element. This configuration can prevent light generated in the active layer from being absorbed by the first n-type semiconductor layer and the first p-type semiconductor layer. Note that, in this application, the "composition wavelength" of the semiconductor layer refers to the wavelength of light corresponding to the band gap energy determined by the composition of the semiconductor layer.

[0020] [Details of the Embodiments of the Present Disclosure] Next, embodiments of the semiconductor laminate and the optical semiconductor element according to the present disclosure will be described below with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.

[0021] Referring to FIG. 1 , a semiconductor laminate 1 according to an embodiment of the present disclosure includes, in order, a substrate 11, a first n-type cladding layer 12, an active layer 20, a p-type cladding layer 30, a high-concentration p-type semiconductor layer 41, a high-concentration n-type semiconductor layer 42, a second n-type cladding layer 50, and an n-type contact layer 60.

[0022] The high-concentration p-type semiconductor layer 41 is made of a III-V compound semiconductor and is a first p-type semiconductor layer having a p-type conductivity. The high-concentration n-type semiconductor layer 42 is made of a III-V compound semiconductor and is a first n-type semiconductor layer having an n-type conductivity. The first n-type cladding layer 12 is a second n-type semiconductor layer having an n-type conductivity. The p-type cladding layer 30 is a second p-type semiconductor layer having a p-type conductivity. The second n-type cladding layer 50 and the n-type contact layer 60 are third n-type semiconductor layers having an n-type conductivity.

[0023] The substrate 11 is made of a III-V compound semiconductor. The diameter of the substrate 11 is 50 mm or more, for example, 3 inches. For the purpose of improving the production efficiency and yield of semiconductor devices such as optical semiconductor elements using the semiconductor laminate 1, the diameter of the substrate 11 can be 80 mm or more (for example, 4 inches), further 100 mm or more (for example, 5 inches), or even 130 mm or more (for example, 6 inches). As the III-V compound semiconductor constituting the substrate 11, for example, InP (n-InP) having an n-type conductivity can be used. As the n-type impurity contained in the substrate 11, for example, S (sulfur) can be used. The substrate 11 has a higher impurity concentration than the first n-type cladding layer 12, and therefore has a higher carrier concentration than the first n-type cladding layer 12. The n-type carrier concentration of the substrate 11 is, for example, 1×10 17 cm -3 1x10 or more 19 cm -3 The substrate 11 has a first major surface 11A and a second major surface 11B.

[0024] Here, the carrier concentration refers to the concentration of carriers (holes or electrons) generated by impurities contained in a semiconductor, excluding inactivated impurities. The carrier concentration can be measured using, for example, an ECV-pro, an electrochemical capacitance-voltage (ECV) measurement device manufactured by Nanometrics.

[0025] The first n-type cladding layer 12 is disposed so as to be in contact with the second main surface 11B of the substrate 11. The first n-type cladding layer 12 is made of a III-V group compound semiconductor. InP, for example, can be used as the III-V group compound semiconductor that constitutes the first n-type cladding layer 12. The first n-type cladding layer 12 has a first main surface 12A and a second main surface 12B. For example, InP (n-InP) having n-type conductivity is used as the compound semiconductor that constitutes the first n-type cladding layer 12. S, for example, can be used as the n-type impurity contained in the first n-type cladding layer 12. The n-type carrier concentration of the first n-type cladding layer 12 is, for example, 1×1017 cm -3 1x10 or more 19 cm -3 The first n-type cladding layer 12 is in contact with the second main surface 11B of the substrate 11 at the first main surface 12A.

[0026] The active layer 20 is disposed so as to be in contact with the second major surface 12B of the first n-type cladding layer 12. The active layer 20 has a structure in which multiple element layers made of III-V group compound semiconductors are stacked. More specifically, the active layer 20 may be a SCH-MQW (Separate Confinement Heterostructure Multiple Quantum Well) including, for example, an InGaAs (indium gallium arsenide) layer and an InGaAsP (indium gallium arsenide phosphide) layer. The active layer 20 has a first major surface 20A and a second major surface 20B. The first major surface 20A of the active layer 20 is in contact with the second major surface 12B of the first n-type cladding layer 12.

[0027] The p-type cladding layer 30 has a first main surface 30A and a second main surface 30B. The p-type cladding layer 30 is disposed so that the first main surface 30A is in contact with the second main surface 20B of the active layer 20. The p-type cladding layer 30 is made of a III-V group compound semiconductor. InP, for example, can be used as the III-V group compound semiconductor constituting the p-type cladding layer 30. For example, InP (p-InP) having a p-type conductivity is used as the compound semiconductor constituting the p-type cladding layer 30. For example, Zn (zinc) can be used as the p-type impurity contained in the p-type cladding layer 30. For example, DEZn (diethyl zinc), DMZn (dimethyl zinc), or the like can be used as the source of Zn. The p-type carrier concentration of the p-type cladding layer 30 is, for example, 1×10 17 cm -3 1x10 or more 19 cm -3 The following is the result.

[0028] The high-concentration p-type semiconductor layer 41 has a first major surface 41A and a second major surface 41B. The high-concentration p-type semiconductor layer 41 is disposed so that the first major surface 41A is in contact with the second major surface 30B of the p-type cladding layer 30. The high-concentration p-type semiconductor layer 41 is made of a III-V group compound semiconductor. The high-concentration p-type semiconductor layer 41 has a p-type conductivity type due to the inclusion of a high concentration of p-type impurities. The high-concentration p-type semiconductor layer 41 contains carbon (C) as an acceptor (p-type impurity). In other words, carbon is a dopant in the high-concentration p-type semiconductor layer 41, and the concentration of carbon is, for example, 1×10 18 cm -3 The III-V group compound semiconductor (III-V group compound semiconductor in which carbon functions as an acceptor) that constitutes the high-concentration p-type semiconductor layer 41 is, for example, In X Ga 1-X In this case, the value of x can be set to 0.38 or more and 1 or less. The III-V group compound semiconductor constituting the high concentration p-type semiconductor layer 41 can be Al. X In Y Ga 1-X-Y Alternatively, aluminum indium gallium arsenide (As) may be used. In this case, the value of X may be 0 or more and 0.62 or less, and the value of Y may be 0.38 or more and 1 or less.

[0029] The high-concentration n-type semiconductor layer 42 has a first major surface 42A and a second major surface 42B. The high-concentration n-type semiconductor layer 42 is disposed so that the first major surface 42A is in contact with the second major surface 41B of the high-concentration p-type semiconductor layer 41. The high-concentration n-type semiconductor layer 42 is made of a III-V group compound semiconductor. The high-concentration n-type semiconductor layer 42 has an n-type conductivity type by containing a high concentration of n-type impurities. The III-V group compound semiconductors constituting the high-concentration n-type semiconductor layer 42 include In 1-x Ga x As y P 1-ycan be adopted. In this case, 0<x<0.3 and 0<y<1 are satisfied. In this embodiment, the high-concentration n-type semiconductor layer 42 contains a high concentration of Si (silicon) as an n-type impurity that generates electrons, which are majority carriers. Te (tellurium), S (sulfur), or the like may be adopted as the n-type impurity of the high-concentration n-type semiconductor layer 42 instead of Si (silicon). Furthermore, the high-concentration n-type semiconductor layer 42 may contain carbon diffused from the high-concentration p-type semiconductor layer 41. The carbon concentration of the high-concentration n-type semiconductor layer 42 is smaller than that of the high-concentration p-type semiconductor layer 41, and although it varies depending on the carbon concentration in the high-concentration p-type semiconductor layer 41, it is at most 1×10 19 cm -3 In the high-concentration n-type semiconductor layer 42 having the above configuration, carbon functions as a donor. That is, even if carbon, which is a dopant (acceptor) in the high-concentration p-type semiconductor layer 41, diffuses into the high-concentration n-type semiconductor layer 42, the carbon functions as a donor in the high-concentration n-type semiconductor layer 42. Therefore, the effective carrier concentration does not decrease due to impurity diffusion, and an increase in resistance can be suppressed.

[0030] In this embodiment, the p-type carrier concentration of the high-concentration p-type semiconductor layer 41 is 1×10 19 cm -3 The n-type carrier concentration of the high-concentration n-type semiconductor layer 42 is 1×10 19 cm -3 That is all. The high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 form a tunnel junction. That is, electrons in the valence band of the high-concentration p-type semiconductor layer 41 are replaced by electrons in the conduction band of the high-concentration n-type semiconductor layer 42 by the tunnel effect. The p-type carrier concentration of the high-concentration p-type semiconductor layer 41 is, for example, 1×10 20 cm -3 The n-type carrier concentration of the high-concentration n-type semiconductor layer 42 can be set to, for example, 1×10 20 cm -3 It can be as follows:

[0031] The second n-type cladding layer 50 has a first main surface 50A and a second main surface 50B. The second n-type cladding layer 50 is disposed so that the first main surface 50A is in contact with the second main surface 42B of the high-concentration n-type semiconductor layer 42. The second n-type cladding layer 50 is made of a III-V group compound semiconductor. InP, for example, can be used as the III-V group compound semiconductor constituting the second n-type cladding layer 50. For example, InP (n-InP) having n-type conductivity is used as the compound semiconductor constituting the second n-type cladding layer 50. S, for example, can be used as the n-type impurity contained in the second n-type cladding layer 50. The n-type carrier concentration of the second n-type cladding layer 50 is, for example, 1×10 17 cm -3 1x10 or more 19 cm -3 The following is the result.

[0032] The n-type contact layer 60 has a first major surface 60A and a second major surface 60B. The n-type contact layer 60 is disposed so that the first major surface 60A is in contact with the second major surface 50B of the second n-type cladding layer 50. The n-type contact layer 60 is made of a III-V group compound semiconductor. InP, for example, can be used as the III-V group compound semiconductor constituting the n-type contact layer 60. For example, InP (n-InP) having n-type conductivity is used as the compound semiconductor constituting the n-type contact layer 60. As the n-type impurity contained in the n-type contact layer 60, for example, S or the like can be used. The n-type contact layer 60 has a higher impurity concentration than the second n-type cladding layer 50, and therefore a higher carrier concentration than the second n-type cladding layer 50. The n-type carrier concentration of the n-type contact layer 60 is, for example, 1×10 18 cm -3 1x10 or more 20 cm -3 The following is the result.

[0033] The semiconductor laminate 1 of this embodiment includes a high-concentration p-type semiconductor layer 41 and a high-concentration n-type semiconductor layer 42 that form a tunnel junction. This allows the region located on the opposite side of the active layer 20 from the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 to be composed of a second n-type cladding layer 50 and an n-type contact layer 60, which are n-type semiconductor layers. In general, n-type semiconductor layers tend to have lower contact resistance with an electrode than p-type semiconductor layers. Furthermore, n-type semiconductor layers tend to absorb less light than p-type semiconductor layers. Therefore, for example, by forming an electrode in contact with the n-type contact layer 60 of the semiconductor laminate 1 of this embodiment to fabricate a semiconductor laser, which is an optical semiconductor device, a highly efficient semiconductor laser can be obtained.

[0034] Furthermore, in the semiconductor stack 1 of this embodiment, when carbon contained as an acceptor in the high-concentration p-type semiconductor layer 41 diffuses into the high-concentration n-type semiconductor layer 42, it functions as a donor in the high-concentration n-type semiconductor layer 42. In other words, the carbon diffused into the high-concentration n-type semiconductor layer 42 generates electrons, which are majority carriers in the high-concentration n-type semiconductor layer 42. Therefore, according to the semiconductor stack 1 of this embodiment, it is possible to suppress an increase in resistance caused by mutual diffusion of impurities between the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42.

[0035] Next, a semiconductor laser, which is a semiconductor light-emitting element, will be described as an example of an optical semiconductor element that can be fabricated using the semiconductor laminate 1. Referring to Fig. 2, the semiconductor laser 100 of this embodiment is fabricated using the semiconductor laminate 1 of this embodiment, and includes a substrate 11, a first n-type cladding layer 12, an active layer 20, a p-type cladding layer 30, a high-concentration p-type semiconductor layer 41, a high-concentration n-type semiconductor layer 42, a second n-type cladding layer 50, and an n-type contact layer 60.

[0036] The semiconductor laser 100 further includes an insulating film 70, a first electrode 81, and a second electrode 82. The insulating film 70 is disposed so as to be in contact with the second main surface 60B of the n-type contact layer 60. The insulating film 70 is made of an insulator such as silicon nitride or silicon oxide. The insulating film 70 has a first main surface 70A and a second main surface 70B. An opening 70C is formed in the insulating film 70, penetrating the insulating film 70 in the thickness direction.

[0037] The first electrode 81 is disposed so as to be in contact with the second major surface 70B of the insulating film 70. The first electrode 81 is made of a conductor such as a metal. More specifically, the first electrode 81 may be made of a metal layer, for example, in which a Ti (titanium) layer, a Pt (platinum) layer, and an Au (gold) layer are stacked in this order. The first electrode 81 fills the opening 70C formed in the insulating film 70. As a result, the first electrode 81 is in contact with the second major surface 60B of the n-type contact layer 60 exposed in the opening 70C. The first electrode 81 is in ohmic contact with the n-type contact layer 60.

[0038] The second electrode 82 is disposed so as to be in contact with the first main surface 11A of the substrate 11. The second electrode 82 is made of a conductor such as a metal. More specifically, the second electrode 82 may be made of a metal layer in which a Ti layer, a Pt layer, and an Au layer are stacked in this order, for example. The second electrode 82 is in ohmic contact with the substrate 11. The semiconductor laser 100 is an edge-emitting laser diode having a Fabry-Perot structure.

[0039] When a voltage is applied between the first electrode 81 and the second electrode 82, a current flows between the first electrode 81 and the second electrode 82. At this time, holes are injected into the active layer 20 from the first electrode 81 side, and electrons are injected into the active layer 20 from the second electrode 82 side. The holes and electrons then recombine in the active layer 20, generating light. The generated light is confined in the thickness direction of the active layer 20, sandwiched between the first n-type cladding layer 12 and the p-type cladding layer 30. This light is repeatedly reflected between the end faces of the active layer 20. As a result, the light with a coherent phase is amplified, achieving laser oscillation. Laser light is then emitted along the arrow α.

[0040] The semiconductor laser 100 of this embodiment includes the semiconductor laminate 1 of this embodiment. Therefore, the semiconductor laser 100 includes the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 that form a tunnel junction, and an increase in resistance due to mutual diffusion of impurities between the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 is suppressed, thereby making the semiconductor laser 100 a highly efficient optical semiconductor element.

[0041] In the semiconductor laser 100 of this embodiment, the composition wavelengths of the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 are preferably shorter than the emission wavelength of the semiconductor laser 100. This configuration can prevent light generated in the active layer 20 from being absorbed by the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42. As a result, the efficiency of the semiconductor laser 100 can be further improved.

[0042] Next, an outline of a method for manufacturing the semiconductor laminate 1 and the semiconductor laser 100 according to this embodiment will be described with reference to FIGS.

[0043] 3, in the method for manufacturing the semiconductor laminate 1 and the semiconductor laser 100 according to the present embodiment, a substrate preparation step is first performed as step S10. In step S10, referring to FIG. 1, a substrate 11 made of InP having an n-type conductivity is prepared. More specifically, an InP ingot is sliced ​​to obtain the substrate 11. After the surface of the substrate 11 is polished, the substrate 11 is prepared by processes such as cleaning, ensuring flatness and cleanliness of the second main surface 11B.

[0044] Next, a first n-type cladding layer formation step is performed as step S20. In this step S20, a first n-type cladding layer 12 made of, for example, n-InP, a III-V group compound semiconductor, is formed by vapor phase epitaxy (e.g., metalorganic vapor phase epitaxy) so as to be in contact with the second main surface 11B of the substrate 11. In forming the first n-type cladding layer 12, for example, TMIn (trimethylindium) can be used as an In source. For example, TBP (tertiarybutylphosphine) can be used as a P source.

[0045] Next, a quantum well structure formation step is performed in step S30. In this step S30, an active layer 20, which is an SCH-MQW structure including, for example, an InGaAs layer and an InGaAsP layer, is formed by vapor phase epitaxy so as to be in contact with the second main surface 12B of the first n-type cladding layer 12. In forming the active layer 20, for example, TMIn can be used as an In source material. For example, TEGa (triethylgallium) can be used as a Ga source material. For example, TBAs (tertiarybutylarsine) can be used as a As source material. For example, TBP (tertiarybutylphosphine) can be used as a P source material.

[0046] Next, a p-type cladding layer formation step is performed as step S40. In this step S40, p-type cladding layer 30 is formed by vapor phase growth so as to be in contact with second main surface 20B of active layer 20. In forming p-type cladding layer 30, TMIn, for example, can be used as an In source. TBP, for example, can be used as a P source.

[0047] Next, in step S50, a high-concentration p-type semiconductor layer forming step is performed. In step S50, a high-concentration p-type semiconductor layer, for example, In, is formed in contact with the second main surface 30B of the p-type cladding layer 30. X Ga 1-X A high-concentration p-type semiconductor layer 41 made of As is formed. In forming the high-concentration p-type semiconductor layer 41, for example, TMIn can be used as a source of In. For example, TEGa can be used as a source of Ga. For example, TBAs can be used as a source of As. Furthermore, for example, CBr can be used as a source of carbon as a p-type impurity. 4 (carbon tetrabromide) can be used.

[0048] Next, a high-concentration n-type semiconductor layer forming step is performed as step S60. In step S60, In is formed on the second main surface 41B of the high-concentration p-type semiconductor layer 41. 1-x Ga x As y P 1-y(0<x<0.3 and 0<y<1) is formed. In forming the high-concentration n-type semiconductor layer 42, TMIn, for example, can be used as the source of In. TEGa, for example, can be used as the source of Ga. TBAs, for example, can be used as the source of As. TBP (tertiary butyl phosphine), for example, can be used as the source of P. Furthermore, SiH, for example, can be used as the source of Si as an n-type impurity. 4 (silane), TeESi (tetraethylsilane), etc. can be used.

[0049] Next, a second n-type cladding layer formation step is performed as step S70. In this step S70, the second n-type cladding layer 50 is formed by vapor phase growth so as to be in contact with the second main surface 42B of the high-concentration n-type semiconductor layer 42. In forming the second n-type cladding layer 50, for example, TMIn can be used as an In source material. For example, TBP can be used as a P source material.

[0050] Next, an n-type contact layer formation step is performed as step S80. In this step S80, the n-type contact layer 60 is formed by vapor phase growth so as to be in contact with the second main surface 50B of the second n-type cladding layer 50. In forming the n-type contact layer 60, for example, TMIn can be used as a source of In. For example, TBP can be used as a source of P. By performing the above steps S10 to S80, the semiconductor laminate 1 of this embodiment is completed.

[0051] Furthermore, by carrying out the following steps, a semiconductor laser 100 can be fabricated using the semiconductor laminate 1. Referring to Fig. 3, an insulating film forming step is carried out as step S90 on the semiconductor laminate 1 obtained by carrying out steps S10 to S80. In this step S90, referring to Fig. 2, an insulating film 70 is formed on the second main surface 60B of the n-type contact layer 60. Specifically, the insulating film 70 made of an insulator such as silicon oxide or silicon nitride is formed by, for example, CVD (Chemical Vapor Deposition).

[0052] Next, an electrode formation step is performed as step S100. In this step S100, referring to FIG. 2, a first electrode 81 and a second electrode 82 are formed on the semiconductor stack 1 on which the insulating film 70 has been formed. Specifically, referring to FIG. 2, a mask having an opening over a region where the opening 70C of the insulating film 70 will be formed is first formed on the insulating film 70. Then, the opening 70C is formed in the insulating film 70 using the mask. Thereafter, the first electrode 81 and the second electrode 82 made of an appropriate conductor are formed by, for example, a vapor deposition method. Through the above steps, the semiconductor laser 100 of this embodiment is completed. Thereafter, the semiconductor laser 100 is separated into individual elements by, for example, dicing.

[0053] In the manufacturing method of the semiconductor laminate 1 of the above embodiment, the case where each semiconductor layer is formed by a vapor phase epitaxy method such as metal organic chemical vapor deposition has been described, but the formation of each semiconductor layer may also be achieved by, for example, an MBE (Molecular Beam Epitaxy) method.

[0054] Furthermore, in the above embodiment, the case where the high-concentration n-type semiconductor layer 42 contains Si (silicon), Te (tellurium), or S (sulfur) as a donor has been described. However, in another embodiment, C (carbon) may be used as the donor instead. That is, carbon may be the dopant of the high-concentration n-type semiconductor layer 42. By adopting this embodiment, the carbon contained as a donor in the high-concentration n-type semiconductor layer 42 functions as an acceptor in the high-concentration p-type semiconductor layer 41 when it diffuses into the high-concentration p-type semiconductor layer 41. Therefore, an increase in resistance due to interdiffusion of impurities between the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 can be further suppressed. As such, the semiconductor stack 1 of this embodiment includes the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 that form a tunnel junction, and an increase in resistance due to interdiffusion of impurities between the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42 is suppressed. As a result, the semiconductor laminate 1 of this embodiment is a semiconductor laminate that can contribute to improving the efficiency of semiconductor elements.

[0055] In the above embodiment, the carrier concentration of the high-concentration p-type semiconductor layer 41 and the high-concentration n-type semiconductor layer 42, which correspond to the first p-type semiconductor layer and the first n-type semiconductor layer of the present disclosure, respectively, is 1×10 19 cm -3 Although the above case has been described, the carrier concentrations of the first p-type semiconductor layer and the first n-type semiconductor layer are not limited to this range. For example, the carrier concentrations of the first p-type semiconductor layer and the first n-type semiconductor layer may be 1×10 16 cm -3 1x10 or more 19 cm -3 The carrier concentration of the first p-type semiconductor layer and the first n-type semiconductor layer may be 1×10 or less. 18 cm -3 In the pn junction described above, the mutual diffusion of impurities has a large effect on the resistance, and therefore, the use of the first p-type semiconductor layer and the first n-type semiconductor layer having the features of the present disclosure is highly effective.

[0056] In the above embodiment, a laser diode (semiconductor laser) is exemplified as the optical semiconductor element of the present disclosure, and a semiconductor laminate suitable for fabricating a laser diode is exemplified, but the optical semiconductor element of the present disclosure is not limited to a laser diode. The optical semiconductor element of the present disclosure may be, for example, an LED (Light Emitting Diode) or a solar cell.

[0057] It should be understood that the embodiments disclosed herein are illustrative in all respects and are not limiting in any respect. The scope of the present invention is defined not by the above description but by the claims, and it is intended to include all modifications within the meaning and scope of the claims.

[0058] 1 semiconductor laminate, 11 substrate, 11A first main surface, 11B second main surface, 12 first n-type cladding layer (second n-type semiconductor layer), 12A first main surface, 12B second main surface, 20 active layer, 20A first main surface, 20B second main surface, 30 p-type cladding layer (second p-type semiconductor layer), 30A first main surface, 30B second main surface, 41 high-concentration p-type semiconductor layer (first p-type semiconductor layer), 41A first main surface, 41B second main surface, 42 high-concentration n-type semiconductor layer (first n-type semiconductor layer), 42A first main surface, 42B second main surface, 50 second n-type cladding layer (third n-type semiconductor layer), 50A first main surface, 50B second main surface, 60 n-type contact layer (third n-type semiconductor layer), 60A first main surface, 60B second main surface, 70 Insulating film, 70A first main surface, 70B second main surface, 70C opening, 81 first electrode (electrode), 82 second electrode, 100 semiconductor laser (optical semiconductor element), S10 to S100 steps, α arrow.

Claims

1. a first p-type semiconductor layer made of a III-V group compound semiconductor and having a p-type conductivity; a first n-type semiconductor layer that is stacked on the first p-type semiconductor layer so as to be in contact with the first p-type semiconductor layer, that is made of a III-V group compound semiconductor, and that has an n-type conductivity; the first p-type semiconductor layer contains carbon as an acceptor, In the first n-type semiconductor layer, carbon functions as a donor, The semiconductor laminate, wherein the first n-type semiconductor layer contains carbon as a donor that generates carriers at a concentration of 1×10 18 cm −3 or more.

2. The first n-type semiconductor layer is In 1-x Ga x As y P 1-y 2. The semiconductor laminate according to claim 1, wherein 0<x<0.3 and 0<y<1 are satisfied.

3. The carrier concentration of the first p-type semiconductor layer is 1×10 18 cm -3 The semiconductor laminate according to claim 1 or 2, wherein:

4. The carrier concentration of the first n-type semiconductor layer is 1×10 19 cm -3 That's all, The carrier concentration of the first p-type semiconductor layer is 1×10 19 cm -3 That's all, 3. The semiconductor laminate according to claim 1, wherein the first n-type semiconductor layer and the first p-type semiconductor layer form a tunnel junction.

5. The semiconductor laminate is a second n-type semiconductor layer made of a III-V group compound semiconductor and having an n-type conductivity; an active layer made of a III-V group compound semiconductor; a second p-type semiconductor layer made of a III-V group compound semiconductor and having a p-type conductivity; a third n-type semiconductor layer made of a III-V group compound semiconductor and having an n-type conductivity; 5. The semiconductor laminate according to claim 4, wherein the second n-type semiconductor layer, the active layer, the second p-type semiconductor layer, the first p-type semiconductor layer, the first n-type semiconductor layer, and the third n-type semiconductor layer are laminated in this order.

6. The semiconductor laminate according to claim 5 ; an electrode disposed on the third n-type semiconductor layer.

7. 7. The optical semiconductor element according to claim 6, wherein the composition wavelengths of the first n-type semiconductor layer and the first p-type semiconductor layer are shorter than the emission wavelength of the optical semiconductor element.