Multilayer ceramic capacitor

Abstract

The purpose of the present invention is to provide a low-capacitance multilayer ceramic capacitor that can be easily set to a desired capacitance.　A multilayer ceramic capacitor 1 comprises: a multilayer body 2 that comprises dielectric layers 14 and internal electrode layers 15, which are alternately stacked, and has two main surfaces A that are on opposite sides from each other in the stacking direction T, two end surfaces C that are on opposite sides from each other in the length direction L which is orthogonal to the stacking direction T, and two side surfaces B that are on opposite sides from each other in the width direction W which is orthogonal to both the stacking direction T and the length direction L; and a first external electrode 3A and a second external electrode 3B. The distance between the side surfaces B is set shorter than the distance between the end surfaces C. The first external electrode 3A and the second external electrode 3B are respectively disposed on a first end surface CA and a second end surface CB. A plurality of internal electrode layers 15 are provided. The plurality of internal electrode layers 15 are connected to neither the first external electrode 3A nor the second external electrode 3B.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] Conventionally, multilayer ceramic capacitors aimed at reducing capacitance have been proposed. Patent Document 1 describes a multilayer ceramic capacitor in which one internal electrode is provided inside a dielectric, and the internal electrode and the external electrode are not connected.

[0003] Japanese Patent Application Publication No. 8-45776

[0004] However, with a single internal electrode, the influence of manufacturing errors is large, and it may be difficult to set the desired capacitance.

[0005] An object of the present invention is to provide a low-capacitance multilayer ceramic capacitor that allows a desired capacitance to be easily set.

[0006] In order to solve the above-mentioned problems, the present invention provides a multilayer ceramic capacitor comprising: a laminate including alternately stacked dielectric layers and internal electrode layers, the laminate having two main surfaces facing each other in a stacking direction, two end faces facing each other in a length direction perpendicular to the stacking direction, and two side surfaces facing each other in a width direction perpendicular to both the stacking direction and the length direction; and first external electrodes and second external electrodes, wherein the distance between the two side surfaces is set shorter than the distance between the two end faces, the first external electrode and the second external electrode are respectively disposed on the two end faces or on the two side surfaces, and a plurality of the internal electrode layers are provided, and some or all of the plurality of internal electrode layers are not connected to either the first external electrode or the second external electrode.

[0007] According to the present invention, it is possible to provide a low-capacitance multilayer ceramic capacitor that allows a desired capacitance to be easily set.

[0008] 1 is a perspective view showing a multilayer ceramic capacitor 1 according to an embodiment of the present invention. FIG. 1 is a cross-sectional view taken along line II of the multilayer ceramic capacitor shown in FIG. 1. FIG. 2 is a cross-sectional view taken along line II-II of the multilayer ceramic capacitor shown in FIG. 1. FIG. 3 is a cross-sectional view taken along line VI-VI of the multilayer ceramic capacitor shown in FIG. 4. FIG. 4 is a cross-sectional view taken along line VI-VI of the multilayer ceramic capacitor shown in FIG. 2. FIG. 5 is a view corresponding to FIG. 2 showing a multilayer ceramic capacitor according to a second modified embodiment of the present invention. FIG. 6 is a view corresponding to FIG. 3 showing a multilayer ceramic capacitor according to a modified version of the second modified embodiment of the present invention. FIG. 7 is a view corresponding to FIG. 2 showing a multilayer ceramic capacitor according to a third modified embodiment of the present invention. FIG. 8 is a view corresponding to FIG. 2 showing a multilayer ceramic capacitor according to a modified version of the third modified embodiment of the present invention. FIG. 9 is a view corresponding to FIG. 2 showing a multilayer ceramic capacitor according to a modified version of the third modified embodiment of the present invention. FIG. 10 is a view corresponding to FIG. 2 showing a multilayer ceramic capacitor according to a fourth modified embodiment of the present invention.

[0009] An example of an embodiment of the present invention will be described below with reference to the accompanying drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0010] (Structure of Multilayer Ceramic Capacitor 1) The structure of a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described below with reference to Figs. 1 to 3. Fig. 1 is a perspective view showing the multilayer ceramic capacitor 1 of this embodiment. Fig. 2 is a cross-sectional view of the multilayer ceramic capacitor shown in Fig. 1 taken along line II. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor shown in Fig. 1 taken along line II-II.

[0011] The multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2, a first external electrode 3A, and a second external electrode 3B. The laminate 2 includes an inner layer portion 11 (described in detail below) that includes multiple pairs of alternately stacked dielectric layers 14 and internal electrode layers 15. The first external electrode 3A and the second external electrode 3B may be collectively referred to as "external electrodes 3."

[0012] In the following description, the direction in which the dielectric layers 14 and the internal electrode layers 15 are stacked in the multilayer ceramic capacitor 1 (inner layer portion 11) will be referred to as the stacking direction T. A direction perpendicular to the stacking direction T will be referred to as the length direction L. A direction perpendicular to both the length direction L and the stacking direction T will be referred to as the width direction W. For this reason, the cross section shown in FIG. 2 will also be referred to as the LT cross section, and the cross section shown in FIG. 3 will also be referred to as the LW cross section.

[0013] As will be described in more detail below, the first external electrode 3A and the second external electrode 3B face each other in the longitudinal direction L. In this case, the longitudinal direction L is the electrode facing direction in which the first external electrode 3A and the second external electrode 3B face each other. The LT cross section of the laminate 2 is a cross section of the laminate taken along the stacking direction T and the electrode facing direction.

[0014] (Laminate 2) The laminate 2 has a substantially rectangular parallelepiped shape. In the following description, of the six outer peripheral surfaces of the laminate 2, a pair of outer surfaces facing each other in the stacking direction T will be referred to as two main surfaces A, a pair of outer surfaces facing each other in the width direction W will be referred to as two side surfaces B, and a pair of outer surfaces facing each other in the length direction L will be referred to as two end surfaces C. Of the two main surfaces A, one will be referred to as a first main surface AA, and the other will be referred to as a second main surface AB. Of the two end surfaces C, one will be referred to as a first end surface CA, and the other will be referred to as a second end surface CB. When it is not necessary to particularly distinguish between the first main surface AA and the second main surface AB, they will be collectively referred to as the main surface A. When it is not necessary to particularly distinguish between the first end surface CA and the second end surface CB, they will be collectively referred to as the end surface C.

[0015] The distance between the first side surface BA and the second side surface BB is set to be shorter than the distance between the first end surface CA and the second end surface CB.

[0016] (Laminate Body 10 ) The laminate 2 includes a laminate body 10 and a pair of side margin portions 20 .

[0017] The laminate body 10 includes an inner layer portion 11 and a pair of outer layer portions 12 .

[0018] (Inner Layer Portion 11) The inner layer portion 11 includes a plurality of pairs of dielectric layers 14 and internal electrode layers 15 alternately stacked along the stacking direction T.

[0019] (Dielectric Layer 14) Each dielectric layer 14 is primarily composed of a ceramic material containing at least one of Ca, Zr, and Ti. Specifically, the primary component is, for example, a ceramic material having a perovskite structure represented by the general formula ABO3 containing Ca and Zr. Examples of ceramic materials having such a perovskite structure include, but are not limited to, CaZrO3 (calcium zirconate) and TiO2 (titanium oxide). The primary component of the ceramic material forming each dielectric layer 14 may also include all of Ca, Zr, and Ti. Alternatively, a material such as Ca(Zr0.9Ti0.1)O3, in which part of ZrO3 or Zr in CaZrO3 is replaced with Ti, may be used.

[0020] Each dielectric layer 14 preferably contains Ca, Sr, Ti, and Zr. Each dielectric layer 14 preferably contains Ca and Sr such that the total amount of Ca and Sr is 60 moles or more and 110 moles or less when Zr is 100 moles, and contains Ti at most 20 moles.

[0021] The ceramic material for forming each dielectric layer 14 may be (Ca1-x-y, Srx, Bay)m(Zr1-z-α, Tiz, Hfα)O3 (where x is 0 or more and 1 or less, y is 0 or more and 0.4 or less, m is 0.9 or more and 1.1 or less, z is 0 or more and 0.2 or less, and α is 0 or more and 0.3 or less), or the like.

[0022] Depending on the purpose, additives may be added to the ceramic material forming each dielectric layer 14. Examples of such additives include oxides of rare earth elements such as Mn, Mg, Dy, and Cr, or V, Sm, Eu, Gd, Tb, Ho, Er, Tm, Yb, and Y, or oxides of Co, Ni, Li, B, Na, K, and Si, or glass.

[0023] The material of each dielectric layer 14 may be a ceramic material containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3. Furthermore, a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound may be added to the ceramic material as a secondary component.

[0024] The thickness of each dielectric layer 14 is not particularly limited, but is preferably 50 μm or less, for example. The total number of dielectric layers 5, including each outer layer portion 12 (described in detail later), is preferably 2 to 15.

[0025] (Internal electrode layer 15) In the LT cross section shown in Fig. 2, each internal electrode layer 15 has a first external electrode side end 151 which is the end on the first external electrode 3A side, and a second external electrode side end 152 which is the end on the second external electrode 3B side. Note that the position in the width direction W of the LT cross section in Fig. 2 is merely an example, and the position in the width direction W of the LT cross section can be arbitrary. When each internal electrode layer 15 is included in the LT cross section, each internal electrode layer 15 has a first external electrode side end and a second external electrode side end at each position in the width direction W of the LT cross section.

[0026] The internal electrode layers 15 face each other in the stacking direction T via the dielectric layer 14. The first external electrode side end 151 and the second external electrode side end 152 are exposed at each end of the internal layer portion 11 in the length direction L. Note that the ends of the internal electrode layers 15 in the width direction W are not exposed from the ends of the internal layer portion 11 in the width direction W (see FIG. 3). The electrode areas of the internal electrode layers 15 are all the same.

[0027] Each internal electrode layer 15 is a conductive thin film containing a metal such as Ni, Cu, Ag, Pd, an alloy of Ag and Pd, or Au. To improve the frequency characteristics of the multilayer ceramic capacitor 1, it is preferable to use Cu for each internal electrode layer 15. Each internal electrode layer 15 may further contain dielectric particles having the same composition as the ceramic contained in each dielectric layer 14.

[0028] Each internal electrode layer 15 may contain, for example, metallic Ni as a main component. Also, each internal electrode layer 15 may contain, for example, at least one selected from metals such as Cu, Ag, Pd, or Au, or alloys containing at least one of these metals, such as an Ag-Pd alloy, as a main component. Also, each internal electrode layer 15 may contain these materials as components other than the main component.

[0029] Furthermore, each internal electrode layer 15 may contain, as a component other than the main component, particles of a dielectric material having the same composition as the ceramic contained in the dielectric layer 14. In this specification, the main component metal is defined as the metal component with the highest mass percentage.

[0030] The thickness of each internal electrode layer 15 is preferably 1.0 μm or more and 3.0 μm or less, and the total number of internal electrode layers 15 is preferably 2 or more and 10 or less.

[0031] (Outer layer portions 12) The outer layer portions 12 are disposed on either side of the inner layer portion 11 in the stacking direction T. Each outer layer portion 12 is made of the same dielectric ceramic material as the dielectric layer 14. The thickness of each outer layer portion 12 is preferably 20 μm or more and 150 μm or less.

[0032] (Side margin portions 20) The side margin portions 20 are arranged on either side of the laminate body 10 in the longitudinal direction L. Each side margin portion 20 covers the end portion of each internal electrode layer 15 in the width direction W. Each side margin portion 20 is made of the same dielectric ceramic material as the dielectric layer 14. The thickness of each side margin portion 20 is preferably 10 μm or more and 100 μm or less.

[0033] (External electrode 3) The first external electrode 3A is disposed on the first end face CA. The first external electrode 3A extends from the first end face CA to a portion of the first principal face AA, a portion of the second principal face AB, a portion of the first side face BA, and a portion of the second side face BB. Of the first external electrode 3A, the portion disposed on the first end face CA is referred to as a first end face electrode portion 3Aa, the portion disposed on the first principal face AA is referred to as a first principal face electrode portion 3Ab, and the portion disposed on the second principal face AB is referred to as a second principal face electrode portion 3Ac.

[0034] The second external electrode 3B is disposed on the second end face CB. The second external electrode 3B extends from the second end face CB to a portion of the first principal face AA, a portion of the second principal face AB, a portion of the first side face BA, and a portion of the second side face BB. Of the second external electrode 3B, the portion disposed on the second end face CB is referred to as a second end face electrode portion 3Ba, the portion disposed on the first principal face AA is referred to as a first principal face electrode portion 3Bb, and the portion disposed on the second principal face AB is referred to as a second principal face electrode portion 3Bc.

[0035] Hereinafter, the first end surface electrode portion 3Aa and the second end surface electrode portion 3Ba may be collectively referred to as "each end surface electrode portion 3a." The first principal surface electrode portion 3Ab of the first external electrode 3A and the first principal surface electrode portion 3Bb of the second external electrode 3B may be collectively referred to as "each first principal surface electrode portion 3b." The second principal surface electrode portion 3Ac of the first external electrode 3A and the second principal surface electrode portion 3Bc of the second external electrode 3B may be collectively referred to as "each second principal surface electrode portion 3c."

[0036] Although not shown, each external electrode 3 has, for example, a base electrode layer, an inner plating layer, and a surface plating layer. The base electrode layer is formed, for example, by applying and baking a conductive paste containing a conductive metal and glass. The conductive metal of the base electrode layer is, for example, Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, etc. The inner plating layer is, for example, a Ni plating layer. The surface plating layer is, for example, a Sn plating layer. The inner plating layer and outer plating layer can be formed, for example, by electrolytic plating or electroless plating.

[0037] It is preferable that the dimensions of the multilayer ceramic capacitor 1 including the laminate 2 and the external electrodes 40 are such that the dimension in the length direction L is 0.02 mm or more and 0.65 mm or less, and the dimensions in the stacking direction T and the width direction W are each 0.10 mm or more and 0.35 mm or less.

[0038] Here, each internal electrode layer 15 is not connected to either the first external electrode 3A or the second external electrode 3B (see FIG. 2), which allows the capacitance of the multilayer ceramic capacitor 1 to be reduced.

[0039] Of the first external electrode side ends 151, the separation distance in the electrode opposing direction (length direction L) between the first external electrode side end 151 closest to the first external electrode 3A and the first external electrode side end 151 farthest from the first external electrode 3A is preferably within 5 μm. Of the second external electrode side ends 152, the separation distance in the length direction L between the second external electrode side end 152 closest to the second external electrode 3B and the second external electrode side end 152 farthest from the second external electrode 3B is preferably within 5 μm. In this case, the separation distance between the internal electrode layer 15 and the first external electrode 3A is approximately the same for all internal electrode layers 15. The separation distance between the internal electrode layer 15 and the second external electrode 3B is approximately the same for all internal electrode layers 15. This makes it easy to set the capacitance of the multilayer ceramic capacitor 1.

[0040] The distance between each internal electrode layer 15 and the first external electrode 3A in the length direction L is preferably 10 μm to 200 μm, and more preferably 50 μm to 200 μm. The distance between each internal electrode layer 15 and the second external electrode 3B in the length direction L is preferably 10 μm to 200 μm, and more preferably 50 μm to 200 μm.

[0041] The distance between each internal electrode layer 15 and the first external electrode 3A in the width direction W is preferably 10 μm to 100 μm, more preferably 50 μm to 100 μm, on both the first side face BA side and the second side face BB side. The distance between each internal electrode layer 15 and the second external electrode 3B in the width direction W is preferably 10 μm to 100 μm, more preferably 50 μm to 100 μm, on both the first side face BA side and the second side face BB side.

[0042] Each internal electrode layer 15 does not face each first principal surface electrode portion 3b in the stacking direction T. Each internal electrode layer 15 does not face each second principal surface electrode portion 3c in the stacking direction T.

[0043] (Method for Manufacturing Multilayer Ceramic Capacitor) Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described.

[0044] First, ceramic green sheets for lamination are prepared by forming ceramic slurry into sheets. The ceramic green sheets for lamination contain ceramic raw materials including a dielectric ceramic material, a binder, and a solvent. Additives including rare earth elements may be added to the ceramic raw materials.

[0045] A conductive paste that will become the internal electrode layers is printed on the multilayer ceramic green sheets. The conductive paste is printed on the surfaces of the multilayer ceramic green sheets so that multiple stripes are aligned in the width direction of the stripes. The conductive paste can be printed by, for example, screen printing or gravure printing.

[0046] A predetermined number of ceramic green sheets that have not been printed with a conductive paste are stacked. Next, a predetermined number of ceramic green sheets that have been printed with a conductive paste are stacked. Next, a predetermined number of ceramic green sheets that have not been printed with a conductive paste are stacked. This produces a mother laminate.

[0047] The mother laminate is pressed. Methods that can be used to press the mother laminate include, for example, a rigid press and an isostatic press.

[0048] The pressed mother laminate is cut into chip shapes. Methods that can be used to cut the mother laminate include, for example, press cutting, dicing, and laser cutting. The mother laminate is cut in the lamination direction T along the length of the stripes of conductive paste; more specifically, the mother laminate is cut at positions where no conductive paste is disposed. This prevents the conductive paste from being exposed on the cut surfaces of the mother laminate created by the cutting.

[0049] The mother laminate is cut in the lamination direction T along a direction perpendicular to the length direction of the conductive paste stripes. The conductive paste is exposed at the cut surface of the mother laminate created by this cutting, and more specifically, the cut surface and the end of each conductive paste on the cut surface side are approximately flush with each other. This makes it easy to align the positions of the end of each internal electrode layer 15 in the length direction L. In this way, the laminate body 10 is obtained.

[0050] Ceramic green sheets for side margins are attached to the laminate body 10. The ceramic green sheets for side margins are attached to each cut surface where the conductive paste is exposed. This forms side margin portions 20 in the laminate body 10. In this way, the laminate 2 is obtained.

[0051] The laminate 2 is preferably subjected to barrel polishing or the like, so that the corners and ridges of the laminate 2 are rounded.

[0052] The laminate 2 is degreased in a nitrogen atmosphere. Then, the laminate 2 is fired in a mixed atmosphere of nitrogen, hydrogen, and water vapor. The temperature at which the laminate 2 is fired is preferably, for example, 900° C. or higher and 1300° C. or lower.

[0053] Next, each external electrode 3 is formed on the laminate 2. For example, a base electrode layer, an inner plating layer, and an outer plating layer are formed in this order on each end surface C of the laminate 2. Each layer is formed, for example, by the method described above.

[0054] In this manner, the multilayer ceramic capacitor 1 can be obtained.

[0055] (Effects) According to the above embodiment, the following effects can be obtained.

[0056] According to the above embodiment, the entire internal electrode layer 15 is not connected to either the first external electrode 3A or the second external electrode 3B, which allows the capacitance of the multilayer ceramic capacitor 1 to be reduced.

[0057] According to the above embodiment, the multilayer ceramic capacitor 1 is provided with a plurality of internal electrode layers 15. As a result, the area of ​​the portion where each external electrode 3 faces the internal electrode layer 15 is determined depending on the number of internal electrode layers 15, and therefore, the capacitance of the multilayer ceramic capacitor 1 can be easily adjusted by adjusting the number of internal electrode layers 15.

[0058] Therefore, it is possible to provide a low-capacitance multilayer ceramic capacitor that allows a desired capacitance to be easily set.

[0059] Furthermore, since the multilayer ceramic capacitor 1 is provided with a plurality of internal electrode layers 15, the ESR can be reduced.

[0060] According to the above embodiment, the separation distance in the electrode opposing direction (length direction L) between the first external electrode side end 151 closest to the first external electrode 3A side end and the first external electrode side end 151 farthest from the first external electrode 3A, among the respective first external electrode side end portions 151, is preferably 5 μm or less. The separation distance in the length direction L between the second external electrode side end 152 closest to the second external electrode 3B and the second external electrode side end 152 farthest from the second external electrode 3B, among the respective second external electrode side end portions 152, is preferably 5 μm or less. In this case, the separation distance between the internal electrode layer 15 and the first external electrode 3A is approximately the same for all internal electrode layers 15. The separation distance between the internal electrode layer 15 and the second external electrode 3B is approximately the same for all internal electrode layers 15. This makes it easy to set the capacitance of the multilayer ceramic capacitor 1.

[0061] According to the above embodiment, each dielectric layer 14 contains Ca, Sr, Ti, and Zr, thereby providing a multilayer ceramic capacitor with a small rate of change in capacitance with respect to temperature.

[0062] According to the above embodiment, each internal electrode layer 15 contains Cu as a main component, thereby providing a multilayer ceramic capacitor with a small rate of change in capacitance with respect to temperature.

[0063] Modified Embodiments Next, multilayer ceramic capacitors according to various modified embodiments of the present invention will be described. The description will focus on differences from the multilayer ceramic capacitor 1 according to the embodiment, and the same components as those in the multilayer ceramic capacitor 1 according to the embodiment will be denoted by the same reference numerals and description thereof will be omitted.

[0064] (First Modified Embodiment) A multilayer ceramic capacitor 100 according to a first modified embodiment of the present invention will be described with reference to Fig. 4 to Fig. 6. Fig. 4 is a perspective view showing the multilayer ceramic capacitor 100 according to the first modified embodiment of the present invention. Fig. 5 is a cross-sectional view of the multilayer ceramic capacitor shown in Fig. 4 taken along line V-V. Fig. 6 is a cross-sectional view of the multilayer ceramic capacitor shown in Fig. 4 taken along line VI-VI.

[0065] The multilayer ceramic capacitor 100 includes a laminate 102, a first external electrode 103A, and a second external electrode 103B.

[0066] In the inner layer portion 111 of the laminate 102, the internal electrode layers 115 are exposed on each outer surface facing the width direction W, and more specifically, each outer surface is substantially flush with each end of each internal electrode layer 115 in the width direction W. In the inner layer portion 111, the internal electrode layers 115 are not exposed on each outer surface facing the length direction L.

[0067] In the laminate 102, side margin portions 120 are arranged to sandwich the laminate body 110 in the width direction W. Note that, like the laminate 2 of the above embodiment, the dimension of the laminate 102 in the length direction L is larger than the dimension in the width direction W.

[0068] The first external electrode 103A is provided on the first side surface BA. The first external electrode 103A extends to a portion of the first principal surface AA, a portion of the second principal surface AB, a portion of the first end surface CA, and a portion of the second end surface CB. The portion of the first external electrode 103A located on the first principal surface AA is referred to as the first principal surface electrode portion 103Ab, and the portion located on the second principal surface AB is referred to as the second principal surface electrode portion 103Ac.

[0069] The second external electrode 103B is provided on the second side surface BB. The second external electrode 103B extends to a part of the first principal surface AA, a part of the second principal surface AB, a part of the first end surface CA, and a part of the second end surface CB. Of the second external electrode 103B, the part arranged on the first principal surface is referred to as the first principal surface electrode portion 103Bb, and the part arranged on the second principal surface AB is referred to as the second principal surface electrode portion 103Bc. The first principal surface electrode portion 103Ab of the first external electrode 103A and the first principal surface electrode portion 103Bb of the second external electrode 103B are collectively referred to as "each first principal surface electrode portion 103b," and the second principal surface electrode portion 103Ac of the first external electrode 103A and the second principal surface electrode portion 103Bc of the second external electrode 103B are collectively referred to as "each second principal surface electrode portion 103c."

[0070] The width direction W is the electrode opposing direction in which the first external electrode 103A and the second external electrode 103B oppose each other. The WT cross section of the laminate 102 corresponds to the cross section of the laminate taken along the stacking direction T and the electrode opposing direction.

[0071] The first external electrode 103A and the second external electrode 103B are arranged to sandwich the laminate 102 in the width direction W. In this case, the distance between the first external electrode 103A and the second external electrode 103B is narrower than in the multilayer ceramic capacitor 1 of the above embodiment, and therefore the current path can be shortened, thereby reducing the ESL.

[0072] Each internal electrode layer 115 faces a corresponding first principal surface electrode portion 103b in the stacking direction T. Each internal electrode layer 115 faces a corresponding second principal surface electrode portion 103c in the stacking direction T. In this case, the capacitance of the multilayer ceramic capacitor 100 can be adjusted by adjusting the area in which each internal electrode layer 115 and each external electrode 103 face each other in the stacking direction T. This increases the degree of freedom in setting the capacitance of the multilayer ceramic capacitor 100.

[0073] (Second Modification) A multilayer ceramic capacitor 1 according to a second modification of the present invention will be described with reference to Fig. 7. Fig. 7 is a view corresponding to Fig. 2 and showing the multilayer ceramic capacitor 1 according to the second modification of the present invention.

[0074] In the multilayer ceramic capacitor 1 according to the second modified embodiment of the present invention, the plurality of internal electrode layers 15 includes an internal electrode layer 15 whose dimension in the length direction L of the internal electrode layer 15 is different from the dimension in the length direction L of the other internal electrode layers 15. The dimension in the width direction W of each internal electrode layer 15 is, for example, the same. In this case, among the plurality of internal electrode layers 15, the electrode area of ​​at least one internal electrode layer 15 is different from the electrode areas of the other internal electrode layers. This allows the capacitance of the multilayer ceramic capacitor 1 to be adjusted by adjusting the electrode area of ​​each internal electrode layer 15, thereby increasing the degree of freedom in setting the capacitance of the multilayer ceramic capacitor 1.

[0075] (Modification of the Second Modification) A multilayer ceramic capacitor 1 according to a modification of the second modification of the present invention will be described with reference to Fig. 8. Fig. 8 is a view corresponding to Fig. 3 and showing the multilayer ceramic capacitor 1 according to a modification of the second modification of the present invention.

[0076] In the multilayer ceramic capacitor 1 according to the modified example of the second modified embodiment of the present invention, the multiple internal electrode layers 15 include an internal electrode layer 15 whose dimension in the width direction W of the internal electrode layer 15 is different from the dimension in the width direction W of the other internal electrode layers 15. As in the above embodiment, the dimension in the length direction L of each internal electrode layer 15 is the same. In this case, while the separation distance between the internal electrode layer 15 and each external electrode 3 is the same for all internal electrode layers 15, the electrode area of ​​at least one internal electrode layer 15 among the multiple internal electrode layers 15 can be made different from the electrode area of ​​the other internal electrode layers 15. This makes it easier to set the capacitance of the multilayer ceramic capacitor 1 and increases the degree of freedom in setting the capacitance of the multilayer ceramic capacitor 1.

[0077] (Third Modification) A multilayer ceramic capacitor 1 according to a third modification of the present invention will be described with reference to Fig. 9. Fig. 9 is a view corresponding to Fig. 2 and showing the multilayer ceramic capacitor 1 according to the third modification of the present invention.

[0078] In the multilayer ceramic capacitor 1 according to the third modified embodiment of the present invention, the multiple internal electrode layers 15 include multiple first internal electrode layers 15A stacked facing each other in the stacking direction T, and multiple second internal electrode layers 15B stacked facing each other in the stacking direction T at positions that do not face the multiple first internal electrode layers 15A in the stacking direction T. The stacked first internal electrode layers 15A and the stacked second internal electrode layers 15B are aligned in the length direction L (electrode alignment direction). By arranging the internal electrode layers 15 in multiple rows, the capacitance of the multilayer ceramic capacitor 1 can be reduced. Furthermore, the first internal electrode layers 15A and the second internal electrode layers 15B are aligned in the stacking direction T.

[0079] When manufacturing the multilayer ceramic capacitor 1 according to the third modified embodiment of the present invention, ceramic green sheets on which no conductive paste is printed and ceramic green sheets on which the conductive paste to become the first internal electrode layer 15A and the conductive paste to become the second internal electrode layer 15B are printed are alternately laminated, thereby making it possible to align the positions of the first internal electrode layer 15A and the second internal electrode layer 15B in the lamination direction T.

[0080] (Modification of the Third Modification) A multilayer ceramic capacitor 1 according to a modification of the third modification of the present invention will be described with reference to Fig. 10. Fig. 10 is a view corresponding to Fig. 2 and showing the multilayer ceramic capacitor 1 according to a modification of the third modification of the present invention.

[0081] In the multilayer ceramic capacitor 1 according to the modified example of the second modified embodiment of the present invention, the first internal electrode layer 15A and the second internal electrode layer 15B are arranged to be shifted in the lamination direction T. This allows the capacitance of the multilayer ceramic capacitor 1 to be further reduced.

[0082] When manufacturing the multilayer ceramic capacitor 1 according to the modified example of the third modified embodiment of the present invention, ceramic green sheets on which the conductive paste is printed so as to be shifted in one direction of the length direction L and ceramic green sheets on which the conductive paste is printed so as to be shifted in the other direction of the length direction L are alternately laminated. This makes it possible to shift the positions of the first internal electrode layers 15A and the second internal electrode layers 15B in the lamination direction T.

[0083] (Modification of the Fourth Modification) A multilayer ceramic capacitor 1 according to a fourth modification of the present invention will be described with reference to Fig. 11. Fig. 11 is a view corresponding to Fig. 2 and showing the multilayer ceramic capacitor 1 according to the fourth modification of the present invention.

[0084] In the multilayer ceramic capacitor 1 according to the fourth modified embodiment of the present invention, some of the internal electrode layers 15 are connected to at least one of the first external electrode 3A and the second external electrode 3B. More specifically, the internal electrode layer 15 closest to the first end face CA (hereinafter referred to as the "internal electrode layer 15X") among the internal electrode layers 15 is connected to the first external electrode 3A. The internal electrode layer 15 closest to the second end face CB (hereinafter referred to as the "internal electrode layer 15Y") among the internal electrode layers 15 is connected to the second external electrode 3B. In this manner, some of the internal electrode layers 15 may be connected to the external electrodes 3. Furthermore, the capacitance of the multilayer ceramic capacitor 1 according to the fourth modified embodiment is larger than that of the above-described embodiment and modified embodiments. Therefore, the capacitance of the multilayer ceramic capacitor 1 can be adjusted over a relatively large range depending on whether or not the internal electrode layers 15 are connected to the external electrodes 3.

[0085] It should be noted that which of the multiple internal electrode layers 15 is connected to at least one of the first external electrode 3A and the second external electrode 3B is not particularly limited, and can be any as long as the multiple internal electrode layers 15 include an internal electrode layer 15 that is not connected to either the first external electrode 3A or the second external electrode 3B. Furthermore, the multiple internal electrode layers 15 may include an internal electrode layer 15 that is connected to both the first external electrode 3A and the second external electrode 3B.

[0086] (Modification of the manufacturing method of a multilayer ceramic capacitor) In the above embodiment, each internal electrode layer 15 is formed by cutting a conductive paste printed in stripes on a ceramic green sheet at the middle of the stripe, but the method of forming the internal electrode layer is not limited to this. Each internal electrode layer may be formed, for example, by printing a conductive paste in the shape of the desired internal electrode layer on a ceramic green sheet. In this case, the conductive paste can be prevented from being exposed on the outer surface of the laminate chip, so the process of post-attaching side margins to the laminate chip can be omitted. However, the manufacturing method of the above embodiment is preferred in that it is easy to align the ends of each internal electrode layer in the electrode facing direction in the electrode facing direction.

[0087] In the manufacturing method of the multilayer ceramic capacitor of the above embodiment, the electrode arrangement direction can be set to a direction different from the direction in which the side margin portions 20 face each other, either the length direction L or the width direction W. In this case, when the mother laminate is cut along the conductive paste printed in stripes, the mother laminate is cut at a position spaced from the conductive paste, thereby manufacturing a multilayer ceramic capacitor in which the internal electrode layers are not connected to the first external electrode and the second external electrode. However, the configuration and manufacturing method of the above embodiment are preferred in that it is easy to align the ends of the internal electrode layers in the electrode arrangement direction.

[0088] Alternatively, when fabricating a laminate chip, a conductive paste may be printed over the entire upper surface of ceramic green sheets, and a mother laminate including the stacked ceramic green sheets may be cut to a predetermined size. In this case, the conductive paste is exposed on each surface of the laminate chip in the length direction L and each surface in the width direction W, so that side margins are later attached to each surface of the laminate chip in the length direction L and each surface in the width direction W. In a laminate fabricated by this manufacturing method, each end of each internal electrode layer in the length direction L is aligned with the length direction L, and each end of each internal electrode layer in the width direction W is aligned with the width direction W. Therefore, the laminate can be suitably used in either a configuration in which the first external electrode and the second external electrode face each other in the length direction L, or a configuration in which the first external electrode and the second external electrode face each other in the width direction W.

[0089] Although the preferred embodiments and modifications of the present invention have been described above, the present invention is not limited to these, and includes the following scope.

[0090] <1> A multilayer ceramic capacitor comprising: a laminate including dielectric layers and internal electrode layers stacked alternately, the laminate having first and second main surfaces opposing each other in a stacking direction, first end faces and second end faces opposing each other in a length direction perpendicular to the stacking direction, and first and second side faces opposing each other in a width direction perpendicular to both the stacking direction and the length direction; and first external electrodes and second external electrodes, wherein a distance between the first side faces and the second side faces is set shorter than a distance between the first end faces and the second end faces, the first external electrodes and the second external electrodes are arranged on the first end faces and the second end faces, respectively, or on the first side faces and the second side faces, respectively, and a plurality of internal electrode layers are provided, and some or all of the plurality of internal electrode layers are not connected to either the first external electrodes or the second external electrodes.

[0091] <2> The multilayer ceramic capacitor according to claim 1, wherein in a cross section of the laminate taken along the stacking direction and an electrode opposing direction in which the first external electrode and the second external electrode are opposed to each other, the plurality of internal electrodes each have a first external electrode side end portion that is an end portion on the first external electrode side and a second external electrode side end portion that is an end portion on the second external electrode side, and the separation distance in the electrode opposing direction between the first external electrode side end portion closest to the first external electrode side end portion and the first external electrode side end portion furthest from the first external electrode side end portion among the plurality of first external electrode side end portions is within 5 μm, and the separation distance in the electrode opposing direction between the second external electrode side end portion closest to the second external electrode side end portion and the second external electrode side end portion furthest from the second external electrode side end portion among the plurality of second external electrode side end portions is within 5 μm.

[0092] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein, among the plurality of internal electrode layers, an electrode area of ​​at least one of the internal electrode layers is different from an electrode area of ​​the other internal electrode layers.

[0093] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the plurality of internal electrode layers include a plurality of first internal electrode layers stacked opposite to each other in the stacking direction, and a plurality of second internal electrode layers stacked opposite to each other in the stacking direction at positions not opposite to the plurality of first internal electrode layers in the stacking direction.

[0094] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the first external electrode and the second external electrode each have a first principal surface electrode portion disposed on the first principal surface and a second principal surface electrode portion disposed on the second principal surface, and the plurality of internal electrode layers each face each of the principal surface electrode portions in the stacking direction.

[0095] <6> The multilayer ceramic capacitor according to any one of <1> to <5>, wherein some of the plurality of internal electrode layers are connected to at least one of the first external electrode and the second external electrode.

[0096] <7> The multilayer ceramic capacitor according to any one of <1> to <6>, wherein the dielectric layers contain Cr, Sr, Ti, and Zr.

[0097] <8> The multilayer ceramic capacitor according to any one of <1> to <7>, wherein the internal electrode layers contain Cu as a main component.

[0098] 1,100 Multilayer ceramic capacitor 2, 102 Laminate 3A, 103A First external electrode 3B, 103B Second external electrode 3b, 103b First principal surface electrode portion 3c, 103c Second principal surface electrode portion 14 Dielectric layer 15, 115 Internal electrode layer 15A First internal electrode layer 15B Second internal electrode layer 15X Internal electrode layer connected to first external electrode 15Y Internal electrode layer connected to second external electrode 151 First external electrode side end portion 152 Second external electrode side end portion AA First principal surface AB Second principal surface BA First end surface BB Second end surface CA First side surface CB Second side surface

Claims

1. A multilayer ceramic capacitor comprising: a laminate including dielectric layers and internal electrode layers stacked alternately, the laminate having first and second main surfaces opposing each other in a stacking direction, first end faces and second end faces opposing each other in a length direction perpendicular to the stacking direction, and first and second side faces opposing each other in a width direction perpendicular to both the stacking direction and the length direction; and a first external electrode and a second external electrode, wherein the distance between the first side face and the second side face is set shorter than the distance between the first end face and the second end face, the first external electrode and the second external electrode are disposed on the first end face and the second end face, respectively, or on the first side face and the second side face, a plurality of internal electrode layers are provided, and some or all of the plurality of internal electrode layers are not connected to either the first external electrode or the second external electrode.

2. The multilayer ceramic capacitor according to claim 1, wherein, in a cross section of the laminate taken along the stacking direction and an electrode opposing direction in which the first external electrode and the second external electrode are opposed to each other, the multiple internal electrodes each have a first external electrode side end which is an end on the first external electrode side and a second external electrode side end which is an end on the second external electrode side, a separation distance in the electrode opposing direction between the first external electrode side end closest to the first external electrode side end and the first external electrode side end furthest from the first external electrode side end, among the multiple first external electrode side ends, is within 5 μm, and a separation distance in the electrode opposing direction between the second external electrode side end closest to the second external electrode side end and the second external electrode side end furthest from the second external electrode side end, among the multiple second external electrode side ends, is within 5 μm.

3. The multilayer ceramic capacitor according to claim 1, wherein an electrode area of ​​at least one of said plurality of internal electrode layers is different from an electrode area of ​​the other internal electrode layers.

4. A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the multiple internal electrode layers include a multiple number of first internal electrode layers laminated facing each other in the lamination direction, and a multiple number of second internal electrode layers laminated facing each other in the lamination direction at positions not facing the multiple first internal electrode layers in the lamination direction.

5. A multilayer ceramic capacitor as claimed in any one of claims 1 to 4, wherein the first external electrode and the second external electrode each have a first principal surface electrode portion arranged on the first principal surface and a second principal surface electrode portion arranged on the second principal surface, and the multiple internal electrode layers each face the first principal surface electrode portion and the second principal surface electrode portion in the stacking direction.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein some of the plurality of internal electrode layers are connected to at least one of the first external electrode and the second external electrode.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the dielectric layers contain Cr, Sr, Ti and Zr.

8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein the internal electrode layers contain Cu as a main component.