Multilayer ceramic capacitor

Abstract

The purpose of the present invention is to provide a multilayer ceramic capacitor particularly excellent in moisture resistance. This multilayer ceramic capacitor comprises: an internal layer part in which first internal electrode layers and second internal electrode layers are alternately laminated with dielectric layers formed by a ceramic dielectric interposed therebetween, the internal layer part having a first main surface that is a surface in a lamination direction, a second main surface that is a surface on the opposite side from the first main surface, a first side surface that is a surface in the width direction orthogonal to the first main surface and the second main surface, a second side surface that is a surface on the side opposite to the first side surface, a first end surface that is a surface in the lengthwise direction orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface and from which the first internal electrode layer is drawn out, and a second end surface that is a surface on the side opposite to the first end surface and from which the second internal electrode layer is drawn out; a first outer layer part which is formed of a ceramic dielectric and covers the first main surface from the lamination direction; a second outer layer part which is formed of a ceramic dielectric and covers the second main surface from the lamination direction; and a pair of external end surface electrodes which are provided on the first end surface and the second end surface and are respectively connected to the first internal electrode layer and the second internal electrode layer. Each of the ceramic dielectrics constituting the inner layer part, the first outer layer part, and the second outer layer part has a plurality of dielectric particles having holes therein. The intragranular pore ratio (Ninner) of the ceramic dielectric in the inner layer part and the intragranular pore ratio (Nouter) of the ceramic dielectric in the first outer layer part and the second outer layer part satisfy formula (1): Nouter < Ninner.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] As electronic devices such as mobile phones become smaller and CPU speeds increase, the demand for multilayer ceramic capacitors (MLCCs) is increasing. Multilayer ceramic capacitors have thin, high-dielectric-constant dielectric layers. Therefore, they have a large capacitance despite their small size. Multilayer ceramic capacitors using various materials are known, but the most popular is one that uses barium titanate (BaTiO) for the dielectric layer. ３ ) and using a base metal such as nickel (Ni) for the internal electrode layers are widely used because they are inexpensive and exhibit high performance.

[0003] A multilayer ceramic capacitor comprises an inner layer portion in which dielectric layers formed of ceramic dielectrics and internal electrode layers are alternately laminated, and outer layer portions covering the top and bottom of the inner layer portion. The inner layer portions act as capacitance elements, while the outer layer portions are regions located above and below the inner layer portion that do not include the internal electrode layers. They can be said to function to protect the inner layer portions acting as capacitance elements from the external environment.

[0004] By the way, the ceramic dielectric of the multilayer ceramic capacitor is BaTiO ３ Dielectric powders are produced by sintering dielectric powders such as inorganic powders. Dielectric powders are synthesized by methods such as the solid-state method, hydrothermal method, sol-gel method, alkoxide method, solvothermal method, and oxalate method. Among these, the hydrothermal method (hydrothermal synthesis method) is a method for synthesizing inorganic powders using a high-temperature, high-pressure aqueous solution, and has the advantage of being able to produce fine powders with uniform particle size at relatively low cost. Therefore, when multilayer ceramic capacitors are manufactured using dielectric powders synthesized by the hydrothermal method (hydrothermally synthesized dielectric powder), it is possible to make the dielectric layers thinner and increase the capacitance. In addition, since the particle size variation of the dielectric particles is reduced, it is possible to improve the dielectric constant and reliability.

[0005] Hydrothermal methods use hydroxides as raw materials. For example, barium hydroxide (Ba(OH) ２ ) and metatitanate (TiO(OH) ２ ) and titanium oxide (TiO２ ) in high-temperature, high-pressure water, and the resulting reaction product is heat-treated to form BaTiO ３ A powder is obtained. The OH groups contained in the hydroxide are released from the raw material during heat treatment, which causes voids (intragranular voids) to form inside the particles that make up the dielectric powder. When a multilayer ceramic capacitor is manufactured using a dielectric powder with intragranular voids, the intragranular voids remain in the resulting capacitor. In contrast, when a dielectric powder synthesized by a method other than the hydrothermal method is used, intragranular voids are not formed.

[0006] Patent Document 1 discloses the use of hydrothermally synthesized dielectric powder in the dielectric layers of multilayer ceramic capacitors. Specifically, the method for producing a ceramic capacitor includes the steps of preparing a green sheet using a ceramic slurry containing a first ceramic powder synthesized by a hydrothermal method and a second ceramic powder synthesized by a method other than the hydrothermal method, and firing the resulting green sheet (claim 5 of Patent Document 1). Patent Document 1 also describes that pores present in the ceramic particles alleviate piezoelectric strain, which leads to crack suppression (paragraph

[0031] of Patent Document 1).

[0007] Japanese Patent Application Laid-Open No. 2019-102655

[0008] Although the use of hydrothermally synthesized dielectric powders to produce multilayer ceramic capacitors has been proposed, the inventors' investigations have revealed that such multilayer ceramic capacitors have problems with moisture resistance. The inventors believe that the cause of this problem is the presence of intragranular voids. As mentioned above, in multilayer ceramic capacitors using hydrothermally synthesized dielectric powders, intragranular voids may remain in the ceramic dielectric. The inventors believe that the presence of intragranular voids in the ceramic dielectric that constitutes the outer layer portion reduces moisture resistance. At the same time, the presence of many intragranular voids also reduces density.

[0009] As a result of further investigations, the inventors have discovered that by controlling the ratio of intragranular voids in the inner layer portion and the outer layer portion of a multilayer ceramic capacitor so that these satisfy a predetermined relationship, it is possible to obtain a multilayer ceramic capacitor that is particularly excellent in terms of moisture resistance.

[0010] The present invention was completed based on these findings, and an object of the present invention is to provide a multilayer ceramic capacitor that is particularly excellent in terms of moisture resistance.

[0011] The present invention encompasses the following aspects. In this specification, the expression "to" includes the numerical values ​​at both ends. In other words, "X to Y" is synonymous with "at least X and at most Y."

[0012] According to one aspect of the present invention, first internal electrode layers and second internal electrode layers are alternately stacked with dielectric layers formed of a ceramic dielectric interposed therebetween, and the internal electrode layer has an inner layer portion having a first main surface which is a surface in a stacking direction, a second main surface which is a surface opposite to the first main surface, a first side surface which is a surface in a width direction perpendicular to the first main surface and the second main surface, a second side surface which is a surface opposite to the first side surface, a first end surface which is a surface in a length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface, and from which the first internal electrode layer is led out, and a second end surface which is a surface opposite to the first end surface, Each of the ceramic dielectrics constituting the inner layer portion, the first outer layer portion, and the second outer layer portion has a plurality of dielectric particles having voids therein, and an intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ The present invention provides a multilayer ceramic capacitor that satisfies the above requirements.

[0013] According to another aspect of the present invention, there is provided an inner layer portion in which first internal electrode layers and second internal electrode layers are alternately stacked with dielectric layers formed of a ceramic dielectric therebetween, the inner layer portion having a first main surface which is a surface in a stacking direction, a second main surface which is a surface opposite to the first main surface, a first side surface which is a surface in a width direction perpendicular to the first main surface and the second main surface and from which the second internal electrode layers are drawn, a second side surface which is a surface opposite to the first side surface and from which the second internal electrode layers are drawn, a first end surface which is a surface in a length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface and from which the first internal electrode layers are drawn, and a second end surface which is a surface opposite to the first end surface and from which the first internal electrode layers are drawn; a first outer layer portion formed of a ceramic dielectric and covering the first main surface in the stacking direction; a second outer layer portion formed of a ceramic dielectric and covering the second main surface in the stacking direction; a pair of external end surface electrodes provided on the first end surface and the second end surface and connected to the first internal electrode layer, and a pair of external side surface electrodes provided on the first side surface and the second side surface and connected to the second internal electrode layer, wherein each of the ceramic dielectrics constituting the inner layer portion, the first outer layer portion and the second outer layer portion has a plurality of dielectric particles having voids therein, and an intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ The present invention provides a multilayer ceramic capacitor that satisfies the above requirements.

[0014] According to the present invention, a multilayer ceramic capacitor that is particularly excellent in terms of moisture resistance is provided.

[0015] Fig. 1 is an example of a perspective view showing the outer shape of a multilayer ceramic capacitor according to a first embodiment; Fig. 2 is a cross-sectional view schematically showing the internal structure of a multilayer ceramic capacitor according to the first embodiment; Fig. 3 is a cross-sectional view schematically showing the internal structure of a multilayer ceramic capacitor according to the first embodiment; Fig. 4 is another example of a perspective view showing the outer shape of a multilayer ceramic capacitor according to a second embodiment.

[0016] A specific embodiment of the present invention (hereinafter referred to as "the present embodiment") will be described. Note that the present invention is not limited to the following embodiment, and various modifications are possible within the scope of the present invention.

[0017] <<1. Multilayer Ceramic Capacitor>> A multilayer ceramic capacitor in a first aspect of this embodiment has an internal layer portion, a first external layer portion, a second external layer portion, and a pair of external end surface electrodes. The internal layer portion is a region in which first internal electrode layers and second internal electrode layers are alternately stacked with a dielectric layer formed of a ceramic dielectric interposed therebetween. The internal layer portion has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface in the stacking direction of the dielectric layers, the first internal electrode layers, and the second electrode layers. The second main surface is a surface opposite to the first main surface. The first side surface is a surface in the width direction perpendicular to the first main surface and the second main surface. The second side surface is a surface opposite to the first side surface. The first end surface is a surface in the length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface. The second end surface is a surface opposite to the first end surface. A first internal electrode layer is extended to the first end face. A second internal electrode layer is extended to the second end face. The first external layer portion is formed of a ceramic dielectric and covers the first main surface in the stacking direction. The second external layer portion is formed of a ceramic dielectric and covers the second main surface in the stacking direction. A pair of external end surface electrodes is provided on the first end face and the second end face, and is connected to the first internal electrode layer and the second internal electrode layer, respectively. Each of the ceramic dielectrics constituting the internal layer portion, the first external layer portion, and the second external layer portion has a plurality of dielectric particles having voids therein. In addition, the intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ Satisfy.

[0018] A multilayer ceramic capacitor according to a second aspect of this embodiment includes an internal layer portion, a first external layer portion, a second external layer portion, a pair of external end surface electrodes, and a pair of external side surface electrodes. The internal layer portion is a region in which first internal electrode layers and second internal electrode layers are alternately stacked with a dielectric layer formed of a ceramic dielectric interposed therebetween. The internal layer portion has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface in the stacking direction of the dielectric layers, the first internal electrode layers, and the second electrode layers. The second main surface is a surface opposite to the first main surface. The first side surface is a surface in the width direction perpendicular to the first main surface and the second main surface. The second side surface is a surface opposite to the first side surface. The second internal electrode layers extend to the first side surface and the second side surface. The first end surface is a surface in the length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface. The second end surface is a surface opposite to the first end surface. The first internal electrode layer is drawn out to the first end face and the second end face. The first external layer portion is formed of a ceramic dielectric and covers the first main surface in the stacking direction. The second external layer portion is formed of a ceramic dielectric and covers the second main surface in the stacking direction. A pair of external end face electrodes is provided on the first end face and the second end face, and connected to the first internal electrode layer. A pair of external side surface electrodes is provided on the first side surface and the second side surface, and connected to the second internal electrode layer. Each of the ceramic dielectrics constituting the internal layer portion, the first external layer portion, and the second external layer portion has a plurality of dielectric particles having voids therein. In addition, the intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ Satisfy.

[0019] The multilayer ceramic capacitor according to the first embodiment will be described with reference to Figures 1 to 3. Figure 1 is a perspective view showing the external shape of the multilayer ceramic capacitor. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 taken along line II-II, and Figure 3 is a cross-sectional view taken along line III-III.

[0020] The multilayer ceramic capacitor (100) comprises an element body (6) and a pair of external end electrodes (8a, 8b) provided on both end faces (14a, 14b) of the element body (6). The multilayer ceramic capacitor (100) and the element body (6) have a substantially rectangular parallelepiped shape. The term "substantially rectangular parallelepiped" includes not only rectangular parallelepipeds but also rectangular parallelepipeds with rounded corners and / or ridges.

[0021] The multilayer ceramic capacitor (100) and the element body (6) have a first outer main surface (10a) and a second outer main surface (10b) that face each other in the thickness direction T, a first outer side surface (12a) and a second outer side surface (12b) that face each other in the width direction W, and a first outer end surface (14a) and a second outer end surface (14b) that face each other in the length direction L. Here, the thickness direction T is the direction in which the dielectric layers (2) and internal electrode layers (4) included in the element body (6) are stacked. The length direction L is orthogonal to the thickness direction T and is the direction in which the outer end surfaces (14a, 14b) face each other. The width direction W is the direction orthogonal to the thickness direction T and the length direction L. A plane including the thickness direction T and the width direction W is defined as a WT plane, a plane including the width direction W and the length direction L is defined as an LW plane, and a plane including the length direction L and the thickness direction T is defined as an LT plane.

[0022] The element body (6) is composed of an inner layer (16), a first outer layer (18a), and a second outer layer (18b).

[0023] The inner layer portion (16) is a region in which the internal electrode layers (4) are alternately stacked with the dielectric layers (2) interposed therebetween. The dielectric layers (2) are made of a ceramic dielectric. The internal electrode layers (4) are composed of a plurality of first internal electrode layers (4a) and a plurality of second internal electrode layers (4b).

[0024] The inner layer portion (16) has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface is a surface perpendicular to the stacking direction of the dielectric layer (2) and the internal electrode layers (4a, 4b). The second main surface is a surface (opposing surface) opposite to the first main surface. The first side surface is a surface orthogonal to the first main surface and the second main surface, i.e., a surface perpendicular to the width direction W. The second side surface is a surface (opposing surface) opposite to the first side surface. The first end surface is a surface orthogonal to the first main surface, the second main surface, the first side surface, and the second side surface, i.e., a surface perpendicular to the length direction L. The second end surface is a surface (opposing surface) opposite to the first end surface. The internal electrode layers (4a, 4b) are not extended to the first side surface and the second side surface. Although the first internal electrode layer (4a) is extended to the first end surface, the second internal electrode layer (4b) is not extended to the first end surface. The second internal electrode layer (4b) is extended to the second end face, but the first internal electrode layer (4a) is not extended.

[0025] The first outer layer portion (18a) is a region covering the first main surface of the inner layer portion (16) in the stacking direction (thickness direction T). The second outer layer portion (18b) is a region covering the second main surface of the inner layer portion (16) in the stacking direction. The first outer layer portion (18a) and the second outer layer portion (18b) are formed of ceramic dielectric materials.

[0026] The external end surface electrodes (8a, 8b) are composed of a first external end surface electrode (8a) provided on a first external end surface (14a) of the element body (6) and a second external end surface electrode (8b) provided on a second external end surface (14b). The first external end surface electrode (8a) is electrically connected to the first internal electrode layer (4a). The second external end surface electrode (8b) is electrically connected to the second internal electrode layer (4b). However, in the multilayer ceramic capacitor (100), the first external end surface electrode (8a) and the second external end surface electrode (8b) are not connected and are electrically separated.

[0027] An external perspective view of the multilayer ceramic capacitor in the second embodiment is shown in Fig. 4. The multilayer ceramic capacitor in the second embodiment is a so-called three-terminal capacitor having external electrodes (external end surface electrodes, external side surface electrodes) on the end surfaces and side surfaces. In the second embodiment, the structure other than the internal electrode layers and external electrodes is the same as that of the first embodiment.

[0028] In the second embodiment, the first internal electrode layer (4a) is drawn to the end faces (first end face, second end face) of the internal layer portion but not to the side faces (first side face, second side face). The second internal electrode layer (4b) is drawn to the side faces (first side face, second side face) of the internal layer portion but not to the end faces (first end face, second end face).

[0029] A first external end surface electrode (8a) and a second external end surface electrode (8b) are provided on the first external end surface (14a) and the second external end surface (14b) of the element body (6), respectively, and a first external side surface electrode (8c) and a second external side surface electrode (8d) are provided on the first external side surface (12a) and the second external side surface (12b), respectively. Both of the external end surface electrodes (8a, 8b) are electrically connected to the first internal electrode layer (4a). Both of the external side surfaces electrodes (8c, 8d) are electrically connected to the second internal electrode layer (4b). The external end surface electrodes (8a, 8b) and the external side surfaces electrodes (8c, 8d) are not connected and are electrically separated.

[0030] In either the first or second aspect, the size of the multilayer ceramic capacitor (100) or the element body (6) is not particularly limited. For example, the length direction L dimension is 0.2 mm or more and 3.2 mm or less, the width direction W dimension is 0.1 mm or more and 2.5 mm or less, and the stacking direction T dimension is 0.1 mm or more and 2.5 mm or less. Note that although FIGS. 1 to 3 show the length direction L dimension as being larger than the width direction W dimension, the multilayer ceramic capacitor of this embodiment is not limited to those having such dimensions. The length direction L dimension may be smaller than the width direction W dimension.

[0031] <Inner layer portion - dielectric layer> The inner layer portion is a region in which internal electrode layers (first internal electrode layer, second internal electrode layer) are alternately laminated via dielectric layers formed of ceramic dielectrics. The dielectric layers are composed of ceramic dielectrics produced by firing green sheets for the inner layers containing dielectric raw materials. The ceramic dielectric is made of a sintered polycrystalline body (ceramic) in which a large number of dielectric particles are bonded via grain boundaries and triple junctions. In other words, it contains dielectric particles (dielectric grains) as the main component. The main component is the component with the largest content in the ceramic dielectric, i.e., a component with a content of 50% by mass or more.

[0032] Perovskite oxides have the general formula: ABO ３ The perovskite-type crystalline material has a composition represented by the formula: and has a cubic-like crystal structure, such as a cubic, tetragonal, orthorhombic, or rhombohedral crystal structure, at room temperature. Furthermore, the atoms of the A-site elements (hereinafter referred to as "A-site atoms") and the atoms of the B-site elements (hereinafter referred to as "B-site atoms") are ionized to occupy the A-site and B-site sites of the perovskite structure, respectively. Examples of the A-site elements include elements with relatively large ion sizes, such as barium (Ba), calcium (Ca), and strontium (Sr), while examples of the B-site elements include elements with relatively small ion sizes, such as titanium (Ti), zirconium (Zr), and hafnium (Hf). The combination of the A-site and B-site elements is not particularly limited as long as the perovskite-type structure is maintained. Each of the A-site and B-site elements may contain only one element, or may contain a combination of multiple elements. Furthermore, as long as the perovskite-type structure is maintained, the molar ratio of the A-site elements to the B-site elements may deviate from 1:1.

[0033] A specific example of a perovskite oxide is barium titanate (BaTiO ３ )-based compounds, calcium titanate (CaTiO ３ )-based compounds, strontium titanate (SrTiO ３ )-based compounds, and mixed crystals and solid solutions thereof. Preferably, the A-site element contains barium (Ba) and the B-site element contains titanium (Ti). That is, the perovskite oxide is preferably barium titanate (BaTiO ３ )-based compounds. ３ The compound is BaTiO ３ Not only BaTiO ３ These include those in which a portion of the Ba is substituted with other A-site elements such as Sr and / or Ca, or those in which a portion of the Ti is substituted with other B-site elements such as Zr and / or Hf.

[0034] The ceramic dielectric may contain a secondary component. Examples of the secondary component include, but are not limited to, rare earth elements (RE), magnesium (Mg), manganese (Mn), iron (Fe), chromium (Cr), cobalt (Co), nickel (Ni), silicon (Si), aluminum (Al), vanadium (V), and compounds thereof. The secondary component may contain any of the above components alone or in combination. The form in which the secondary component exists is not limited. It is sufficient that the secondary component is contained in the dielectric particles, grain boundaries, or triple points.

[0035] The dielectric particles may include core-shell particles. Core-shell particles are particles having a structure (core-shell structure) in which at least a portion of the subcomponent is dissolved in a high concentration in the surface layer (shell portion) of the particle and the subcomponent is dissolved in a low concentration or not dissolved in the center (core portion) of the particle. Alternatively, the dielectric particles may include particles in which the subcomponent is dissolved uniformly.

[0036] The thickness of the dielectric layer occupying the inner layer portion is preferably 0.3 μm or more and 0.5 μm or less. By making the thickness of the dielectric layer a predetermined value or more, it is possible to suppress the occurrence of insulation breakdown and deterioration of the lifespan of the multilayer ceramic capacitor when it is used. Furthermore, by making the thickness of the dielectric layer a predetermined value or less, the dielectric layer is made thinner, allowing for an even greater capacitance of the multilayer ceramic capacitor. The number of dielectric layers is not particularly limited. Preferably, the number of dielectric layers constituting the outer layer portion and the inner layer portion is 100 to 2000.

[0037] <Inner Layer Portion - Internal Electrode Layer> The internal electrode layer (first internal electrode layer, second internal electrode layer) is composed of a counter electrode portion and an extension electrode portion, and together with the dielectric layer, constitutes the inner layer portion. The counter electrode portion sandwiches the dielectric layer and functions as a capacitive element. The extension electrode portion extends to the end face and / or side face of the inner layer portion, where it functions to electrically connect the counter electrode portion to the external electrode (external end face electrode, external side face electrode). The internal electrode layer contains a conductive metal. Examples of the conductive metal include well-known electrode materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), silver (Ag)-palladium (Pd) alloy, and / or gold (Au). The internal electrode layer is produced by sintering a conductive paste layer printed on the surface of the inner layer green sheet.

[0038] The internal electrode layers may contain components other than conductive metals. Examples of such components include ceramic components that function as co-materials. The thickness of the internal electrode layers is preferably 0.30 μm or more and 0.40 μm or less. By making the internal electrode thickness greater than or equal to a predetermined value, problems such as electrode discontinuities can be prevented. By making the thickness less than or equal to a predetermined value, a decrease in the proportion of the dielectric layer in the capacitor can be prevented, contributing to increased capacitance. The number of internal electrode layers is preferably 10 or more and 1,000 or less.

[0039] <Outer layer portion> The outer layer portions (first outer layer portion, second outer layer portion) are provided above and below the inner layer portion. The outer layer portions are made of a ceramic dielectric and are regions that do not include internal electrode layers. The outer layer portions are produced by firing outer layer green sheets that contain dielectric raw materials.

[0040] <External Electrodes> The external electrodes (external end surface electrodes, external side surface electrodes) function as input / output terminals of the multilayer ceramic capacitor. The capacitor of the first embodiment has only external end surface electrodes (first external end surface electrodes, second external end surface electrodes) provided on both end surfaces. The capacitor of the second embodiment has external end surface electrodes (first external end surface electrodes, second external end surface electrodes) provided on both end surfaces and external side surface electrodes (first external side surface electrodes, second external side surface electrodes) provided on both side surfaces. A known configuration can be adopted for the external electrodes. For example, a base electrode layer and a plating layer disposed thereon may be provided. Alternatively, the external electrodes may be formed of only a plating layer without providing a base electrode layer.

[0041] <Intra-grain void ratio> In the multilayer ceramic capacitor of this embodiment, the ceramic dielectrics constituting the inner layer portion, the first outer layer portion, and the second outer layer portion each have a plurality of dielectric particles having voids therein. That is, these ceramic dielectrics are produced using hydrothermally synthesized dielectric powder.

[0042] The multilayer ceramic capacitor of this embodiment has an intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ The intragranular void ratio is the number of intragranular voids per unit area in a cross section (WT surface) crossing the center of the longitudinal direction of the multilayer ceramic capacitor. Furthermore, intragranular voids are voids present inside the dielectric particles that make up the ceramic dielectric. In other words, they are regions that exist inside the dielectric particles and do not contain solid components such as the main components that make up the dielectric particles or intentionally added minor components. Therefore, they are distinguished from extra-particle voids that exist at the interfaces between particles or triple junctions. Particles that have voids inside them are called void-containing particles.

[0043] By controlling the intragranular void ratio in each of the inner layer ceramic and the outer layer ceramic so as to satisfy the above-mentioned relationship, it is possible to achieve the effect of improving moisture resistance while maintaining the effect of the intragranular voids in the inner layer portion.

[0044] To explain this point, the inner ceramic layer functions as a capacitive element. The formation of intragranular voids in the inner ceramic layer can improve the various characteristics of multilayer ceramic capacitors. As mentioned above, intragranular voids are formed by using hydrothermally synthesized dielectric powder as a raw material. On the other hand, the use of hydrothermally synthesized dielectric powder enables multilayer ceramic capacitors to be thinned and have high capacitance. Furthermore, the particle size variation of the dielectric particles is suppressed, thereby improving the dielectric constant and reliability. Furthermore, particles with intragranular voids (pore-containing particles) have high crystallinity around the voids, which can suppress problems caused by the diffusion of minor component elements. This leads to improved characteristics. For example, when the dielectric particles are core-shell particles, grain growth during the firing process does not unduly promote the diffusion and solid solution of minor components. Because grain growth is possible without destroying the core-shell structure, a high dielectric constant, flat temperature characteristics, and excellent reliability can be achieved.

[0045] When the thickness of the dielectric layer is 0.5 μm or less, it is preferable that the intragranular void ratio of the inner layer ceramic is relatively high in order to ensure good quality and reliability. ２ More than 18 pieces / μm ２ Preferably, 11 particles / μm or less ２ More than 18 pieces / μm ２ The following is more preferable. The intragranular void ratio can be determined by observing a cross section (WT surface) of the multilayer ceramic capacitor across the center in the longitudinal direction with a transmission electron microscope (TEM). Specifically, a sample for TEM observation with a thickness of 80 nm including the WT surface is prepared. The obtained sample is observed with a TEM in a 2 μm square field of view, and the number of intragranular voids is counted. The obtained number is then divided by the area of ​​the ceramic portion (dielectric layer) to obtain the ratio per unit area (1 μm ２The same procedure is performed for three locations (n ​​= 3), and the average number of intragranular voids per unit area is calculated as the intragranular void ratio. The average pore size of the voids is preferably 10 nm or more and 50 nm or less, and particularly preferably 10 nm or more and 30 nm or less.

[0046] In contrast, the outer ceramic layers sandwiching the inner ceramic layers from above and below do not function as capacitive elements. Furthermore, if the outer ceramic layers have an excessive number of intragranular voids, their moisture resistance may be reduced. In other words, the outer ceramic layers do not have internal electrode layers. They are not affected by stress from the internal electrode layers during the firing process in the manufacture of multilayer ceramic capacitors, and therefore tend to have lower sinterability than the inner ceramic layers. If outer ceramic layers with low sinterability have intragranular voids, moisture from the external environment can easily penetrate through these voids. The penetrated moisture may reach the inner ceramic layers, which function as capacitive elements, causing problems such as a decrease in insulation resistance.

[0047] Therefore, by making the intragranular void ratio of the outer ceramic layer smaller than that of the inner ceramic layer, it is possible to ensure the effect of the intragranular voids in the inner ceramic layer and to exert the effect of improving moisture resistance. ｏｕｔｅｒ <N ｉｎｎｅｒ The requirements are to be met.

[0048] On the other hand, while satisfying the above formula (1), it is also effective to provide a certain degree of intragranular voids in the outer layer ceramic. That is, to improve reliability by thinning the dielectric layer in the inner layer portion, it is necessary to suppress the particle size variation of the dielectric particles throughout the electrically active inner layer ceramic. In order to suppress the particle size variation in the active portion of the inner layer ceramic that contacts the outer layer ceramic, it is advantageous for the outer layer ceramic to contain some intragranular voids.

[0049] From the viewpoint of thinning the dielectric layer and improving reliability while maintaining excellent moisture resistance, the intragranular void ratio (N ｏｕｔｅｒ ) is 3 / μm ２ More than 13 pieces / μm２ Preferably, 3 particles / μm or less ２ More than 11 pieces / μm ２ The following is more preferred:

[0050] The outer layer ceramic includes a portion corresponding to the first outer layer portion and a portion corresponding to the second outer layer portion. The intragranular porosity ratio of the portion corresponding to the first outer layer portion and the intragranular porosity ratio of the portion corresponding to the second outer layer portion may be the same or different. As long as both are smaller than the intragranular porosity ratio of the inner layer ceramic, the magnitude relationship between the two is not limited.

[0051] According to a preferred embodiment, the zirconium (Zr) concentration (Zr ｉｎｎｅｒ ), and the zirconium (Zr) concentration of the outer ceramic layer (Zr ｏｕｔｅｒ ) is represented by the formula (2): Zr ｉｎｎｅｒ <Zr ｏｕｔｅｒ As will be described later, when manufacturing a multilayer ceramic capacitor, if a grain growth promoter such as Zr is added to the outer layer green sheets in a larger amount than the inner layer green sheets, the intragranular void ratio of the outer layer ceramic can be reduced. In this case, the concentration of the grain growth promoter (Zr, etc.) in the outer layer ceramic will be higher than that in the inner layer ceramic in the final multilayer ceramic capacitor. Note that the Zr concentration in the portion corresponding to the first outer layer portion and the Zr concentration in the portion corresponding to the second outer layer portion may be the same or different, as long as both are higher than the Zr concentration in the inner layer ceramic.

[0052] According to another preferred embodiment, the average particle size (D50 ｉｎｎｅｒ ), and the average particle size of the dielectric particles of the outer ceramic layer (D50 ｏｕｔｅｒ ) is represented by the formula (3): D50 ｉｎｎｅｒ <D50 ｏｕｔｅｒ During the manufacture of a multilayer ceramic capacitor, promoting grain growth in the outer layer ceramic can reduce the intragranular void ratio therein. Note that the average grain size in the portion corresponding to the first outer layer portion and the average grain size in the portion corresponding to the second outer layer portion may be the same or different, as long as both are larger than the average grain size of the inner layer ceramic.

[0053] Preferably, the average particle size (D50 ｉｎｎｅｒ ) is 130 nm or more and 210 nm or less. By making the average particle size a predetermined value or more, it is possible to achieve the effect of improving the crystallinity of the particles and the various properties that accompany it. Furthermore, by making the average particle size a predetermined value or less, it is possible to make the dielectric layers thinner and increase the capacitance of the multilayer ceramic capacitor. In addition, there is an effect of improving reliability. Note that the above-mentioned average particle size is the average particle size of all dielectric particles, including not only particles with voids but also particles that do not contain voids.

[0054] <<2. Method for Manufacturing Multilayer Ceramic Capacitor>> The method for manufacturing the multilayer ceramic capacitor of this embodiment is not limited as long as it satisfies the above-mentioned requirements. However, a preferred manufacturing method includes the following steps: a step of synthesizing a main component powder for a ceramic dielectric (synthesizing step), a step of mixing the main component powder with a subcomponent material to obtain a dielectric material (mixing step), a step of adding and mixing a binder and a solvent to the dielectric material to form a slurry, and molding the obtained slurry into inner layer green sheets and outer layer green sheets (molding step), a step of forming a patterned conductive paste layer on the surface of the inner layer green sheet using an internal electrode conductive paste (printing step), a step of stacking multiple inner layer green sheets with the conductive paste layer formed thereon, stacking outer layer green sheets on top and bottom of them, and pressing the whole together to form a laminated block (laminating step), a step of cutting the obtained laminated block to produce laminated chips (cutting step), a step of subjecting the obtained laminated chip to a binder removal treatment and a firing treatment to obtain an element part (firing step), and a step of forming external electrodes (external end surface electrodes, external side surface electrodes) on the obtained element part to produce a multilayer ceramic capacitor (external electrode forming step). ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ The manufacturing conditions are controlled so as to satisfy the following. Details of each step are explained below.

[0055] <Synthesis Step> In the synthesis step, a main component powder used to form a ceramic dielectric is synthesized. The main component powder is BaTiO ３ Perovskite-type structures such as ABO ３ ) is a dielectric powder having the above properties. A hydrothermally synthesized dielectric powder is used as the main component powder. This makes it possible to produce a multilayer ceramic capacitor containing dielectric particles with voids inside (particles with voids). As the main component powder, only a hydrothermally synthesized dielectric powder may be used, or a hydrothermally synthesized dielectric powder may be used in combination with a dielectric powder synthesized by a method other than the hydrothermal method. Furthermore, the particle size of the main component powder may be adjusted by pulverizing it after synthesis.

[0056] Hydrothermally synthesized dielectric powder can be synthesized by subjecting raw materials containing A-site elements (A-site raw materials) that constitute a perovskite structure and raw materials containing B-site elements (B-site raw materials) to a hydrothermal reaction under high temperature and pressure. Specifically, the raw materials are placed in a sealed container such as an autoclave together with water and heated to cause a hydrothermal reaction. The A-site raw material is barium hydroxide (Ba(OH) ２ As the B-site raw material, titanium oxide (TiO ２ ) and metatitanic acid (TiO(OH) ２ ) or its hydrate is used. The heating temperature is not limited, but may be 150°C or higher and 250°C or lower. The product obtained by the hydrothermal reaction is dried to obtain a dielectric powder. In addition, the product may be subjected to a heat treatment to enhance the crystallinity of the dielectric powder. The heat treatment may be performed at a temperature of, for example, 800°C or higher and 1000°C or lower.

[0057] <Mixing Step> In the mixing step, the dielectric material is obtained by mixing the main component powder with the subcomponent (Ni, Re, Mg, Mn, Si, Al, V, etc.) raw materials. As the subcomponent raw materials, known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides and / or chelate compounds may be used. In addition to the subcomponent raw materials, a composition control agent for the main component powder may be added. For example, when the main component powder is barium titanate (BaTiO ３ ) powder, barium carbonate (BaCO ３By adding a Ba raw material such as Ba, the main component composition of the ceramic dielectric can be controlled. The mixing method is not particularly limited. For example, a method can be used in which weighed main component powder and subcomponent raw materials are mixed and pulverized in a wet manner using a ball mill together with a pulverizing medium and pure water. If the wet mixing is performed, the mixture can be dried.

[0058] <Forming Process> In the forming process, a binder and a solvent are added to and mixed with the dielectric raw material to form a slurry, and the resulting slurry is formed into green sheets for the inner layer and green sheets for the outer layer. A known organic binder such as a polyvinyl butyral binder may be used as the binder. A known organic solvent such as toluene or ethanol may be used as the solvent. Additives such as a plasticizer may be added as needed. Forming may be performed by a known method such as the lip method. The thickness of the formed sheet is, for example, 1 μm or less.

[0059] <Printing Process> In the printing process, a conductive paste is used to form a patterned conductive paste layer on the surface of the inner layer green sheet. The conductive paste layer becomes the internal electrode layer after firing. The conductive metal contained in the conductive paste may be a conductive material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or an alloy containing these. A ceramic component that acts as a co-material may also be added to the conductive paste. The method for forming the conductive paste layer is not particularly limited. Examples include screen printing and gravure printing.

[0060] <Lamination Process> In the lamination process, multiple inner layer green sheets with conductive paste layers formed thereon are laminated, and outer layer green sheets are laminated above and below them. The entire assembly is then pressed together to create a laminated block. The inner layer green sheets undergo a firing process to become the ceramic dielectric (inner layer ceramic) that will form the inner layer portion of the multilayer ceramic capacitor. The outer layer green sheets become the ceramic dielectric (outer layer ceramic) that will form the outer layer portion. The number of green sheets to be laminated can be adjusted to obtain the required capacity.

[0061] <Cutting Step> In the cutting step, the obtained laminated block is cut to obtain laminated chips. The cutting is performed so that chips of a predetermined size are obtained and a portion of the conductive paste layer is exposed on the end surface of the laminated chip. When manufacturing the multilayer ceramic capacitor of the second aspect, the cutting is performed so that a portion of the conductive paste layer is exposed on the side surface of the laminated chip.

[0062] If necessary, the resulting laminated chip may be subjected to barrel polishing, which makes it possible to round the corners and / or ridges of the green element body.

[0063] <Firing Process> In the firing process, the laminated chip is subjected to a binder removal process and a firing process to obtain an element part. The firing process co-sinters the conductive paste layer and the inner layer green sheet to form the internal electrode layer and ceramic dielectric that constitute the inner layer part. The outer layer green sheet is sintered to form the ceramic dielectric that constitutes the outer layer part.

[0064] The conditions for the binder removal process may be determined depending on the type of organic binder contained in the green sheet and the conductive paste layer. The firing process may be performed at a temperature at which the laminated chip is sufficiently densified. For example, the firing process may be performed at a temperature of 1200°C to 1300°C, and maintained for 0 to 10 minutes. ３ The process is carried out in an atmosphere in which the main component compounds such as the above are not reduced and the oxidation of the conductive material is suppressed. For example, the oxygen partial pressure is 1.8×10 －９ ~8.7 x 10 －１０ MPa N ２ -H ２ -H ２ The firing may be performed in a stream of O. Furthermore, an annealing treatment may be performed after firing.

[0065] <External Electrode Forming Process> In the external electrode forming process, external electrodes (external end surface electrodes, external side surface electrodes) are formed on the element body portion to produce a multilayer ceramic capacitor. The external electrodes may be formed using a known method. For example, a conductive paste containing a conductive component such as Cu or Ni as a main component is applied and baked to the end surfaces and / or side surfaces of the element body portion where the internal electrode layers are drawn out and exposed, thereby forming a base layer. The base layer may also be formed by applying a conductive paste to both end surfaces of the green element body portion before firing, followed by a firing treatment. After forming the base layer, electroplating may be performed to form a plating film of Ni, Sn, or the like on the surface of the base layer. This completes the production of a multilayer ceramic capacitor.

[0066] <Control of Intragranular Porosity Ratio> In the manufacturing method of this embodiment, the intragranular porosity ratio (N ｉｎｎｅｒ , N ｏｕｔｅｒ Specifically, it is important to control the intragranular void ratio as expressed by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ The manufacturing conditions are controlled to satisfy the above.

[0067] The method for controlling the intragranular void ratio is not limited. For example, a method can be used in which a grain growth promoter or a grain growth inhibitor is added to the main component powder and the amount of the promoter is adjusted. Examples of grain growth promoters include zirconium (Zr), silicon (Si), vanadium (V), and / or aluminum (Al). During the firing process, dielectric particles undergo grain growth. As the grain growth progresses, the intragranular voids become smaller and, in some cases, disappear. Therefore, by adding a grain growth promoter to the outer layer green sheets in a larger amount than the inner layer green sheets, the intragranular void ratio of the outer layer ceramic can be reduced. In this case, the concentration of the grain growth promoter (e.g., Zr) in the outer layer ceramic will be higher than that in the inner layer ceramic in the final multilayer ceramic capacitor.

[0068] Alternatively, the composition of the main component powder may be adjusted. ３ A formula represented by: ABO ３The perovskite oxide has a composition expressed by the formula: In the perovskite oxide, the smaller the molar ratio (A / B ratio) of the A-site element (Ba, etc.) to the B-site element (Ti, etc.), the more accelerated is the grain growth. Therefore, by reducing the molar ratio (A / B ratio) of the main component powder in the outer layer green sheet, the intragranular void ratio of the outer layer ceramic can be suppressed.

[0069] Another method is to adjust the particle size of raw material particles such as the main component powder. The smaller the raw material particles, the more rapid the grain growth. Therefore, by using a main component powder for the outer layer green sheets with a smaller particle size than the main component powder for the inner layer green sheets, the intragranular void ratio of the outer layer ceramic can be reduced.

[0070] Another method is to add a dielectric powder synthesized by a method other than the hydrothermal method, such as a solid-phase method, to the main component powder. As mentioned above, hydrothermally synthesized dielectric powder has intragranular voids, whereas dielectric powder synthesized by a method other than the hydrothermal method does not. Therefore, the intragranular void ratio can be controlled by using a combination of hydrothermally synthesized dielectric powder and a dielectric powder synthesized by a method other than the hydrothermal method. Specifically, one method is to produce inner layer green sheets from hydrothermally synthesized dielectric powder, while producing outer layer green sheets from a mixed powder of hydrothermally synthesized dielectric powder and dielectric powder synthesized by the solid-phase method.

[0071] There are no limitations on the method for controlling the intragranular void ratio, as long as the intragranular void ratios of the inner layer ceramic and the outer layer ceramic can be controlled so as to satisfy a predetermined relationship.

[0072] The present embodiment will be described in more detail with reference to the following examples, but the present invention is not limited to the following examples.

[0073] (1) Fabrication of a Multilayer Ceramic Capacitor [Example 1] In Example 1, barium titanate (BaTiO ３ The green sheets for inner and outer layers were prepared using the powder as the main component, and multilayer ceramic capacitors were fabricated using these green sheets. The specific fabrication procedure is as follows:

[0074] <Synthesis of main component powder> Barium titanate (BaTiO ３ Titanium oxide (TiO) powder was synthesized by hydrothermal method. ２ ) powder and barium hydroxide (Ba(OH) ２ ) powder was weighed and pure water was added to it to prepare a slurry. The prepared slurry was then placed in a sealed container, and the temperature of the slurry was raised to 200-250°C while stirring. The temperature was then maintained at 200-250°C for 4-24 hours to allow the liquid phase reaction to proceed. Thereafter, the internal pressure of the sealed container was returned to atmospheric pressure, heating of the sealed container was stopped, and the slurry was left standing. After cooling, the slurry was removed from the sealed container and placed in a dryer to evaporate the water. In this way, hydrothermally synthesized BaTiO with an average particle size of 130 nm was obtained. ３ A powder was obtained.

[0075] <Preparation of green sheets for inner layers> Hydrothermally synthesized BaTiO ３ Powder (average particle size 130 nm) with barium carbonate (BaCO ３ ) was added to the resulting mixture, and ZrO ２ The mixture was wet-pulverized (mixed) in water using a ball mill for 24 hours, then dried and heat-treated to obtain a dielectric raw material. ３ The amount of each additive was adjusted so that the molar ratio (Ba / Ti ratio) of the ceramic dielectric constituting the inner layer portion of the final multilayer ceramic capacitor would be 1.0025. Next, a polyvinyl butyral binder and ethanol, an organic solvent, were added to the resulting dielectric raw material, and the mixture was wet-mixed in a ball mill for a predetermined time to prepare a slurry. This slurry was then formed into a sheet to prepare an inner layer green sheet.

[0076] <Preparation of outer layer green sheets> Hydrothermally synthesized BaTiO ３ Powder (average particle size 130 nm) with barium carbonate (BaCO ３ ) and ZrO ２ and the resulting mixture was treated with ZrO ２ The powder was wet-ground in water using a ball mill for 24 hours, then dried and heat-treated to obtain a dielectric material. ３The amount of ZrO added was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic of the final multilayer ceramic capacitor was 1.0025. ２ The amount of addition is BaTiO ３ The amount of the sintered body was 0.3% by mass relative to the powder. Next, a polyvinyl butyral binder and ethanol, an organic solvent, were added to the obtained dielectric raw material and wet-mixed in a ball mill for a predetermined time to prepare a slurry. This slurry was formed into a sheet to prepare an outer layer green sheet.

[0077] <Laminate Fabrication> A Ni-based conductive paste was screen-printed on the surface of the obtained inner layer green sheet to form a pattern of conductive paste layers that would become internal electrode layers. Then, multiple inner layer green sheets with conductive paste layers formed thereon were stacked, and outer layer green sheets without conductive paste layers were placed above and below them, and the whole was pressed together to form a laminated block. The resulting laminated block was then cut with a dicing saw into laminated chips. The stacking was performed so that the ends where the conductive paste layers were drawn out were staggered. The cutting was also performed so that the drawn-out portions of the conductive paste layers were exposed at the end faces.

[0078] The obtained laminated chip was ２ Heat treatment was carried out in a stream of air at a maximum temperature of 270°C, and then N ２ -H ２ O-H ２ The sample was heat-treated in a stream of N ２ -H ２ O-H ２ The firing was carried out in an air stream at a maximum temperature of 1230 to 1400°C, a temperature increase rate of 20 to 60°C / min, a holding time of 60 minutes, and an oxygen partial pressure of 5.0 x 10 －１３ ~1.7 × 10 －１２ The test was carried out under the condition of MPa. ２ -H ２ O-H ２ The resultant was subjected to a heat treatment in an air stream at a maximum temperature of 1050° C. for 60 minutes, thereby obtaining an element part.

[0079] A conductive paste primarily composed of copper (Cu) was applied to the end faces of the fired element body from which the internal electrode layers were drawn. The applied conductive paste was then baked at 900°C to form a base layer for the external electrodes (external end surface electrodes). Furthermore, Ni plating and Sn plating were applied to the surface of the base layer in this order by wet plating. In this manner, a multilayer ceramic capacitor was fabricated.

[0080] The fabricated multilayer ceramic capacitor had a length L of 1.0 mm, a width W of 0.5 mm, and a thickness T of 0.5 mm. The thickness of the dielectric layer in the inner layer portion was 0.49 μm, the thickness of the internal electrode layer was 0.44 μm, and the number of dielectric layers was 470.

[0081] [Example 2] In Example 2, when preparing the green sheet for the inner layer, hydrothermally synthesized BaTiO ３ Instead of powder (average particle size 130 nm), hydrothermally synthesized BaTiO ３ A multilayer ceramic capacitor was fabricated in the same manner as in Example 1. ３ The powder (average particle size 80 nm) was hydrothermally synthesized BaTiO except that the slurry temperature during hydrothermal treatment was lowered. ３ It was synthesized in the same manner as the powder (average particle size 130 nm).

[0082] [Example 3] In Example 3, ZrO was used when preparing the ceramic green sheets for the outer layer. ２ Furthermore, BaCO ３ The amount of addition was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic was 1.0000. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0083] [Example 4] In Example 4, ZrO was added when preparing the ceramic green sheets for the outer layer. ２ The amount of added was changed from 0.3 mass % to 0.5 mass %. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0084] [Example 5] In Example 5, the grinding time during the preparation of the outer layer ceramic green sheets was changed from 24 hours to 48 hours, and ZrO ２ Other than that, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0085] Example 6 In Example 6, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0086] [Example 7] In Example 7, BaCO was used when preparing the ceramic green sheets for the inner layer. ３ Together with ZrO ２ The amount of ZrO ２ The amount of addition) was BaTiO ３ The content of the powder was 0.1 mass %. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0087] [Example 8] In Example 8, when the ceramic green sheets for the outer layers were prepared, hydrothermal synthesis BaTiO ３ Powder (average particle size 130 nm): 70% by mass and solid-phase synthesized BaTiO ３ The main component powder was a mixed powder containing 30 mass % of BaCO powder (average particle size 130 nm). ３ The amount of each of the additives was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic was 1.0050. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0088] [Example 9] In Example 9, when the ceramic green sheets for the outer layers were prepared, hydrothermal synthesis BaTiO ３ Powder (average particle size 130 nm): 85% by mass and solid-phase synthesized BaTiO ３ The main component powder was a mixed powder containing 15 mass % of ZrO powder (average particle size 130 nm). ２ Furthermore, BaCO ３ The amount of addition was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic was 1.0050. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0089] [Example 10] In Example 10, BaCO was used when preparing the ceramic green sheets for the inner layer. ３ Together with ZrO ２ The amount of ZrO ２ The amount of addition) was BaTiO ３ The content of ZrO in the powder was 0.1% by mass. ２ Furthermore, BaCO ３ The amount of addition was adjusted so that the molar ratio (Ba / Ti ratio) of the outer layer ceramic was 1.0000. Except for this, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0090] [Comparative Example 1] In Comparative Example 1, when the ceramic green sheets for the inner layer were prepared, hydrothermal synthesis BaTiO ３ Powder (average particle size 130 nm): 10 mass% and solid-phase synthesized BaTiO ３ The main component powder was a mixed powder containing 90% by mass of ZrO powder (average particle size 130 nm). ２ Other than that, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0091] [Comparative Example 2] In Comparative Example 2, the grinding time during the preparation of the outer layer ceramic green sheets was changed from 24 hours to 12 hours, and ZrO ２ Other than that, a multilayer ceramic capacitor was fabricated in the same manner as in Example 1.

[0092] (2) Evaluation The multilayer ceramic capacitors produced in Examples 1 to 10 and Comparative Examples 1 and 2 were evaluated for various properties as follows.

[0093] <TEM Observation> The WT surface of the multilayer ceramic capacitor was observed using a transmission electron microscope (TEM) to examine the intragranular void ratio. Specifically, the multilayer ceramic capacitor was polished to the center in the longitudinal direction to expose the WT surface, and further processed to prepare a TEM observation sample with a thickness of 80 nm including the WT surface. The obtained sample was then subjected to TEM observation. In this case, the cross section was divided into an inner layer portion and an outer layer portion, and the ceramic dielectric portion near the center in the W direction and T direction of the inner layer portion, and the ceramic dielectric portion near the center in the W direction and T direction of the outer layer portion were observed. The number of voids present in the dielectric particles was then counted, and the obtained number was divided by the area of ​​the ceramic portion to obtain the unit area (1 μm ２ The same procedure was carried out at three locations (n=3) in each of the inner layer portion and the outer layer portion, and the average value of the number of intragranular voids per unit area was calculated as the intragranular void ratio.

[0094] In addition, there is a region (side margin) near the side of the inner layer that does not contain the internal electrode layer. This side margin and the center of the inner layer are obtained by firing the same green sheet (inner layer green sheet). Therefore, the ceramic dielectric that makes up the side margin is continuous in composition and / or microstructure with the ceramic dielectric that makes up the inner layer. In other words, there is no physical or chemical boundary between the side margin and the inner layer. Furthermore, the intragranular void ratio in the side margin is the same as the intragranular void ratio in the center of the inner layer, or slightly less as the grains grow.

[0095] <SEM Observation> The WT surface of the multilayer ceramic capacitor was observed using a scanning electron microscope (SEM) to examine the thickness of the dielectric layer and the particle size (D50) of the dielectric particles. Specifically, the multilayer ceramic capacitor was polished to the center in the length (L) direction to expose the cross section (WT surface). Next, on the exposed cross section, the thickness of the dielectric layer of the inner layer located near the center in the thickness direction was measured along a total of five lines: the center line in the width direction W and two lines drawn equally spaced on both sides of this center line in the width direction W, and the average value was taken as the thickness of the dielectric layer.

[0096] In addition, SEM images of the dielectric particles in the dielectric layer in the exposed cross section were taken under conditions of 5000x magnification, 15 kV acceleration voltage, and a field of view of 30 μm × 30 μm. Images were taken of the ceramic dielectric near the center of the inner layer in the W and T directions. Next, image processing software was used to recognize the edges of all the dielectric particles and calculate the cross-sectional area of ​​the particles, and the circle-equivalent diameter was calculated from this area as the particle diameter. Diameters of all the dielectric particles included within the imaged range were measured, excluding dielectric particles that were missing from the image, and the average value was calculated to determine the average particle diameter (D50) of the dielectric particles in the inner layer ceramic. ｉｎｎｅｒ In addition, images were taken of the outer layer portion near the center in the W direction and T direction, and the average particle size (D50 ｏｕｔｅｒ ) was sought.

[0097] <Moisture Resistance Load Test> A moisture resistance load test was conducted on 100 samples under conditions of 85°C, 85% relative humidity, and 6.3 V. After 250 hours, 500 hours, or 1000 hours, the samples were removed from the test tank and a voltage of 6.3 V was applied to them at room temperature for 60 seconds to measure their insulation resistance (IR). Using LogIR > 4 as the standard, samples that all met the standard were judged as passing (◯), and samples with one or more LogIR ≦ 4 were judged as failing (×). Furthermore, the moisture resistance test results were judged according to the following criteria:

[0098] ◎: Passed after 1000 hours. ◯: Passed after 250 hours, but failed after 500 or 1000 hours. ×: Failed after 250 hours.

[0099] (3) Evaluation Results The evaluation results obtained for the multilayer ceramic capacitors of Examples 1 to 10 and Comparative Examples 1 and 2 are summarized in Table 1.

[0100] In Examples 1 to 10, the intragranular porosity (N ｏｕｔｅｒ ) is the intragranular porosity in the inner layer (N ｉｎｎｅｒ ) was smaller than the value of the humidity load resistance test. Therefore, the results of the humidity load resistance test were good, and the test passed after 250 hours had elapsed. In particular, Examples 1, 2, and 4 to 7 showed particularly good results in the humidity load resistance test, and the test passed even after 1000 hours had elapsed.

[0101] Incidentally, there were differences in the results of the moisture resistance load test among Examples 1 to 10. This is because, while the number of intragranular voids has a significant impact on moisture resistance, the elution of grain boundary components into water also has a secondary impact on moisture resistance. If grain boundary components are more likely to be eluted, moisture resistance decreases. For example, increasing the molar ratio (Ba / Ti) increases the amount of Ba in the ceramic, leading to a higher Ba concentration at the grain boundaries. A high Ba concentration at the grain boundaries makes it easier for grain boundary components to be eluted into water. This reduces moisture resistance. Furthermore, if the amount of Zr in the ceramic is high, the Zr concentration at the grain boundaries increases. Zr at the grain boundaries suppresses the elution of grain boundary components. Conversely, if there is less Zr, the Zr concentration at the grain boundaries decreases, making it impossible to suppress the elution of grain boundary components. This shortens the moisture resistance time.

[0102] Therefore, among Examples 1 to 10, Example 8, which had a relatively high molar ratio, had relatively low moisture resistance and the moisture load test result was "Good." Examples 3 and 10, which had a relatively low Zr content, also had relatively low moisture resistance and the moisture load test result was "Good." Example 9 also had a moisture load test result of "Good," but the molar ratio was high and the Zr content was low. Therefore, although it passed after 250 hours, it failed after 500 hours.

[0103] The multilayer ceramic capacitors of Comparative Examples 1 and 2 had a grain porosity (N ｏｕｔｅｒ ) is the intragranular porosity in the inner layer (N ｉｎｎｅｒ Therefore, the results of the humidity load test were poor, and the test failed after 250 hours.

[0104]

[0105] From the above results, it can be seen that this embodiment provides a multilayer ceramic capacitor that is particularly excellent in terms of moisture resistance.

[0106] Although the embodiments of the present invention have been described above, the present invention is not limited to the embodiments and can be embodied in various forms without departing from the spirit of the present invention. The present invention includes the following combinations.

[0107] <1> An inner layer portion in which first internal electrode layers and second internal electrode layers are alternately stacked with dielectric layers formed of a ceramic dielectric interposed therebetween, the inner layer portion having a first main surface which is a surface in the stacking direction, a second main surface which is a surface opposite to the first main surface, a first side surface which is a surface in a width direction perpendicular to the first main surface and the second main surface, a second side surface which is a surface opposite to the first side surface, a first end surface which is a surface in a length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface, and from which the first internal electrode layers are drawn out, and a second end surface which is a surface opposite to the first end surface and from which the second internal electrode layers are drawn out; a first outer layer portion formed of a ceramic dielectric and covering the first main surface from the stacking direction; a second outer layer portion formed of a ceramic dielectric and covering the second main surface from the stacking direction; and a pair of external end surface electrodes provided on the first end surface and the second end surface, and connected to the first internal electrode layer and the second internal electrode layer, respectively, Each of the ceramic dielectrics constituting the inner layer portion, the first outer layer portion, and the second outer layer portion has a plurality of dielectric particles having voids therein, and an intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ Multilayer ceramic capacitors that satisfy the above requirements.

[0108] <2> An inner layer portion in which first internal electrode layers and second internal electrode layers are alternately stacked with dielectric layers formed of a ceramic dielectric interposed therebetween, and which has: a first main surface which is a surface in the stacking direction; a second main surface which is a surface opposite to the first main surface; a first side surface which is a surface in the width direction perpendicular to the first main surface and the second main surface and from which the second internal electrode layers are drawn; a second side surface which is a surface opposite to the first side surface and from which the second internal electrode layers are drawn; a first end surface which is a surface in the length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface and from which the first internal electrode layers are drawn; and a second end surface which is a surface opposite to the first end surface and from which the first internal electrode layers are drawn; a first outer layer portion formed of a ceramic dielectric and covering the first main surface in the stacking direction; and a second outer layer portion formed of a ceramic dielectric and covering the second main surface in the stacking direction. a pair of external end surface electrodes provided on the first end surface and the second end surface and connected to the first internal electrode layer, and a pair of external side surface electrodes provided on the first side surface and the second side surface and connected to the second internal electrode layer, wherein each of the ceramic dielectrics constituting the inner layer portion, the first outer layer portion and the second outer layer portion has a plurality of dielectric particles having voids therein, and an intragranular void ratio (N ｉｎｎｅｒ ), and the intragranular void ratio (N ｏｕｔｅｒ ) is represented by the formula (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ Multilayer ceramic capacitors that satisfy the above requirements.

[0109] <3> The Zr concentration of the ceramic dielectric in the inner layer portion (Zr ｉｎｎｅｒ ), and the Zr concentration (Zr ｏｕｔｅｒ ) is represented by the formula (2): Zr ｉｎｎｅｒ <Zr ｏｕｔｅｒ The multilayer ceramic capacitor according to <1> or <2> above, which satisfies the above.

[0110] <4> The average particle size (D50 ｉｎｎｅｒ), and the average particle size (D50 ｏｕｔｅｒ ) is represented by the formula (3): D50 ｉｎｎｅｒ <D50 ｏｕｔｅｒ The multilayer ceramic capacitor according to any one of <1> to <3> above, which satisfies the above.

[0111] <5> D50 ｉｎｎｅｒ The multilayer ceramic capacitor according to <4> above, wherein the average particle diameter is 130 nm or more and 210 nm or less.

[0112] 2 Dielectric layer 4 Internal electrode layer 6 Element body 8a First external end surface electrode 8b Second external end surface electrode 8c First external side surface electrode 8d Second external side surface electrode 10a First external main surface 10b Second external main surface 12a First external side surface 12b Second external side surface 14a First external end surface 14b Second external end surface 16 Internal layer portion 18a First external layer portion 18b Second external layer portion 100 Multilayer ceramic capacitor

Claims

1. An inner layer having a first inner electrode layer and a second inner electrode layer alternately stacked via a dielectric layer formed of a ceramic dielectric, the inner layer having a first main surface which is a surface in the stacking direction, a second main surface which is the surface opposite to the first main surface, a first side surface which is a surface in the width direction perpendicular to the first and second main surfaces, a second side surface which is the surface opposite to the first side surface, a first end surface which is a surface in the length direction perpendicular to the first main surface, the second main surface, the first side surface, and the second side surface from which the first inner electrode layer is drawn out, and a second end surface which is the surface opposite to the first end surface from which the second inner electrode layer is drawn out. Formed of a ceramic dielectric, the first outer layer covers the first main surface from the stacking direction, A second outer layer, formed of a ceramic dielectric, covers the second main surface from the stacking direction, and The first and second end faces are provided with a pair of external end face electrodes connected to the first internal electrode layer and the second internal electrode layer, respectively. Each of the ceramic dielectrics constituting the inner layer, the first outer layer, and the second outer layer has a plurality of dielectric particles having voids inside, The pore ratio (N) of the ceramic dielectric in the inner layer ｉｎｎｅｒ ), and the void ratio (N) of the ceramic dielectric in the first outer layer and the second outer layer. ｏｕｔｅｒ ) is equation (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ A multilayer ceramic capacitor that satisfies the requirements.

2. An inner layer having a first inner electrode layer and a second inner electrode layer alternately stacked via a dielectric layer formed of a ceramic dielectric, the inner layer having a first main surface which is a surface in the stacking direction, a second main surface which is the surface opposite to the first main surface, a first side surface which is a surface in the width direction perpendicular to the first and second main surfaces and from which the second inner electrode layer is drawn, a second side surface which is the surface opposite to the first side surface and from which the second inner electrode layer is drawn, a first end surface which is a surface in the length direction perpendicular to the first main surface, the second main surface, the first side surface and the second side surface and from which the first inner electrode layer is drawn, and a second end surface which is the surface opposite to the first end surface and from which the first inner electrode layer is drawn. Formed of a ceramic dielectric, the first outer layer covers the first main surface from the stacking direction, Formed of a ceramic dielectric, the second outer layer covers the second main surface from the stacking direction, A pair of external end face electrodes provided on the first and second end faces and connected to the first internal electrode layer, and It has a pair of external side electrodes provided on the first and second side surfaces and connected to the second internal electrode layer, Each of the ceramic dielectrics constituting the inner layer, the first outer layer, and the second outer layer has a plurality of dielectric particles having voids inside, The pore ratio (N) of the ceramic dielectric in the inner layer ｉｎｎｅｒ ), and the void ratio (N) of the ceramic dielectric in the first outer layer and the second outer layer. ｏｕｔｅｒ ) is equation (1): N ｏｕｔｅｒ <N ｉｎｎｅｒ A multilayer ceramic capacitor that satisfies the requirements. 【Request Item 3】 The Zr concentration (Zr ｉｎｎｅｒ ), and the Zr concentration (Zr ｏｕｔｅｒ ) of the ceramic dielectric in the first outer layer portion and the second outer layer portion satisfy the formula (2): Zr ｉｎｎｅｒ < Zr ｏｕｔｅｒ The multilayer ceramic capacitor according to claim 1 or 2. 【Request Item 4】 The average particle size (D50) of the dielectric particles of the ceramic dielectric in the inner layer. ｉｎｎｅｒ ), and the average particle size (D50) of the dielectric particles of the ceramic dielectric in the first outer layer and the second outer layer. ｏｕｔｅｒ ) is equation (3): D50 ｉｎｎｅｒ <D50 ｏｕｔｅｒ A multilayer ceramic capacitor according to claim 1 or 2 that satisfies the following conditions. 【Request Item 5】 The aforementioned D50 ｉｎｎｅｒ The multilayer ceramic capacitor according to claim 4, wherein the wavelength is 130 nm or more and 210 nm or less.