Display apparatus having link wirings

Abstract

The present invention relates to a display device comprising link wirings. The link wirings can electrically connect a display area and a pad area of ​​a bezel area. An upper interlayer insulating film and a device protective film may be located on the link wirings. A power supply voltage line that electrically connects the display area and the pad area may be located between the upper interlayer insulating film and the device protective film. An encapsulation dam and an upper planarization film may be located on the device protective film. The encapsulation dam may traverse between the display area and the pad area. The upper planarization film may be located on the outer side of a dam area that overlaps with the encapsulation dam. A first moisture barrier may be located between the pad area and the encapsulation dam. A second moisture barrier may be located between the encapsulation dam and the display area. The first moisture barrier and the second moisture barrier may overlap with the ends of the upper planarization film.

Description

Technology Field

[0001] The present invention relates to a display device comprising link wirings that electrically connect a pad area between a display area and a bezel area. Background Technology

[0002] Generally, a display device provides an image to a user. For example, the display device may include light-emitting elements located on a device substrate. Each light-emitting element may emit light of a specific color. For example, each light-emitting element may include a first electrode, a light-emitting layer, and a second electrode stacked in sequence on the device substrate.

[0003] The above-described device substrate may include a display area where the light-emitting elements are located and a bezel area located outside the display area. A pad area to which an external signal is applied may be located in the bezel area. The pad area may be electrically connected to the display area by link wiring.

[0004] A power supply line for transmitting power voltage may be located on the above link wirings. For example, each link wiring may partially overlap with the power supply line. The power supply line may be insulated from the link wirings. For example, an upper interlayer insulating film may be located between the link wirings and the power supply line.

[0005] The upper interlayer insulating film may have a step difference caused by the link wiring. For example, the upper surface of the upper interlayer insulating film facing the device substrate may have an uneven shape due to the link wiring. Accordingly, in the display device, a void may be generated due to the uneven shape of the upper interlayer insulating film around the encapsulation dam where the organic insulating film is not formed. The void may function as a penetration path for external moisture. Therefore, in the display device, the light-emitting elements may deteriorate due to the void generated by the link wiring. The problem to be solved

[0006] The problem that the present invention aims to solve is to provide a display device capable of preventing the penetration of external moisture through voids created by link wirings.

[0007] The problems that the present invention aims to solve are not limited to those mentioned above. Problems not mentioned herein will be clearly understood by a person skilled in the art from the description below. means of solving the problem

[0008] A display device according to the technical concept of the present invention for achieving the above-mentioned problem includes a device substrate. The device substrate includes a display area, a first bezel area, a second bezel area, a dam area, a third bezel area, a fourth bezel area, and a pad area positioned side by side in a first direction. An upper interlayer insulating film is located on the display area. The upper interlayer insulating film extends onto the pad area. Link lines are located between the device substrate and the upper interlayer insulating film. A power supply voltage line and a device protection film are located on the upper interlayer insulating film. The power supply voltage line and the link lines electrically connect the display area and the pad area. The device protection film covers the power supply voltage line. An encapsulation dam, a planarization film, a first moisture barrier film, and a second moisture barrier film are located on the device protection film. The encapsulation dam is located on the dam area. The encapsulation dam crosses between the display area and the pad area in a second direction that intersects the first direction. The flattening film is located on the display area, the first bezel area, and the fourth bezel area. The flattening film is spaced apart from the second bezel area, the dam area, and the third bezel area. The first moisture barrier film crosses between the pad area and the dam area. The first moisture barrier film overlaps with the boundary between the third bezel area and the fourth bezel area. The second moisture barrier film crosses between the dam area and the display area. The second moisture barrier film overlaps with the boundary between the first bezel area and the second bezel area.

[0009] A flattening film located on the fourth bezel region may include an end that overlaps with the first moisture barrier film. A flattening film located on the first bezel region may include an end that overlaps with the second moisture barrier film.

[0010] The end of the flattening film located on the fourth bezel region may come into contact with the first moisture barrier. The end of the flattening film located on the first bezel region may come into contact with the second moisture barrier.

[0011] The first moisture barrier and the second moisture barrier may include an inorganic insulating material.

[0012] The second moisture barrier can have the same thickness as the first moisture barrier.

[0013] The second moisture barrier may contain the same material as the first moisture barrier.

[0014] The second moisture barrier may include the same material as the device protective film.

[0015] The first moisture barrier and the second moisture barrier can extend parallel to the bag dam.

[0016] A light-emitting element may be located on the planarization film of the display area. A first encapsulation layer may be located on the light-emitting element. The first encapsulation layer may include an inorganic insulating material. The first encapsulation layer may be in contact with a device protective film on the second bezel area and the third bezel area.

[0017] The first moisture barrier and the second moisture barrier can each come into contact with the first encapsulation layer.

[0018] The second moisture barrier can have the same width as the first moisture barrier.

[0019] A bending area may be located between the fourth bezel area and the pad area. Effects of the invention

[0020] A display device according to the technical concept of the present invention may include link wirings that electrically connect a display area and a pad area between a device substrate and an upper interlayer insulating film, a power supply voltage line that electrically connects the display area and the pad area on the upper interlayer insulating film, an encapsulation dam that crosses between the display area and the pad area on a device protective film covering the power supply voltage line, a first moisture barrier that crosses between the pad area and the encapsulation dam on the device protective film, a second moisture barrier that crosses between the encapsulation dam and the display area on the device protective film, and a planarization film that is spaced apart from a dam periphery area that overlaps with the encapsulation dam on the device protective film. Accordingly, in a display device according to the technical concept of the present invention, a void created by the link wirings may not function as a penetration path for external moisture. In addition, in a display device according to the technical concept of the present invention, the first moisture barrier and the second moisture barrier may overlap with the end of the flattening film facing the dam area where the encapsulation dam is located. Accordingly, in a display device according to the technical concept of the present invention, degradation of the light-emitting element due to the penetration of external moisture can be prevented. In addition, in a display device according to the technical concept of the present invention, the lifespan of the light-emitting element can be improved. That is, in a display device according to the technical concept of the present invention, power consumption can be reduced through low-power driving. Brief explanation of the drawing

[0021] FIG. 1 is a schematic diagram showing a display device according to an embodiment of the present invention. FIG. 2 is a diagram showing a circuit of a unit pixel area in a display device according to an embodiment of the present invention. FIG. 3 is a diagram showing a cross-section of a pixel area in a display device according to an embodiment of the present invention. Figure 4 is an enlarged view of the K region of Figure 1. Figure 5 is a drawing showing a cross-section cut along the line I-I' of Figure 4. FIGS. 6 and 7 are drawings showing a display device according to another embodiment of the present invention. Specific details for implementing the invention

[0022] Detailed information regarding the purpose, technical configuration, and resulting effects of the present invention will be more clearly understood through the following detailed description with reference to the drawings illustrating embodiments of the present invention. Here, since the embodiments of the present invention are provided to ensure that the technical concept of the present invention is sufficiently conveyed to those skilled in the art, the present invention may be embodied in other forms so as not to be limited to the embodiments described below.

[0023] Additionally, parts indicated by the same reference number throughout the specification refer to the same components, and the length and thickness of layers or regions in the drawings may be exaggerated for convenience. Furthermore, where it is stated that a first component is "on" a second component, this includes not only the case where the first component is located on the upper side in direct contact with the second component, but also the case where a third component is located between the first component and the second component.

[0024] Here, terms such as "first," "second," etc. are used to describe various components and to distinguish one component from another. However, within the scope of the technical concept of the present invention, the first component and the second component may be named at will for the convenience of those skilled in the art.

[0025] The terms used in the specification of the present invention are used merely to describe specific embodiments and are not intended to limit the invention. For example, a component expressed in the singular includes a plurality of components unless the context clearly implies only the singular. Furthermore, in the specification of the present invention, terms such as "comprising" or "having" are intended to indicate the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0026] Additionally, unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the specification of the present invention.

[0027] (Example)

[0028] FIG. 1 is a schematic diagram showing a display device according to an embodiment of the present invention. FIG. 2 is a diagram showing a circuit of a unit pixel area in a display device according to an embodiment of the present invention. FIG. 3 is a diagram showing a cross-section of a pixel area in a display device according to an embodiment of the present invention.

[0029] Referring to FIGS. 1 to 3, a display device according to an embodiment of the present invention may include a display panel (DP). The display panel (DP) may generate an image to be provided to a user. For example, the display panel (DP) may include a plurality of pixel areas (PA).

[0030] Various signals may be provided to each pixel area (PA) through signal lines (GL, DL, PL). For example, the signal lines (GL, DL, PL) may include gate lines (GL) that sequentially apply gate signals to each pixel area (PA), data lines (DL) that apply data signals to each pixel area (PA), and voltage lines (PL) that supply a positive power supply voltage to each pixel area (PA). The gate lines (GL) may be electrically connected to a gate driver (GD), and the data lines (DL) may be electrically connected to a data driver. The gate driver (GD) and the data driver may be controlled by the timing controller. For example, the gate driver (GD) may receive clock signals, reset signals, and start signals from the timing controller, and the data driver may receive digital video data and source timing signals from the timing controller. The voltage lines (PL) may be electrically connected to a power unit.

[0031] Each pixel area (PA) can implement a specific color. For example, within each pixel area (PA), a light-emitting element (300) and a pixel driving circuit (DC) electrically connected to the light-emitting element (300) may be located. The light-emitting element (300) and the pixel driving circuit (DC) of each pixel area (PA) may be located on a device substrate (100). The device substrate (100) may include an insulating material. For example, the device substrate (100) may include glass or plastic.

[0032] The light-emitting element (300) of each pixel area (PA) can emit light that exhibits a specific color. For example, the light-emitting element (300) of each pixel area (PA) may include a first electrode (310), a light-emitting layer (320), and a second electrode (330) stacked in order on the element substrate (100).

[0033] The first electrode (310) may include a conductive material. The first electrode (310) may include a material having a high reflectivity. For example, the first electrode (310) may include a metal such as aluminum (Al) and silver (Ag). The first electrode (310) may have a multilayer structure. For example, the first electrode (310) may have a structure in which a reflective electrode made of metal is positioned between transparent electrodes made of transparent conductive materials such as ITO and IZO.

[0034] The light-emitting layer (320) can generate light of brightness corresponding to the voltage difference between the first electrode (310) and the second electrode (330). For example, the light-emitting layer (320) may include an emission material layer (EML) containing a light-emitting material. The light-emitting material may include an organic material, an inorganic material, or a hybrid material. For example, a display device according to an embodiment of the present invention may be an organic light-emitting display device containing an organic light-emitting material.

[0035] The light-emitting layer (320) may have a multilayer structure. For example, the light-emitting layer (320) may further include at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Accordingly, in a display device according to an embodiment of the present invention, the light-emitting efficiency of the light-emitting layer (320) may be improved.

[0036] The second electrode (330) may include a conductive material. The second electrode (330) may include a material different from the first electrode (310). The transmittance of the second electrode (330) may be greater than the transmittance of the first electrode (310). For example, the second electrode (330) may be a transparent electrode made of a transparent conductive material such as ITO and IZO. Accordingly, in a display device according to an embodiment of the present invention, light generated by the light-emitting layer (320) may be emitted to the outside through the second electrode (330).

[0037] The pixel driving circuit (DC) of each pixel area (PA) can supply a driving current corresponding to the data signal according to the gate signal to the light-emitting element (300) of each pixel area (PA) for one frame. For example, the pixel driving circuit (DC) of each pixel area (PA) may include a first thin-film transistor (T1), a second thin-film transistor (T2), and a storage capacitor (Cst).

[0038] The first thin-film transistor (T1) may include a first semiconductor pattern, a first gate electrode, a first drain electrode, and a first source electrode. The first thin-film transistor (T1) may transmit the data signal to the second thin-film transistor (T2) according to the gate signal. For example, the first thin-film transistor (T1) may be a switching thin-film transistor. The first gate electrode may be electrically connected to one of the gate lines (GL), and the first drain electrode may be electrically connected to one of the data lines (DL).

[0039] The first semiconductor pattern may include a semiconductor material. For example, the first semiconductor pattern may include an oxide semiconductor such as amorphous silicon (a-Si), polycrystalline silicon (Poly-Si), or IGZO. The first semiconductor pattern may include a first drain region, a first channel region, and a first source region. The first channel region may be located between the first drain region and the first source region. The resistance of the first drain region and the resistance of the first source region may be smaller than the resistance of the first channel region. For example, the first drain region and the first source region may include a conductive region of the oxide semiconductor. The first channel region may be a non-conductive region of the oxide semiconductor.

[0040] The first gate electrode may include a conductive material. For example, the first gate electrode may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The first gate electrode may be located on the first semiconductor pattern. For example, the first gate electrode may overlap with the first channel region of the first semiconductor pattern. The first drain region and the first source region of the first semiconductor pattern may be located outside the first gate electrode. The first gate electrode may be insulated from the first semiconductor pattern. For example, the first source region of the first semiconductor pattern may be electrically connected to the first drain region of the first semiconductor pattern by a signal applied to the first gate electrode.

[0041] The first drain electrode may include a conductive material. For example, the first drain electrode may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The first drain electrode may include a material different from the first gate electrode. The first drain electrode may be located on a different layer from the first gate electrode. For example, the first drain electrode may be insulated from the first gate electrode. The first drain electrode may be electrically connected to the first drain region of the first semiconductor pattern.

[0042] The first source electrode may include a conductive material. For example, the first source electrode may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The first source electrode may include a material different from the first gate electrode. The first source electrode may be located on a different layer from the first gate electrode. For example, the first source electrode may be located on the same layer as the first drain electrode. The first source electrode may include the same material as the first drain electrode. The first source electrode may be insulated from the first gate electrode. For example, the first source electrode may be electrically connected to the first source region of the first semiconductor pattern.

[0043] The second thin-film transistor (T2) may include a second semiconductor pattern (221), a second gate electrode (223), a second drain electrode (225), and a second source electrode (227). The second thin-film transistor (T2) may generate the driving current corresponding to the data signal. For example, the second thin-film transistor (T2) may be a driving thin-film transistor. The second gate electrode (223) may be electrically connected to the first drain electrode, and the second drain electrode (225) may be electrically connected to one of the voltage lines (PL).

[0044] The second semiconductor pattern (221) may include a semiconductor material. For example, the second semiconductor pattern (221) may include an oxide semiconductor such as amorphous silicon (a-Si), polycrystalline silicon (Poly-Si), or IGZO. The second semiconductor pattern (221) may include a second channel region located between a second drain region and a second source region. The second drain region and the second source region may have a lower resistance than the second channel region. For example, the second drain region and the second source region may include a conductive region of the oxide semiconductor, and the second channel region may be a non-conductive region of the oxide semiconductor.

[0045] The second semiconductor pattern (221) may be located on the same layer as the first semiconductor pattern. The second semiconductor pattern (221) may include the same material as the first semiconductor pattern. For example, the second semiconductor pattern (221) may be formed simultaneously with the first semiconductor pattern.

[0046] The second gate electrode (223) may be located on the second semiconductor pattern (221). For example, the second gate electrode (223) may overlap with the second channel region of the second semiconductor pattern (221). The second drain region and the second source region of the second semiconductor pattern (221) may be located outside the second gate electrode (223). The second gate electrode (223) may include a conductive material. For example, the second gate electrode (223) may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second gate electrode (223) may be insulated from the second semiconductor pattern (221). For example, the second channel region of the second semiconductor pattern (221) may have an electrical conductivity corresponding to the voltage applied to the second gate electrode (223).

[0047] The second gate electrode (223) may be located on the same layer as the first gate electrode. The second gate electrode (223) may include the same material as the first gate electrode. For example, the second gate electrode (223) may be formed simultaneously with the first gate electrode.

[0048] The second drain electrode (225) may include a conductive material. For example, the second drain electrode (225) may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second drain electrode (225) may include a material different from the second gate electrode (223). The second drain electrode (225) may be located on a different layer from the second gate electrode (223). For example, the second drain electrode (225) may be insulated from the second gate electrode (223). The second drain electrode (225) may be electrically connected to the second drain region of the second semiconductor pattern (221).

[0049] The second drain electrode (225) may be located on the same layer as the first drain electrode. The second drain electrode (225) may contain the same material as the first drain electrode. For example, the second drain electrode (225) may be formed simultaneously with the first drain electrode.

[0050] The second source electrode (227) may include a conductive material. For example, the second source electrode (227) may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The second source electrode (227) may include a material different from the second gate electrode (223). The second source electrode (227) may be located on a different layer from the second gate electrode (223). For example, the second source electrode (227) may be located on the same layer as the second drain electrode (225). The second source electrode (227) may include the same material as the second drain electrode (225). For example, the second source electrode (227) may be formed simultaneously with the second drain electrode (225). The second source electrode (227) may be insulated from the second gate electrode (223). The second source electrode (227) may be electrically connected to the second source region of the second semiconductor pattern (221).

[0051] The second source electrode (227) may be located on the same layer as the first source electrode. The second source electrode (227) may include the same material as the first source electrode. For example, the second source electrode (227) may be formed simultaneously with the first source electrode.

[0052] The storage capacitor (Cst) can maintain a signal applied to the second gate electrode (223) of the second thin-film transistor (T2) for one frame. For example, the storage capacitor (Cst) may be electrically connected between the second gate electrode (223) and the second source electrode (227) of the second thin-film transistor (T2). The storage capacitor (Cst) may have a stacked structure of the capacitor electrodes (231, 232). For example, the storage capacitor (Cst) may include a first capacitor electrode (231) and a second capacitor electrode (232). At least one of the capacitor electrodes (231, 232) may be formed using the formation process of the first thin-film transistor (T1) and the second thin-film transistor (T2). For example, the first capacitor electrode (231) may include the same material as the second gate electrode (223). The second capacitor electrode (232) may comprise a material different from the second drain electrode (225) and the second source electrode (227). For example, the second capacitor electrode (232) may be located on a different layer from the second drain electrode (225) and the second source electrode (227).

[0053] A plurality of insulating films (110, 120, 130, 140, 150, 160, 170, 180) may be positioned on the device substrate (100) to prevent unnecessary electrical connections within each pixel area (PA). For example, a buffer insulating film (110), a gate insulating film (120), a lower interlayer insulating film (130), an upper interlayer insulating film (140), a device protection film (150), a lower planarization film (160), an upper planarization film (170), and a bank insulating film (180) may be positioned on the device substrate (100).

[0054] The buffer insulating film (110) may be located close to the device substrate (100). The buffer insulating film (110) can prevent contamination by the device substrate (100) during the formation process of the pixel driving circuit (DC) located within each pixel area (PA). For example, the upper surface of the device substrate (100) facing the pixel driving circuit (DC) of each pixel area (PA) may be completely covered by the buffer insulating film (110). The first thin-film transistor (T1), the second thin-film transistor (T2), and the storage capacitor (Cst) of each pixel area (PA) may be located on the buffer insulating film (110). The buffer insulating film (110) may include an insulating material. For example, the buffer insulating film (110) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The buffer insulating film (110) may have a multilayer structure. For example, the buffer insulating film (110) may have a stacked structure of an inorganic insulating film made of silicon oxide (SiOx) and an inorganic insulating film made of silicon nitride (SiNx).

[0055] The gate insulating film (120) may be located on the buffer insulating film (110). The gate insulating film (120) may insulate between the semiconductor pattern (221) and the gate electrode (223) of each thin-film transistor (T1, T2). For example, the gate insulating film (120) may cover the first semiconductor pattern and the second semiconductor pattern (221) of each pixel region (PA). The first gate electrode and the second gate electrode (223) of each pixel region (PA) may be located on the gate insulating film (120). The first capacitor electrode (231) of each pixel region (PA) may be located on the gate insulating film (120). The gate insulating film (120) may include an insulating material. For example, the gate insulating film (120) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx).

[0056] The lower interlayer insulating film (130) and the upper interlayer insulating film (140) can insulate the drain electrode (225) and the source electrode (227) of each thin-film transistor (T1, T2) from the gate electrode (223) of the corresponding thin-film transistor (T1, T2). The upper interlayer insulating film (140) can be located on the lower interlayer insulating film (130). For example, the lower interlayer insulating film (130) can cover the first gate electrode and the second gate electrode (223) of each pixel region (PA). The first drain electrode, the first source electrode, the second drain electrode (225), and the second source electrode (227) of each pixel region (PA) can be located on the upper interlayer insulating film (140). The lower interlayer insulating film (130) and the upper interlayer insulating film (140) may include an insulating material. For example, the lower interlayer insulating film (130) and the upper interlayer insulating film (140) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The upper interlayer insulating film (140) may include a material different from that of the lower interlayer insulating film (130). Accordingly, in a display device according to an embodiment of the present invention, the stability of the pixel driving circuit (DC) located within each pixel area (PA) may be improved. The second capacitor electrode (232) of each pixel area (PA) may be located between the lower interlayer insulating film (130) and the upper interlayer insulating film (140).

[0057] The device protective film (150) may be located on the upper interlayer insulating film (140). The device protective film (150) may prevent damage to the pixel driving circuit (DC) located within each pixel area (PA) due to external shock and moisture. For example, the first drain electrode, the first source electrode, the second drain electrode (225), and the second source electrode (227) of each pixel area (PA) may be covered by the device protective film (150). The device protective film (150) may include an insulating material. For example, the device protective film (150) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx).

[0058] The lower planarization film (160) and the upper planarization film (170) may be stacked sequentially on the device protection film (150). For example, the lower planarization film (160) may be located between the device protection film (150) and the upper planarization film (170). The lower planarization film (160) and the upper planarization film (170) can eliminate the step difference caused by the pixel driving circuit (DC) of each pixel area (PA). For example, the upper surface of the upper planarization film (170) facing the device substrate (100) may be a flat plane. The lower planarization film (160) and the upper planarization film (170) may include an insulating material. The lower planarization film (160) and the upper planarization film (170) may include a material different from the device protection film (150). For example, the lower flattening film (160) and the upper flattening film (170) may include an organic insulating material. The upper flattening film (170) may include a material different from that of the lower flattening film (160).

[0059] The light-emitting element (300) of each pixel area (PA) may be located on the upper planarization film (170). For example, the first electrode (310), the light-emitting layer (320), and the second electrode (330) of each pixel area (PA) may be stacked in order on the upper surface of the upper planarization film (170) located within the corresponding pixel area (PA). The first electrode (310) of each pixel area (PA) may be in direct contact with the upper surface of the upper planarization film (170). Accordingly, in a display device according to an embodiment of the present invention, a variation in brightness according to the position of light generation emitted from the light-emitting element (300) of each pixel area (PA) can be prevented.

[0060] Intermediate electrodes (510) may be located between the lower planarization film (160) and the upper planarization film (170). The intermediate electrodes (510) may include a conductive material. For example, the intermediate electrodes (510) may include metals such as aluminum (Al), chromium (Cr), copper (Cu), molybdenum (Mo), titanium (Ti), and tungsten (W). The first electrode (310) of each pixel area (PA) may be electrically connected to the second source electrode (227) of the corresponding pixel area (PA) through one of the intermediate electrodes (510). For example, each intermediate electrode (510) can penetrate the lower flattening film (160) of each pixel area (PA) and come into direct contact with the second source electrode (227) of the corresponding pixel area (PA), and the first electrode (310) of each pixel area (PA) can penetrate the upper flattening film (170) of the corresponding pixel area (PA) and come into direct contact with one of the intermediate electrodes (510).

[0061] The bank insulating film (180) may be positioned on the upper planarization film (170). The bank insulating film (180) may define a light-emitting region within each pixel area (PA). For example, the bank insulating film (180) may cover the edge of the first electrode (310) located within each pixel area (PA). The light-emitting layer (320) and the second electrode (330) of each pixel area (PA) may be stacked sequentially on a portion of the corresponding first electrode (310) exposed by the bank insulating film (180). The bank insulating film (180) may include an insulating material. For example, the bank insulating film (180) may include an organic insulating material. The bank insulating film (180) may include a material different from that of the upper planarization film (170).

[0062] At least a portion of the light-emitting layer (320) of each pixel region (PA) may extend outward from the corresponding pixel region (PA). For example, at least one of the hole injection layer (HIL), the hole transport layer (HTL), the electron transport layer (ETL), and the electron injection layer (EIL) located within each pixel region (PA) may extend onto the bank insulating film (180). At least one of the hole injection layer (HIL), the hole transport layer (HTL), the electron transport layer (ETL), and the electron injection layer (EIL) located within each pixel region (PA) may be formed simultaneously with the corresponding layer located within an adjacent pixel region (PA). For example, at least one of the hole injection layer (HIL), the hole transport layer (HTL), the electron transport layer (ETL), and the electron injection layer (EIL) may be formed on the entire surface of the device substrate (100). Accordingly, process efficiency may be improved in a display device according to an embodiment of the present invention.

[0063] The voltage applied to the second electrode (330) of each pixel area (PA) may be the same as the voltage applied to the second electrode (330) of an adjacent pixel area (PA). For example, a negative power supply voltage may be applied to the second electrode (330) of each pixel area (PA). The second electrode (330) of each pixel area (PA) may be electrically connected to the second electrode (330) of an adjacent pixel area (PA). The second electrode (330) of each pixel area (PA) may contain the same material as the second electrode (330) of an adjacent pixel area (PA). For example, the second electrode (330) of each pixel area (PA) may be formed simultaneously with the second electrode (330) of an adjacent pixel area (PA). The second electrode (330) of each pixel area (PA) may come into direct contact with the second electrode (330) of an adjacent pixel area (PA). For example, the second electrode (330) of each pixel area (PA) may extend outward from the corresponding pixel area (PA). Accordingly, in a display device according to an embodiment of the present invention, the process of forming the second electrode (330) within each pixel area (PA) may be simplified. Therefore, in a display device according to an embodiment of the present invention, process efficiency may be improved. In addition, in a display device according to an embodiment of the present invention, the brightness of light emitted from the light-emitting element (300) of the corresponding pixel area (PA) may be controlled by the data signal applied to the pixel driving circuit (DC) of each pixel area (PA).

[0064] An encapsulation unit (400) may be positioned on the light-emitting element (300) of each pixel area (PA). The encapsulation unit (400) can prevent damage to the light-emitting elements (300) caused by external moisture and impact. For example, the light-emitting element (300) of each pixel area (PA) may be completely covered by the encapsulation unit (400). The encapsulation unit (400) may have a multilayer structure. For example, the encapsulation unit (400) may include a first encapsulation layer (410), a second encapsulation layer (420), and a third encapsulation layer (430) stacked in order. The first encapsulation layer (410), the second encapsulation layer (420), and the third encapsulation layer (430) may include an insulating material. The second encapsulation layer (420) may include a material different from the first encapsulation layer (410) and the third encapsulation layer (430). For example, the first encapsulation layer (410) and the third encapsulation layer (430) may include an inorganic insulating material, and the second encapsulation layer (420) may include an organic insulating material. Accordingly, in a display device according to an embodiment of the present invention, damage to the light-emitting elements (300) caused by external moisture and shock can be effectively prevented. Steps caused by the light-emitting elements (300) can be eliminated by the second encapsulation layer (420). For example, the upper surface of the encapsulation unit (400) facing the element substrate (100) on the pixel regions (PA) may be a flat plane.

[0065] The display panel (DP) may include a display area (AA) where the pixel areas (PA) are located and a bezel area (BZ) located outside the display area (AA). At least one of the gate driver (GD), the data driver, the power unit, and the timing controller may be located on the bezel area (BZ) of the display panel (DP). For example, a display device according to an embodiment of the present invention may be a GIP (Gate In Panel) type display device in which the gate driver (GD) is formed on the bezel area (BZ) of the display panel (DP).

[0066] A pad area (PAD) may be located in the bezel area (BZ). A signal applied from the outside of the device substrate (100) may be transmitted to the display area (AA) through the pad area (PAD). For example, on the device substrate (100), at least one gate link wiring (GLL) electrically connecting the pad area (PAD) to the gate driver (GD) and data link wirings (DLL) electrically connecting the pad area (PAD) to the display area (AA) may be located. Each data line (DL) may be electrically connected to one of the data link wirings (DLL). For example, the data driver may apply the data signal to each pixel area (PA) through the pad area (PAD), the data link wirings (DLL), and the data lines (DL).

[0067] Figure 4 is an enlarged view of the K region of Figure 1. Figure 5 is a cross-sectional view taken along the line I-I' of Figure 4.

[0068] Referring to FIGS. 1 through 5, in a display device according to an embodiment of the present invention, the data link wiring (DLL) may include first links (LL1) and second links (LL2). The second links (LL2) may be located between the first links (LL1). The second links (LL2) may include a material different from the first links (LL1). The second links (LL2) may be located on a different layer from the first links (LL1). The data link wiring (DLL) may be formed using a process for forming the pixel driving circuit (DC) of each pixel area (PA). For example, the first links (LL1) may be formed simultaneously with the first capacitor electrode (231) of each pixel area (PA), and the second links (LL2) may be formed simultaneously with the second capacitor electrode (232) of each pixel area (PA). The first links (LL1) may include the same material as the first capacitor electrode (231) of each pixel area (PA), and the second links (LL2) may include the same material as the second capacitor electrode (232) of each pixel area (PA). Accordingly, in a display device according to an embodiment of the present invention, the area occupied by the data link wiring (DLL) can be minimized without reducing process efficiency.

[0069] In a display device according to an embodiment of the present invention, at least some of the insulating films (110, 120, 130, 140, 150, 160, 170, 180) located on the display area (AA) may extend onto the bezel area (BZ). For example, in a display device according to an embodiment of the present invention, the buffer insulating film (110), the gate insulating film (120), the lower interlayer insulating film (130), the upper interlayer insulating film (140), the device protection film (150), the lower planarization film (160), and the upper planarization film (170) may extend onto the pad area (PAD) of the device substrate (100). The first links (LL1) may be located on the same layer as the first capacitor electrode (231) of each pixel area (PA). For example, the first links (LL1) may be located between the gate insulating film (120) and the lower interlayer insulating film (130). The second links (LL2) may be located on the same layer as the second capacitor electrode (232) of each pixel area (PA). For example, the second links (LL2) may be located between the lower interlayer insulating film (130) and the upper interlayer insulating film (140). Accordingly, in a display device according to an embodiment of the present invention, the first links (LL1) and the second links (LL2) of the data link wirings (DLL) located side by side can be insulated without a decrease in process efficiency.

[0070] At least one encapsulation dam (105) may be located on the bezel area (BZ). The encapsulation dam (105) may block the flow of the second encapsulation layer (420), which is an organic insulating film. For example, the second encapsulation layer (420) may be formed within an area defined by the encapsulation dam (105). The encapsulation dam (105) may extend along the edge of the display area (AA). The encapsulation dam (105) may be located between the display area (AA) and the gate driver (GD). The encapsulation dam (105) may cross between the display area (AA) and the pad area (PAD). Accordingly, in a display device according to an embodiment of the present invention, malfunction of the gate driver (GD) caused by the second encapsulation layer (420) may be prevented. In addition, in a display device according to an embodiment of the present invention, distortion of the signal applied through the pad area (PAD) by the second encapsulation layer (420) can be prevented. Therefore, reliability can be improved in a display device according to an embodiment of the present invention.

[0071] An organic insulating film may not be laminated around the above-mentioned encapsulation dam (105). For example, a dam area (DR) in which the encapsulation dam (105) is located may be located between the display area (AA) and the pad area (PAD) which are positioned side by side in the first direction (X). The bezel area (BZ) between the display area (AA) and the dam area (DR) may include a first bezel area (B1) in which the lower flattening film (160) and the upper flattening film (170) are located, and a second bezel area (B2) in which the lower flattening film (160) and the upper flattening film (170) are not located. For example, the second bezel area (B2) may be located between the first bezel area (B1) and the dam area (DR). The bezel area (BZ) between the dam area (DR) and the pad area (PAD) may include a third bezel area (B3) where the lower flattening film (160) and the upper flattening film (170) are not located, and a fourth bezel area (B4) where the lower flattening film (160) and the upper flattening film (170) are located. For example, the third bezel area (B3) may be located between the dam area (DR) and the fourth bezel area (B4). The display area (AA), the first bezel area (B1), the second bezel area (B2), the dam area (DR), the third bezel area (B3), and the fourth bezel area (B4) may be located side by side in the first direction (X). The above bag dam (105) may cross between the display area (AA) and the pad area (PAD). For example, the bag dam (105) may extend in a second direction (Y) on the dam area (DR). The second direction (Y) may be a direction intersecting the first direction (X). For example, the second direction (Y) may be a direction perpendicular to the first direction (X). The upper flattening film (170) may be spaced apart from the bag dam (105).For example, the second bezel region (B2) and the third bezel region (B3) may extend parallel to the dam region (DR) in the second direction (Y). For example, the second bezel region (B2) may be covered by the second encapsulation layer (420). Accordingly, in a display device according to an embodiment of the present invention, the flow of the second encapsulation layer (420), which is an organic insulating film, can be effectively blocked by the encapsulation dam (105).

[0072] The above-mentioned encapsulation dam (105) can be formed using a process for forming insulating films (110, 120, 130, 140, 150, 160, 170, 180) stacked on the device substrate (100). For example, the encapsulation dam (105) may include a first dam pattern (105a) formed simultaneously with the upper planarization film (170) and a second dam pattern (105b) formed simultaneously with the bank insulating film (180). The first dam pattern (105a) may have the same thickness as the upper planarization film (170). The upper surface of the second dam pattern (105b) facing the device substrate (100) may have the same level as the upper surface of the bank insulating film (180) facing the device substrate (100). For example, the first dam pattern (105a) may be covered by the second dam pattern (105b). For example, the step of forming the encapsulation dam (105) may include the step of removing the lower flattening film (160) formed on the second bezel area (B2), the dam area (DR), and the third bezel area (B3); the step of forming the first dam pattern (105a) by patterning the upper flattening film (170) formed on the second bezel area (B2), the dam area (DR), and the third bezel area (B3); and the step of forming the second dam pattern (105b) by patterning the bank insulating film (180) formed on the second bezel area (B2), the dam area (DR), and the third bezel area (B3). The first sealing layer (410) and the third sealing layer (430) may extend outward from the sealing dam (105). For example, the third sealing layer (430) may come into direct contact with the first sealing layer (410) on the third bezel area (B3) and the fourth bezel area (B4).

[0073] A first moisture barrier (610) may be located between the pad area (PAD) and the encapsulation dam (105). The first moisture barrier (610) may be located on the element protection film (150). The first moisture barrier (610) may overlap with the boundary between the third bezel area (B3) and the fourth bezel area (B4). The first moisture barrier (610) may extend parallel to the encapsulation dam (105). For example, the first moisture barrier (610) may extend in the second direction (Y). The first moisture barrier (610) may include an insulating material. The first moisture barrier (610) may include a material capable of blocking the movement of moisture. For example, the first moisture barrier (610) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The first moisture barrier (610) may include a material different from the device protection film (150).

[0074] A second moisture barrier (620) may be located between the above-mentioned sealing dam (105) and the above-mentioned display area (AA). The second moisture barrier (620) may be located on the element protection film (150). The second moisture barrier (620) may overlap with the boundary between the third bezel area (B3) and the fourth bezel area (B4). The second moisture barrier (620) may extend parallel to the sealing dam (105). For example, the second moisture barrier (620) may extend in the second direction (Y). The second moisture barrier (620) may include an insulating material. The second moisture barrier (620) may include a material capable of blocking the movement of moisture. For example, the second moisture barrier (620) may include an inorganic insulating material such as silicon oxide (SiOx) and silicon nitride (SiNx). The second moisture barrier (620) may include a material different from the device protection film (150). For example, the second moisture barrier (620) may include the same material as the first moisture barrier (610). The second moisture barrier (620) may be located on the same layer as the first moisture barrier (610). For example, the second moisture barrier (620) may be formed simultaneously with the first moisture barrier (610). The second moisture barrier (620) may have the same thickness as the first moisture barrier (610).

[0075] On the bezel area (BZ) of the device substrate (100), a first power supply line (VDL) for supplying a positive power supply voltage to the pixel driving circuit (DC) of each pixel area (PA) and a second power supply line (VSL) for supplying a negative power supply voltage to the second electrode (330) of each pixel area (PA) may be located. The second power supply line (VSL) may be electrically connected to the second electrode (330) from the outside of the display area (AA). For example, the second power supply line (VSL) may extend along the edge of the display area (AA). The second power supply line (VSL) may extend from the outside of the encapsulation dam (105). That is, in a display device according to an embodiment of the present invention, the second electrode (330) can be electrically connected to the second power supply voltage line (VSL) by penetrating only the first encapsulation layer (410) and the third encapsulation layer (430). Accordingly, in a display device according to an embodiment of the present invention, the connection process between the second electrode (330) and the second power supply voltage line (VSL) can be simplified.

[0076] The voltage lines (PL) may be electrically connected to the first power supply voltage line (VDL). For example, the first power supply voltage line (VDL) may extend in the first direction (X) to electrically connect the display area (AA) and the pad area (PAD). The first power supply voltage line (VDL) may cross the encapsulation dam (105). Each data link wiring (DLL) may cross the first power supply voltage line (VDL). For example, the first links (LL1) and the second links (LL2) may each extend in the first direction (X), the second direction (Y), and the inclined direction (V). The first power supply voltage line (VDL) may intersect with a plurality of first links (LL1) and a plurality of second links (LL2) between the display area (AA) and the pad area (PAD). The first power supply voltage line (VDL) may be insulated from the data link wiring (DLL). For example, the first power supply voltage line (VDL) may be located between the upper interlayer insulating film (140) and the device protection film (150). The first power supply voltage line (VDL) may be insulated from the first links (LL1) by the upper interlayer insulating film (140). The first power supply voltage line (VDL) may be insulated from the second links (LL2) by the lower interlayer insulating film (130) and the upper interlayer insulating film (140).

[0077] The upper interlayer insulating film (140), the first power supply voltage line (VDL), and the device protective film (150) located on the data link wiring (DLL) extending in the inclined direction (V) may have a concave-convex shape in which concave portions and convex portions are repeated by the data link wiring (DLL). Accordingly, in a display device according to an embodiment of the present invention, a void that is not filled by the device protective film (150) may be formed between the convex portions of the first power supply voltage line (VDL) formed of a conductive material. The void formed between the convex portions of the first power supply voltage line (VDL) may extend parallel to the data link wiring (DLL). External moisture that has penetrated through the lower flattening film (160) and / or the upper flattening film (170), which are organic insulating materials, can move along the void.

[0078] The end of the lower flattening film (160) facing the dam area (DR) may be covered by the upper flattening film (170). For example, the end of the lower flattening film (160) located on the first bezel area (B1) may be covered by the upper flattening film (170) located on the first bezel area (B1), and the end of the lower flattening film (160) located on the fourth bezel area (B4) may be covered by the upper flattening film (170) located on the fourth bezel area (B4). The first moisture barrier (610) may overlap with the end of the lower flattening film (160) and the end of the upper flattening film (170) located on the fourth bezel area (B4). For example, the ends of the lower flattening film (160) and the upper flattening film (170) located on the fourth bezel area (B4) may come into direct contact with the first moisture barrier (610). The second moisture barrier (620) may overlap with the ends of the lower flattening film (160) and the upper flattening film (170) located on the first bezel area (B1). For example, the ends of the lower flattening film (160) and the upper flattening film (170) located on the first bezel area (B1) may come into direct contact with the second moisture barrier (620). The element protective film (150) located on the second bezel region (B2) and the third bezel region (B3) can come into direct contact with the first encapsulation layer (410).Accordingly, in a display device according to an embodiment of the present invention, external moisture that has penetrated through the lower flattening film (160) and / or the upper flattening film (170) located between the pad area (PAD) and the encapsulation dam (105) may not be able to enter the void formed between the convex portions of the first power supply voltage line (VDL) by the data link wiring (DLL) by the first moisture barrier (610). Additionally, in a display device according to an embodiment of the present invention, moisture that has moved through the void formed between the convex portions of the first power supply voltage line (VDL) may not be able to enter the lower flattening film (160) and / or the upper flattening film (170) located between the encapsulation dam (105) and the display area (AA) by the second moisture barrier (620). That is, in the display device according to the embodiment of the present invention, the void created by the data link wiring (DLL) may not be used as a path for external moisture to penetrate into the display area (AA). Therefore, in the display device according to the embodiment of the present invention, deterioration of the light-emitting elements (300) due to external moisture can be prevented.

[0079] Consequently, the display device according to an embodiment of the present invention comprises: data link wirings (DLL) electrically connecting the display area (AA) and the pad area (PAD) between the element substrate (100) and the upper interlayer insulating film (140); the first power supply voltage line (VDL) electrically connecting the display area (AA) and the pad area (PAD) on the upper interlayer insulating film (140); the encapsulation dam (105) crossing between the display area (AA) and the pad area (PAD) on the element protective film (150) covering the first power supply voltage line (VDL); the first moisture barrier (610) crossing between the pad area (PAD) and the encapsulation dam (105) on the element protective film (150); and the second moisture barrier crossing between the encapsulation dam (105) and the display area (AA) on the element protective film (150). The device includes an upper flattening film (170) spaced apart from the dam area (DR) where the barrier film (620) and the bag dam (105) are located, wherein the first moisture barrier film (610) overlaps with the end of the upper flattening film (170) located on the fourth bezel area (B4), and the second moisture barrier film (620) overlaps with the end of the upper flattening film (170) located on the first bezel area (B1). Accordingly, in the display device according to an embodiment of the present invention, moisture moving through the upper flattening film (170) may not be able to pass through the second bezel area (B2), the dam area (DR), and the third bezel area (B3) by the first moisture barrier film (610) and the second moisture barrier film (620). That is, in a display device according to an embodiment of the present invention, the penetration of external moisture through the void formed between the convex portions of the first power voltage supply line (VDL) by the data link wiring (DLL) can be prevented.Accordingly, in the display device according to the embodiment of the present invention, deterioration of the light-emitting elements (300) due to the penetration of external moisture can be prevented.

[0080] In a display device according to an embodiment of the present invention, an internal dummy wiring (DV) may be located between the lower flattening film (160) and the upper flattening film (170) of the first bezel region (B1). The internal dummy wiring (DV) may include the same material as the intermediate electrodes (510). For example, the internal dummy wiring (DV) may be formed simultaneously with the intermediate electrodes (510). The internal dummy wiring (DV) may be electrically connected to the first power supply voltage line (VDL) located between the device substrate (100) and the lower flattening film (160). Accordingly, in a display device according to an embodiment of the present invention, the resistance of the first power supply voltage line (VDL) supplying a positive power supply voltage may be reduced by the internal dummy wiring (DV). Therefore, in a display device according to an embodiment of the present invention, a brightness deviation caused by voltage drop may be prevented.

[0081] In a display device according to an embodiment of the present invention, the bezel area (BZ) may include a bending area (BA). The bending area (BA) may be an area where the element substrate (100) is bent. The bending area (BA) may be located between the display area (AA) and the pad area (PAD). For example, the pad area (PAD) may be moved relative to the display area (AA) by the bending of the bending area (BA). The dam area (DR) where the encapsulation dam (105) is located may be located between the bending area (BA) and the display area (AA). For example, the bending area (BA) may be located between the fourth bezel area (B4) and the pad area (PAD). That is, in a display device according to an embodiment of the present invention, the first moisture barrier (610) may be located between the bending area (BA) and the encapsulation dam (105). Accordingly, in a display device according to an embodiment of the present invention, damage to the first power supply voltage line (VDL) caused by bending stress generated by bending of the bending region (BA) is prevented, and the penetration of external moisture through the void created by the data link wiring (DLL) can be blocked.

[0082] A display device according to an embodiment of the present invention is described such that the pixel driving circuit (DC) of each pixel area (PA) is composed of the first thin-film transistor (T1), the second thin-film transistor (T2), and the storage capacitor (Cst). However, in a display device according to another embodiment of the present invention, the pixel driving circuit (DC) of each pixel area (PA) may include at least one thin-film transistor. For example, in a display device according to another embodiment of the present invention, the pixel driving circuit (DC) of each pixel area (PA) may include the first thin-film transistor (T1), the second thin-film transistor (T2), the storage capacitor (Cst), and the third thin-film transistor. The third thin-film transistor may transmit a reference voltage to the storage capacitor (Cst) according to the gate signal. For example, the third thin-film transistor may be a switching thin-film transistor. The third thin-film transistor may be electrically connected between the reference voltage supply line transmitting the reference voltage and the storage capacitor (Cst). The third thin-film transistor may have the same structure as the first thin-film transistor (T1). The third thin-film transistor may be formed simultaneously with the first thin-film transistor (T1). Accordingly, in a display device according to another embodiment of the present invention, the degree of freedom regarding the configuration of the pixel driving circuit (DC) located within each pixel area (PA) may be improved.

[0083] In a display device according to an embodiment of the present invention, the location and electrical connection of the drain electrodes (225) and the source electrodes (227) located within each pixel area (PA) may vary depending on the configuration of the pixel driving circuit (DC) located within the pixel area (PA) and / or the type of the thin-film transistors (T1, T2). For example, in a display device according to another embodiment of the present invention, the second gate electrode (223) of the second thin-film transistor (T2) located within each pixel area (PA) may be electrically connected to the first drain electrode of the first thin-film transistor (T1) located within the pixel area (PA). Accordingly, in a display device according to another embodiment of the present invention, the degree of freedom regarding the configuration of the pixel driving circuit (DC) located within the pixel area (PA) and the type of the thin-film transistors (T1, T2) included in each pixel driving circuit (DC) may be improved.

[0084] A display device according to an embodiment of the present invention is described such that the first moisture barrier (610) and the second moisture barrier (620) comprise a material different from that of the element protection film (150). However, in a display device according to another embodiment of the present invention, the first moisture barrier (610) and the second moisture barrier (620) may be formed of various materials. In a display device according to another embodiment of the present invention, the first moisture barrier (610) and the second moisture barrier (620) may comprise the same material as that of the element protection film (150). For example, as illustrated in FIG. 6, in a display device according to another embodiment of the present invention, the element protective film (150) may include a first protrusion (151p) in contact with the end of the lower flattening film (160) and the end of the upper flattening film (170) located on the fourth bezel area (B4), and a second protrusion (152p) in contact with the end of the lower flattening film (160) and the end of the upper flattening film (170) located on the first bezel area (B1). The first protrusion (151p) and the second protrusion (152p) of the element protective film (150) may have a thickness greater than that of a portion of the element protective film (150) located on the second bezel area (B2) and the third bezel area (B3). Accordingly, in a display device according to another embodiment of the present invention, the penetration of external moisture through the void created by the data link wiring (DLL) can be blocked by the first protrusion (151p) and the second protrusion (152p) of the element protective film (150). That is, in a display device according to another embodiment of the present invention, the degree of freedom regarding the material of the first moisture barrier film (610) and the second moisture barrier film (620) can be improved.

[0085] A display device according to an embodiment of the present invention is described as having the second moisture barrier (620) formed simultaneously with the first moisture barrier (610). However, in a display device according to another embodiment of the present invention, the second moisture barrier (620) may include a material different from that of the first moisture barrier (610). For example, as shown in FIG. 7, in a display device according to another embodiment of the present invention, the first moisture barrier (610) including a material different from that of the element protective film (150) may be located at the boundary between the third bezel area (B3) and the fourth bezel area (B4), and the second protrusion (152p) of the element protective film (150), having a relatively large thickness, may be located at the boundary between the first bezel area (B1) and the second bezel area (B2). Accordingly, in a display device according to another embodiment of the present invention, the end of the lower flattening film (160) and the end of the upper flattening film (170) located on the fourth bezel area (B4) may be in direct contact with the first moisture barrier film (610), and the end of the lower flattening film (160) and the end of the upper flattening film (170) located on the first bezel area (B1) may be in direct contact with the second protrusion (152p) of the element protection film (150). The first moisture barrier film (610) may be formed by a different process from the second protrusion (152p) of the element protection film (150). That is, in a display device according to another embodiment of the present invention, the first moisture barrier film (610) and the second moisture barrier film (620) may be formed through a material and process suitable for the corresponding location.Accordingly, in a display device according to another embodiment of the present invention, the degree of freedom for the process of forming the first moisture barrier (610) and the process of forming the second moisture barrier (620) is improved, and the penetration of external moisture by the first links (LL1) and the second links (LL2) can be effectively prevented. Explanation of the symbols

[0086] 100: Device substrate 105: Encapsulation dam 150: Device protective film 300: Light-emitting element 610: 1st Moisture Barrier 620: 2nd Moisture Barrier LL1: 1st link LL2: 2nd link VDL: 1st power supply voltage line

Claims

Claim 1 A device substrate comprising a display area, a first bezel area, a second bezel area, a dam area, a third bezel area, a fourth bezel area, and a pad area positioned parallel to each other in a first direction; an upper interlayer insulating film positioned on the display area and extending onto the pad area; link wirings positioned between the device substrate and the upper interlayer insulating film and electrically connecting the display area and the pad area; a power supply voltage line positioned on the upper interlayer insulating film and electrically connecting the display area and the pad area; a device protective film positioned on the upper interlayer insulating film and covering the power supply voltage line; an encapsulation dam positioned on the dam area and traversing the display area and the pad area in a second direction intersecting the first direction; a planarization film positioned on the display area, the first bezel area, and the fourth bezel area of ​​the device protective film and spaced apart from the second bezel area, the dam area, and the third bezel area; and between the pad area and the dam area A display device comprising: a first moisture barrier that crosses and overlaps the boundary between the third bezel area and the fourth bezel area; and a second moisture barrier that crosses between the dam area and the display area and overlaps the boundary between the first bezel area and the second bezel area. Claim 2 A display device according to claim 1, wherein the planarizing film located on the fourth bezel region includes an end that overlaps with the first moisture barrier film, and the planarizing film located on the first bezel region includes an end that overlaps with the second moisture barrier film. Claim 3 A display device according to claim 2, wherein the end of the planarization film located on the fourth bezel region contacts the first moisture barrier film, and the end of the planarization film located on the first bezel region contacts the second moisture barrier film. Claim 4 In claim 1, the first moisture barrier and the second moisture barrier comprise an inorganic insulating material in a display device. Claim 5 In claim 1, the second moisture barrier film is a display device having the same thickness as the first moisture barrier film. Claim 6 In claim 5, the second moisture barrier comprises the same material as the first moisture barrier. Claim 7 In claim 1, the second moisture barrier film comprises the same material as the element protective film in the display device. Claim 8 In claim 1, the first moisture barrier and the second moisture barrier are a display device extending parallel to the bag dam. Claim 9 A display device according to claim 1, further comprising: a light-emitting element located on the planarization film of the display area; and a first encapsulation layer located on the light-emitting element and comprising an inorganic insulating material, wherein the first encapsulation layer is in contact with the element protective film on the second bezel area and the third bezel area. Claim 10 In claim 9, the first moisture barrier and the second moisture barrier are each a display device in contact with the first encapsulation layer. Claim 11 In claim 1, the second moisture barrier is a display device having the same width as the first moisture barrier. Claim 12 A display device according to claim 1, wherein the element substrate further includes a bending region located between the fourth bezel region and the pad region.

Images