Wafer test system and operating method of wafer test system

Abstract

Embodiments of the present invention relate to a wafer test system and a method of operating the wafer system. According to embodiments of the present invention, an electrical test is performed on a wafer comprising a plurality of dies, an active state occurring in the wafer is detected when the electrical test is performed, and a failure status can be determined for the plurality of dies included in the wafer based on the electrical test results for the wafer and active state information received from a detection device.

Description

Technology Field

[0001] Embodiments of the present invention relate to a wafer test system and a method of operating the wafer test system. Background Technology

[0002] Semiconductor integrated circuits are manufactured in the form of dies on a semiconductor wafer, then cut into individual pieces and packaged. To prevent defective dies from being unnecessarily packaged, wafer testing is performed on the wafer on which the semiconductor integrated circuit is formed before packaging. During wafer testing, current or a test signal is applied to the integrated circuit, and it is possible to determine whether the semiconductor integrated circuit operates as intended.

[0003] Even if a semiconductor integrated circuit has passed wafer testing, it may be judged as defective during tests performed after packaging or defects may manifest during the actual usage phase. To enhance the quality of semiconductor products, wafer testing with high defect screening capability is required. The problem to be solved

[0004] Embodiments of the present invention can provide a wafer test system having high die sorting capability and a method of operating the wafer test system. means of solving the problem

[0005] In one aspect, embodiments of the present invention may provide a wafer test system comprising: an electrical test device for performing an electrical test on a wafer including a plurality of dies; a sensing device for detecting an active state occurring in the wafer when performing the electrical test; and a judgment unit for determining whether a plurality of dies included in the wafer fail based on the electrical test results for the wafer and active state information received from the sensing device.

[0006] In another aspect, embodiments of the present invention may provide a method of operation of a wafer test system comprising: a step of performing an electrical test on a wafer comprising a plurality of dies; a step of detecting an active state occurring in the wafer when performing the electrical test; and a step of determining whether a plurality of dies included in the wafer fail based on the electrical test result for the wafer and the active state information obtained in the step of detecting the active state. Effects of the invention

[0007] According to embodiments of the present invention, the ability to sort out dies through wafer testing can be improved. Brief explanation of the drawing

[0008] FIG. 1 is a schematic diagram of a wafer test system according to embodiments of the present invention. FIG. 2 is a schematic diagram illustrating an electrical test according to embodiments of the present invention. FIG. 3 is a diagram showing wafer test results according to embodiments of the present invention. FIG. 4 is a diagram showing the results of classifying the dies included in the wafer into a plurality of categories based on the wafer test results according to embodiments of the present invention. FIG. 5 is a diagram showing a wafer temperature distribution map according to embodiments of the present invention. FIG. 6 is a flowchart illustrating an example in which an electrical test is stopped based on the temperature of a die included in a wafer according to embodiments of the present invention. Figure 7 is a diagram showing the temperature distribution of the dies included in the wafer of Figure 6. FIG. 8 is a flowchart illustrating another example in which an electrical test is stopped based on the temperature of the dies included in the wafer according to embodiments of the present invention. Figure 9 is a diagram showing the temperature distribution of the dies included in the wafer of Figure 8. FIG. 10 is a diagram showing the operation method of a wafer test system according to embodiments of the present invention. Specific details for implementing the invention

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0010] FIG. 1 is a schematic diagram of a wafer test system according to embodiments of the present invention.

[0011] Referring to FIG. 1, a wafer test system (100) according to embodiments of the present invention may include an electrical test device (110), a sensing device (120), and a judgment unit (130).

[0012] The electrical test device (110) can measure electrical and electronic characteristics to determine whether the die operates as designed by applying a test signal, which is an electrical signal, to each die included in the wafer to be tested.

[0013] The electrical test device (110) may be a probe station, which is a device that checks the electrical characteristics of a semiconductor integrated circuit by contacting a pin to a pad of the semiconductor integrated circuit.

[0014] The electric test device (110) may include a probe head (111), a probe card (112), and a chuck (113).

[0015] The probe head (111) can input a test signal received from the tester into the probe card (112).

[0016] The probe card (112) can contact one or more dies included in the wafer (10) to input a test signal to the dies.

[0017] The probe card (112) may include a plurality of pins, and the pins of the probe card (112) may contact pads placed on the die.

[0018] Meanwhile, the probe card (112) can be replaced with a new probe card (112) in the event of wafer type, test environment, or damage to the probe card (112) itself.

[0019] The chuck (113) supports the wafer (10) when performing an electrical test on the wafer (10).

[0020] The electrical test performed by the electrical test device (110) on a plurality of dies included in the wafer (10) may include one or more of a direct current test (DC Test), an alternating current test (AC Test), a stress test (Stress Test), a cell test, and a peri test.

[0021] A DC test is a test that evaluates items where the test result can be expressed as current or voltage by applying a DC current to the die being tested.

[0022] The AC test is a test that evaluates dynamic characteristics related to timing, such as input / output switching time, by applying an alternating current to the die being tested.

[0023] Stress testing, also known as burn-in testing, is a test designed to pre-screen for early defects by applying high temperature and high voltage to the die to induce potential defects.

[0024] Cell testing is a test designed to determine whether a memory cell is operating normally by writing and reading test patterns to the memory cell.

[0025] The peripheral test is a test to determine whether the peripheral circuits placed on the die are functioning normally.

[0026] The detection device (120) can detect the active state occurring in the wafer (10) when the electrical test device (110) performs an electrical test on the wafer (10).

[0027] When current flows through a die contained in a wafer (10), heat emission or light emission phenomena may occur in the die. A detection device (120) can detect such activity and transmit active state information to a judgment unit (130). The active state information may be data regarding the distribution of activity and the intensity of activity for the wafer (10).

[0028] For example, active state information may be data or a thermal image regarding the temperature distribution of the wafer (10).

[0029] When an electrical test is performed on a plurality of dies included in a wafer (10), the active state occurring in the wafer (10) may be light emission. The detection device (120) may include an InGaAS sensor to detect light emission. For the detection device (120) to detect light emission, dark room conditions with external light blocked may be required.

[0030] Meanwhile, the active state occurring in the wafer (10) may be heat emission. The detection device (120) may include an InSb sensor to detect heat emission. The detection device (120) can detect heat emission occurring in the wafer (10) even if it is not a dark room.

[0031] The detection device (120) may be a thermal detection element, a thermal detection camera, or a light-emitting detection element of the type mounted on the probe card (112) via surface mount technology. Meanwhile, the detection device (120) may be installed in a form mounted on an electrical test device (110), which is a probe station.

[0032] The judgment unit (130) can determine whether a plurality of dies included in the wafer (10) fail based on electrical test results received from the electrical test device (110) and active state information received from the detection device. To do this, the judgment unit (130) can process the electrical test results and active state information.

[0033] The judgment unit (130) may be a tester connected to the probe head (111) of the host PC or probe station.

[0034] The judgment unit (130) can have a high die sorting capability by utilizing the temperature or active state of the wafer (10) detected when the electric test device (110) applies a test signal to the dies included in the wafer (10) for die sorting.

[0035] Specifically, the judgment unit (130) compares the electrical test results and active state information with reference data for die selection, and can determine it as a failure if there is a difference between the active state information and the reference data for failure determination, even if the electrical test results indicate that the test has been passed. Through this, the wafer test system (100) can determine potential defects that could not be selected based solely on the electrical test results, and can improve the die selection capability of the wafer test.

[0036] FIG. 2 is a schematic diagram illustrating an electrical test according to embodiments of the present invention.

[0037] Referring to FIGS. 1 and 2, the sensing device (120) can detect the active state of the wafer (10) by the current flowing through the die when an electrical test is performed.

[0038] As described above, when an electrical test (ET) is performed, the pins of the probe card (112) can come into contact with pads placed on the die. The probe card (112) can apply a test signal received from the probe head (111) to the semiconductor integrated circuit of the die through the pins and pads.

[0039] Through this, the electrical test device (110) can measure the characteristic parameter (P) of the die. At this time, the result of the electrical test (ET) may be the characteristic parameter (P).

[0040] Meanwhile, as described above, when an electrical test (ET) is performed on a die included in a wafer (10), current may flow through the semiconductor integrated circuit of the die. When current flows through the semiconductor integrated circuit, a heat emission phenomenon may occur due to the heating action of the current, or a light emission phenomenon may occur.

[0041] The judgment unit (130) can determine whether the die fails by combining the characteristic parameter (P) and temperature (T) of the dies included in the wafer (10).

[0042] FIG. 3 is a diagram showing wafer test results according to embodiments of the present invention.

[0043] FIG. 4 is a diagram showing the results of classifying the dies included in the wafer into a plurality of categories based on the wafer test results according to embodiments of the present invention.

[0044] Referring to FIGS. 3 and 4, the judgment unit (130) can classify a plurality of dies included in the wafer (10) into a plurality of categories based on characteristic parameters (P) and active state (T) information, which are electrical test results of the wafer (10).

[0045] In this case, the category may be related to the Bin Code assigned to the die.

[0046] The P-axis shown in Fig. 3 corresponds to the die-specific characteristic parameter value, and D The T-axis corresponds to the difference between the reference temperature (Tref) and the die temperature.

[0047] The characteristic parameter (P) can utilize various numerical values ​​for each item of the electrical test. For the purpose of explanation, it is assumed that the characteristic parameter (P) is the number of fail bits obtained through the electrical test.

[0048] If categories are classified using only electrical test results, a critical fail bit count is set; if the count is smaller than the critical fail bit count, the wafer test is passed, and if it is equal to or greater than the critical fail bit count, it is determined to be a wafer test failure.

[0049] For example, the judgment unit (130) can pass dies with a number of fail bits smaller than the threshold number of fail bits P2, and determine dies with a number of fail bits greater than P2 as fail.

[0050] Meanwhile, by combining electrical test results and active state information, the dies included in the wafer (10) can be classified into multiple categories based on each criterion, and the die selection capability can be improved.

[0051] As an example of how to subdivide categories, a reference temperature (Tref) can be set while performing electrical tests by utilizing a known good die (KGD). The reference temperature (Tref) can be set for each type of electrical test.

[0052] At this time, for dies that passed the electrical test but failed subsequent tests or failed the reliability evaluation, the temperature difference from the reference temperature (Tref) can be checked while performing the electrical test. Based on this temperature difference, a new category can be added.

[0053] According to the method of adding the aforementioned categories, even though it is a die with a number of fail bits smaller than P2, the number of fail bits is equal to or greater than P1 and the difference from the reference temperature (Tref) D Equal to or greater than T1, D It is assumed that a tendency was observed for dies smaller than T2 to be judged as defective after electrical testing.

[0054] If categories are classified based solely on electrical test results, when P2 is set to the critical fail bit count, dies D15, D6, and D4 are classified into Category 1, and the remaining dies are classified into Category 2. Dies classified into Category 1 may be determined to be defective.

[0055] On the other hand, when making a judgment by combining characteristic parameters and active state information, the number of fail bits is smaller than P2, and the difference from the reference temperature (Tref) D Dies with a temperature lower than T1 are classified into Category 1 (B1), and the number of fail bits is equal to or greater than P2, and the difference from the reference temperature (Tref) D Dies with a temperature lower than T1 can be classified into the second category (B2).

[0056] Regardless of the number of fail bits, the difference from the reference temperature (Tref) D Dies with a temperature equal to or greater than T2 can be classified into the third category (B3).

[0057] The number of fail bits is less than P2 and equal to or greater than P1, and the difference from the reference temperature (Tref) D Greater than or equal to T1 D Dies with a temperature lower than T2 can be classified into the 4th category (B4).

[0058] The number of fail bits is less than P1 and the difference from the reference temperature (Tref) D Greater than or equal to T1 D Dies with a temperature lower than T2 can be classified into the 5th category (B5).

[0059] The remaining dies can be classified into Category 6 (B6).

[0060] At this time, dies corresponding to Category 4 (B4) that are found to have a tendency to be judged as defective after electrical testing can be identified as a potential defective group.

[0061] Meanwhile, the aforementioned method of adding categories is merely an example to explain the invention. When adding detailed categories to improve die sorting capability in wafer testing, various characteristic parameters and corresponding active state information may be utilized, and the threshold range for distinguishing categories may also be set in various ways.

[0062] At this time, the judgment unit (130) can generate a wafer bin map with a corresponding category for each die, as shown in FIG. 4. The wafer bin map can be used for the analysis of the semiconductor process.

[0063] FIG. 5 is a diagram showing a wafer temperature distribution map according to embodiments of the present invention.

[0064] Referring to FIG. 5, the judgment unit (130) can generate a temperature distribution map for the wafer (10) based on active state information.

[0065] A wafer map is an image that visualizes the results of wafer testing and can be utilized for quality control of semiconductor integrated circuits, such as identifying defective wafers or identifying processes related to quality issues.

[0066] The judgment unit (130) can generate a wafer temperature distribution map by processing active state information obtained while performing an electrical test on the wafer (10).

[0067] The wafer temperature distribution map can display the temperature by visualizing it by die as shown in Fig. 5, and unlike Fig. 5, it can also be displayed continuously over the entire wafer section.

[0068] Meanwhile, the electrical test device (110) can perform various types of electrical tests on the wafer (10), and the judgment unit (130) can generate a wafer temperature distribution map for each type of electrical test.

[0069] FIG. 6 is a flowchart illustrating another example in which an electrical test is stopped based on the temperature of a die included in a wafer according to embodiments of the present invention.

[0070] This is a flowchart showing an example of the work being done.

[0071] Figure 7 is a diagram showing the temperature distribution of the dies included in the wafer of Figure 6.

[0072] Referring to FIGS. 6 and 7, the judgment unit (130) can stop the electrical test when the average temperature of a plurality of dies included in the wafer (10) is less than a first threshold temperature (Tth1) or greater than a second threshold temperature (Tth2) which is greater than the first threshold temperature.

[0073] The electric test device (110) can perform operations specified by the settings of the installed software program.

[0074] Meanwhile, the program of the electric test device (110) may be set differently from what was expected due to various causes, including human error. If the program of the electric test device (110) is set differently from what was expected, the test signal input to the wafer (10) through the probe card (112) may be different, and the temperature of the wafer (10) may have a distribution different from the expected value. Meanwhile, if the program of the electric test device (110) is set differently from what was expected, it may be confirmed during the package test or actual use stage conducted after packaging, unless it is manifested as a yield.

[0075] For example, when the program of the electrical test device (110) is set differently than expected and the level of the test signal input to the wafer (10) is lower than when it is set normally, the temperature distribution of the wafer (10) may be formed relatively low when the electrical test is performed.

[0076] Conversely, when the level of the test signal input to the wafer (10) is higher than when it is normally set, the temperature distribution of the wafer (10) may be formed relatively high when an electrical test is performed.

[0077] The judgment unit (130) can determine whether the program of the electric test device (110) is set differently from what is expected by comparing the average temperature of a plurality of dies included in the wafer (10) with the first critical temperature or the second critical temperature.

[0078] At this time, the first critical temperature (Tth1) and the second critical temperature (Tth2) can be set based on a known good die.

[0079] If the judgment unit (130) determines that the program of the electrical test device (110) is set differently than expected, it may stop electrical testing on other wafers.

[0080] This allows screening for cases where the program of the electric test device (110) is incorrectly set.

[0081] To explain this according to the flowchart of FIG. 6, the electrical test device (110) can perform electrical tests on a plurality of wafers (10). The detection device (120) can detect the temperature of a plurality of dies included in the wafer (10) when the electrical test on the wafer (10) is performed (S610).

[0082] The judgment unit (130) can calculate the average temperature (Tavg) of a plurality of dies included in the wafer (10) based on the temperature information received from the detection device (120) and determine whether the average temperature (Tavg) is less than the first threshold temperature (Tth1) or greater than the second threshold temperature (Tth2) (S620).

[0083] If the average temperature (Tavg) satisfies the conditions in S620 (S620-Y), the judgment unit (130) may stop electrical testing on wafers (10) for which electrical testing has not yet been performed (S630).

[0084] If the average temperature (Tavg) does not satisfy the conditions in S620 (S620-N), the electrical test device (110) can perform electrical tests on other wafers (10) for which no electrical test has been performed, and the detection device (120) can detect the temperature of the wafer (10) whenever the electrical test is performed repeatedly (S610).

[0085] Figure 7 shows the temperature distribution of the first wafer (W1), the second wafer (W2), and the third wafer (W3).

[0086] The average die temperature (Tavg1) of the first wafer (W1) is lower than the second critical temperature and higher than the first critical temperature. Therefore, the electrical test device (110) can repeatedly perform electrical tests on multiple wafers. The sensing device (120) can detect the temperature generated while electrical tests are repeatedly performed on multiple wafers.

[0087] The average temperature (Tavg2) of the second wafer (W2) is greater than the second critical temperature. Therefore, the judgment unit (130) can stop electrical testing on other wafers (10) for which electrical testing has not been performed.

[0088] The average temperature (Tavg3) of the third wafer (W3) is lower than the first critical temperature. Therefore, the judgment unit (130) can stop electrical testing on other wafers (10) for which electrical testing has not been performed.

[0089] When the electrical test of the electrical test device (110) is stopped, the presence or absence of abnormalities in the program settings can be checked. If it is determined that there are no abnormalities in the program settings of the electrical test device (110), the electrical test that was stopped can be resumed.

[0090] FIG. 8 is a flowchart illustrating another example in which an electrical test is stopped based on the temperature of the dies included in the wafer according to embodiments of the present invention.

[0091] Figure 9 is a diagram showing the temperature distribution of the dies included in the wafer of Figure 8.

[0092] Referring to FIGS. 8 and 9, the judgment unit (130) can stop the electrical test when the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) among the temperatures of a plurality of dies included in the wafer (10) is greater than or equal to the third threshold temperature.

[0093] As described above, if the program of the electric test device (110) is incorrectly set, the test signal input to the wafer (10) through the probe card (112) may change, and this may appear as a change in the temperature distribution of the wafer (10).

[0094] The judgment unit (130) can determine whether the program of the electric test device (110) is set differently from what is expected through the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) among the temperatures of the plurality of dies included in the wafer (10).

[0095] If the judgment unit (130) determines that the program of the electrical test device (110) is set differently than expected, it may stop electrical testing on other wafers for which electrical testing has not been performed.

[0096] To explain this according to the flowchart of FIG. 8, the electrical test device (110) can perform electrical tests on a plurality of wafers. The sensing device (120) can detect the temperature of a plurality of dies included in the wafer (10) while the electrical test on the wafer (10) is being performed (S810).

[0097] The judgment unit (130) can calculate the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) among the temperatures of the plurality of dies included in the wafer (10) based on the temperature information received from the detection device (120), and determine whether the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) is equal to or greater than the third threshold temperature (Tth3) (S820).

[0098] Meanwhile, the third critical temperature (Tth3) can be set based on a known good die.

[0099] If the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) satisfies the condition in S820 (S820-Y), the judgment unit (130) may stop the electrical test (S830).

[0100] If the difference between the maximum temperature (Tmax) and the minimum temperature (Tmin) does not satisfy the conditions in S820 (S820-Y), the electrical test device (110) can repeatedly perform electrical tests on other wafers that have not been tested, and the detection device (120) can detect the temperature of the wafer (10) whenever the electrical test is repeatedly performed (S810).

[0101] Figure 9 shows the temperature distribution of the fourth wafer (W4).

[0102] The difference between the maximum temperature (Tmax4) and the minimum temperature (Tmin4) of the fourth wafer (S4) is greater than the third critical temperature (Tth3). Therefore, the judgment unit (130) can stop the electrical test for the next wafer.

[0103] As described above in FIGS. 6 and 7, when the electrical test of the electrical test device (110) is stopped, it can be checked whether there is an abnormality with respect to the program settings. If there is no abnormality with respect to the program settings of the electrical test device (110), the electrical test that was stopped can be resumed.

[0104] FIG. 10 is a diagram showing the operation method of a wafer test system (100) according to embodiments of the present invention.

[0105] Referring to FIG. 10, the method of operation of the wafer test system (100) may include the step (S1010) of performing an electrical test on a wafer including a plurality of dies.

[0106] At this time, the electrical test may include one or more of direct current test, alternating current test, stress test, cell test, and logic test.

[0107] The method of operation of the wafer test system (100) may include a step (S1020) of detecting an active state occurring in the wafer when performing an electrical test.

[0108] At this time, the active state may be light emission.

[0109] At this time, the active state may be heat release.

[0110] The method of operation of the wafer test system (100) may include a step (S1030) of determining whether a plurality of dies included in the wafer fail based on active state information obtained in the step (S1020) of detecting electrical test results and active state for the wafer.

[0111] Additionally, the method of operation of the wafer test system (100) may further include the step of classifying a plurality of dies included in the wafer into a plurality of categories based on characteristic parameters and active state information, which are electrical test results of the wafer.

[0112] Additionally, the method of operation of the wafer test system (100) may further include the step of generating a wafer temperature distribution map for the wafer based on active state information.

[0113] Additionally, the method of operation of the wafer test system (100) may further include the step of stopping an electrical test based on the temperature of a plurality of dies included in the wafer.

[0114] At this time, in the step of stopping the electrical test, the electrical test can be stopped when the average temperature of a plurality of dies included in the wafer is lower than a first critical temperature or greater than a second critical temperature which is greater than the first critical temperature.

[0115] Meanwhile, at the step of stopping the electrical test, the electrical test can be stopped when the difference between the maximum temperature and the minimum temperature among the temperatures of the multiple dies included in the wafer is greater than or equal to the third critical temperature.

[0116] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Furthermore, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and thus the scope of the technical concept of the present invention is not limited by these embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention. Explanation of the symbols

[0117] 100: Wafer test system 110: Electrical test device 111: Head 112: Probe Card 113: Chuck 120: Detector 130: Judgment Department

Claims

Claim 1 A wafer test system comprising: an electrical test device for performing an electrical test on a wafer including a plurality of dies; a sensing device for detecting an active state occurring in the wafer when performing the electrical test; and a judgment unit for determining whether a plurality of dies included in the wafer fail based on the electrical test result for the wafer and active state information received from the sensing device; wherein the judgment unit stops the electrical test based on the temperature of the plurality of dies included in the wafer, and stops the electrical test when the average temperature of the plurality of dies included in the wafer is less than a first threshold temperature or greater than a second threshold temperature which is greater than the first threshold temperature, or stops the electrical test when the difference between the maximum temperature and the minimum temperature among the temperatures of the plurality of dies included in the wafer is greater than or equal to a third threshold temperature. Claim 2 In claim 1, the judgment unit is a wafer test system that classifies a plurality of dies included in the wafer into a plurality of categories based on characteristic parameters and active state information, which are electrical test results of the wafer. Claim 3 In claim 1, the above-mentioned judgment unit is a wafer test system that generates a wafer temperature distribution map for the wafer based on the active state information. Claim 4 delete Claim 5 delete Claim 6 delete Claim 7 In claim 1, the wafer test system in which the active state is light emission. Claim 8 In claim 1, the wafer test system in which the active state is heat emission. Claim 9 In claim 1, the electrical test is a wafer test system comprising one or more of a direct current test, an alternating current test, a stress test, a cell test, and a ferry test. Claim 10 A method of operating a wafer test system comprising: a step of performing an electrical test on a wafer containing a plurality of dies; a step of detecting an active state occurring in the wafer when performing the electrical test; a step of determining whether the plurality of dies included in the wafer fail based on the electrical test result for the wafer and the active state information obtained in the step of detecting the active state; and a step of stopping the electrical test based on the temperature of the plurality of dies included in the wafer, and stopping the electrical test when the average temperature of the plurality of dies included in the wafer is less than a first threshold temperature or greater than a second threshold temperature which is greater than the first threshold temperature, or stopping the electrical test when the difference between the maximum temperature and the minimum temperature among the temperatures of the plurality of dies included in the wafer is greater than or equal to a third threshold temperature. Claim 11 A method of operation of a wafer test system comprising the step of classifying a plurality of dies included in the wafer into a plurality of categories based on characteristic parameters and active state information, which are electrical test results of the wafer, in claim 10. Claim 12 A method of operation of a wafer test system comprising the step of generating a wafer temperature distribution map for the wafer based on the active state information in claim 10. Claim 13 delete Claim 14 delete Claim 15 delete Claim 16 In paragraph 10, the above active state is a method of operation of a wafer test system in which light emission is the active state. Claim 17 In paragraph 10, the above active state is a method of operation of a wafer test system in which heat emission is a method of operation. Claim 18 In claim 10, the above electrical test is a method of operation of a wafer test system comprising one or more of a direct current test, an alternating current test, a stress test, a cell test, and a ferry test.

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