Composite dielectric layer applied to non-contact electrical detection of wafer-level LED chip

Abstract

Provided in the present invention is a composite dielectric layer applied to non-contact electrical detection of a wafer-level LED chip. An electrode plate is a conductive planar substrate, an array of conductive micro tips is provided on the surface of the electrode plate, and a nano composite dielectric layer is further provided on the surface of the conductive micro tips. An array of micro tips is essentially provided on a conductive plane, such that surface electric fields can be effectively concentrated, thereby reducing the voltage required when a device works. Since a nano composite dielectric layer is arranged on the surface of micro tips, charge accumulation can be generated according to the change in an external electric field, so as to further stabilize a space electric field, and an LED chip can be driven without contact, thereby realizing low-voltage and stable wafer-level LED detection.

Description

Composite dielectric layer for contactless electrical detection of wafer-level LED chips Technical Field

[0001] The present invention relates to the technical field of LED chips, in particular to a composite dielectric layer used for contactless electrical detection of wafer-level LED chips. Background Art

[0002] Gallium nitride-based micro-light-emitting diodes (Micro-LEDs), with their advantages of low power consumption, long lifespan, compact size, and high reliability, are expected to become a new generation of high-efficiency light sources. The quality of Micro-LED chips is a crucial factor affecting the quality of Micro-LED displays and is crucial for effectively reducing the overall cost of Micro-LED displays and achieving industrialization. However, due to limitations in the LED epitaxial wafer growth process and subsequent chip processing, it is impossible to guarantee that all Micro-LED chips meet the required optical and electrical parameters. Therefore, wafer-level inspection of Micro-LED chips to prevent defective pixels before mass transfer becomes a critical step in improving the yield rate of Micro-LED displays. An 8K display requires approximately 90 million Micro-LED chips, placing extremely high demands on existing wafer-level Micro-LED defect detection methods.

[0003] The traditional needle testing method requires the probe to contact the LED electrode. During the vertical movement, it will inevitably cause a certain degree of damage to the LED chip's electrodes, surface, and probe. In addition, the required probe workmanship must be more refined, and the difficulty of aligning the probe with the Micro-LED chip electrode is also increased. A larger number of chips will also cause the probe to wear faster, resulting in a sharp increase in testing costs. Another common photoluminescence testing technology only tests the quality of the light-emitting layer. Therefore, the yield rate obtained based on this method is often inflated, that is, LED chips that are originally defective and should not be lit will be lit. Technical issues

[0004] Contactless electroluminescence testing (EL) has emerged in recent years as a testing method that avoids the problem of inflated yields caused by photoluminescence while also ensuring no mechanical damage to the surface morphology of LED chips. However, conventional testing electrodes operate at excessively high drive voltages, which can easily lead to air breakdown. This results in an unstable testing process, with significant partial discharge and flashes, leading to frequent interruptions and even damage to the chip under test, rendering the test results ineffective. Technical Solutions

[0005] In view of this, an object of the present invention is to provide a composite dielectric layer for contactless electrical detection of wafer-level LED chips, so as to achieve low-voltage and stable wafer-level LED detection.

[0006] To achieve the above-mentioned purpose, the present invention adopts the following technical solution: a composite dielectric layer used for contactless electrical detection of wafer-level LED chips, including an electrode plate, which is specifically a conductive planar substrate, and is also characterized in that a conductive micro-tip array is provided on the surface of the conductive planar substrate, and a nano-composite dielectric layer is provided on the surface of the conductive micro-tip array.

[0007] In a preferred embodiment, the conductive micro-tip array completely covers the surface of the conductive planar substrate.

[0008] In a preferred embodiment, the conductive micro tip is specifically conical, pyramidal or needle-shaped.

[0009] In a preferred embodiment, the height of the conductive micro tip ranges from 500 nanometers to 50 micrometers, and the diameter of the circumscribed circle of the bottom of the conductive micro tip ranges from 500 nanometers to 50 micrometers.

[0010] In a preferred embodiment, the nanocomposite medium layer is an organic matrix, ie, an inorganic nanocomposite material.

[0011] In a preferred embodiment, the inorganic nanomaterials include graphene, metal nanoparticles, two-dimensional transition metal sulfides, and combinations thereof.

[0012] In a preferred embodiment, the organic matrix includes polyimide, polysiloxane, and doping materials thereof.

[0013] In a preferred embodiment, the thickness of the dielectric layer is in the range of 100 nanometers to 10 micrometers. Beneficial effects

[0014] Compared with the existing technology, the present invention has the following beneficial effects: by optimizing the micro-needle tip structure and the nano-composite dielectric layer on its surface, the driving voltage can be effectively reduced, the stability of contactless electroluminescence can be achieved, and the stability of contactless detection of wafer-level LED chips can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG1 is a schematic diagram of the overall structure of an embodiment of the present invention;

[0016] FIG2 illustrates the light-emitting principle of an LED chip during contactless detection of an LED chip according to an embodiment of the present invention;

[0017] FIG3 is a schematic diagram of the structure of a general contactless detection;

[0018] FIG4 is a schematic diagram of a conductive micro-tip structure according to an embodiment of the present invention;

[0019] FIG5 is a schematic diagram of the structure of a nanocomposite dielectric layer according to an embodiment of the present invention;

[0020] FIG6 is a schematic diagram of preparing a nanocomposite dielectric layer by evaporation. Modes for Carrying Out the Invention

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0022] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present application belongs.

[0023] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application; as used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form, and it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or their combinations.

[0024] Referring to Figures 1 to 6 , a composite dielectric layer for contactless electrical testing of wafer-level LED chips comprises a conductive substrate 100, a conductive microtip array 200 disposed on the surface of the conductive substrate 100, and a nanocomposite dielectric layer 300 disposed on the surface of the conductive microtip array 200. The microtip array, disposed substantially on a conductive surface, effectively concentrates the surface electric field, reducing the voltage required for device operation. The nanocomposite dielectric layer, disposed on the microtip surface, generates charge accumulation in response to external electric field fluctuations, further stabilizing the spatial electric field and enabling contactless driving of LED chips, thus achieving low-voltage, stable wafer-level LED testing.

[0025] The conductive micro tip array completely covers the surface of the conductive planar substrate.

[0026] The conductive micro tip 200 is specifically in the shape of a cone, a pyramid or a needle.

[0027] The height of the conductive micro tip 200 ranges from 500 nanometers to 50 micrometers, and the diameter of the circumscribed circle at the bottom of the conductive micro tip 200 ranges from 500 nanometers to 50 micrometers.

[0028] The nanocomposite medium layer 300 is an organic matrix, that is, an inorganic nanocomposite material.

[0029] The inorganic nanomaterials include graphene, metal nanoparticles, two-dimensional transition metal sulfides, and combinations thereof.

[0030] The organic matrix includes polyimide, polysiloxane, and doping materials thereof.

[0031] The thickness of the dielectric layer is in the range of 100 nanometers to 10 micrometers.

[0032] In a first embodiment of the present invention, an electrode plate and nanocomposite dielectric layer are used for contactless electrical detection of wafer-level LED chips. The conductive planar substrate and microtip array employed are made of silicon. The microtip array is fabricated on the surface of a conductive silicon wafer using an alkaline etching method. The microtip array has a pyramid-like structure, with a height of 500 nanometers and a square base with a side length of 500 nanometers. A side view of the silicon-based electrode plate (100 / 200) is shown in Figure 1.

[0033] Furthermore, a layer of polyamic acid: graphite oxide film is coated on the surface of the silicon-based electrode plate by a Czochralski method, and the film is vacuum-thermally cured to form a polyimide: reduced graphene oxide composite film. A side view of the silicon-based electrode plate / polyimide: reduced graphene oxide composite film (100 / 200 / 300) is shown in Figure 1. When performing LED testing, the silicon-based electrode plate / polyimide: reduced graphene oxide composite film (100 / 200 / 300) is vertically close to the LED wafer to be tested. At the same time, a high-voltage alternating current is connected to the silicon electrode, and the LED wafer is grounded.

[0034] The principle behind contactless LED chip driving is as follows: The voltage applied to the silicon electrode plate (100 / 200) is a high-frequency alternating current. When the applied voltage is in the positive half-cycle, the electric field is directed from the silicon electrode plate (100 / 200) toward the LED. At this point, within the LED, the external electric field is directed from the p-GaN layer toward the n-GaN layer. This electric field drives holes within the p-GaN layer toward the quantum wells and simultaneously drives electrons within the n-GaN layer toward the quantum wells. Electrons and holes that move to the quantum well layer form excitons there, which eventually recombine and emit photons (Figure 2, left). If the driven LED chip is defect-free, periodic luminescence can be detected. However, if the driven LED chip has a chip defect, stable luminescence will be unavailable or the brightness will be low. This is the principle behind contactless LED chip detection.

[0035] During the negative half-cycle of the applied voltage, the electric field is directed from the LED toward the silicon electrode plate (100 / 200). Within the LED, the applied electric field is directed from the n-GaN layer toward the p-GaN layer. This electric field drives electrons within the quantum well to higher energy levels, ultimately forming free electrons and holes. Holes move from the quantum well layer to the p-GaN layer, while electrons move from the quantum well layer to the n-GaN layer. The result is the accumulation of holes and electrons on the p-GaN and n-GaN sides, respectively (Figure 2, right). When the next positive half-cycle of the voltage arrives, electroluminescence is generated.

[0036] The above analysis demonstrates that the key technology for achieving contactless electroluminescence from LED chips on wafers lies in increasing the electric field strength across the LED chip. The traditional approach involves continuously increasing the applied voltage. However, when the voltage is too high, breakdown occurs in the air between the silicon electrode plate and the LED, reducing the local voltage drop and forming a significant arc (Figure 3). This makes it impossible to effectively monitor the LED's operating status. The proposed method, which places an array of microtips on a conductive surface, effectively concentrates the surface electric field, reducing the voltage required for device operation. This prevents air breakdown. Furthermore, a nanocomposite dielectric layer placed on the microtips' surface can generate charge accumulation in response to changes in the external electric field, further stabilizing the spatial electric field. This addresses the need for low-voltage, stable, wafer-level LED testing.

[0037] In this embodiment, the prepared micro tip 200 has a pyramid structure. In alternative embodiments, a cone structure, a pyramid structure, etc. may also be used ( FIG. 3 ).

[0038] In this embodiment, a polyamic acid:graphite oxide film is coated on the surface of the silicon-based electrode plate by a Czochralski method, and the film is then vacuum-cured to form a polyimide:reduced graphene oxide composite film. In an alternative embodiment, other nanomaterials, such as molybdenum disulfide, carbon nanotubes, fullerenes, and gold quantum dots, can be used in place of the reduced graphene oxide, as shown in Figure 4.

[0039] In this embodiment, the nanocomposite dielectric layer 300 is prepared by a Czochralski method. Alternatively, the desired nanocomposite dielectric layer 300 can be prepared by evaporation. As shown in Figure 5 , a layer of insulating material (a polyimide precursor or other uncured precursor material) is first evaporated onto the surface of the silicon electrode plate (100 / 200). Next, a layer of nanomaterial is evaporated to serve as a charge interaction layer. Subsequently, layers of insulating material (a polyimide precursor or other uncured precursor material) are evaporated. Finally, the desired nanocomposite dielectric layer 300 is obtained by thermal or UV curing.

[0040] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, various equivalent transformations (such as quantity, shape, position, etc.) can be made to the technical solution of the present invention, and these equivalent transformations all fall within the scope of protection of the present invention.

[0041] The description of the above embodiments is intended only to facilitate understanding of the method and core concept of the present invention. Furthermore, the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention in any other manner. Any person skilled in the art may utilize the above-disclosed technical content to modify or remodel the above embodiments into equivalent embodiments with equivalent variations. However, any simple modifications, equivalent variations, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the technical solution of the present invention shall remain within the scope of protection of the technical solution of the present invention.

Claims

1. A composite dielectric layer for contactless electrical detection of wafer-level LED chips, characterized in that It comprises an electrode plate, which is specifically a conductive plane substrate. It is also characterized in that a conductive micro-tip array is arranged on the surface of the conductive plane substrate, and a nano-composite medium layer is arranged on the surface of the conductive micro-tip array.

2. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1, characterized in that The conductive micro tip array completely covers the surface of the conductive planar substrate.

3. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1 or 2, characterized in that The conductive micro tip is specifically in the shape of a cone, a pyramid or a needle.

4. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 3, characterized in that The height of the conductive micro tip ranges from 500 nanometers to 50 micrometers, and the diameter of the circumscribed circle at the bottom of the conductive micro tip ranges from 500 nanometers to 50 micrometers.

5. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1, characterized in that The nanocomposite medium layer is an organic matrix, that is, an inorganic nanocomposite material.

6. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1 or 5, characterized in that The inorganic nanomaterials include graphene, metal nanoparticles, two-dimensional transition metal sulfides, and combinations thereof.

7. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1 or 5, characterized in that The organic matrix includes polyimide, polysiloxane, and doping materials thereof.

8. The composite dielectric layer for contactless electrical detection of wafer-level LED chips according to claim 1, characterized in that The thickness of the dielectric layer is in the range of 100 nanometers to 10 micrometers.

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