Back surface polishing method for back contact battery

Abstract

The present disclosure belongs to the technical field of back contact battery polishing, and particularly relates to a back surface polishing method for a back contact battery. The back surface polishing method comprises the following steps: S1, immersing a silicon wafer in a first alkali solution for first alkali polishing, and water washing and drying the silicon wafer after the reaction is finished; S2, forming a phosphorosilicate glass layer on each of both side surfaces of the silicon wafer, which is obtained in S1, by utilizing high-temperature diffusion; S3, then removing the phosphorosilicate glass layer of one side of the silicon wafer obtained in S2; S4, immersing the silicon wafer obtained in S3 in a second alkali solution for second alkali polishing, and water washing the silicon wafer after the reaction is finished; S5, immersing the silicon wafer obtained in S4 in a third alkali solution for third alkali polishing, and water washing the silicon wafer after the reaction is finished; and S6, removing the phosphorosilicate glass layer of the silicon wafer obtained in step S5, and water washing and drying the silicon wafer. The present disclosure can reduce the liquid agent consumption, thereby relatively prolonging the service life of a tank body, reducing the silicon loss, and improving the surface flatness.

Description

Back side polishing method of back contact battery

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Chinese patent application number 2023107133709, filed with the Chinese Patent Office on June 16, 2023, entitled “A method for polishing the back side of a back-contact battery”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present disclosure belongs to the technical field of back contact battery polishing, and in particular relates to a back side polishing method of a back contact battery. Background Art

[0004] Back-contact cells are currently a research and development direction for high-efficiency crystalline silicon cells. Their PN junction and metal electrodes are located on the back of the cell, leaving the front unobstructed by any electrodes. Improving the surface flatness of the back surface and further enhancing the back passivation level are key to boosting the efficiency of back-contact cells.

[0005] In the prior art, groove-type alkaline etching is usually used to polish the back surface to improve the surface flatness and back passivation level. Alkaline etching specifically involves reacting high-concentration KOH or NaOH with the silicon wafer under high temperature conditions. However, the polishing effect is poor, and there is still a step height difference of 1-10 μm on the surface, and the reflectivity is less than 40%.

[0006] In order to improve the flatness of the silicon wafer surface, the existing technology usually adopts the method of increasing the amount of corrosion and the depth of corrosion. However, on the one hand, the polishing time is long, the amount of liquid replenishment is large, and the life of the tank is significantly reduced, and the liquid consumption will directly increase exponentially; on the other hand, the silicon loss is large and the silicon wafer cost is high, which is not conducive to the thin-film development of the project.

[0007] Therefore, how to reduce silicon loss and improve surface flatness while reducing liquid consumption is a technical problem that urgently needs to be solved in this field.

[0008] Summary of the Invention

[0009] The purpose of the present invention is to overcome the defects of the prior art of high liquid medicine consumption and large silicon loss, and to provide a back side polishing method for a back contact battery. The back side polishing method can reduce liquid medicine consumption, relatively increase the life of the cell, reduce silicon loss and improve surface flatness, with the surface step height difference below 3μm and the surface reflectivity greater than 40%.

[0010] In order to achieve the above object, the present disclosure provides a backside polishing method for a back-contact battery, comprising the following steps:

[0011] S1, immersing the silicon wafer in the first alkaline solution for the first alkaline polishing, washing and drying after the reaction is completed;

[0012] S2, forming a phosphorus-silicate glass layer on both sides of the silicon wafer obtained in S1 by high-temperature diffusion;

[0013] S3, then removing the phosphosilicate glass layer on one side of the silicon wafer obtained in S2;

[0014] S4, immersing the silicon wafer obtained in S3 in a second alkaline solution for a second alkaline polishing, and washing with water after the reaction is completed;

[0015] S5, immersing the silicon wafer obtained in S4 in a third alkaline solution for a third alkaline polishing, and washing with water after the reaction is completed;

[0016] S6. Remove the phosphosilicate glass layer from the silicon wafer obtained in S5, wash with water, and dry.

[0017] In S1 of the present disclosure, the first alkaline polishing causes the etching depth of a single side of the polished silicon wafer to be 1-2 μm.

[0018] In some preferred embodiments of the present disclosure, the conditions for the first alkali polishing include: a reaction temperature of 70-80° C. and a reaction time of 60-120 s.

[0019] In some preferred embodiments of the present disclosure, in S2, the thickness of the phosphosilicate glass layer is 100-1000 Å.

[0020] In some preferred embodiments of the present disclosure, the high-temperature diffusion process includes heat treatment at 700-900° C. for 90-120 minutes.

[0021] In some preferred embodiments of the present disclosure, the PSG on one side of the silicon wafer in S3 is removed by transporting the silicon wafer into an HF solution using a roller.

[0022] More preferably, the mass concentration of HF in the HF solution is 1%-5%, and the speed at which the silicon wafers are conveyed is 1.2-2.0 m / min.

[0023] The second alkaline polishing described in S4 of the present disclosure enables the etching depth of a single side of the polished silicon wafer to be 2-3 μm.

[0024] In some preferred embodiments of the present disclosure, the conditions for the second alkali polishing include: a reaction temperature of 70-80° C., a reaction time of 90-180 s, more preferably 90-150 s.

[0025] The third alkali polishing in S5 of the present disclosure makes the etching depth of a single side of the polished silicon wafer 2-3 μm. The present disclosure makes the surface reflectivity greater than 40%.

[0026] In some preferred embodiments of the present disclosure, the conditions for the third alkali polishing include: reaction temperature of 60-75°C, reaction time of 90-240s; more preferably, the reaction temperature is 60-70°C, and the reaction time is 90-150s.

[0027] In some preferred embodiments of the present disclosure, in S1, the first alkali solution includes a first inorganic base with a concentration of 5 wt % to 10 wt %.

[0028] In some preferred embodiments of the present disclosure, in S4, the second alkaline solution comprises: by mass percentage, a second inorganic base with a concentration of 2%-10%, more preferably 2%-5%, and an organic base with a concentration of 1%-3%.

[0029] In some preferred embodiments of the present disclosure, in S5, the third alkaline solution comprises: a third inorganic base with a concentration of 2%-5% by mass, and a polishing additive with a concentration of 0.5%-2% by mass.

[0030] In some preferred embodiments of the present disclosure, the organic base is selected from tetramethylammonium hydroxide.

[0031] In some preferred embodiments of the present disclosure, the polishing additive comprises, by mass percentage, 1.5%-3% of a surfactant, 0.5%-2% of a salt, 1%-2% of a corrosion and scale inhibitor, and 93%-97% of water.

[0032] In some preferred embodiments of the present disclosure, the surfactant includes 0.5%-1% sodium polyacrylate and 1%-2% fatty alcohol polyoxyethylene ether.

[0033] In some preferred embodiments of the present disclosure, the corrosion and scale inhibitor is selected from aminotrimethylene phosphoric acid.

[0034] In some preferred embodiments of the present disclosure, the salt is selected from sodium benzoate and / or sodium carbonate.

[0035] In some preferred embodiments of the present disclosure, in S6, the phosphosilicate glass layer of the silicon wafer obtained in S5 is removed using an HF solution, and the HF mass concentration in the HF solution is 1%-5%.

[0036] In some preferred embodiments of the present disclosure, the conditions for removing the phosphosilicate glass layer of the silicon wafer obtained in S5 include: the reaction temperature is room temperature, and the reaction time is 60-180 seconds. Beneficial effects:

[0037] The present disclosure adopts the above-mentioned technical solution, especially performs three alkali polishings with appropriate etching depths and forms a phosphorus-silicate glass (PSG) layer on a single side of the silicon wafer after the first alkali polishing. On the one hand, the PSG layer can play a role in getting impurities on the silicon wafer, further improving the passivation performance, thereby reducing the quality requirements of the silicon wafer; on the other hand, it can serve as a mask layer to protect the silicon on the front side of the silicon wafer from being corroded; and the present disclosure performs the first alkali polishing before growing the PSG layer, which can save a cleaning process before high-temperature diffusion, and after an appropriate amount of polishing, the PSG layer will be more uniform and dense, and the protection effect on the front side is better. The present disclosure effectively reduces the consumption of chemical liquid by performing multiple alkali polishings at specific times (preferably with a low alkali concentration and a short polishing time, which further effectively reduces the amount of subsequent refilling), and the life of the tank body is relatively increased. Moreover, after the second and third alkali polishings, the surface flatness of the silicon wafer is significantly improved, and the passivation performance is greatly improved. Among them, the three alkali polishings are performed at appropriate etching depths respectively, which can improve the surface flatness, thereby helping to improve the back passivation performance. Under the same conditions, if the depth of the three alkaline polishing is not appropriate, for example, excessive corrosion in the first alkaline polishing, it will cause twice the silicon loss, thereby significantly increasing the cost of silicon wafers during mass production.

[0038] In the preferred embodiment of the present invention, the second alkaline solution of the second alkaline polishing adopts a method combining inorganic alkali and organic alkali, which has a faster polishing rate and higher uniformity, is beneficial to the back polishing effect, and effectively protects the front silicon from corrosion.

[0039] In the third alkaline solution preferred in the present disclosure, a polishing additive formed by a specific composition of surfactants, organic salts, and corrosion and scale inhibitors is selected so that the front side can be protected from corrosion to the greatest extent during the polishing process, the back side can obtain a better polishing effect, and it is also beneficial to the cleaning of the silicon wafer surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present disclosure and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0041] FIG1 is a microscopic image of Example 1 of the present disclosure after multi-step polishing;

[0042] FIG2 is a microscope image of Comparative Example 1 after conventional polishing. DETAILED DESCRIPTION

[0043] In this disclosure, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this disclosure, "plurality" means two or more, unless otherwise specifically specified.

[0044] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein. Among them, the terms "optional" and "optional" all mean that they may be included or not (or may be present or not).

[0045] The present disclosure provides a backside polishing method for a back-contact battery, comprising the following steps:

[0046] S1, immersing the silicon wafer in the first alkaline solution for the first alkaline polishing, washing and drying after the reaction is completed;

[0047] S2, forming a phosphorus-silicate glass (PSG) layer on both sides of the silicon wafer obtained in S1 by high-temperature diffusion;

[0048] S3, then removing the phosphosilicate glass layer on one side of the silicon wafer obtained in S2;

[0049] S4, immersing the silicon wafer obtained in S3 in a second alkaline solution for a second alkaline polishing, and washing with water after the reaction is completed;

[0050] S5, immersing the silicon wafer obtained in S4 in a third alkaline solution for a third alkaline polishing, and washing with water after the reaction is completed;

[0051] S6. Remove the phosphosilicate glass layer from the silicon wafer obtained in S5, wash with water, and dry.

[0052] In the above technical solution, the present invention adopts multi-step alkali polishing to treat the back side, especially forming a PSG layer after the first alkali polishing, using the PSG layer as the front mask layer to perform impurity gettering treatment on the silicon wafer, thereby improving the passivation performance; subsequently, two more alkali polishings are performed, thereby reducing the loss of the chemical solution (i.e., alkaline solution), and increasing the size of the silicon wafer tower base, thereby improving the back side polishing effect, and further significantly improving the passivation performance.

[0053] In this field, backside polishing is the first step in producing back-contact cells. Therefore, it should be noted that the silicon wafer raw material in S1 is a bare silicon wafer cut by diamond wire.

[0054] In S1 of this disclosure, the first alkaline polishing process allows the etching depth of the silicon wafer on one side to be 1-2 μm after polishing. The first alkaline polishing process has a suitably low etching depth on one side, which can minimize the loss of silicon from etching on both sides. Appropriate polishing is beneficial to the uniformity and density of the subsequent PSG film.

[0055] The single-sided etching depth of 1-2 μm means that the etching depth on any side of the silicon wafer is within the range of 1-2 μm; the subsequent meanings apply similarly.

[0056] In some preferred embodiments of the present disclosure, in S1, the conditions for the first alkali polishing include: a reaction temperature of 70-80° C. and a reaction time of 60-120 s.

[0057] In some preferred embodiments of the present disclosure, in S1, the first alkali solution includes a first inorganic base with a concentration of 5 wt % to 10 wt %.

[0058] The silicon wafer described in S1 of the present disclosure is preferably a single crystal silicon wafer.

[0059] In S2, a phosphorus-silicate glass layer is formed on both sides of the silicon wafer obtained in S1 by high-temperature diffusion. It can be understood that in this process, phosphorus-silicate glass layers are formed on both sides of the silicon wafer.

[0060] In some preferred embodiments of the present disclosure, in S2, the thickness of the phosphosilicate glass layer is 100-1000 Å. In this preferred embodiment, the thickness of the phosphosilicate glass layer is appropriate, can play an external gettering role, and is beneficial to protecting the front surface from corrosion.

[0061] In some preferred embodiments of the present disclosure, the high-temperature diffusion process includes heat treatment at 700-900° C. for 90-120 minutes.

[0062] In some preferred embodiments of the present disclosure, the PSG on one side of the silicon wafer in S3 is removed by transporting the silicon wafer into an HF solution using a roller.

[0063] More preferably, the mass concentration of HF in the HF solution is 1%-5%.

[0064] More preferably, the silicon wafers are conveyed at a speed of 1.2-2.0 m / min. The conveying can be performed, for example, by a chain conveyor. It is understood that the speed of the drive rollers of the chain conveyor is 1.2-2.0 m / min.

[0065] The removal of PSG on one side of the silicon wafer in S3 of the present disclosure is carried out at room temperature.

[0066] The second alkali polishing described in S4 of the present disclosure allows the etching depth of the single side of the polished silicon wafer to be 2-3 μm. The etching depth of the single side of the second alkali polishing is appropriately increased, which can completely remove the diamond wire damage layer on the surface of the silicon wafer, making it more conducive to the next polishing step.

[0067] In some preferred embodiments of the present disclosure, the conditions for the second alkali polishing in S4 include: a reaction temperature of 70-80° C., a reaction time of 90-180 s, more preferably 90-150 s.

[0068] In some preferred embodiments of the present disclosure, in S4, the second alkaline solution comprises, by mass percentage, a second inorganic base at a concentration of 2%-10%, more preferably 2%-5%, and an organic base at a concentration of 1%-3%. The present disclosure utilizes a second alkaline solution with this composition to achieve improved polishing uniformity and a faster polishing rate, thereby further improving the flatness of the silicon wafer surface.

[0069] In some preferred embodiments of the present disclosure, the organic base is selected from tetramethylammonium hydroxide (TMAH), which can protect the mask layer on the front side of the silicon wafer from being corroded.

[0070] The third alkaline polishing described in S5 of this disclosure achieves a single-side etching depth of 2-3 μm after polishing. This disclosure achieves a surface reflectivity greater than 40%. Maintaining a suitably high single-side etching depth during the third alkaline polishing increases the tower base size on the silicon wafer surface, helps reduce surface step height differences, and improves surface flatness.

[0071] In some preferred embodiments of the present disclosure, the conditions for the third alkali polishing in S5 include: reaction temperature of 60-75°C, reaction time of 90-240s; more preferably, the reaction temperature is 60-70°C, and the reaction time is 90-150s.

[0072] The present invention preferably sets the reaction temperature of the third alkali polishing to be lower than the reaction temperature of the second alkali polishing to control the appropriate corrosion rate. In particular, when the third alkali solution contains polishing additives, it can also avoid excessive corrosion of the polishing additives and high-temperature volatilization of the polishing additives, thereby further improving the surface flatness and reducing silicon loss.

[0073] In some preferred embodiments of the present disclosure, in S5, the third alkaline solution comprises: a third inorganic base with a concentration of 2%-5% by mass, and a polishing additive with a concentration of 0.5%-2% by mass.

[0074] In the preferred composition scheme of the above-mentioned first alkali solution, the second alkali solution and the third alkali solution, the present disclosure adopts a specific mixed alkali composition method to carry out the second alkali polishing and the third alkali polishing, which has better polishing uniformity and faster polishing rate, further effectively improving the surface polishing effect. At the same time, the corresponding alkali concentration selected is low, which minimizes the liquid consumption.

[0075] The first inorganic base, the second inorganic base and the third inorganic base are each independently selected from sodium hydroxide and / or potassium hydroxide.

[0076] In some preferred embodiments of the present disclosure, the polishing additive comprises, by mass percentage, 1.5%-3% surfactant, 0.5%-2% salt, 1%-2% corrosion and scale inhibitor, and 93%-97% water. This embodiment leverages the emulsifying and wetting effects of the surfactant to synergistically separate dirt from the backside of the silicon wafer, while simultaneously utilizing the salt (preferably an organic salt) and corrosion and scale inhibitor to synergistically control the alkaline corrosion rate, minimizing corrosion on the front side during polishing while achieving a superior polishing effect on the backside.

[0077] In some preferred embodiments of the present disclosure, the surfactant comprises 0.5%-1% sodium polyacrylate and 1%-2% fatty alcohol polyoxyethylene ether. In this preferred embodiment of the present disclosure, the use of at least a properly proportioned fatty alcohol polyoxyethylene ether and sodium polyacrylate as surfactants synergistically separates dirt from the silicon wafer surface through emulsification and wetting, effectively cleaning the silicon wafer surface and facilitating polishing of the backside of the silicon wafer, thereby improving backside surface flatness.

[0078] In the present disclosure, any conventional types of fatty alcohol polyoxyethylene ethers as surfactants can be used in the present disclosure. For example, the number of C atoms in the fatty alcohol polyoxyethylene ethers can be 12-18, and the degree of polymerization can be 15-20.

[0079] In some preferred embodiments of the present disclosure, the corrosion and scale inhibitor is selected from aminotri(methylene)phosphoric acid. In this preferred embodiment of the present disclosure, aminotri(methylene)phosphoric acid can selectively adsorb on the surface of silica, significantly reducing the corrosion rate of the third alkaline solution on the silica, thereby minimizing corrosion on the front surface during polishing and achieving a better polishing effect on the back surface.

[0080] The salt may be an organic salt and / or an inorganic salt, and is preferably selected from sodium benzoate and / or sodium carbonate.

[0081] More preferably, the organic salt is selected from sodium benzoate. In this preferred embodiment, sodium benzoate can control the reaction rate and prevent excessive corrosion by changing the viscosity of the third alkaline solution. It also has a chelating effect on metal ions, better ensuring the cleanliness of the silicon wafer surface, and is more conducive to polishing the back of the silicon wafer, thereby improving the flatness of the back surface.

[0082] In some preferred embodiments of the present disclosure, in S6, the phosphosilicate glass layer of the silicon wafer obtained in S5 is removed using an HF solution, and the HF mass concentration in the HF solution is 1%-5%.

[0083] In some preferred embodiments of the present disclosure, the conditions for removing the phosphosilicate glass layer of the silicon wafer obtained in S5 include: the reaction temperature is room temperature, and the reaction time is 60-180 seconds.

[0084] The water used for washing in any step of the present disclosure is preferably deionized water.

[0085] The embodiments of the present disclosure are described in detail below. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present disclosure, and should not be understood as limiting the present disclosure.

[0086] Example 1

[0087] A backside polishing method for a back-contact battery, comprising the following steps:

[0088] S1. Immerse the back contact cell monocrystalline silicon wafer in the first alkaline solution and react at 75°C for 90 seconds. After the reaction, wash and dry it with deionized water.

[0089] The first alkaline solution is a 7 wt% NaOH aqueous solution, and the etching depth of a single side of the silicon wafer after polishing is 1-1.5 μm;

[0090] S2, using high temperature diffusion to form a layer of PSG (phosphorus silicon glass) on the surface of the single crystal silicon wafer;

[0091] The high temperature diffusion process is heat treated at 850°C for 100 min, and the PSG layer thickness is 500 Å;

[0092] S3, using HF solution and chain conveyor to remove PSG on one side of the silicon wafer; specifically, the silicon wafer is conveyed by the chain conveyor to be immersed in the HF solution;

[0093] The HF concentration in the HF solution is 2 wt %, the reaction temperature is room temperature, and the speed of the chain conveyor drive roller is 1.2 m / min.

[0094] S4, placing the polished silicon wafer with PSG removed from one side into the second alkaline solution, reacting at 80°C for 120s, and then washing with water after the reaction is completed;

[0095] The second alkaline solution is a mixed aqueous solution of an inorganic base and an organic base, wherein the inorganic base is 3wt% NaOH and the organic base is 2wt% tetramethylammonium hydroxide (TMAH). After polishing, the etching depth on a single side of the silicon wafer is 2-2.5μm. The second alkaline solution has good polishing uniformity and a fast polishing rate, which helps to improve the flatness of the silicon wafer surface. The tetramethylammonium hydroxide can also protect the mask layer on the front of the silicon wafer from corrosion.

[0096] S5. Place the silicon wafer treated in S4 into a third alkaline solution, react at 65°C for 120s, and then wash with water after the reaction is complete;

[0097] The third alkali solution is an aqueous solution containing 3 wt% NaOH and 1 wt% polishing additive, and the single-side corrosion depth of the silicon wafer after polishing is 2-3 μm;

[0098] The main components of the polishing additive are 0.8wt% sodium polyacrylate, 2wt% fatty alcohol polyoxyethylene ether (specifically, fatty alcohol polyoxyethylene ether with C atoms = 12 and polymerization degree n = 18), 1wt% sodium benzoate, 1.5wt% aminotri(methylene)phosphoric acid, and the balance is water.

[0099] Fatty alcohol polyoxyethylene ether and sodium polyacrylate act as surfactants, which can separate dirt from the surface of silicon wafers through emulsification and wetting, and have a good cleaning effect on the surface of silicon wafers;

[0100] As a corrosion and scale inhibitor, aminotrimethylphosphonic acid can be selectively adsorbed on the surface of silica, significantly reducing the corrosion rate of alkali on silica, so that the front side will not be corroded during the polishing process and the back side can achieve a better polishing effect;

[0101] As an organic salt, sodium benzoate can change the viscosity of the tank solution, control the reaction rate, and prevent excessive corrosion. It also has a chelating effect on metal ions, better ensuring the cleanliness of the silicon wafer surface.

[0102] S6. Remove the PSG mask layer with HF solution at room temperature for 100 seconds, then wash and dry with deionized water to complete the backside polishing process. The HF solution has a HF mass concentration of 2%.

[0103] A microscope image of the product obtained in this example is shown in FIG1 .

[0104] Example 2

[0105] The method of Example 1 is referred to, except that the first alkali polishing in S1 makes the single-side etching depth of the polished silicon wafer 1.5-2 μm, and the reaction temperature of the first alkali polishing is adjusted to 80° C. and the reaction time is 120 s accordingly.

[0106] Example 3

[0107] The method of Example 1 is referred to, except that the thickness of the phosphosilicate glass layer formed in S2 is 300 Å, the temperature of the high-temperature diffusion is adjusted to 800° C., and the heat treatment time is 90 min.

[0108] Example 4

[0109] The method of Example 1 is referred to, except that the second alkaline polishing in S4 makes the single-side etching depth of the polished silicon wafer 2.5-3 μm, and the inorganic base concentration in the second alkaline polishing is adjusted accordingly to 5 wt% NaOH, and the reaction time is 150 s.

[0110] Example 5

[0111] The method of Example 1 is referred to, except that the third alkali solution is used for the second alkali polishing in S4, and the second alkali solution is used for the third alkali polishing in S5.

[0112] Comparative Example 1

[0113] This comparative example adopts a conventional polishing method, specifically: placing a bare silicon wafer cut by diamond wire into an alkaline solution, reacting at 80° C., the alkali concentration used is 15 wt % NaOH aqueous solution, and the reaction time is 120 s.

[0114] A microscope image of the product obtained in this comparative example is shown in FIG2 .

[0115] Comparative Example 2

[0116] The method of Comparative Example 1 was followed, except that the reaction time was adjusted to 300 s.

[0117] Comparative Example 3

[0118] The method of Example 1 is referred to, except that S2-S3 are not performed, but S4-S5 are performed directly after S1.

[0119] Comparative Example 4

[0120] The method of Example 1 is referred to, except that the first alkali polishing in S1 makes the single-side etching depth of the polished silicon wafer 3-4 μm, and the reaction temperature of the first alkali polishing is adjusted to 85° C. and the reaction time is 150 s accordingly.

[0121] Test Case

[0122] The products obtained from the above examples and comparative examples were subjected to performance tests. The test methods were as follows: ① The reflectivity of the samples was measured using a D8 integrating reflectometer; ② The corrosion depth of the silicon wafer was calculated based on the weight loss of the silicon wafer. The calculation formula is as follows: corrosion depth = corrosion weight of silicon wafer / silicon wafer density / silicon wafer area. The silicon wafer density is 2.33 g / cm 3③ The open circuit voltage (OCV) of the back contact cell was measured using a Halm tester. The test results are shown in Table 1. The higher the reflectivity, the better the surface flatness.

[0123] Table 1

[0124] The above results show that, compared to the comparative examples, the solution using the embodiments of the present disclosure can reduce silicon loss (total corrosion depth below 9 μm) while improving surface flatness to a high level, with a reflectivity greater than 41%, while also reducing chemical solution consumption and ensuring excellent passivation levels (open-circuit voltage greater than 750 mV), achieving a good overall effect. Comparative Examples 1-4, which do not employ the specific steps of the present disclosure, cannot achieve the same results as the embodiments.

[0125] Furthermore, according to Example 1 and Examples 2-5, it can be seen that the preferred solution of the present disclosure can maximize the surface flatness while reducing silicon loss, thereby being more conducive to improving the passivation performance and saving mass production costs.

[0126] The preferred embodiments of the present disclosure are described in detail above, but the present disclosure is not limited thereto. Within the technical concept of the present disclosure, various simple variations of the technical solution of the present disclosure may be made, including combining the various technical features in any other appropriate manner. These simple variations and combinations should also be regarded as disclosed by the present disclosure and fall within the scope of protection of the present disclosure. Industrial Applicability

[0127] The back polishing method of the back contact battery provided by the present disclosure can reduce the consumption of chemical solution, relatively increase the life of the tank body, reduce silicon loss and improve surface flatness, the surface step height difference is less than 3μm, and the surface reflectivity is greater than 40%.

Claims

1. A back side polishing method for a back contact battery, characterized in that: The following steps are involved: S1, immersing the silicon wafer in the first alkaline solution for the first alkaline polishing, wherein the first alkaline polishing makes the single-side corrosion depth of the polished silicon wafer be 1-2 μm, and washing and drying after the reaction is completed; S2, forming a phosphorus-silicate glass layer on both sides of the silicon wafer obtained in S1 by high temperature diffusion; S3, then removing the phosphorus silicon glass layer on one side of the silicon wafer obtained in S2; S4, immersing the silicon wafer obtained in S3 in a second alkali solution for a second alkali polishing, wherein the second alkali polishing makes the single-side corrosion depth of the polished silicon wafer be 2-3 μm, and washing with water after the reaction is completed; S5, immersing the silicon wafer obtained in S4 in a third alkali solution for a third alkali polishing, wherein the third alkali polishing makes the single-side corrosion depth of the polished silicon wafer be 2-3 μm, and washing with water after the reaction is completed; S6. Remove the phosphosilicate glass layer of the silicon wafer obtained in S5, wash with water and dry.

2. The back side polishing method according to claim 1, characterized in that: In S1, the conditions of the first alkali blasting include: reaction temperature of 70-80°C and reaction time of 60-120s.

3. The back side polishing method according to claim 1, characterized in that: In S2, the thickness of the phosphosilicate glass layer is 100-1000 Å; the high temperature diffusion process includes heat treatment at 700-900°C for 90-120 minutes.

4. The back side polishing method according to claim 1, characterized in that: The PSG on one side of the silicon wafer in S3 is removed by roller conveying into HF solution for removal. The mass concentration of HF in the HF solution is 1%-5%, and the speed of conveying the silicon wafer is 1.2-2.0 m / min.

5. The back side polishing method according to claim 1, characterized in that: The conditions for the second alkali blasting in S4 include: a reaction temperature of 70-80° C. and a reaction time of 90-180 s.

6. The back side polishing method according to claim 1, characterized in that: The conditions for the third alkali blasting in S5 include: a reaction temperature of 60-75° C. and a reaction time of 90-240 s.

7. The back side polishing method according to claim 1, characterized in that: In S1, the first alkali solution includes a first inorganic base with a concentration of 5wt%-10wt%; In S4, the second alkali solution includes: a second inorganic base with a concentration of 2%-10% and an organic base with a concentration of 1%-3% by mass percentage; In S5, the third alkali solution includes: by mass percentage, a third inorganic base with a concentration of 2%-5% and a polishing additive with a concentration of 0.5%-2%.

8. The back side polishing method according to claim 7, characterized in that: The organic base is selected from tetramethylammonium hydroxide; the polishing additive comprises: by mass percentage, 1.5%-3% of a surfactant, 0.5%-2% of a salt, 1%-2% of a corrosion inhibitor and scale inhibitor, and 93%-97% of water.

9. The back side polishing method according to claim 8, characterized in that: The surfactant comprises 0.5%-1% sodium polyacrylate and 1%-2% fatty alcohol polyoxyethylene ether, the corrosion inhibitor and scale inhibitor is selected from aminotrimethylene phosphoric acid, and the salt is selected from sodium benzoate and / or sodium carbonate.

10. The back side polishing method according to claim 1, characterized in that: In S6, the phosphosilicate glass layer of the silicon wafer obtained in S5 is removed by using an HF solution, wherein the HF mass concentration of the HF solution is 1%-5%; and / or The conditions for removing the phosphosilicate glass layer of the silicon wafer obtained in S5 include: the reaction temperature is room temperature, and the reaction time is 60-180 seconds.

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