Display module and display device

By adopting a staged driving display module design in the e-ink display panel, and utilizing the alternating operation of two driving transistors and scan lines, two frames of images can be displayed within one display cycle, solving the screen stuttering problem caused by low refresh rate and significantly improving the display effect.

WO2024255350A1PCT designated stage expired Publication Date: 2024-12-19HKC CORP LTD
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Patent Information

Application Number
PCT/CN2024/081491
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-16
Filing Date
2024-03-13
Publication Date
2024-12-19

AI Technical Summary

Technical Problem

The low refresh rate of existing e-ink display panels results in slow response times, causing noticeable screen stuttering for users.

Method used

A display module design is adopted, wherein each display cycle is divided into two stages. The first stage displays one frame of image, and the second stage displays the next frame of image. By setting adjacent first and second pixel units in each pixel unit and receiving data signals in different stages, the image is refreshed quickly by using the alternating operation of two driving transistors and scan lines.

Benefits of technology

Displaying two frames of images within a single display cycle increases the refresh rate, reduces screen stuttering, and significantly improves the display effect.

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    Figure CN2024081491_19122024_PF_FP_ABST
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Abstract

A display module (100) and a display device. The display module (100) comprises: pixel units (40), wherein each pixel unit (40) comprises a pixel electrode (13), a common electrode (22), and microcapsule structures (30), the pixel electrode (13) and the common electrode (22) are arranged opposite to each other, and the microcapsule structures (30) are arranged between the pixel electrode (13) and the common electrode (22); a driving transistor (14), comprising a control end (141), a first end (142), and a second end (143), wherein the second end (143) is electrically connected to the pixel electrode (13); a scanning line (15) electrically connected to the control end (141); and a data line (16) electrically connected to the first end (142). Each pixel unit (40) comprises a first pixel unit (41) and a second pixel unit (42) adjacent to each other; within each display period (T), the first pixel unit (41) is used for receiving one frame of data signal pushed by the data line (16) in a first stage (T1), and the second pixel unit (42) is used for receiving the next frame of data signal pushed by the data line (16) in a second stage (T2); and the first stage (T1) precedes the second stage (T2). The display module (100) can effectively improve the refresh rate and mitigate picture stuttering.
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Description

Display module and display device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority based on Chinese patent application 202310717687X filed on June 16, 2023, and all of its contents are incorporated herein by reference. Technical Field

[0003] The present application relates to the field of display technology, and in particular to a display module and a display device. Background Art

[0004] With the development of the display industry, more and more people have put forward higher requirements for the display effects of display panels. Among them, electronic ink (E-Ink) display panels have gradually entered the public's field of vision due to their unique reflective display mode, and their scale in the display market is growing.

[0005] Typically, electronic ink display panels display images through the electrophoretic movement of charged particles of different colors in the electronic ink within the electric field formed between the upper and lower substrates. However, this electrophoretic display method results in a long response time for electronic ink, approximately 400 milliseconds, far slower than that of liquid crystal display panels. This slow response also results in a low panel refresh rate, resulting in noticeable "stuttering" during use.

[0006] Summary of the Invention

[0007] The present application provides a display module and a display device, aiming to solve the problem of low refresh rate of display devices in the prior art causing image freezes.

[0008] In order to solve the above technical problems, the first technical solution provided by this application is to provide a display module. The display module includes:

[0009] The pixel unit includes a pixel electrode, a common electrode and a microcapsule structure, wherein the pixel electrode and the common electrode are arranged opposite to each other, the microcapsule structure is arranged between the pixel electrode and the common electrode, and the microcapsule structure includes charged particles;

[0010] a driving transistor comprising a control terminal, a first terminal, and a second terminal, wherein the second terminal is electrically connected to the pixel electrode and is used to drive the pixel unit;

[0011] A scanning line, electrically connected to the control terminal, for providing a scanning signal to the pixel unit;

[0012] a data line electrically connected to the first end and configured to provide a data signal to the pixel electrode;

[0013] Wherein, the pixel unit includes a first pixel unit and a second pixel unit that are adjacent to each other;

[0014] In each display cycle, the first pixel unit is used to receive a frame of data signals pushed by the data line in the first phase, and the second pixel unit is used to receive the next frame of data signals pushed by the data line in the second phase, and the first phase is before the second phase.

[0015] The display module includes a plurality of pixel units arranged in a matrix; in each display cycle,

[0016] In the first stage, the driving transistors corresponding to the plurality of rows of first pixel units are turned on in sequence, so that the plurality of rows of first pixel units receive a frame of data signals pushed by the data lines and display a frame of image;

[0017] In the second phase, the driving transistors corresponding to the plurality of rows of second pixel units are turned on in sequence, so that the plurality of rows of second pixel units receive the next frame of data signals pushed by the data lines and display the next frame of image.

[0018] The pixel electrode includes a first pixel electrode and a second pixel electrode adjacent to each other, the first pixel electrode, the common electrode and the microcapsule structure forming a first pixel unit, and the second pixel electrode, the same common electrode and the microcapsule structure forming a second pixel unit;

[0019] The driving transistor includes a first transistor and a second transistor. The second end of the first transistor is electrically connected to the first pixel electrode, and the second end of the second transistor is electrically connected to the second pixel electrode.

[0020] Wherein, the first end of the first transistor and the first end of the second transistor are respectively electrically connected to the same data line;

[0021] The scan line includes a first scan line and a second scan line, the first scan line is electrically connected to the control terminal of the first transistor, and the second scan line is electrically connected to the control terminal of the second transistor;

[0022] In each display cycle, the first scan line is used to push a scan signal to the first transistor in the first stage, and the second scan line is used to push a scan signal to the second transistor in the second stage, so that the first pixel unit receives a frame of data signals pushed by the data line in the first stage, and the second pixel unit receives the next frame of data signals pushed by the data line in the second stage.

[0023] Among them, in each display cycle,

[0024] In the first stage, each first scan line pushes a frame of scan signals row by row to turn on the first transistors row by row; each data line pushes a frame of data signals column by column to the first pixel unit to display a frame of image;

[0025] In the second stage, each second scan line pushes the next frame scan signal row by row to turn on the second transistor row by row; each data line pushes the next frame data signal to the second pixel unit column by column to display the next frame image.

[0026] Among them, after the first stage ends, it will enter the second stage after a preset period of time.

[0027] Wherein, the control end of the first transistor and the control end of the second transistor are electrically connected to the same scan line respectively;

[0028] The data line includes a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor;

[0029] In each display cycle, in the first stage, the scan line is used to push the scan signal to the first transistor, and the first data line is used to push a frame of data signal to the first pixel unit through the first transistor; in the second stage, the scan line is used to push the scan signal to the second transistor, and the second data line is used to push the next frame of data signal to the second pixel unit through the second transistor.

[0030] Among them, in each display cycle,

[0031] In the first phase, each scan line pushes a frame of scan signals row by row to turn on the drive transistors row by row; the first data line pushes a frame of data signals row by row to the first pixel unit to display a frame of image; and after each first data line pushes a preset time, each second data line pushes the next frame of data signals column by column to the second pixel unit;

[0032] In the second stage, each scan line pushes the next frame scan signal line by line, and the second pixel unit receives the next frame data signal to display the next frame image.

[0033] The scan line includes a first scan line and a second scan line, the first scan line is electrically connected to the control terminal of the first transistor, and the second scan line is electrically connected to the control terminal of the second transistor;

[0034] The data line includes a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor;

[0035] In each display cycle, in the first stage, the first scan line is used to push the scan signal to the first transistor, and the first data line is used to push a frame of data signal to the first pixel unit through the first transistor; in the second stage, the second scan line is used to push the scan signal to the second transistor, and the second data line is used to push the next frame of data signal to the second pixel unit through the second transistor.

[0036] Among them, in each display cycle,

[0037] In the first stage, the first scan line pushes a frame of scan signals row by row to turn on the first transistors row by row; the first data line pushes a frame of data signals to the first pixel units column by column to display a frame of image;

[0038] In the second stage, the second scan line pushes the next frame scan signal row by row to turn on the second transistor row by row; the second data line pushes the next frame data signal to the second pixel unit column by column to display the next frame image.

[0039] The common electrode includes a first common electrode and a second common electrode adjacent to each other, the pixel electrode, the first common electrode and the microcapsule structure form a first pixel unit, and the same pixel electrode, the second common electrode and the microcapsule structure form a second pixel unit;

[0040] In each display cycle, the scan line pushes a scan signal to the driving transistor in the first and second stages; in the first stage, the data line pushes a frame of data signal to the pixel electrode through the first end, and the first common electrode is used to push a first common voltage signal so that the first pixel unit receives a frame of data signal; in the second stage, the data line pushes the next frame of data signal to the pixel electrode through the first end, and the second common electrode is used to push a second common voltage signal so that the second pixel unit receives the next frame of data signal.

[0041] In each display cycle, the scan lines push the scan signals row by row to turn on the drive transistors row by row.

[0042] In the first stage, the first common electrode pushes a frame of common voltage signals; the data lines push a frame of data signals to the pixel electrodes column by column, so that a corresponding electric field is formed in the first pixel unit to display a frame of image;

[0043] After the data line pushes the data signal for a preset time, the second common electrode pushes the next frame of common voltage signal, and after the preset time, enters the second stage;

[0044] In the second stage, the data lines push the next frame of data signals to the pixel electrodes column by column, so that a corresponding electric field is formed in the second pixel unit to display the next frame of image.

[0045] The pixel electrodes include adjacent first and second pixel electrodes, and the common electrodes include adjacent first and second common electrodes; the first pixel electrode is disposed opposite the first common electrode and forms a first pixel unit with the microcapsule structure; the second pixel electrode is disposed opposite the second common electrode and forms a second pixel unit with the microcapsule structure;

[0046] The driving transistor includes a first transistor and a second transistor. The second end of the first transistor is electrically connected to the first pixel electrode, and the second end of the second transistor is electrically connected to the second pixel electrode.

[0047] Wherein, the control end of the first transistor and the control end of the second transistor are respectively electrically connected to the same scan line;

[0048] The data line includes a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor;

[0049] In each display cycle, the scan line is used to push the scan signal to the driving transistor in the first stage and the second stage; in the first stage, the first data line is used to push a frame of data signal to the first pixel electrode through the first transistor, and the first common electrode is used to push the first common voltage signal so that the first pixel unit receives a frame of data signal; in the second stage, the second data line is used to push the next frame of data signal to the second pixel electrode through the second transistor, and the second common electrode is used to push the second common voltage signal so that the second pixel unit receives the next frame of data signal.

[0050] In each display cycle, the scan lines push the scan signals row by row to turn on the drive transistors row by row.

[0051] In the first stage, the first common electrode pushes a first common voltage signal, and the first data line pushes a frame of data signals to the first pixel units column by column to display a frame of image;

[0052] In the second stage, the second common electrode pushes the second common voltage signal, and the second data line pushes the next frame data signal to the second pixel unit column by column to display the next frame image.

[0053] Wherein, the first end of the first transistor and the first end of the second transistor are respectively electrically connected to the same data line;

[0054] The scan line includes a first scan line and a second scan line, the first scan line is electrically connected to the control terminal of the first transistor, and the second scan line is electrically connected to the control terminal of the second transistor;

[0055] In each display cycle, in the first stage, the first scan line is used to push the scan signal to the first transistor, the data line is used to push a frame of data signal to the first pixel electrode through the first transistor, and the first common electrode is used to push the first common voltage signal so that the first pixel unit receives a frame of data signal; in the second stage, the second scan line is used to push the next frame of data signal to the second pixel electrode through the second transistor, and the second common electrode is used to push the second common voltage signal so that the second pixel unit receives the next frame of data signal.

[0056] Among them, in each display cycle,

[0057] In the first stage, the first scan line pushes a frame of scan signals row by row to turn on the first transistor row by row; the first common electrode pushes a first common voltage signal, and the data line pushes a frame of data signals to the first pixel unit to display a frame of image;

[0058] In the second stage, the second scan line pushes the next frame scan signal row by row to turn on the second transistor row by row; the second common electrode pushes the second common voltage signal, and the data line pushes the next frame data signal to the second pixel unit column by column to display the next frame image.

[0059] The microcapsule structure includes an electrophoretic medium and positively charged particles and negatively charged particles suspended in the electrophoretic medium; the positively charged particles and negatively charged particles are charged particles of different colors.

[0060] In order to solve the above technical problems, the second technical solution provided by this application is to provide a display device. The display device includes:

[0061] A display module, used for displaying images, wherein the display module is the display module involved in the above technical solution;

[0062] The control module is electrically connected to the display module and is used to provide a control signal to the display module so that in each display cycle, the display module displays one frame of image in the first stage and displays the next frame of image in the second stage.

[0063] Beneficial effects of the present application: Different from the prior art, the present application provides a display module and a display device, which includes multiple pixel units, each pixel unit includes adjacent first pixel unit and second pixel unit for displaying images; and in each display cycle, the first pixel unit receives a frame of data signal pushed by the data line in the first stage to display a frame of picture, and the second pixel unit receives the next frame of data signal pushed by the data line in the second stage to display the next frame of picture, so that the display module can display two frames of pictures in one display cycle, and the refresh rate of the display module can be doubled, thereby overcoming the problem of low refresh rate caused by the slow response speed of the display module, effectively improving the refresh rate of the display module, and improving the "stuttering" feeling of the picture. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0065] FIG1 is a schematic structural diagram of a driving substrate of a display module provided by an embodiment of the prior art;

[0066] FIG2 a is a schematic structural diagram of the pixel unit provided in the embodiment of FIG1 when no electric field is applied;

[0067] FIG2 b is a schematic structural diagram of the pixel unit provided in the embodiment of FIG1 when displaying black;

[0068] FIG2c is a schematic structural diagram of the pixel unit provided in the embodiment of FIG1 when displaying white;

[0069] FIG3 is a schematic structural diagram of a display module provided in the first embodiment of the present application;

[0070] FIG4 is a schematic structural diagram of a driving substrate provided in the first embodiment of the present application;

[0071] FIG5 is a schematic structural diagram of another driving substrate provided in the first embodiment of the present application;

[0072] FIG6 is a timing diagram of driving signals of a display module provided in the first embodiment of the present application;

[0073] FIG7 is a schematic structural diagram of a display module provided in a second embodiment of the present application;

[0074] FIG8 is a schematic structural diagram of a driving substrate provided in a second embodiment of the present application;

[0075] FIG9 is a schematic structural diagram of another driving substrate provided in the second embodiment of the present application;

[0076] FIG10 is a timing diagram of driving signals of a display module provided in a second embodiment of the present application;

[0077] FIG11 is a schematic structural diagram of a display module provided in a third embodiment of the present application;

[0078] FIG12 is a schematic structural diagram of a driving substrate provided in a third embodiment of the present application;

[0079] FIG13 is a timing diagram of driving signals of a display module provided in a third embodiment of the present application;

[0080] FIG14 is a schematic diagram of a planar structure of a display module provided in a fourth embodiment of the present application;

[0081] FIG15 is a schematic plan view of the structure of another display module provided in the fourth embodiment of the present application;

[0082] FIG16 is a timing diagram of driving signals of a display module provided in a fourth embodiment of the present application;

[0083] FIG17 is a schematic diagram of a planar structure of a display module provided in a fifth embodiment of the present application;

[0084] FIG18 is a timing diagram of driving signals of a display module provided in a fifth embodiment of the present application;

[0085] FIG19 is a schematic diagram of a planar structure of a display module provided in a sixth embodiment of the present application;

[0086] FIG20 is a timing diagram of driving signals of a display module provided in a sixth embodiment of the present application;

[0087] FIG21 is a schematic structural diagram of a display device provided in one embodiment of the present application.

[0088] Reference numerals: 100a, 100 - display module; 10a, 10 - driving substrate; 11a, 11 - substrate; 12a, 12 - driving circuit layer; 13a, 13 - pixel electrode; 131 - first pixel electrode; 132 - second pixel electrode; 14a, 14 - driving transistor; 141a, 141 - control terminal; 142a, 142 - first terminal; 143a, 143 - second terminal; 144 - first transistor; 145 - second transistor; 15a, 15 - scanning line; 151 - first scanning line; 152 - second scanning line; 16a, 16 - data line; 161 - first data line; 162 - second data line; 20a, 20 - Opposite substrates; 21a, 21 - Substrates; 22a, 22 - Common electrodes; 221 - First common electrode; 222 - Second common electrode; 30a, 30 - Microcapsule structure; 31a, 31 - Positively charged particles; 32a, 32 - Negatively charged particles; 40a, 40 - Pixel units; 41 - First pixel unit; 42 - Second pixel unit; 200 - Control module; T - Display cycle; T1 - First stage; T2 - Second stage, X - First direction, Y - Second direction. DETAILED DESCRIPTION

[0089] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0090] The terms "first," "second," and "third" in this application are used only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of such features. In the description of this application, "multiple" means at least two, for example, two, three, etc., unless otherwise specifically defined. All directional indications in the embodiments of this application (such as up, down, left, right, front, back...) are only used to explain the relative positional relationship, movement, etc. between the components under a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications also change accordingly. In addition, the terms "including" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products, or devices.

[0091] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0092] The present application is described in detail below with reference to the accompanying drawings and embodiments.

[0093] Please refer to Figures 1 and 2a. Figure 1 is a schematic diagram of the structure of a drive substrate for a display module provided in an embodiment of the prior art, and Figure 2a is a schematic diagram of the structure of a pixel unit provided in the embodiment of Figure 1 when no electric field is applied. In the prior art, an electrophoretic display module 100a includes a drive substrate 10a and a counter substrate 20a disposed opposite each other, and a microcapsule structure 30a disposed therebetween. The drive substrate 10a includes a substrate 11a, a drive circuit layer 12a, and an electrode layer, the electrode layer including a plurality of pixel electrodes 13a arranged in an array. The counter substrate 20a includes a plurality of common electrodes 22a. The oppositely disposed pixel electrodes 13a and the common electrodes 22a, together with the microcapsule structure 30a disposed therebetween, form a pixel unit 40a. Specifically, the driving circuit layer 12a includes a plurality of scan lines 15 extending along a first direction X, a plurality of data lines 16a extending along a second direction Y, and a plurality of driving transistors 14a. The driving transistors 14a correspond one-to-one to the pixel units 40a. Each scan line 15 is electrically connected to a control terminal 141a of the driving transistor 14a in the corresponding row, each data line 16a is electrically connected to a first terminal 142a of the driving transistor 14a in the corresponding column, and a second terminal 143a of the driving transistor 14a is electrically connected to the corresponding pixel electrode 13a. The first direction X intersects the second direction Y. In the embodiments of the present application, the first direction X and the second direction Y are perpendicular to each other.

[0094] As shown in Figure 2a, the microcapsule structure 30a arranged between the pixel electrode 13a and the common electrode 22a includes white positively charged particles 31a and black negatively charged particles 32a; when no potential is applied to the pixel electrode 13a and the common electrode 22a, the positively charged particles 31a and the negatively charged particles 32a are randomly distributed in the microcapsule structure 30a, and no image is displayed.

[0095] Please refer to Figure 2b, which is a schematic diagram of the structure of the pixel unit provided in the embodiment of Figure 1 when displaying black. When a negative potential is applied to the pixel electrode 13a and a positive potential is applied to the common electrode 22a, that is, the potential of the common electrode 22a is higher than the potential of the pixel electrode 13a, forming an electric field from the common electrode 22a to the pixel electrode 13a, the positively charged particles 31a move toward the pixel electrode 13a by "electrophoresis", and the negatively charged particles 32a move toward the common electrode 22a. At this time, the pixel unit 40a displays black.

[0096] Please refer to Figure 2c, which is a schematic diagram of the structure of the pixel unit provided in the embodiment of Figure 1 when displaying white. When a positive potential is applied to pixel electrode 13a and a negative potential is applied to common electrode 22a, that is, the potential of pixel electrode 13a is higher than the potential of common electrode 22a, forming an electric field from pixel electrode 13a to common electrode 22a, negatively charged particles 32a migrate toward pixel electrode 13a via "electrophoresis," while positively charged particles 31a migrate toward common electrode 22a. At this point, pixel unit 40a displays white.

[0097] In the above display mode, the positively charged particles 31a and the negatively charged particles 32a move in an "electrophoretic" manner, so their response speed is usually above 500ms, making the refresh rate of the display module 100a less than 10Hz, the dynamic display effect is poor, and the screen is prone to "stuttering".

[0098] The display module 100 (see Figure 3) provided in the embodiment of the present application is configured to display images by making each pixel unit 40 include adjacent first pixel units 41 and second pixel units 42; and in each display cycle T, the first pixel unit 41 receives a frame of data signal pushed by the data line 16 in the first stage T1 to display a frame of picture, and the second pixel unit 42 receives the next frame of data signal pushed by the data line 16 in the second stage T2 to display the next frame of picture, so that the display module 100 can display two frames of picture in one display cycle T, and the refresh rate of the display module 100 can be doubled, thereby overcoming the problem of low refresh rate caused by the slow response speed of the above-mentioned display module 100a, effectively improving the refresh rate of the display module 100a, and improving the "stuttering" feeling of the picture.

[0099] The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0100] Please refer to Figures 3-5. Figure 3 is a schematic diagram of the structure of the display module provided in the first embodiment of the present application, Figure 4 is a schematic diagram of the structure of a driving substrate provided in the first embodiment of the present application, and Figure 5 is a schematic diagram of the structure of another driving substrate provided in the first embodiment of the present application. In this embodiment, a display module 100 is provided, and the display module 100 includes a pixel unit 40, a driving transistor 14, a scan line 15 and a data line 16. Among them, a plurality of pixel units 40 are arranged in an array, and each pixel unit 40 includes a pixel electrode 13, a common electrode 22 and a microcapsule structure 30. The pixel electrode 13 and the common electrode 22 are arranged opposite to each other, and the microcapsule structure 30 is arranged between the pixel electrode 13 and the common electrode 22. Specifically, the microcapsule structure 30 includes an electrophoretic medium and positively charged particles 31 and negatively charged particles 32 suspended in the electrophoretic medium. The positively charged particles 31 and the negatively charged particles 32 are charged particles of different colors, and their specific colors can be set according to actual use needs. There is no specific limitation on this. In the embodiment of the present application, the positively charged particles 31 and the negatively charged particles 32 are white particles and black particles, respectively, as an example for illustration.

[0101] The driving transistor 14 includes a control terminal 141, a first terminal 142, and a second terminal 143. The second terminal 143 is electrically connected to the pixel electrode 13 and is used to drive the pixel electrode 13, thereby forming a corresponding electric field between the pixel electrode 13 and the common electrode 22, thereby causing the charged particles to move regularly. The scan line 15 is electrically connected to the control terminal 141 of the driving transistor 14, so that the scan line 15 provides a scan signal to the pixel unit 40 through the driving transistor 14. The data line 16 is electrically connected to the first terminal 142 of the driving transistor 14, so that the data line 16 provides a data signal to the pixel unit 40 through the driving transistor, causing the pixel unit 40 to display a corresponding color. Specifically, the control terminal 141 is the gate of the driving transistor 14, the first terminal 142 is the source of the driving transistor 14, and the second terminal 143 is the drain of the driving transistor 14. The driving transistor 14 can be a thin film transistor (TFT). The specific type can be selected according to actual needs and is not specifically limited to this.

[0102] In this embodiment, the pixel unit 40 includes a first pixel unit 41 and a second pixel unit 42. When the display module 100 displays an image, in each display cycle T, the first pixel unit 41 is used to display one frame of picture in the first stage T1, and the second pixel unit 42 is used to display the next frame of picture in the second stage T2, so that the display module 100 can display two frames of picture in one display cycle T, which can double the refresh rate of the display module 100, thereby overcoming the problem of low refresh rate caused by the slow response speed of the display module 100a, effectively improving the refresh rate of the display module 100, and improving the "stuttering" feeling of the picture.

[0103] Specifically, in each pixel unit 40, the pixel electrode 13 includes a first pixel electrode 131 and a second pixel electrode 132 adjacent to each other. The first pixel electrode 131, the common electrode 22, and the microcapsule structure 30 form the first pixel unit 41, and the second pixel electrode 132, the same common electrode 22 and the microcapsule structure 30 form the second pixel unit 42. The driving transistor 14 includes a first transistor 144 and a second transistor 145. The second end 143 of the first transistor 144 is electrically connected to the first pixel electrode 131, and the second end 143 of the second transistor 145 is electrically connected to the second pixel electrode 132. Specifically, the data line 16 is disposed between the first pixel unit 41 and the second pixel unit 42 to shorten the wiring length between the data line 16 and the first pixel unit 41 and / or the second pixel unit 42, thereby facilitating wiring layout. The first end 142 of the first transistor 144 and the first end 142 of the second transistor 145 are respectively electrically connected to the data line 16, so that the data line 16 provides data signals to the first pixel unit 41 and the second pixel unit 42, respectively.

[0104] Specifically, the scan lines 15 include a first scan line 151 and a second scan line 152. The first scan line 151 is electrically connected to the control terminal 141 of the first transistor 144 to control when the first pixel unit 41 can receive a data signal. The second scan line 152 is electrically connected to the control terminal 141 of the second transistor 145 to control when the second pixel unit 42 can receive a data signal. Specifically, as shown in Figures 4 and 5, the first scan line 151 and the second scan line 152 can be arranged on the same side of the pixel unit 40, or respectively on opposite sides of the pixel unit 40. The specific arrangement can be based on actual needs and is not specifically limited to this.

[0105] Please refer to Figure 6, which is a timing diagram of the driving signal of the display module provided by the first embodiment of the present application. In this embodiment, a driving method of the display module is provided, and the pixel unit 40 is three rows and three columns as an example for explanation. In each display cycle T, in the first stage T1, each first scan line 151 pushes a frame of scanning signals Gout1-1, Gout2-1, and Gout3-1 row by row to turn on the first transistor 144 row by row. At the same time, each data line 16 pushes a frame of data signals Data1-1, Data2-1, and Data3-1 to the first pixel unit 41 column by column during the corresponding first stage T1 period to turn on the first transistor 144 row by row. A pixel unit 41 displays a frame of image; after the first scan line 151 pushes for a period of time t, it enters the second stage T2, and each second scan line 152 pushes the next frame of scan signals Gout1-2, Gout2-2, and Gout3-2 row by row, so that the second transistors 145 are turned on row by row. At the same time, each data line 16 pushes the next frame of data signals Data1-2, Data2-2, and Data3-3 to the second pixel unit 42 column by column during the corresponding second stage T2 period, so that the second pixel unit 42 displays the next frame of image.

[0106] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and effectively improving the image "stuttering" experienced by the display module 100a. In this embodiment, the time difference t between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0107] Please refer to Figures 7-9. Figure 7 is a schematic diagram of the structure of a display module provided in the second embodiment of the present application, Figure 8 is a schematic diagram of the structure of a drive substrate provided in the second embodiment of the present application, and Figure 9 is a schematic diagram of the structure of another drive substrate provided in the second embodiment of the present application. Unlike the first embodiment, in this embodiment, in the same row of pixel units 40, the control terminal 141 of the first transistor 144 and the control terminal 141 of the second transistor 145 are respectively electrically connected to the corresponding same scan line 15 to control when the pixel units 40 in the row can receive data signals, that is, the pixel units 40 in the row are driven by one scan line 15; specifically, the data line 16 includes a first data line 161 and a second data line 162. The first data line 161 is electrically connected to the first terminal 142 of the first transistor 144 to provide a data signal to the first pixel unit 41, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145 to provide a data signal to the second pixel unit 42. Specifically, as shown in Figures 8 and 9, in this embodiment, in each pixel unit 40, the first data line 161 and the second data line 162 can be arranged on opposite sides of the pixel unit 40, or arranged between the first pixel unit 41 and the second pixel unit 42; of course, the first data line 161 can also be arranged on the outside of the first pixel unit 41, and the second scan line 152 can be arranged between the first pixel unit 41 and the second pixel unit 42; or, the first data line 161 is arranged between the first pixel unit 41 and the second pixel unit 42, and the second data line 162 is arranged on the outside of the second pixel unit 42; the specific setting can be made according to actual needs, and there is no specific limitation on this.

[0108] Specifically, in each display cycle T, in the first stage T1, the scan line 15 is used to push the scan signal to the first transistor 144, and the first data line 161 is used to push a frame of data signal to the first pixel unit 41 through the first transistor 144; in the second stage T2, the scan line 15 is used to push the scan signal to the second transistor 145, and the second data line 162 is used to push the next frame of data signal to the second pixel unit 42 through the second transistor 145.

[0109] Please refer to Figure 10, which is a driving signal timing diagram of the display module provided by the second embodiment of the present application. Specifically, still taking the pixel unit 40 as three rows and three columns as an example, in each display cycle T, in the first stage T1, each scan line 15 pushes a frame of scan signals Gout1-1, Gout2-1, Gout3-1 row by row, so that the driving transistor 14 is turned on row by row. At the same time, in this stage, the first data line 161 pushes a frame of data signals Data1-1, Data2-1, Data3-1 column by column to the first pixel unit 41, so that the first pixel unit 41 displays the frame image; after each first data line 161 pushes for a period of time t1, the second data line 162 pre-pushes the next frame of data signals Data1-2, Data2-2, Data3-2 to the second pixel unit 42. At this time, Since the scan line 15 has not yet pushed the next frame scan signal, the second pixel unit 42 does not display the next frame image; after the second data line 162 pushes for a period of time t2, it enters the second stage T2, the scan line 15 pushes the next frame scan signal row by row, and the second pixel unit 42 receives the next frame data signal Data1-2, Data2-2, Data3-2 pushed by the second data line 162, so that the second pixel unit 42 displays the next frame image.

[0110] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and effectively improving the image "stuttering" that occurs in the display module 100a. In this embodiment, the time difference (t1 + t2) between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0111] Please refer to Figures 11-12. Figure 11 is a schematic diagram of the structure of a display module provided in the third embodiment of the present application, and Figure 12 is a schematic diagram of the structure of a drive substrate provided in the third embodiment of the present application. Unlike the first and second embodiments, in this embodiment, the scan line 15 includes a first scan line 151 and a second scan line 152, the first scan line 151 is electrically connected to the control terminal 141 of the first transistor 144, and the second scan line 152 is electrically connected to the control terminal 141 of the second transistor 145; the data line 16 includes a first data line 161 and a second data line 162, the first data line 161 is electrically connected to the first terminal 142 of the first transistor 144, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145. Among them, the specific setting method of the first scan line 151 and the second scan line 152 is the same as or similar to the specific setting method of the first scan line 151 and the second scan line 152 involved in the above-mentioned first embodiment, and can achieve the same technical effect; the specific setting method of the first data line 161 and the second data line 162 is the same as or similar to the specific setting method of the first data line 161 and the second data line 162 involved in the above-mentioned second embodiment, and can achieve the same technical effect. For details, please refer to the above introduction and will not be repeated here.

[0112] Specifically, in each display cycle T, in the first stage T1, the first scan line 151 is used to push a scan signal to the first transistor 144, and the first data line 161 is used to push a frame of data signal to the first pixel unit 41 through the first transistor 144; in the second stage T2, the second scan line 152 is used to push a scan signal to the second transistor 145, and the second data line 162 is used to push the next frame of data signal to the second pixel unit 42 through the second transistor 145.

[0113] Please refer to FIG. 13 , which is a timing diagram of driving signals of a display module provided in the third embodiment of the present application. Specifically, still taking the pixel unit 40 with three rows and three columns as an example, in each display cycle T, in the first stage T1, the first scan line 151 pushes a frame of scan signals Gout1-1, Gout2-1, and Gout3-1 row by row, so that the first transistors 144 are turned on row by row. At the same time, during this stage, the first data line 161 pushes a frame of data signals Data1-1, Data2-1, and Data3-1 column by column to the first pixel unit 41, so that the first pixel unit 41 displays a frame of image. After the first scan line 151 pushes for a period of time t, it enters the second stage T2, and the second scan line 152 pushes the next frame of scan signals Gout1-2, Gout2-2, and Gout3-2 row by row, so that the second transistors 145 are turned on row by row. During this stage, the second data line 16 pushes the next frame of data signals Data1-2, Data2-2, and Data3-2 column by column to the second pixel unit 42, so that the second pixel unit 42 displays the next frame of image.

[0114] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and effectively improving the image "stuttering" that may occur in the display module 100a. In this embodiment, the time difference t between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0115] Please refer to Figures 14-15. Figure 14 is a schematic diagram of the planar structure of a display module provided in the fourth embodiment of the present application, and Figure 15 is a schematic diagram of the planar structure of another display module provided in the fourth embodiment of the present application. In this embodiment, the common electrode 22 includes adjacent first common electrodes 221 and second common electrodes 222. The first common electrodes 221 and the second common electrodes 222 can be arranged in a direction parallel to the scan line 15, or can also be arranged in a direction parallel to the data line 16. The specific arrangement can be based on actual needs. Among them, the pixel electrode 13, the first common electrode 221, and the microcapsule structure 30 form a first pixel unit 41, and the same pixel electrode 13, the second common electrode 222, and the microcapsule structure 30 form a second pixel unit 42. That is, in the pixel unit 40, the first pixel unit 41 and the second pixel unit 42 share the pixel electrode 13, the part of the pixel electrode 13 opposite to the first common electrode 221 and the first common electrode 221 and the microcapsule structure 30 between the two form the first pixel unit 41, and the part of the pixel electrode 13 opposite to the second common electrode 222 and the second common electrode 222 and the microcapsule structure 30 between the two form the second pixel unit 42.

[0116] Specifically, in each display cycle T, the scan line 15 pushes a scan signal to the driving transistor 14 in the first stage T1 and the second stage T2; in the first stage T1, the data line 16 pushes a frame of data signal to the pixel electrode 13 through the first end 142, and the first common electrode 221 is used to push the first common voltage signal Com1, so that the first pixel unit 41 receives a frame of data signal; in the second stage T2, the data line 16 pushes the next frame of data signal to the pixel electrode 13 through the first end 142, and the second common electrode 222 is used to push the second common voltage signal Com2, so that the second pixel unit 42 receives the next frame of data signal.

[0117] Please refer to Figure 16, which is a driving signal timing diagram of the display module provided by the fourth embodiment of the present application. Specifically, the example of the pixel unit 40 with three rows and three columns is still used for explanation. In each display period T, the scanning line 15 pushes a frame of scanning signals Gout1, Gout2, and Gout3 row by row. At the same time, the first common electrode 221 pushes a frame of common voltage signal Com1. After the Com1 signal is pushed for a period of time t1, the data line 16 pushes a frame of data signals Data1-1, Data2-1, and Data3-1 to the pixel electrodes 13 column by column, so that a corresponding electric field is formed in the first pixel unit 41, that is, the data line 16 pushes a frame of data signals Data1-1, Data2-1, and Data3-1 to the first pixel unit 41 column by column, so that the first pixel unit 41 displays a frame of image. After sending the frame data signal for a period of time t2, the second common electrode 222 pushes a frame common voltage signal Com2. At this time, the data line 16 has not pushed the next frame data signal, so the corresponding electric field has not been formed in the second pixel unit 42, and the next frame image is not displayed; after the common voltage signal Com2 is pushed for a period of time t3, it enters the second stage T2, and the data line 16 pushes the next frame data signals Data1-2, Data2-2, and Data3-2 to the pixel electrodes 13 column by column to form a corresponding electric field in the second pixel unit 42, that is, the data line 16 pushes the next frame data signals Data1-2, Data2-2, and Data3-2 to the second pixel unit 42 column by column to make the second pixel unit 42 display the next frame image.

[0118] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate, thereby effectively improving the image "stuttering" that occurs in the display module 100a. In this embodiment, the time difference (t1+t2+t3) between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0119] Please refer to Figure 17, which is a schematic diagram of the planar structure of a display module provided in a fifth embodiment of the present application. In this embodiment, the pixel electrode 13 includes adjacent first and second pixel electrodes 131 and 132, and the common electrode 22 includes adjacent first and second common electrodes 221 and 222. The first pixel electrode 131 is disposed opposite the first common electrode 221 and forms a first pixel unit 41 with the microcapsule structure 30. The second pixel electrode 132 is disposed opposite the second common electrode 222 and forms a second pixel unit 42 with the microcapsule structure 30. The driving transistor 14 includes a first transistor 144 and a second transistor 145. The second terminal 143 of the first transistor 144 is electrically connected to the first pixel electrode 131, and the second terminal 143 of the second transistor 145 is electrically connected to the second pixel electrode 132. The control terminal 141 of the first transistor 144 and the control terminal 141 of the second transistor 145 are respectively electrically connected to the same scan line 15. The data line 16 includes a first data line 161 and a second data line 162. The first data line 161 is electrically connected to the first terminal 142 of the first transistor 144, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145. Specifically, the configuration of the first data line 161 and the second data line 162 can be the same or similar to the specific configuration of the first data line 161 and the second data line 162 involved in the second embodiment above, and can achieve the same technical effects. The configuration of the first common electrode 221 and the second common electrode 222 can be the same or similar to the configuration of the first common electrode 221 and the second common electrode 222 involved in the fourth embodiment above, and can achieve the same technical effects. The above details can be referred to the above specific description and will not be repeated here.

[0120] Specifically, in each display cycle T, the scan line 15 is used to push the scan signal to the driving transistor 14 in the first stage T1 and the second stage T2; in the first stage T1, the first data line 161 is used to push a frame of data signal to the first pixel electrode 131 through the first transistor 144, and the first common electrode 221 is used to push the first common voltage signal so that the first pixel unit 41 receives a frame of data signal; in the second stage T2, the second data line 162 is used to push the next frame of data signal to the second pixel electrode 132 through the second transistor 145, and the second common electrode 222 is used to push the second common voltage signal so that the second pixel unit 42 receives the next frame of data signal.

[0121] Please refer to FIG18 , which is a timing diagram of driving signals for a display module according to a fifth embodiment of the present application. Specifically, still taking the pixel units 40 as three rows and three columns as an example, within each display period T, the scan lines 15 push Gout1, Gout2, and Gout3 row by row, thereby turning on the drive transistors 14 row by row. During a first phase T1, the first common electrode 221 pushes a first common voltage signal Com1, while the first data line 161 pushes a frame of data signals Data1-1, Data2-1, and Data3-1 column by column to the first pixel units 41, causing the first pixel units 41 to display a frame of image. After the first data line 161 pushes this frame of data signals for a period of time t, the second phase T2 begins, during which the second common electrode 222 pushes a second common voltage signal Com2, while the second data line 162 pushes the next frame of data signals Data1-2, Data2-2, and Data3-2 to the second pixel units 42, causing the second pixel units 42 to display the next frame of image.

[0122] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and effectively improving the image "stuttering" that may occur in the display module 100a. In this embodiment, the time difference t between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0123] Please refer to Figure 19, which is a schematic diagram of the planar structure of the display module provided in the sixth embodiment of the present application. Unlike the fifth embodiment, in this embodiment, the first end 142 of the first transistor 144 and the first end 142 of the second transistor 145 are respectively electrically connected to the same data line 16; the scan line 15 includes a first scan line 151 and a second scan line 152, the first scan line 151 is electrically connected to the control end 141 of the first transistor 144, and the second scan line 152 is electrically connected to the control end 141 of the second transistor 145. That is, in this embodiment, the first pixel unit 41 and the second pixel unit 42 are respectively electrically connected to the same data line 16, and the first pixel unit 41 and the second pixel unit 42 are respectively electrically connected to the first scan line 151 and the second scan line 152. Among them, the setting method of the first scan line 151 and the second scan line 152 can be the same as or similar to the specific setting method of the first scan line 151 and the second scan line 152 involved in the first embodiment above, and the same technical effect can be achieved; the setting method of the first common electrode 221 and the second common electrode 222 can be the same as or similar to the setting method of the first common electrode 221 and the second common electrode 222 involved in the fourth embodiment above, and the same technical effect can be achieved; the above details can be referred to the specific introduction above, and will not be repeated here.

[0124] Specifically, in each display cycle T, in the first stage T1, the first scan line 151 is used to push the scan signal to the first transistor 144, the data line 16 is used to push a frame of data signal to the first pixel electrode 131 through the first transistor 144, and the first common electrode 221 is used to push the first common voltage signal so that the first pixel unit 41 receives a frame of data signal; in the second stage T2, the second scan line 152 is used to push the next frame of data signal to the second pixel electrode 132 through the second transistor 145, and the second common electrode 222 is used to push the second common voltage signal so that the second pixel unit 42 receives the next frame of data signal.

[0125] Please refer to Figure 20, which is a driving signal timing diagram of the display module provided by the sixth embodiment of the present application. Specifically, still taking the pixel unit 40 as three rows and three columns as an example, in each display cycle T, in the first stage T1, the first scan line 151 pushes a frame of scan signals Gout1-1, Gout2-1, Gout3-1 row by row, so that the first transistor 144 is turned on row by row. At the same time, in this stage, the first common electrode 221 pushes the first common voltage signal Com1, and the data line 16 pushes a frame of data signals Data1-1, Data2-1, Data3-1 to the first pixel unit 41, so that the first pixel unit 41 displays a Frame image; after the first scan line 151 pushes for a period of time t, it enters the second stage T2, and the second scan line 152 pushes the next frame scan signals Gout1-2, Gout2-2, and Gout3-2 row by row, so that the second transistor 145 is turned on row by row. At the same time, during this stage, the second common electrode 222 pushes the second common voltage signal Com2, and the second data line 162 pushes the next frame data signals Data1-2, Data2-2, and Data3-3 column by column to the second pixel unit 42, so that the second pixel unit 42 displays the next frame image.

[0126] Through the above-described driving method, the display module 100 can push two frames of image signals within a display cycle T. Compared to the refresh rate f of a conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and effectively improving the image "stuttering" that may occur in the display module 100a. In this embodiment, the time difference t between the first phase T1 and the second phase T2 in each display cycle T can be specifically set according to actual needs.

[0127] Please refer to FIG21 , which is a schematic diagram of the structure of a display device provided in an embodiment of the present application. In this embodiment, a display device is provided, which includes a display module 100 and a control module 200 .

[0128] Among them, the display module 100 is used to display images. The specific structure and function of the display module 100 are the same or similar to the display module 100 involved in the above embodiment, and can achieve the same technical effects. Please refer to the specific introduction above and will not be repeated here.

[0129] Among them, the control module 200 is electrically connected to the display module 100, and is used to provide control signals to the display module 100, such as clock control signals, power control signals, gate drive signals, source drive signals and other control signals required by the display module 100, so that in each display cycle, the display module 100 displays one frame of image in the first stage T1 and displays the next frame of image in the second stage T2, so that by partitioning the pixel unit 40, the display module 100 can display two frames of image in one display cycle T, thereby greatly improving the refresh rate of the display device and effectively improving the "stuttering" feeling that occurs when the display device displays images.

[0130] In a specific embodiment, the display device may also include a backlight module, which is arranged relative to the display module 100 to provide a backlight source to the display module 100. When the ambient light in the environment where the display device is located is dark, the backlight module is turned on to provide a light source to the display module 100, so that the display device can be used in multiple scenarios, and can adjust the backlight intensity in different lighting environments to fill in the display module 100, so that the display device always maintains the best display effect, thereby improving user comfort.

[0131] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A display module, include: A pixel unit, comprising a pixel electrode, a common electrode and a microcapsule structure, wherein the pixel electrode and the common electrode are arranged opposite to each other, the microcapsule structure is arranged between the pixel electrode and the common electrode, and the microcapsule structure comprises charged particles; A driving transistor, comprising a control terminal, a first terminal and a second terminal, wherein the second terminal is electrically connected to the pixel electrode and is used to drive the pixel unit; A scanning line, electrically connected to the control terminal, for providing a scanning signal to the pixel unit; a data line, electrically connected to the first end, and used to provide a data signal to the pixel electrode; Wherein, the pixel unit includes a first pixel unit and a second pixel unit that are adjacent to each other; In each display cycle, the first pixel unit is used to receive a frame of the data signal pushed by the data line in a first stage, and the second pixel unit is used to receive the next frame of the data signal pushed by the data line in a second stage, and the first stage is before the second stage.

2. The display module according to claim 1, in, The display module includes a plurality of pixel units, and the plurality of pixel units are arranged in a matrix; wherein, in each display cycle, In the first stage, the driving transistors corresponding to the plurality of rows of the first pixel units are turned on in sequence, so that the plurality of rows of the first pixel units receive a frame of the data signal pushed by the data line and display a frame of image; In the second stage, the driving transistors corresponding to the plurality of rows of the second pixel units are turned on in sequence, so that the plurality of rows of the second pixel units receive the data signals of the next frame pushed by the data lines and display the next frame of images.

3. The display module according to claim 2, in, The pixel electrode comprises a first pixel electrode and a second pixel electrode adjacent to each other, the first pixel electrode, the common electrode and the microcapsule structure forming the first pixel unit, and the second pixel electrode, the common electrode and the microcapsule structure forming the second pixel unit; The driving transistor includes a first transistor and a second transistor, the second end of the first transistor is electrically connected to the first pixel electrode, and the second end of the second transistor is electrically connected to the second pixel electrode.

4. The display module according to claim 3, in, The first end of the first transistor and the first end of the second transistor are electrically connected to the same data line respectively; The scan line comprises a first scan line and a second scan line, the first scan line is electrically connected to the control end of the first transistor, and the second scan line is electrically connected to the control end of the second transistor; In each of the display cycles, the first scan line is used to push the scan signal to the first transistor in the first stage, and the second scan line is used to push the scan signal to the second transistor in the second stage, so that the first pixel unit receives a frame of the data signal pushed by the data line in the first stage, and the second pixel unit receives the next frame of the data signal pushed by the data line in the second stage.

5. The display module according to claim 4, in, In each of the display cycles, In the first stage, each of the first scanning lines pushes a frame of the scanning signal row by row to turn on the first transistors row by row; each of the data lines pushes a frame of the data signal to the first pixel unit column by column to display a frame of image; In the second stage, each of the second scan lines pushes the scan signal of the next frame row by row to turn on the second transistors row by row; each of the data lines pushes the data signal of the next frame to the second pixel unit column by column to display the next frame of image.

6. The display module according to claim 5, in, After the first stage ends, the second stage begins after a preset period of time.

7. The display module according to claim 3, in, The control end of the first transistor and the control end of the second transistor are electrically connected to the same scan line respectively; The data line comprises a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor; In each of the display cycles, in the first stage, the scan line is used to push the scan signal to the first transistor, and the first data line is used to push one frame of the data signal to the first pixel unit through the first transistor; in the second stage, the scan line is used to push the scan signal to the second transistor, and the second data line is used to push the next frame of the data signal to the second pixel unit through the second transistor.

8. The display module according to claim 7, in, In each of the display cycles, In the first stage, each of the scan lines pushes a frame of the scan signal row by row to turn on the drive transistor row by row; the first data line pushes a frame of the data signal row by row to the first pixel unit to display a frame of image; and after each of the first data lines pushes a preset time, each of the second data lines pushes the next frame of the data signal column by column to the second pixel unit in advance; In the second stage, each of the scan lines pushes the scan signal of the next frame line by line, and the second pixel unit receives the data signal of the next frame to display the image of the next frame.

9. The display module according to claim 3, in, The scan line comprises a first scan line and a second scan line, the first scan line is electrically connected to the control end of the first transistor, and the second scan line is electrically connected to the control end of the second transistor; The data line comprises a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor; In each of the display cycles, in the first stage, the first scan line is used to push the scan signal to the first transistor, and the first data line is used to push one frame of the data signal to the first pixel unit through the first transistor; in the second stage, the second scan line is used to push the scan signal to the second transistor, and the second data line is used to push the next frame of the data signal to the second pixel unit through the second transistor.

10. The display module according to claim 9, in, In each of the display cycles, In the first stage, the first scan line pushes a frame of the scan signal row by row to turn on the first transistor row by row; the first data line pushes a frame of the data signal to the first pixel unit column by column to display a frame of image; In the second stage, the second scan line pushes the scan signal of the next frame row by row to turn on the second transistor row by row; the second data line pushes the data signal of the next frame to the second pixel unit column by column to display the next frame of image.

11. The display module according to claim 2, in, The common electrode includes a first common electrode and a second common electrode adjacent to each other, the pixel electrode, the first common electrode and the microcapsule structure form the first pixel unit, and the pixel electrode, the second common electrode and the microcapsule structure form the second pixel unit; In each of the display cycles, the scan line pushes the scan signal to the driving transistor in the first stage and the second stage; in the first stage, the data line pushes one frame of the data signal to the pixel electrode through the first end, and the first common electrode is used to push a first common voltage signal so that the first pixel unit receives one frame of the data signal; in the second stage, the data line pushes the next frame of the data signal to the pixel electrode through the first end, and the second common electrode is used to push a second common voltage signal so that the second pixel unit receives the next frame of the data signal.

12. The display module according to claim 11, in, In each display cycle, the scan lines push the scan signals row by row, so that the drive transistors are turned on row by row. In the first stage, the first common electrode pushes a frame of the common voltage signal; the data line pushes a frame of the data signal to the pixel electrodes column by column, so that a corresponding electric field is formed in the first pixel unit to display a frame of image; After the data line pushes the data signal for a preset time, the second common electrode pushes the common voltage signal of the next frame, and after a preset time, the second stage is entered; In the second stage, the data lines push the data signals of the next frame to the pixel electrodes column by column, so that a corresponding electric field is formed in the second pixel units to display the next frame of images.

13. The display module according to claim 2, in, The pixel electrode includes a first pixel electrode and a second pixel electrode that are adjacent to each other, and the common electrode includes a first common electrode and a second common electrode that are adjacent to each other; the first pixel electrode is disposed opposite to the first common electrode, and forms the first pixel unit with the microcapsule structure; the second pixel electrode is disposed opposite to the second common electrode, and forms the second pixel unit with the microcapsule structure; The driving transistor includes a first transistor and a second transistor, the second end of the first transistor is electrically connected to the first pixel electrode, and the second end of the second transistor is electrically connected to the second pixel electrode.

14. The display module according to claim 13, in, The control end of the first transistor and the control end of the second transistor are electrically connected to the same scan line respectively; The data line comprises a first data line and a second data line, the first data line is electrically connected to the first end of the first transistor, and the second data line is electrically connected to the first end of the second transistor; In each of the display cycles, the scanning line is used to provide a signal to the drive crystal in the first phase and the second phase. The scanning signal is pushed by the body tube; in the first stage, the first data line is used to push a frame of the data signal to the first pixel electrode through the first transistor, and the first common electrode is used to push a first common voltage signal so that the first pixel unit receives a frame of the data signal; in the second stage, the second data line is used to push the next frame of the data signal to the second pixel electrode through the second transistor, and the second common electrode is used to push a second common voltage signal so that the second pixel unit receives the next frame of the data signal.

15. The display module according to claim 14, in, In each display cycle, the scan lines push the scan signals row by row, so that the drive transistors are turned on row by row. In the first stage, the first common electrode pushes the first common voltage signal, and the first data line pushes one frame of the data signal to the first pixel unit column by column to display one frame of image; In the second stage, the second common electrode pushes the second common voltage signal, and the second data line pushes the data signal of the next frame to the second pixel units column by column to display the next frame of image.

16. The display module according to claim 13, in, The first end of the first transistor and the first end of the second transistor are electrically connected to the same data line respectively; The scan line comprises a first scan line and a second scan line, the first scan line is electrically connected to the control end of the first transistor, and the second scan line is electrically connected to the control end of the second transistor; In each display cycle, in the first stage, the first scan line is used to push the scan signal to the first transistor, the data line is used to push a frame of the data signal to the first pixel electrode through the first transistor, and the first common electrode is used to push the first common voltage signal so that the first pixel unit receives a frame of the data signal; in the second stage, the second scan line is used to push the next frame of the data signal to the second pixel electrode through the second transistor, and the second common electrode is used to push the second common voltage signal so that the second pixel unit receives the next frame of the data signal.

17. The display module according to claim 16, in, In each of the display cycles, In the first stage, the first scan line pushes a frame of the scan signal row by row to turn on the first transistor row by row; the first common electrode pushes the first common voltage signal, and the data line pushes a frame of the data signal to the first pixel unit to display a frame of image; In the second stage, the second scan line pushes the scan signal of the next frame row by row to turn on the second transistor row by row; the second common electrode pushes the second common voltage signal, and the data line pushes the data signal of the next frame to the second pixel unit column by column to display the next frame of image.

18. The display module according to claim 1, in, The microcapsule structure includes an electrophoretic medium and positively charged particles and negatively charged particles suspended in the electrophoretic medium; the positively charged particles and the negatively charged particles are charged particles of different colors.

19. A display device, in, include: A display module, used for displaying images, wherein the display module is the display module according to claim 1; The control module is electrically connected to the display module and is used to provide a control signal to the display module so that in each display cycle, the display module displays a frame of image in the first stage and displays the next frame of image in the second stage.

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