Method, apparatus and system for controlling signal transmission, storage medium, and electronic device

Abstract

Embodiments of the present application provide a method, apparatus and system for controlling signal transmission, a nonvolatile readable storage medium, and an electronic device. The method comprises: receiving, by means of a first link, a first signal sent by a first device, wherein the first link is connected to the first device and a relay control device, the relay control device is a device supporting an open standard interconnect CXL protocol, and the first signal is an electrical signal; using the first signal to determine a link state of the first link; and on the basis of the link state of the first link, sending a control instruction to a microcontroller unit (MCU) device, so as to control transmission of the first signal by means of the MCU device, wherein the MCU is connected to the relay control device. The present application solves the problem in the related art that a data signal defined by a CXL protocol cannot be transmitted between devices by means of an optical fiber link, thereby achieving the effect of transmitting, between devices by means of an optical fiber link, a data signal defined by a CXL protocol.

Description

Method, device, system, storage medium, and electronic device for controlling signal transmission

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on June 13, 2023, with application number 202310696041.8, and application name “Method and device, system, storage medium, and electronic device for controlling signal transmission”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present application relate to the field of computers, and specifically, to a method and device for controlling signal transmission, a system, a non-volatile readable storage medium, and an electronic device. Background Art

[0004] With the rapid development of high-speed interconnect technology, high-speed interconnect protocols are also constantly evolving. CXL (Computer Express Link), a new open interconnect standard developed by Intel, is an open interconnect standard protocol. It can be used for high-speed, low-latency connections between server central processing units (CPUs) and graphics processing units (GPUs), hard drives, network cards, and other devices. It can also be used for high-speed, low-latency connections between external servers, or between servers and external devices such as memory resource pools and GPU resource pools.

[0005] However, existing technologies typically integrate the CXL interface controller with the CPU to form a single SoC (System on a Chip). This approach is suitable for CXL optical interconnection of the CPU within a single server or other host, but is not suitable for CXL external optical interconnection. This makes it impossible to interconnect a server or other host with an external memory resource pool or accelerated computing resource pool. Furthermore, existing solutions directly skip the link training process, which is incompatible with the fiber link and the CXL protocol. This requires pre-setting the corresponding link status between the CPU and the device, making it unsuitable for resource pools, which require flexible expansion of external interconnection architectures.

[0006] It can be seen that the related art has a problem in that it is impossible to transmit data signals defined by the CXL protocol between devices via optical fiber links.

[0007] Summary of the Invention

[0008] The embodiments of the present application provide a method and apparatus, a system, a non-volatile readable storage medium, and an electronic device for controlling signal transmission, to at least address the problem in related arts of being unable to transmit data signals defined by the CXL protocol between devices via optical fiber links.

[0009] According to an optional embodiment of the present application, a method for controlling signal transmission is provided, which is applied to a relay control device, including: receiving a first signal sent by a first device through a first link, wherein the first link connects the first device and a relay control device, the relay control device is a device supporting the open interconnection standard CXL protocol, and the first signal is an electrical signal; determining a link status of the first link using the first signal; and sending a control instruction to a micro-control processing unit MCU device based on the link status of the first link, so as to control the transmission of the first signal through the MCU device, wherein the MCU is connected to the relay control device.

[0010] According to another optional embodiment of the present application, a method for controlling signal transmission is provided, which is applied to an MCU device, including: obtaining a second signal sent by a second device, wherein the second signal is obtained by an optical receiver converting a received optical signal into an electrical signal, and the optical signal is sent by the second device; transmitting the second signal to a relay control device, wherein the relay control device is a device supporting the open interconnection standard CXL protocol, and the relay control device is configured to recover the second signal and transmit it to the first device via a first link.

[0011] According to another optional embodiment of the present application, an apparatus for controlling signal transmission is provided, comprising: a relay control device, the relay control device being connected to a first device via a first link, wherein the relay control device is a device supporting the open interconnection standard CXL protocol, and when the first device sends a first signal, the relay control device is configured to receive the first signal via the first link, and is configured to determine the link status of the first link using the first signal; an MCU device, the MCU device being connected to the relay control device, and being configured to control a signal selection device and a DSP device to transmit the first signal in accordance with a control instruction sent by the relay control device, wherein the control instruction includes the link status of the first link, and the signal selection device and the DSP device are both connected to the MCU device.

[0012] According to another optional embodiment of the present application, a system for controlling signal transmission is provided, and the system for controlling signal transmission includes any of the above-mentioned devices for controlling signal transmission.

[0013] According to another optional embodiment of the present application, a computer non-volatile readable storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0014] According to another optional embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0015] Through this application, since the relay control device is a device that supports the open interconnection standard CXL protocol, it has the ability to identify the state of the first link that transmits the first signal based on the first signal sent by the received first device. It can communicate with the MCU device and send a control instruction to the MCU device, so that the MCU device enters the corresponding link state and controls the transmission of the first signal. Thereby, the transmission of data signals of different rates specified by the CXL protocol can be achieved. Therefore, the problem in the related art that it is impossible to transmit the data signals defined by the CXL protocol between devices through an optical fiber link can be solved, and the effect of transmitting the data signals defined by the CXL protocol between devices through an optical fiber link can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] FIG1 is a hardware structure block diagram of a mobile terminal for a method for controlling signal transmission according to an embodiment of the present application;

[0017] FIG2 is a flowchart of a method for controlling signal transmission according to an embodiment of the present application;

[0018] FIG3 is a flow chart of a CXL external optical interconnection transmitting end according to an embodiment of the present application;

[0019] FIG4 is a second flowchart of a method for controlling signal transmission according to an embodiment of the present application;

[0020] FIG5 is a flow chart of a CXL external optical interconnect receiving end according to an embodiment of the present application;

[0021] FIG6 is a structural block diagram of a device for controlling signal transmission according to an embodiment of the present application;

[0022] FIG7 is a system structure block diagram of a system for controlling signal transmission according to an embodiment of the present application. DETAILED DESCRIPTION

[0023] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0024] It should be noted that the terms "first", "second", etc. in the description and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0025] The following is an explanation of the relevant technologies in this embodiment:

[0026] CXL (Compute Express Link) is an open industry standard for high-bandwidth, low-latency device interconnection. It can be used to connect CPUs and GPUs, memory, and smart network cards.

[0027] MCU: (Micro Controller Unit) Microcontroller unit, also known as single-chip microcomputer, is a CPU with appropriately reduced frequency and specifications, and integrates memory, counters, etc. on a single chip.

[0028] DSP: (Digital Signal Processor) Digital signal processor is a processor composed of large-scale or ultra-large-scale integrated circuit chips used to complete digital signal processing tasks.

[0029] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking operation on a mobile terminal as an example, FIG1 is a hardware structure block diagram of a mobile terminal of a method for controlling signal transmission in an embodiment of the present application. As shown in FIG1 , the mobile terminal may include one or more (only one is shown in FIG1 ) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA (Field Programmable Gate Array)) and a memory 104 configured to store data, wherein the mobile terminal may also include a transmission device 106 and an input / output device 108 configured for a communication function. It will be understood by those skilled in the art that the structure shown in FIG1 is only for illustration and does not limit the structure of the mobile terminal. For example, the mobile terminal may also include more or fewer components than those shown in FIG1 , or have a configuration different from that shown in FIG1 .

[0030] The memory 104 can be configured to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for controlling signal transmission in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above-mentioned method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may include a memory remotely located relative to the processor 102, and these remote memories may be connected to the mobile terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0031] The transmission device 106 is configured to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by the mobile terminal's communications provider. In one embodiment, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission device 106 may be a radio frequency (RF) module configured to communicate with the Internet wirelessly.

[0032] In this embodiment, a method for controlling signal transmission is provided. FIG2 is a flowchart of the method for controlling signal transmission according to an embodiment of the present application. As shown in FIG2 , the flowchart includes the following steps:

[0033] Step S202: receiving a first signal sent by a first device via a first link, wherein the first link connects the first device and a relay control device, the relay control device is a device supporting the open interconnection standard CXL protocol, and the first signal is an electrical signal;

[0034] Step S204: determining the link status of the first link using the first signal;

[0035] Step S206 : sending a control instruction to a micro-control processing unit MCU device based on the link status of the first link, so as to control the transmission of the first signal through the MCU device, wherein the MCU is connected to the relay control device.

[0036] The execution subject of the above steps may be a relay control device, etc., but is not limited thereto.

[0037] In this embodiment, the first device includes but is not limited to a CPU and a GPU, and is externally interconnected with the relay control device via a first link, and the first link is an optical fiber link.

[0038] The relay control device can be a chip device that supports the open interconnection standard CXL protocol, for example, including but not limited to a switch chip (switching chip), a retimer chip (retiming chip), a programmable gate array (FPGA) chip, etc., to realize signal relay and support detection at the receiving end. The CXL protocol is an interconnection protocol based on PCIe5.0 (Peripheral Component Interconnect Express 5.0, a computer bus high-speed data transmission standard). The data signal transmission rate in normal working conditions is 32Gbps (Gigabits per second, gigabits per second) / lane (channel). There are processes such as link training in the process of establishing a connection between devices through the CXL interconnection protocol. Thanks to the characteristics of the CXL protocol, the CXL protocol is very suitable for building a resource pool platform to provide high-speed, low-latency data transmission channels for independent resource devices. Due to the large link loss of the external copper cable high-speed interconnection solution, the existing technology can only achieve meter-level length interconnection under the CXL protocol standard 32Gbps / lane rate condition, which greatly limits the space of the resource pool and the advantages of the external interconnection of the CXL protocol. Fiber optic link loss is significantly lower than copper cable link loss. The fiber-optic CXL external interconnect solution enables long-distance, high-speed data transmission, effectively expanding the physical boundaries of resource pools and leveraging the CXL protocol's external interconnect advantages. Pre-configured link states between the CPU and devices are no longer necessary. CXL protocol-defined data signals can be transmitted over fiber optic links between hosts such as servers and devices such as resource pools, enabling external long-distance interconnection of CXL protocol high-speed signals. This embodiment also defines three link states based on the CXL link transmission and training process, and uses the MCU to configure the DSP device and data signal gating device to enable transmission of different types of data signals.

[0039] In this embodiment, when the first device sends the first signal through the first link, the relay control device transmits the current link status information of the first link to the MCU device through a control instruction. The MCU device can control the DSP device and the signal selection device to enter the corresponding state to transmit the first signal input by the relay control device to the optical transmitter for electrical-optical conversion, and finally transmit it outward via the optical fiber.

[0040] Through the above steps, since the relay control device is a device that supports the open interconnection standard CXL protocol, it has the ability to identify the state of the first link that transmits the first signal based on the first signal sent by the first device. It can communicate with the MCU device and send a control instruction to the MCU device, so that the MCU device enters the corresponding link state and controls the transmission of the first signal. This can achieve the transmission of data signals of different rates specified by the CXL protocol. Therefore, it can solve the problem in the related art that it is impossible to transmit data signals defined by the CXL protocol between devices via optical fiber links, and achieve the effect of transmitting data signals defined by the CXL protocol between devices via optical fiber links.

[0041] In an exemplary embodiment, the link state of the first link is determined using the first signal, including: when the signal transmission rate of the first signal is less than a first preset rate, determining that the first link is in a link training state, the first preset rate is set based on the standard rate of the CXL protocol. In this embodiment, the standard rate of the CXL protocol is 32Gbps / lane, and the first preset rate can be the same as the standard rate of the CXL protocol, or it can be less than 32Gbps / lane. For example, when the transmission rate of the first signal is less than 32Gbps / lane, it is determined that the first link is in a link training state, and the relay control device controls the MCU device to enter the state of the control signal selection device. Specifically as follows:

[0042] Based on the link status of the first link, a control instruction is sent to the micro-control processing unit MCU device to control the transmission of the first signal through the MCU device, including: sending a first control instruction to the MCU device to control the signal gating device to receive the first signal from the relay control device through the MCU device, and controlling the signal gating device to transmit the first signal to the optical transmitter, wherein the first control instruction includes information that the first link is in the link training state. In this embodiment, the signal gating device can be a data signal gating chip, including but not limited to an ASIC (Application-Specific Integrated Circuit) chip, an ARM (Advanced RISC Machine) chip or an FPGA (Field-Programmable Gate Array) chip, etc., to realize the selection and passage of the signal, and the supported signal rate covers the signal rate specified by the CXL protocol. The MCU device can control the signal gating device to transmit the data signal directly transmitted through the relay control device. During the link training process of the first link, data signals operate at four different rates: 2.5Gbps, 5Gbps, 8Gbps, and 16Gbps. The DSP devices used in typical fiber optic links or optical modules are primarily designed for high-bandwidth signals and are unable to support the low-rate signals used during link training. Furthermore, the time required for the DSP device to switch rates is approximately hundreds of milliseconds or seconds, resulting in significant latency. Therefore, DSP devices are typically configured to process constant-rate signals without switching rates. However, signals at 2.5Gbps, 5Gbps, 8Gbps, and 16Gbps can maintain signal transmission quality without undergoing DSP shaping or restoration. Therefore, data signals during link training are directly transmitted to the optical transmitter via the signal selection device, without undergoing DSP shaping or restoration.

[0043] In this embodiment, when the first link is in the link training state, the MCU device is controlled to control the signal selection device to directly transmit the first signal, so that the low-speed data signal is directly transmitted to the optical receiver without passing through the DSP device, thereby achieving normal transmission of the low-speed data signal during the entire link training process.

[0044] In an exemplary embodiment, determining the link state of the first link using the first signal includes: determining that the first link is in a signal transmission state when the signal transmission rate of the first signal is equal to a first preset rate, wherein the first preset rate is set based on the standard rate of the CXL protocol. In this embodiment, for example, when the transmission rate of the first signal is equal to 32Gbps / lane, it is determined that the first link is in a normal signal transmission state, and the relay control device controls the MCU to enter a state of controlling the signal of the DSP device to transmit normally. Specifically as follows:

[0045] Based on the link status of the first link, a control instruction is sent to the microcontroller processing unit (MCU) device to control the transmission of the first signal through the MCU device, including: sending a second control instruction to the MCU device to control the DSP device to receive the first signal from the relay control device through the MCU device, and control the DSP device to process the first signal to obtain a first processed signal; and controlling the signal selection device to receive the processed signal from the DSP device through the MCU device, and control the signal selection device to transmit the first processed signal to the optical transmitter, wherein the second control instruction includes information indicating that the first link is in a signal transmission state. In this embodiment, the data signal rate processed by the DSP device is set to 32 Gbps, corresponding to the standard rate of the CXL protocol. The DSP device needs to shape and restore the incoming first signal before transmitting it to the signal selection device.

[0046] In this embodiment, the DSP device is used to perform shaping and restoration on the first signal, thereby achieving normal transmission of the entire link data signal.

[0047] In an exemplary embodiment, determining the link status of the first link using the first signal includes: determining that the first link is in an idle state when the signal amplitude of the first signal is less than a first preset amplitude, wherein the first preset amplitude is set based on the standard amplitude of the CXL protocol. In this embodiment, the first preset amplitude can be an amplitude required by the CXL protocol, for example, the first preset amplitude is 20mV (millivolt). If the signal amplitude of the first signal is less than 20mV, the first link is in an idle state, and the relay control device controls the MCU device to enter a state of controlling the DSP device. Specifically as follows:

[0048] Based on the link status of the first link, a control instruction is sent to a microcontroller processing unit (MCU) device to control the transmission of the first signal via the MCU device, including: sending a third control instruction to the MCU device to control the DSP device via the MCU device to receive the first signal from the relay control device and control the DSP device to perform noise suppression processing on the first signal to obtain a second processed signal; and controlling the signal gating device via the MCU device to receive the second processed signal from the DSP device and control the signal gating device to transmit the second processed signal to the optical transmitter, wherein the third control instruction includes information indicating that the first link is in an idle state. In this embodiment, the MCU device controls the DSP device to be in a noise suppression state, and the MCU device controls the signal gating device to transmit a low-noise signal suppressed by the DSP device to prevent the receiving end from identifying the low-amplitude noise signal as a normal signal.

[0049] In this embodiment, during link training and when no data is being transmitted, the entire first link enters an idle state. During this period, low-amplitude (less than 20mV) noise signals are still generated. This low-amplitude noise signal is passed through the DSP device, where its internal digital circuitry suppresses the noise. This low-amplitude noise signal is then transmitted through the signal gating device, reducing the probability that the receiving optical interconnect device will identify the noise signal as a normal data signal.

[0050] In an exemplary embodiment, the method further includes: transmitting the first signal to an optical transmitter via a signal gating device; performing optical signal conversion on the first signal via the optical transmitter to obtain a first optical signal; and transmitting the first optical signal to a second device via the optical transmitter. In this embodiment, the optical transmitter can be connected to an optical receiver in the second device to perform optoelectronic conversion on the electrical signal and then transmit the optical signal to the optical receiver via an optical fiber, thereby achieving signal transmission.

[0051] In one exemplary embodiment, the method further includes: receiving a second signal transmitted by a signal gating device, wherein the second signal is an electrical signal; recovering the second signal to obtain a recovered signal; and transmitting the recovered signal to the first device via the first link. In this embodiment, when the optical receiver receives a signal via the optical fiber link, the MCU device combines the input signal and the register value indicating the current data link status in the relay control device to enter a corresponding state, thereby transmitting the electrical signal generated by the optical-to-electrical conversion of the optical receiver via the DSP device and the signal gating device to the relay control device, and finally transmitting it to the first device via the electrical link. This achieves signal reception.

[0052] The present embodiment will be described in detail below with reference to FIG3 . FIG3 is a flow chart of the CXL external optical interconnection transmitting end in the present embodiment, specifically including the following steps:

[0053] S301, an electrical signal (corresponding to the first signal mentioned above) is input into a CXL relay control device (corresponding to the relay control device mentioned above);

[0054] S302, the CXL relay control device determines the link status (corresponding to the first link mentioned above) based on the input electrical signal;

[0055] S303, if the input electrical signal transmission rate is 32 Gpbs / s, the link is in a normal data transmission state;

[0056] S304, the CXL relay control device controls the MCU (corresponding to the MCU device mentioned above) to enter state 1;

[0057] S305, the MCU controls the DSP (corresponding to the DSP device mentioned above) to be in a normal data transmission state, and the MCU controls the data strobe chip (corresponding to the signal strobe device mentioned above) to transmit the data signal processed by the DSP chip;

[0058] S307, if the input electrical signal is a signal with a rate lower than 32 Gbps / s, the link is in a link training state;

[0059] S308, the CXL relay control device controls the MCU to enter state 2;

[0060] S309, the MCU controls the data strobe chip to transmit the data signal directly input via the CXL relay control device;

[0061] S310, if the input electrical signal amplitude is lower than the protocol requirement (20mV), the link is in an idle state;

[0062] S311, the CXL relay control device controls the MCU to enter state 3;

[0063] S312, the MCU controls the DSP chip to be in a noise suppression state, and the MCU controls the data strobe chip to transmit the low-noise signal suppressed by the DSP chip, so as to prevent the receiving end from identifying the low-amplitude noise signal as a normal signal;

[0064] S306 , the electrical signal transmitted through the data selection chip is converted into an optical signal through the optical transmitter and then transmitted through the optical fiber.

[0065] In this embodiment, a method for controlling signal transmission is provided. FIG4 is a second flowchart of the method for controlling signal transmission according to an embodiment of the present application. As shown in FIG4 , the flow includes the following steps:

[0066] Step S402: Acquire a second signal sent by a second device, wherein the second signal is obtained by converting a received optical signal into an electrical signal by an optical receiver, and the optical signal is sent by the second device;

[0067] Step S404: transmit the second signal to the relay control device, wherein the relay control device is a device supporting the open interconnection standard CXL protocol, and the relay control device is configured to recover the second signal and transmit it to the first device through the first link.

[0068] The execution subject of the above steps may be an MCU device, etc., but is not limited thereto.

[0069] In this embodiment, the second device includes, but is not limited to, a CPU and a GPU. Both the second device and the first device are external devices, connected to a relay control device via a link. It should be noted that each of the first and second devices is connected to a relay control device. The relay control device can be a chip device that supports the open interconnection standard CXL protocol, for example, including but not limited to a switch chip, a retimer chip, an FPGA chip, etc., to implement signal relay and support detection at the receiving end. The CXL protocol is an interconnection protocol based on PCIe 5.0. Under normal operating conditions, the data signal transmission rate is 32 Gbps / lane. The process of establishing a connection between devices using the CXL interconnection protocol involves link training and other processes. Thanks to the characteristics of the CXL protocol, the CXL protocol is ideally suited for building resource pool platforms, providing high-speed, low-latency data transmission channels for independent resource devices. Due to the high link loss of external copper cable high-speed interconnection solutions, existing technologies can only achieve meter-level interconnection lengths under the CXL protocol standard 32 Gbps / lane operating conditions, greatly limiting the space available for resource pools and the advantages of the CXL protocol's external interconnection. Fiber optic link loss is significantly lower than copper cable link loss. The fiber-optic CXL external interconnect solution enables long-distance, high-speed data transmission, effectively expanding the physical boundaries of resource pools and leveraging the CXL protocol's external interconnect advantages. Pre-configured link states between the CPU and devices are no longer necessary. CXL protocol-defined data signals can be transmitted over fiber optic links between hosts such as servers and devices such as resource pools, enabling external long-distance interconnection of CXL protocol high-speed signals. This embodiment also defines three link states based on the CXL link transmission and training process, and uses the MCU to configure the DSP device and data signal gating device to enable transmission of different types of data signals.

[0070] In this embodiment, when the optical receiver receives the second signal through the optical fiber link, the MCU device combines the second signal and the register value identifying the current data link status in the relay control device to enter the corresponding state, so as to transmit the electrical signal after the optical-electrical conversion of the optical receiver to the relay control device through the DSP device and the signal selection device, and finally transmit it to the first device via the first link.

[0071] Through the above steps, since the MCU device obtains the second signal sent by the second device, wherein the second signal is obtained by the optical receiver converting the received optical signal into an electrical signal, and the optical signal is sent by the second device; the second signal is transmitted to the relay control device, wherein the relay control device is a device that supports the open interconnection standard CXL protocol, and the relay control device is configured to recover and process the second signal and then transmit it to the first device through the first link, the MCU can enter the corresponding link state and control the transmission of the second signal. Thereby, the transmission of data signals of different rates specified by the CXL protocol can be realized. Therefore, the problem in the related art that it is impossible to realize the transmission of data signals defined by the CXL protocol between devices through optical fiber links can be solved, and the effect of realizing the transmission of data signals defined by the CXL protocol between devices through optical fiber links can be achieved.

[0072] In an exemplary embodiment, obtaining a second signal sent by a second device includes: obtaining the second signal from a DSP device or a signal gating device, wherein the second signal is a signal transmitted by an optical receiver to the DSP device and the signal gating device. In this embodiment, the signal gating device can be a data signal gating chip, including but not limited to an ASIC chip, an ARM chip, or an FPGA chip, etc., for realizing signal selection and passing, and the supported signal rate covers the signal rate specified by the CXL protocol, including but not limited to an ASIC chip, an ARM chip, or an FPGA chip, etc. The optical receiver is connected to the DSP device and the signal gating device, and will transmit the second signal to the DSP device and the signal gating device. The DSP device and the signal gating device are both connected to the MCU device, so the MCU device can obtain the second signal from the DSP device or the signal gating device and make a judgment on the second signal.

[0073] In one exemplary embodiment, transmitting a second signal to a relay control device includes: when the amplitude of the second signal is less than or equal to a second preset amplitude, sending a third control instruction to a DSP device to control the DSP device to perform noise suppression processing on the second signal to obtain a noise-suppressed signal; and sending a fourth control instruction to a signal gating device to control the signal gating device to transmit the noise-suppressed signal to the relay control device. In this embodiment, the second preset amplitude can be the amplitude of a low-noise signal. When the amplitude of the second signal is less than or equal to the amplitude of the low-noise signal, the MCU device maintains control of the DSP device, and the MCU controls the signal gating device to transmit the low-noise signal suppressed by the DSP device. This ensures normal signal transmission.

[0074] In one exemplary embodiment, transmitting a second signal to a relay control device includes: if the signal amplitude of the second signal is greater than a second preset amplitude, determining whether the second signal includes a character sequence and a register value, wherein the character sequence is used to indicate that the second link is in a link training state, and the register value is used to indicate the current link state of the second link; if the second signal includes the character sequence and the register value, and the signal amplitude of the second signal is less than or equal to the second preset amplitude, sending a fifth control instruction to a DSP device to control the DSP device to perform noise suppression processing on the second signal to obtain a noise-suppressed signal; and sending a sixth control instruction to a signal gating device to control the signal gating device to transmit the noise-suppressed signal to the relay control device. In this embodiment, if the signal amplitude of the second signal is greater than the amplitude of the low-noise signal, the MCU device exits the state of controlling the DSP device, and the MCU device performs a status determination based on whether the second signal includes a character sequence representing link training and a register value indicating the current link state in the relay control device.

[0075] In one exemplary embodiment, transmitting a second signal to a relay control device includes: when the second signal includes a character sequence and a register value is a preset register value, sending a seventh control instruction to a DSP device to control the DSP device to perform noise suppression processing on the second signal to obtain a noise-suppressed signal, wherein the character sequence is used to identify that the second link is in a link training state, and the register value is used to identify the current link state of the second link; and sending an eighth control instruction to a signal gating device to control the signal gating device to transmit the noise-suppressed signal to the relay control device. In this embodiment, if the second signal does not contain a character sequence representing link training or contains a character sequence representing the link training state, but the register representing the current link rate in the relay control device corresponds to 16 Gbps, the MCU device enters a state of controlling the DSP; the MCU device controls the DSP device to enter a normal data transmission state, and the MCU device controls the signal gating device to transmit the data signal processed by the DSP device. This enables normal transmission of data signals across the entire link.

[0076] In one exemplary embodiment, the method further includes: receiving a first control instruction sent by a relay control device via a first link, wherein the first control instruction includes information that the first link is in a link training state, the first link connecting the first device and the relay control device; and, in response to the first control instruction, controlling a signal gating device to receive a first signal from the relay control device, and controlling the signal gating device to transmit the first signal to an optical transmitter, wherein the first signal is an electrical signal received by the relay control device from the first device via the first link. In this embodiment, while the first link is in the link training process, data signals have four rates: 2.5 Gbps, 5 Gbps, 8 Gbps, and 16 Gbps. The DSP devices used in typical optical fiber links or optical modules are primarily designed for high-bandwidth signals and are unable to support the low-rate signals used during link training. Furthermore, the time required for the DSP device to perform rate switching is approximately hundreds of milliseconds or seconds, resulting in significant latency. Therefore, the DSP device is typically configured to process constant-rate signals and does not perform rate switching. Signals at 2.5Gbps, 5Gbps, 8Gbps, and 16Gbps rates can maintain signal transmission quality without undergoing DSP shaping and restoration. Therefore, data signals during link training are transmitted directly to the optical transmitter via the signal gating device, without undergoing DSP shaping and restoration. In this embodiment, when the first link is in the link training state, the MCU controls the signal gating device to directly transmit the first signal, allowing low-speed data signals to be transmitted directly to the optical receiver without passing through the DSP device, thereby ensuring normal transmission of low-speed data signals throughout the entire link training process.

[0077] In an exemplary embodiment, the method further includes: receiving a second control instruction sent by the relay control device through the first link, wherein the second control instruction includes information that the first link is in a signal transmission state, and the first link connects the first device and the relay control device; responding to the second control instruction to control the DSP device to receive the first signal from the relay control device, and controlling the DSP device to process the first signal to obtain a first processed signal, and controlling the signal selection device to transmit the first processed signal to the optical transmitter. In this embodiment, the data signal rate processed by the DSP device is set to 32Gbps, corresponding to the CXL protocol standard rate. The DSP device needs to shape and restore the incoming first signal and then transmit it to the signal selection device. In this embodiment, the DSP device shapes and restores the first signal, so as to achieve normal transmission of the data signal of the entire link.

[0078] In one exemplary embodiment, the method further includes: receiving a third control instruction sent by a relay control device via the first link, wherein the third control instruction includes information indicating that the first link is in an idle state, and the first link connects the first device and the relay control device; responding to the third control instruction, controlling the DSP device to receive the first signal from the relay control device, controlling the DSP device to perform noise suppression processing on the first signal to obtain a second processed signal, and controlling the signal gating device to transmit the second processed signal to the optical transmitter after receiving the second processed signal from the DSP device. In this embodiment, the MCU device controls the DSP device to be in a noise suppression state, and the MCU device controls the signal gating device to transmit a low-noise signal suppressed by the DSP device to prevent the receiving end from misidentifying low-amplitude noise signals as normal signals. In this embodiment, during link training and when no data is being transmitted, the entire first link enters an idle state, during which low-amplitude (less than 20mV) noise signals may still be generated. Passing this low-amplitude noise signal through the DSP device, where it is suppressed by the DSP device's internal digital circuitry, and then transmitted through the signal gating device can reduce the probability that the receiving optical interconnect device will misidentify the noise signal as a normal data signal.

[0079] In an exemplary embodiment, the method further includes: performing optical signal conversion on the signal received from the signal gating device by the optical transmitter, and transmitting the converted optical signal to the second device, thereby achieving signal transmission.

[0080] The present embodiment will be described in detail below with reference to FIG5 . FIG5 is a flow chart of the CXL external optical interconnect receiving end in the present embodiment, specifically comprising the following steps:

[0081] S501, the optical receiver receives the optical signal, converts it into an electrical signal (corresponding to the second signal mentioned above), and then transmits it to the DSP and data selection chip;

[0082] S502, determining the state based on whether the input electrical signal amplitude exceeds the low noise signal amplitude level;

[0083] S503, if the amplitude of the input DSP electrical signal exceeds the low-noise signal amplitude level, the MCU exits state 3 (state 3 includes controlling the data strobe chip to transmit the low-noise signal after DSP suppression);

[0084] S504, performing a status determination in S505 based on whether the input signal contains a character sequence representing link training and a register value indicating the current link status in the CXL relay control;

[0085] S505-S506: If the signal contains a character sequence representing the link training state and the register representing the current link rate in the CXL relay control device is not 16 Gbps, the MCU enters state 2; the MCU controls the DSP chip to be in a noise suppression state to reduce its power consumption;

[0086] S507, the MCU controls the data strobe chip to transmit the data signal directly input via the CXL relay control device;

[0087] S508, the electrical signal transmitted through the data strobe chip is further transmitted after passing through the CXL relay control device;

[0088] S509, if the amplitude of the input DSP electrical signal does not exceed the low noise signal amplitude level, the MCU maintains state 3;

[0089] S510, the MCU controls the DSP chip to be in a noise suppression state, and the MCU controls the data strobe chip to transmit the low-noise signal suppressed by the DSP chip;

[0090] S511, if the signal does not contain a character sequence representing link training or contains a character sequence representing link training status but the register representing the current link rate in the CXL relay control device corresponds to 16 Gbps, the MCU enters state 1;

[0091] S512, the MCU controls the DSP to be in a normal data transmission state, and the MCU controls the data strobe chip to transmit the data signal processed by the DSP chip.

[0092] In this embodiment, after initial power-up and reset, the MCU controls the DSP and data signal gating chip to enter State 3. At this point, the link is idle, with only low-amplitude noise signals. State 3 is exited when link training begins or normal rate signal transmission begins, and the configured logic determines whether to enter State 1 or State 2.

[0093] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform, or of course by hardware, but in many cases the former is a better embodiment. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a non-volatile readable storage medium (such as ROM (Read-0nly Memory, Read-Only Memory) / RAM (Random Access Memory, Random Access Memory), a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0094] In this embodiment, a device for controlling signal transmission is also provided. The device is configured to implement the above-mentioned embodiments and optional implementations, and the details already described are not repeated here. As used below, the term "module" can refer to software and / or a combination of hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0095] FIG6 is a structural block diagram of a device for controlling signal transmission according to an embodiment of the present application. As shown in FIG6 , the device includes:

[0096] a relay control device, the relay control device being connected to the first device via a first link, wherein the relay control device is a device supporting the open interconnection standard CXL protocol, and when the first device sends a first signal, the relay control device is configured to receive the first signal via the first link and to determine a link state of the first link using the first signal;

[0097] The MCU device is connected to the relay control device and is configured to control the signal selection device and the DSP device to transmit the first signal according to the control instruction sent by the relay control device, wherein the control instruction includes the link status of the first link, and the signal selection device and the DSP device are both connected to the MCU device.

[0098] In an exemplary embodiment, the apparatus further includes: an optical transmitter, which is connected to the signal gating device, configured to receive a first signal sent by the signal gating device, configured to perform optical signal conversion on the first signal to obtain a first optical signal, and configured to transmit the first optical signal to a second device.

[0099] In an exemplary embodiment, the apparatus further includes an optical receiver connected to the second device, configured to convert an optical signal received from the second device into an electrical signal to obtain a second signal, and configured to send the second signal to the DSP device and the signal selection device.

[0100] In an exemplary embodiment, the MCU device is also configured to obtain a second signal from a DSP device or a signal gating device, and transmit the second signal to the relay control device through the DSP device and the signal gating device, wherein the DSP device is configured to process the second signal according to the control instruction sent by the MCU device, and the signal gating device is configured to send the processed second signal to the relay control device according to the control instruction sent by the MCU.

[0101] In this embodiment, as shown in FIG6 , the relay control device, the MCU device, the DSP device, the signal gating device, the optical transmitter, and the optical receiver are all arranged in a PCB (Printed Circuit Board). The PCB board can be a board connected to the server mainboard or the resource pool bottom board through a gold finger or a cable, or it can be the main body of the server mainboard or the resource pool bottom board, used to install the devices and components shown in this embodiment and provide an electrical link. The relay control device, the MCU device, the DSP device, the signal gating device, the optical transmitter, and the optical receiver can be in the form of a pluggable optical module, or in the form of an onboard optical module, or in the form of a co-packaged optical module on the same PCB board as the relay control device, used to realize signal gating processing and photoelectric or electro-optical conversion.

[0102] Optionally, the first device includes but is not limited to a CPU, a GPU, and is externally interconnected with the relay control device through a first link, and the first link is an optical fiber link. The relay control device can be a chip device that supports the open interconnection standard CXL protocol, for example, including but not limited to a switch chip, a retimer chip, an FPGA chip, etc., to realize signal relay and support detection at the receiving end. The signal gating device can be a data signal gating chip, including but not limited to an ASIC chip, an ARM chip or an FPGA chip, etc., to realize signal selection and pass, and the supported signal rate covers the signal rate specified by the CXL protocol. The MCU device can control the signal gating device to transmit the data signal directly transmitted through the relay control device. It should be noted that the number of DSP devices can be one or more, the number of signal gating devices can be one or more, and the number of MCU devices, optical receivers, and optical transmitters are all one.

[0103] Optionally, when the first device sends the first signal through the first link, the relay control device transmits the current status information of the first link to the MCU device, and the MCU device controls the DSP device and the signal selection device to enter the corresponding state to transmit the signal input from the relay control device to the optical transmitter for electro-optical conversion, and finally transmit it outward via the optical fiber.

[0104] Optionally, when receiving a signal through the optical fiber link, the MCU device combines the input second signal and the register value identifying the current data link state in the relay control device to enter the corresponding state, so as to transmit the electrical signal after the photoelectric conversion of the optical receiver to the CXL relay control device via the DSP device and the signal selection device, and finally transmit it to the first device via the electrical link.

[0105] Through the above-mentioned device, since the relay control device is a device that supports the open interconnection standard CXL protocol, it has the ability to identify the state of the first link transmitting the first signal based on the first signal sent by the first device. It can communicate with the MCU device and send control instructions to the MCU device, causing the MCU device to enter the corresponding link state and control the transmission of the first signal. This can achieve the transmission of data signals of different rates specified by the CXL protocol. Therefore, it can solve the problem existing in the related art that it is impossible to transmit data signals defined by the CXL protocol between devices via optical fiber links, and achieve the effect of transmitting data signals defined by the CXL protocol between devices via optical fiber links.

[0106] The embodiment of the present application also provides a system for controlling signal transmission, and the system for controlling signal transmission includes the above-mentioned device for controlling signal transmission. This embodiment describes the system for controlling signal transmission in the form of a specific embodiment. As shown in FIG7 , it is a system structure block diagram of the system for controlling signal transmission in this embodiment. The system includes a device for signal transmission between two control signal transmission devices. For example, the first device is a CPU, the second device is a CPU / GPU memory hard disk, the relay control device is a CXL relay control device, the signal gating device is a data signal gating chip, the MCU device is an MCU, and the DSP device is a DSP. The specific interaction process includes:

[0107] The CPU transmits the electrical signal to the CXL relay control device via the first link. The CXL relay control device determines the status of the first link based on the input electrical signal. If the input electrical signal transmission rate is 32 Gbps / s, the link is in a normal data transmission state. The CXL relay control device controls the MCU to enter state 1, the MCU controls the DSP to enter a normal data transmission state, and the MCU controls the data strobe chip to transmit the data signal processed by the DSP chip. If the input electrical signal is a signal with a rate lower than 32 Gbps / s, the link is in a link training state. The CXL relay control device controls the MCU to enter state 2, and the MCU controls the data strobe chip to transmit the data signal directly transmitted through the CXL relay control device. If the input electrical signal amplitude is lower than the protocol requirement (20 mV), the link is in an idle state, and the CXL relay control device controls the MCU to enter state 3. The MCU controls the DSP chip to enter a noise suppression state and the data strobe chip to transmit a low-noise signal suppressed by the DSP chip, preventing the receiver from misidentifying the low-amplitude noise signal as a normal signal. The electrical signal transmitted by the data strobe chip is converted from optical to optical by an optical transmitter and then transmitted via optical fiber to the optical receiver corresponding to the CPU / GPU memory and hard disk. The optical receiver converts the optical signal into an electrical signal and transmits it to the DSP and data signal strobe chip. The MCU receives the electrical signal from the DSP or data signal strobe chip and determines whether the input electrical signal amplitude exceeds the low-noise signal amplitude level. If the input DSP electrical signal amplitude exceeds the low-noise signal amplitude level, the MCU exits state 3. The MCU determines the state based on whether the input signal contains a link training character sequence and the register value indicating the current link status in the CXL relay control. If the signal contains a link training character sequence and the register indicating the current link rate in the CXL relay control device is not 16 Gbps, the MCU enters state 2. The MCU controls the DSP chip to enter a noise suppression state to reduce its power consumption. If the input DSP electrical signal amplitude does not exceed the low-noise signal amplitude level, the MCU remains in State 3; the MCU controls the DSP chip to enter the noise suppression state and the MCU controls the data strobe chip to transmit the low-noise signal suppressed by the DSP chip. If the signal does not contain a character sequence representing link training, or if a character sequence representing link training status is present but the register representing the current link rate in the CXL relay control device corresponds to 16 Gbps, the MCU enters State 1, controls the DSP to enter the normal data transmission state, and controls the data strobe chip to transmit the data signal processed by the DSP chip.

[0108] In summary, this embodiment utilizes a data signal gating chip in combination with a DSP chip to realize the transmission of data signals of different rates specified by the CXL protocol, and can suppress low-amplitude noise signals when the circuit is in an idle state. Three data link states are defined, and the DSP chip and the data signal gating chip are controlled and adapted by the MCU. This method can give full play to the advantages of the DSP digital chip in high-speed signal transmission and its ability to suppress low-amplitude noise signals, and realize the transmission of low-speed data signals that exceed the bandwidth of the DSP chip through the data signal gating chip. At the same time, it can realize CXL external optical interconnection, effectively expand the external transmission distance of the CXL protocol, and the integration form is relatively flexible. It can realize the transmission of high-speed and low-speed signals in the CXL protocol link, and can suppress low-amplitude noise signals to reduce the probability of misidentification at the receiving end. The integration form of this solution is relatively flexible and easy to expand, which is conducive to external interconnection between devices.

[0109] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0110] An embodiment of the present application further provides a computer non-volatile readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0111] In an exemplary embodiment, the above-mentioned computer non-volatile readable storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other non-volatile readable storage media that can store computer programs.

[0112] An embodiment of the present application further provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0113] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0114] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0115] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0116] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A method for controlling signal transmission, characterized in that: Applicable to relay control equipment, including: receiving a first signal sent by a first device through a first link, wherein the first link connects the first device and a relay control device, the relay control device is a device supporting an open interconnection standard CXL protocol, and the first signal is an electrical signal; determining a link state of the first link using the first signal; A control instruction is sent to a micro-control processing unit MCU device based on the link status of the first link, so as to control the transmission of the first signal through the MCU device, wherein the MCU is connected to the relay control device.

2. The method according to claim 1, characterized in that Determining the link state of the first link by using the first signal includes: In a case where a signal transmission rate of the first signal is less than a first preset rate, it is determined that the first link is in a link training state, where the first preset rate is set based on a standard rate of the CXL protocol.

3. The method according to claim 2, characterized in that Sending a control instruction to a microcontroller processing unit MCU device based on the link state of the first link to control the transmission of the first signal through the MCU device includes: A first control instruction is sent to the MCU device to control the signal selection device through the MCU device to receive the first signal from the relay control device, and control the signal selection device to transmit the first signal to the optical transmitter, wherein the first control instruction includes information that the first link is in a link training state.

4. The method according to claim 1, characterized in that: Determining the link state of the first link by using the first signal includes: When the signal transmission rate of the first signal is equal to a first preset rate, it is determined that the first link is in a signal transmission state, wherein the first preset rate is set based on a standard rate of the CXL protocol.

5. The method according to claim 4, characterized in that Sending a control instruction to a microcontroller processing unit MCU device based on the link state of the first link to control the transmission of the first signal through the MCU device includes: A second control instruction is sent to the MCU device to control the DSP device through the MCU device to receive the first signal from the relay control device, and control the DSP device to process the first signal to obtain a first processed signal; and the signal selection device is controlled by the MCU device to receive the processed signal from the DSP device, and the signal selection device is controlled to transmit the first processed signal to the optical transmitter, wherein the second control instruction includes information that the first link is in a signal transmission state.

6. The method according to claim 1, characterized in that The link state of the first link includes: a signal transmission rate of the first signal is less than a first preset rate, and a signal transmission rate of the first signal is equal to the first preset rate.

7. The method according to claim 1, characterized in that The controlling the transmission of the first signal through the MCU device includes: controlling, through the MCU device, whether to directly transmit the first signal through a signal selection device.

8. The method according to claim 1, characterized in that The link state of the first link also includes that a signal amplitude of the first signal is less than a first preset amplitude, and determining the link state of the first link by using the first signal includes: When the signal amplitude of the first signal is less than a first preset amplitude, it is determined that the first link is in an idle state, wherein the first preset amplitude is set based on a standard amplitude of the CXL protocol.

9. The method according to claim 8, characterized in that Sending a control instruction to a microcontroller processing unit MCU device based on the link state of the first link to control the transmission of the first signal through the MCU device includes: A third control instruction is sent to the MCU device, so as to control the DSP device through the MCU device to receive the first signal from the relay control device, and control the DSP device to perform noise suppression processing on the first signal to obtain a second processed signal; and control the signal selection device through the MCU device to receive the second processed signal from the DSP device, and control the signal selection device to transmit the second processed signal to the optical transmitter, wherein the third control instruction includes information that the first link is in an idle state.

10. The method according to claim 1, characterized in that The method further comprises: transmitting the first signal to the optical transmitter through a signal gating device; Performing optical signal conversion on the first signal by the optical transmitter to obtain a first optical signal; The first optical signal is transmitted to a second device through the optical transmitter.

11. The method according to claim 1, characterized in that: The method further comprises: receiving a second signal sent by the signal gating device, wherein the second signal is an electrical signal; performing recovery processing on the second signal to obtain a recovery signal; The restoration signal is sent to the first device via the first link.

12. A method for controlling signal transmission, characterized in that: Applied to MCU devices, including: Acquire a second signal sent by a second device, wherein the second signal is obtained by converting a received optical signal into an electrical signal by an optical receiver, and the optical signal is sent by the second device; The second signal is transmitted to a relay control device, wherein the relay control device is a device supporting an open interconnection standard CXL protocol, and the relay control device is configured to perform recovery processing on the second signal and then transmit the second signal to the first device through a first link.

13. The method according to claim 12, characterized in that The link state of the first link includes: a signal transmission rate of the first signal is less than a first preset rate, a signal transmission rate of the first signal is equal to the first preset rate, and the first signal is an electrical signal; The relay control device is also configured to send a control instruction to a micro-control processing unit MCU device based on the link status of the first link, so as to control whether the first signal is transmitted directly through a signal selection device through the MCU device, and the MCU device is connected to the relay control device.

14. The method according to claim 12, characterized in that Acquiring a second signal sent by a second device includes: The second signal is obtained from a DSP device or a signal gating device, wherein the second signal is a signal transmitted by the optical receiver to the DSP device and the signal gating device.

15. The method according to claim 12, characterized in that Transmitting the second signal to a relay control device includes: When the signal amplitude of the second signal is less than or equal to the second preset amplitude, a third control instruction is sent to the DSP device to control the DSP device to perform noise suppression processing on the second signal to obtain a signal after noise suppression processing; A fourth control instruction is sent to the signal gating device to control the signal gating device to transmit the signal after the noise suppression process to the relay control device.

16. The method according to claim 12, characterized in that Transmitting the second signal to the relay control device includes: according to the register value representing the link state in the relay control device, controlling the DSP device to transmit a signal after performing noise suppression processing on the second signal to the relay control device.

17. The method according to claim 12, characterized in that The method further comprises: receiving a first control instruction sent by the relay control device through a first link, wherein the first control instruction includes information that the first link is in a link training state, the first link connects the first device and the relay control device, and the link training state is used to indicate that a signal transmission rate of the first signal is less than a first preset rate; In response to the first control instruction, the signal selection device is controlled to receive a first signal from the relay control device, and the signal selection device is controlled to transmit the first signal to the optical transmitter, wherein the first signal is an electrical signal received by the relay control device from the first device through the first link.

18. The method according to claim 12, characterized in that The method further comprises: receiving, through the first link, a second control instruction sent by the relay control device, wherein the second control instruction includes information that the first link is in a signal transmission state, the first link connects the first device and the relay control device, and the signal transmission state is used to indicate that a signal transmission rate of the first signal is equal to a first preset rate; In response to the second control instruction, the DSP device is controlled to receive a first signal from the relay control device, and the DSP device is controlled to process the first signal to obtain a first processed signal, and the signal selection device is controlled to transmit the first processed signal to the optical transmitter.

19. The method according to claim 12, characterized in that The method further comprises: receiving a third control instruction sent by the relay control device through the first link, wherein the third control instruction contains information that the first link is in an idle state, the first link connects the first device and the relay control device, and the idle state is used to indicate that a signal amplitude of a first signal included in a link state of the first link is less than a first preset amplitude; In response to the third control instruction, the DSP device is controlled to receive the first signal from the relay control device, and the DSP device is controlled to perform noise suppression processing on the first signal to obtain a second processed signal, and the signal selection device is controlled to transmit the second processed signal to the optical transmitter after receiving the second processed signal from the DSP device.

20. The method according to any one of claims 17 to 19, characterized in that: The method further comprises: The signal received from the signal gating device is converted into an optical signal by the optical transmitter, and the converted optical signal is transmitted to the second device.

21. A device for controlling signal transmission, characterized in that: include: A relay control device, the relay control device is connected to a first device through a first link, wherein the relay control device is a device supporting an open interconnection standard CXL protocol, and when the first device sends a first signal, the relay control device is configured to receive the first signal through the first link, and is configured to determine a link state of the first link using the first signal; An MCU device, wherein the MCU device is connected to the relay control device and is configured to control the signal selection device and the DSP device to transmit the first signal according to a control instruction sent by the relay control device, wherein the control instruction includes the link status of the first link, and the signal selection device and the DSP device are both connected to the MCU device.

22. The device according to claim 21, characterized in that The device also includes: An optical transmitter is connected to the signal selection device, configured to receive the first signal sent by the signal selection device, configured to perform optical signal conversion on the first signal to obtain a first optical signal, and configured to transmit the first optical signal to a second device.

23. The device according to claim 21, characterized in that The device also includes: The optical receiver is connected to the second device and is configured to convert the optical signal received from the second device into an electrical signal to obtain a second signal, and is configured to send the second signal to the DSP device and the signal selection device.

24. The device according to claim 23, characterized in that The MCU device is also configured to obtain the second signal from the DSP device or the signal gating device, and transmit the second signal to the relay control device through the DSP device and the signal gating device, wherein the DSP device is configured to process the second signal according to the control instruction sent by the MCU device, and the signal gating device is configured to send the processed second signal to the relay control device according to the control instruction sent by the MCU.

25. The device according to claim 23, characterized in that The first signal is an electrical signal, and the link status of the first link includes: the signal transmission rate of the first signal is less than a first preset rate, and the signal transmission rate of the first signal is equal to the first preset rate; the MCU device controls the signal selection device to transmit the first signal to the optical transmitter; the first signal is converted into an optical signal by the optical transmitter to obtain a first optical signal; and the first optical signal is transmitted to the second device by the optical transmitter.

26. A system for controlling signal transmission, characterized in that: The control signal transmission system comprises the control signal transmission device according to any one of claims 21 to 25.

27. A computer non-volatile readable storage medium, characterized in that: The computer non-volatile readable storage medium stores a computer program, wherein when the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 11 are implemented, or the steps of the method described in any one of claims 12 to 20 are implemented.

28. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the processor implements the steps of the method described in any one of claims 1 to 11, or implements the steps of the method described in any one of claims 12 to 20.

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