Trimming circuit and chip comprising same, and trimming method

Abstract

A trimming circuit and a chip comprising same, and a trimming method. The trimming circuit comprises: an input end (100) for receiving a voltage control signal, the voltage control signal being directly proportional to or inversely proportional to an ideal output voltage; a sampling unit (300) connected to an output end (200) to perform sampling to obtain test voltages, a first test voltage being a test output voltage corresponding to a first ideal output voltage, and a second test voltage being a test output voltage corresponding to a second ideal output voltage; an operation unit (400) for obtaining a proportional deviation parameter on the basis of the first test voltage, a voltage control signal corresponding to the first test voltage, the second test voltage, a voltage control signal corresponding to the second test voltage, and the directly proportional relationship or inversely proportional relationship; and a proportional adjustment unit (500) for adjusting an output voltage signal on the basis of the proportional deviation parameter. Therefore, accurate calibration in all adjustment ranges can be realized.

Description

Trimming circuit, chip including same, and trimming method

[0001] This application claims priority to a Chinese invention application filed on June 20, 2023, with application number 2023107359279 and titled “Trimming circuit, chip comprising same, and trimming method”, and incorporates the entire specification, claims, drawings, and abstract of the above-mentioned Chinese invention application into this application by reference. Technical Field

[0002] The present invention relates to the technical field of integrated circuits, and in particular to a trimming circuit, a chip comprising the same, and a trimming method. Background Art

[0003] Circuits are often adjusted to meet different operating requirements or operating modes. For example, display driver chips provide a variety of driving voltages for screen panels. To meet the needs of adapting to different screens or providing better performance in different operating modes, the voltage generated by the display driver chip must be able to be precisely adjusted within a wide voltage range.

[0004] In existing display drive voltage generation circuits, circuit trimming is achieved by adjusting the adjustable resistor corresponding to the op amp based on the error between the ideal voltage and the test voltage. However, while this existing trimming method can significantly reduce the error at the test voltage, in actual applications, the output voltage often undergoes significant adjustments to accommodate different panels or different operating modes of the same panel, increasing the error voltage. Conventional voltage trimming circuits cannot guarantee trimming accuracy, making it difficult to meet current requirements.

[0005] Therefore, it is hoped that there will be a new trimming circuit, a chip including the same, and a trimming method that can overcome the above problems. Summary of the Invention

[0006] In view of the above problems, the object of the present invention is to provide a trimming circuit, a chip including the same, and a trimming method, in particular a voltage trimming circuit for display driving, so as to achieve accurate calibration within the entire adjustment range.

[0007] According to one aspect of the present invention, a trimming circuit is provided, comprising: an input end for receiving a voltage control signal; different values ​​of the voltage control signal correspond to different values ​​of ideal output voltages, and the voltage control signal is in direct proportion or inverse proportion to the ideal output voltage; an output end for outputting a voltage signal; a sampling unit connected to the output end to sample and obtain a test voltage, the test voltage comprising a first test voltage and a second test voltage; the first test voltage is a test output voltage corresponding to a first ideal output voltage, and the second test voltage is a test output voltage corresponding to a second ideal output voltage; an operation unit for obtaining a test proportional coefficient between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage; the operation unit obtains a proportional deviation parameter according to the test proportional coefficient and the direct proportion or inverse proportion relationship; a proportional adjustment unit connected to the output end, and adjusting the output voltage signal output by the output end according to the proportional deviation parameter.

[0008] Optionally, the ratio adjustment unit includes a first resistor and a second resistor connected in series, and a first MOS transistor and a second MOS transistor connected in parallel with the first resistor and the second resistor respectively;

[0009] The trimming circuit further includes:

[0010] a control unit, wherein the control unit is connected to the first MOS transistor and the second MOS transistor respectively to control the on and off of the first MOS transistor and the second MOS transistor respectively;

[0011] When the first MOS transistor is turned off, the first resistor is electrically connected to the output end; when the second MOS transistor is turned off, the second resistor is electrically connected to the output end.

[0012] Optionally, the computing unit obtains the test proportional coefficient and the offset parameter between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage;

[0013] An offset adjustment unit is connected to the output end and adjusts the output voltage signal output by the output end according to the offset parameter.

[0014] Optionally, the offset adjustment unit includes a first branch, the output end, and a second branch connected in sequence;

[0015] The first branch includes a first regulating resistor and a first PMOS transistor connected in parallel with the first regulating resistor; the second branch includes a second regulating resistor and a first NMOS transistor connected in parallel with the second regulating resistor;

[0016] The trimming circuit further includes:

[0017] A control unit is connected to the first PMOS transistor and the first NMOS transistor, respectively, and uses the same signal to control the first PMOS transistor and the first NMOS transistor so that the first PMOS transistor is turned on and the first NMOS transistor is turned off, or the first PMOS transistor is turned off and the first NMOS transistor is turned on.

[0018] Optionally, the trimming circuit further includes:

[0019] a front-stage operational amplifier connected to the input terminal to receive the voltage control signal;

[0020] a proportional adjustment unit, wherein a first end of the proportional adjustment unit is connected to an output end of the preceding operational amplifier;

[0021] an offset adjustment unit, wherein a first end of the offset adjustment unit is connected to a second end of the ratio adjustment unit;

[0022] A post-stage operational amplifier, wherein a first end of the post-stage operational amplifier is connected to the second end of the offset adjustment unit, and a second end of the post-stage operational amplifier is connected to the output end.

[0023] Optionally, the offset adjustment unit includes a first branch and a second branch; the adjustment circuit further includes a voltage-dividing resistor unit, and the voltage-dividing resistor unit includes a plurality of resistors connected in series;

[0024] The first end of the first branch is connected to the second end of the proportional adjustment unit, and the second end of the first branch is connected to the first end of the voltage dividing resistor unit;

[0025] The first end of the second branch is connected to the second end of the voltage-dividing resistor unit, and the second end of the second branch is grounded;

[0026] The third terminal of the voltage divider circuit unit is connected to the first terminal of the subsequent operational amplifier.

[0027] Optionally, the trimming circuit further includes:

[0028] A voltage follower, wherein a first end of the voltage follower is connected to the output end of the pre-stage operational amplifier, and a second end of the voltage follower is connected to the first end of the proportional adjustment unit.

[0029] According to another aspect of the present invention, a chip is provided, comprising the trimming circuit as described above.

[0030] According to another aspect of the present invention, a trimming method is provided, comprising: obtaining a voltage control signal; different values ​​of the voltage control signal correspond to different values ​​of ideal output voltages, and the voltage control signal is in direct proportion or inverse proportion to the ideal output voltage; sampling to obtain a test voltage, the test voltage comprising a first test voltage and a second test voltage; the first test voltage is a test output voltage corresponding to a first ideal output voltage, and the second test voltage is a test output voltage corresponding to a second ideal output voltage; obtaining a test proportional coefficient between the test voltage and the voltage control signal based on the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage; obtaining a proportional deviation parameter based on the test proportional coefficient and the direct proportion or inverse proportion relationship; and adjusting the output voltage signal based on the proportional deviation parameter.

[0031] Optionally, the adjustment method further includes:

[0032] Obtaining the test proportional coefficient and offset parameter between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage;

[0033] The output voltage signal is adjusted according to the offset parameter.

[0034] According to the trimming circuit, chip and trimming method including the same according to the embodiments of the present invention, during sampling testing, at least two test voltages are obtained to obtain a proportional deviation coefficient, and trimming is performed based on the proportional deviation coefficient, thereby achieving accurate calibration within the entire trimming range.

[0035] Furthermore, during the sampling test, at least two test voltages are obtained to obtain a proportional deviation coefficient and an offset parameter, and adjustments are made according to the proportional deviation coefficient and the offset parameter, thereby achieving accurate calibration within the entire adjustment range.

[0036] Furthermore, the proportional adjustment unit for adjusting the proportional deviation parameter realizes the change of the access resistance by controlling the switching on and off of the MOS tube, has a simple structure, and does not require a significant increase in the circuit area.

[0037] Furthermore, the offset adjustment unit for adjusting the offset parameter controls at least one group of NMOS transistors and PMOS transistors through the same signal to achieve the change of the access resistance, which has a simple structure and does not require a significant increase in circuit area. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0039] FIG1 shows a schematic structural diagram of a trimming circuit according to an embodiment of the present invention.

[0040] FIG2 shows a circuit diagram of a trimming circuit according to a first embodiment of the present invention.

[0041] FIG3 shows a circuit diagram of an operational amplifier according to a first embodiment of the present invention.

[0042] FIG4 shows a circuit diagram of a trimming circuit according to a second embodiment of the present invention.

[0043] FIG5 shows a flow chart of a method for adjusting according to an embodiment of the present invention.

[0044] FIG6 shows a voltage output curve according to an embodiment of the present invention.

[0045] FIG. 7 is a schematic diagram showing a comparison of simulation results of errors after calibration between the trimming circuit according to an embodiment of the present invention and the conventional trimming circuit. DETAILED DESCRIPTION

[0046] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, certain well-known parts may not be shown in the drawings.

[0047] Specific embodiments of the present invention are described in further detail below with reference to the accompanying drawings and examples. Numerous specific details of the present invention, such as component structures, materials, dimensions, processing techniques, and technologies, are described below to facilitate a clearer understanding of the present invention. However, as those skilled in the art will appreciate, the present invention may be practiced without these specific details.

[0048] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "on" or "over" another layer or region, it may mean that it is directly on the other layer or region, or that other layers or regions are included between it and the other layer or region. Furthermore, if the component is turned over, the layer or region will be "below" or "beneath" the other layer or region.

[0049] Figure 1 shows a schematic diagram of the structure of a trimming circuit according to an embodiment of the present invention. As shown in Figure 1 , the trimming circuit according to an embodiment of the present invention includes an input terminal 100, an output terminal 200, a sampling unit 300, an operation unit 400, and a proportional adjustment unit 500.

[0050] Specifically, input terminal 100 is configured to receive a voltage control signal. Voltage control signals of different values ​​correspond to ideal output voltages of different values, and the voltage control signal and the ideal output voltage are directly or inversely proportional. For purposes of distinction, the ideal output voltages corresponding to voltage control signals of different values ​​may be referred to as a first ideal output voltage, a second ideal output voltage, and so on.

[0051] Output terminal 200 is used to output a voltage signal. Taking the application of the trimming circuit to a display driver chip as an example, the output voltage signal output by output terminal 200 can be the voltage required for various driving operations of the screen panel to meet the requirements of adapting to different screens or providing better performance in different operating modes.

[0052] The sampling unit 300 is connected to the output terminal 200 to sample and obtain a test voltage. The test voltage includes a first test voltage and a second test voltage. The first test voltage is a test output voltage corresponding to the first ideal output voltage, and the second test voltage is a test output voltage corresponding to the second ideal output voltage.

[0053] The computing unit 400 obtains a test proportionality coefficient between the test voltage and the voltage control signal based on the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage. The computing unit 400 obtains a proportionality deviation coefficient based on the test proportionality coefficient and a direct proportional or inverse proportional relationship. For example, the computing unit 400 is connected to the sampling unit 300 to obtain the signal sampled by the sampling unit 300.

[0054] The proportional adjustment unit 500 is connected to the output terminal 200 and adjusts the output voltage signal outputted by the output terminal 200 according to the proportional deviation parameter. The proportional adjustment unit 500 is connected to the operation unit 400 to obtain the proportional deviation parameter, for example.

[0055] In an optional embodiment of the present invention, the calculation unit 400 determines a test proportionality coefficient and an offset parameter between the test voltage and the voltage control signal based on the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage. The trimming circuit further includes an offset adjustment unit (not shown in FIG. 1 ). The offset adjustment unit is connected to the output terminal 200 and adjusts the output voltage signal output by the output terminal 200 based on the offset parameter.

[0056] Figure 2 shows a schematic circuit diagram of a trimming circuit according to a first embodiment of the present invention. As shown in Figure 2 , the trimming circuit according to the first embodiment of the present invention includes a pre-stage operational amplifier 700, a ratio adjustment unit 500, an offset adjustment unit 600, and a post-stage operational amplifier 900. Optionally, the trimming circuit also includes a voltage follower 800 and a voltage divider resistor unit 950.

[0057] Specifically, the front-stage operational amplifier 700 is connected to the input terminal to receive the voltage control signal.

[0058] A first terminal of the ratio adjustment unit 500 is connected to an output terminal of the pre-stage operational amplifier 700. The ratio adjustment unit 500 includes, for example, a slope adjustment resistor R3.

[0059] The first terminal of the offset adjustment unit 600 is connected to the second terminal of the ratio adjustment unit 500. The offset adjustment unit 600 includes, for example, offset adjustment resistors R4 and R6. Optionally, the total resistance of the offset adjustment unit 600 (i.e., the offset adjustment resistors R4 and R6) connected to the circuit is a fixed value.

[0060] A first terminal of the post-stage operational amplifier 900 is connected to a second terminal of the offset adjustment unit 600 , and a second terminal of the post-stage operational amplifier 900 is connected to the output terminal.

[0061] Optionally, the trimming circuit further includes a voltage follower 800 and a voltage divider resistor unit 950. The first end of the voltage follower 800 is connected to the output end of the preceding operational amplifier 700, and the second end of the voltage follower 800 is connected to the first end of the proportional adjustment unit 500. The voltage follower 800, for example, includes a second-stage operational amplifier AMP1. The first end of the voltage divider resistor unit 950 is connected to the offset adjustment resistor R4; the second end of the voltage divider resistor unit 950 is connected to the offset adjustment resistor R6; and the third end of the voltage divider resistor unit 950 is connected to the first end of the subsequent operational amplifier 900. The voltage divider resistor unit 950, for example, includes multiple series resistors, and the subsequent operational amplifier 900 is connected between the multiple series resistors.

[0062] Furthermore, Fig. 3 shows a circuit diagram of an operational amplifier according to Embodiment 1 of the present invention. The operational amplifier shown in Fig. 3 may be the pre-stage operational amplifier 700 and / or the post-stage operational amplifier 900 shown in Fig. 2 .

[0063] Specifically, the pre-stage op amp 700 may include one or more operational amplifiers (op amp combinations) as shown in Figure 3, providing a reference voltage for multiple modules within the driver circuit (chip). Other modules use this reference voltage to generate the required voltage for the panel. The voltage follower 800 ensures that the output voltage is consistent with the output voltage of the pre-stage op amp 700 and provides the required load drive capability. The load of the voltage follower (second-stage op amp) 800 may include two sets of adjustable resistors and a set of divider resistors. The internal nodes of the divider resistors are connected to one end of a set of switches, the other end of which is connected to the input of the post-stage op amp 900. The on and off of the switches are controlled by external signals, and the MUX is used to switch the input voltage of the post-stage op amp. The post-stage op amp 900 may include one or more operational amplifiers (op amp combinations) as shown in Figure 3, to implement functions such as voltage scaling and positive and negative voltage conversion. In addition, it can provide strong drive capability to drive the circuits within the panel.

[0064] FIG4 shows a schematic circuit diagram of a trimming circuit according to a second embodiment of the present invention. As shown in FIG4 , the trimming circuit according to the second embodiment of the present invention includes a voltage follower 800, a ratio adjustment unit 500, an offset adjustment unit 600, a voltage divider resistor unit 950, and a control unit (not shown in FIG4 ). The offset adjustment unit 600 includes a first branch 610 and a second branch 620.

[0065] The proportional adjustment unit 500 includes a first resistor and a second resistor connected in series, and first and second MOS transistors connected in parallel with the first and second resistors, respectively. A control unit is connected to the first and second MOS transistors to control the on and off of the first and second MOS transistors, respectively. When the first MOS transistor is off, the first resistor is electrically connected to the output terminal; when the second MOS transistor is off, the second resistor is electrically connected to the output terminal.

[0066] The first branch 610, the output terminal (not shown), and the second branch 620 are connected in sequence. The first branch includes a first regulating resistor and a first PMOS transistor connected in parallel with the first regulating resistor; the second branch includes a second regulating resistor and a first NMOS transistor connected in parallel with the second regulating resistor. A control unit is connected to the first PMOS transistor and the first NMOS transistor, respectively, and uses the same signal to control the first PMOS transistor and the first NMOS transistor, either turning the first PMOS transistor on and the first NMOS transistor off, or turning the first PMOS transistor off and the first NMOS transistor on. Optionally, the first regulating resistor and the second regulating resistor have the same resistance value.

[0067] Specifically, GND represents power ground; R represents a resistor; AMP represents an amplifier; MUX represents an N-to-1 selector controlled by a digital signal; PM represents a P-type transistor, and NM represents an N-type transistor. R31 / R32 / … / R3m represents m resistors, which together with m P-type transistors MP11 / MP12 / … / MP1m implement the function of R3; R41 / R42 / … / R4j represents j resistors, which together with j P-type transistors MP21 / MP22 / … / MP2j implement the function of R4; R61 / R62 / … / R6j represents j resistors, which together with j N-type transistors MN21 / MN22 / … / MN2j implement the function of R6. As shown in Figure 2, the pre-stage op amp 700 provides a reference voltage for the voltage follower (second-stage op amp) 800. AMP1's positive input is connected to the output of the pre-stage op amp 700, and its negative input is connected to the output, forming a voltage follower.

[0068] The ratio adjustment unit 500 is, for example, a slope adjustment resistor (R3). The offset adjustment unit 600 is, for example, an offset adjustment resistor (R4 / R6). The voltage divider resistor unit 950 is, for example, a voltage divider resistor (R5) consisting of N resistors connected in series. R3, R4, R5, and R6 are connected in sequence, with the other end of R3 connected to the output of AMP1, and the other end of R6 connected to GND. Specifically, the slope adjustment resistor R3 is composed of a basic unit consisting of m resistors and a MOSFET. Digital signals can be used to control the on / off of MP11-MP1m, respectively, to adjust the number of resistors connected to the circuit and thereby adjust the slope of the output characteristic curve. The offset adjustment resistors (R4 / R6) are composed of a basic unit consisting of j resistors and MOSFETs. MP21 and MN21 are controlled by the same signal, MP22 and MN22 are controlled by the same signal, and so on. Since MP2x and MN2x are pmos and nmos, respectively, one of the MOSFETs controlled by the same signal is on and the other is off. By changing the control signal, a resistor can be moved from above to below the voltage divider resistor unit 950 (MUX), or vice versa, from below to above the MUX, thereby adjusting the offset of the output characteristic curve. Optionally, the resistors R4j and R6j corresponding to MP2j and MN2j, controlled by the same signal, have the same resistance value. This ensures that the sum of the resistances of the offset adjustment resistors R4 and R6 (offset adjustment unit 600) connected to the circuit is fixed, thus preventing new deviations during the offset adjustment process.

[0069] The trimming circuit provided in the embodiment of the present invention measures two or more voltages during testing, and calculates the slope and offset errors respectively. By controlling R3 through digital signal control, the slope in the output characteristic curve can be adjusted to eliminate the slope error Δk. By adjusting R4 / R6, the offset of the output characteristic curve can be adjusted to eliminate the offset error Δb, thereby achieving the purpose of eliminating errors within the entire output range. In addition, the trimming circuit provided in the embodiment of the present invention can maintain the same accuracy of the output voltage within the entire adjustment range without significantly increasing the circuit area, and can meet the new demands brought about by panel development and meet the working index requirements.

[0070] According to another aspect of the present invention, a chip is provided. The chip includes the above-described trimming circuit. Chips according to embodiments of the present invention include but are not limited to display driver chips.

[0071] According to another aspect of the present invention, a trimming method is provided. The trimming method is applied, for example, to the trimming circuit described above. As shown in FIG5 , the trimming method according to an embodiment of the present invention includes the following steps:

[0072] In step S101, a voltage control signal is obtained;

[0073] A voltage control signal is obtained, wherein different values ​​of the voltage control signal correspond to different values ​​of the ideal output voltage, and the voltage control signal is directly proportional or inversely proportional to the ideal output voltage.

[0074] In step S102, a test voltage is obtained by sampling;

[0075] The test voltage is obtained by sampling. The test voltage includes a first test voltage and a second test voltage. The first test voltage is a test output voltage corresponding to the first ideal output voltage, and the second test voltage is a test output voltage corresponding to the second ideal output voltage.

[0076] In step S103, a test proportional coefficient between the test voltage and the voltage control signal is obtained according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage;

[0077] In step S104, a proportional deviation parameter is obtained according to the test proportional coefficient and the direct proportional or inverse proportional relationship;

[0078] In step S105 , the output voltage signal is adjusted according to the proportional deviation parameter.

[0079] Optionally, the adjustment method according to an embodiment of the present invention further includes:

[0080] Obtaining a test proportional coefficient and an offset parameter between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage;

[0081] The output voltage signal is adjusted according to the offset parameter.

[0082] Figure 6 shows a voltage output curve according to an embodiment of the present invention. Figure 7 shows a schematic diagram comparing simulation results of errors after calibration between a trimming circuit according to an embodiment of the present invention and a conventional trimming circuit. In conjunction with Figures 4 to 7, in a specific embodiment, the trimming circuit is a circuit with an adjustable output voltage function. The voltage output characteristic curve representing the output voltage characteristics of the circuit is shown in Figure 6. The horizontal axis, Digital Code, represents the input digital control signal, each Digital Code corresponds to an output voltage, and the vertical axis, Vout, represents the output voltage value. For an ideal power supply without any errors, its output characteristic curve is a straight line with a slope equal to the design value and a zero offset. It can be represented by Vout = kx + b, where x represents the decimal value of the Digital Code and b represents the output voltage value when the Digital Code is 0. The applicant has discovered that actual power supplies can be affected by factors such as design and process, causing the output characteristic curve to change in slope or introduce an offset, thereby generating errors. Figure 6 (a) and (b) show the effects on the output voltage when only the offset Δb exists and when only the slope error Δk exists, respectively. For a system with both Δk and Δb, its output characteristic curve can be represented by Figure 6 (c), and the output voltage can be expressed as Vout = (k + Δk)x + b + Δb.

[0083] During the sampling test, two voltages are tested. The corresponding digital codes of the digital control signals are x1 and x2, and the measured output voltages are Vout1 and Vout2. According to the output characteristic curve, we can get:

[0084] Vout1=(k+△k)x1+b+△b

[0085] Vout2=(k+△k)x2+b+△b

[0086] Here, k is the ideal difference between two adjacent digital codes, b is the ideal output voltage when the digital code is 0, Δk is the change in k when non-ideal factors are taken into account, and Δb is the change in b when non-ideal factors are taken into account. It should be noted that k and b can be set based on actual needs.

[0087] During testing and calibration, after obtaining the slope and offset errors using the calculation method described above, the slope k and offset b can be adjusted by changing the number of resistors connected to R3, R4, and / or R6, thereby ensuring that the voltage is relatively accurate across the entire output voltage range. Optionally, when calibrating using the calculation method described above, measurements can be taken at multiple voltages, or multiple measurements can be taken at each voltage and averaged to further reduce the impact of measurement errors.

[0088] In the above-described embodiment of the present invention, the circuit used in the error calibration method of the present invention was designed using a CMOS (Complementary Metal Oxide Semiconductor) process. As shown in Figures 1 to 7 , an offset voltage was introduced at the input terminals of AMP2 and AMP3 to simulate the mismatch that occurs during actual manufacturing. The output voltage was then measured and calibrated according to the above-described method (algorithm). As shown in Figure 7 , calibration was performed at Digital Code = 36 using the same amplifiers and applying the same bias current, operating voltage, process environment, and operating temperature. The simulation results show that the output error is small after calibration at the calibration point. However, after calibration using a conventional (existing) voltage trimming circuit, the error is relatively large, approximately ±40mV, across the entire output range. After calibration using the novel voltage trimming circuit of the present invention, the error is less than 2.4mV across the entire output range. This comparison shows that after calibration using the novel voltage trimming circuit of the present invention, the output voltage error across the entire output range is superior to that of the conventional voltage trimming circuit.

[0089] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0090] While embodiments of the present invention have been described above, these embodiments do not exhaustively describe all details and do not limit the invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification in order to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better utilize the present invention and its modifications. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A trimming circuit, comprising: An input terminal, used for receiving a voltage control signal; Different values ​​of the voltage control signal correspond to different values ​​of ideal output voltage, and the voltage control signal is in direct proportion or inverse proportion to the ideal output voltage; An output terminal, used for outputting a voltage signal; a sampling unit connected to the output end to sample and obtain a test voltage, wherein the test voltage includes a first test voltage and a second test voltage; the first test voltage is a test output voltage corresponding to a first ideal output voltage, and the second test voltage is a test output voltage corresponding to a second ideal output voltage; a computing unit, for obtaining a test proportionality coefficient between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage; The computing unit obtains a proportional deviation parameter according to the test proportional coefficient and the direct proportional or inverse proportional relationship; A proportional adjustment unit is connected to the output end and adjusts the output voltage signal output by the output end according to the proportional deviation parameter.

2. The trimming circuit according to claim 1, wherein: The ratio adjustment unit includes a first resistor and a second resistor connected in series, and a first MOS transistor and a second MOS transistor connected in parallel with the first resistor and the second resistor respectively; The trimming circuit also includes: a control unit, wherein the control unit is connected to the first MOS tube and the second MOS tube respectively to control the on and off of the first MOS tube and the second MOS tube respectively, When the first MOS tube is turned off, the first resistor is electrically connected to the output end; when the second MOS tube is turned off, the second resistor is electrically connected to the output end.

3. The trimming circuit according to claim 1, wherein: The operation unit obtains the test proportionality coefficient and the offset parameter between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage; An offset adjustment unit is connected to the output end and adjusts the output voltage signal output by the output end according to the offset parameter.

4. The trimming circuit according to claim 3, wherein: The offset adjustment unit comprises a first branch, the output end and a second branch connected in sequence; The first branch includes a first regulating resistor and a first PMOS transistor connected in parallel with the first regulating resistor; the second branch includes a second regulating resistor and a first NMOS transistor connected in parallel with the second regulating resistor; The trimming circuit also includes: A control unit is connected to the first PMOS tube and the first NMOS tube respectively, and uses the same signal to control the first PMOS tube and the first NMOS tube so that the first PMOS tube is turned on and the first NMOS tube is turned off, or the first PMOS tube is turned off and the first NMOS tube is turned on.

5. The trimming circuit according to claim 3, wherein: The trimming circuit also includes: A front-stage operational amplifier connected to the input terminal to receive the voltage control signal; A ratio adjustment unit, wherein a first end of the ratio adjustment unit is connected to an output end of the preceding operational amplifier; An offset adjustment unit, wherein a first end of the offset adjustment unit is connected to a second end of the ratio adjustment unit; A post-stage operational amplifier, wherein a first end of the post-stage operational amplifier is connected to a second end of the offset adjustment unit, and a second end of the post-stage operational amplifier is connected to the output end.

6. The trimming circuit according to claim 5, wherein: The offset adjustment unit includes a first branch and a second branch; the adjustment circuit also includes a voltage-dividing resistor unit, and the voltage-dividing resistor unit includes a plurality of series resistors; The first end of the first branch is connected to the second end of the ratio adjustment unit, and the second end of the first branch is connected to the first end of the voltage dividing resistor unit; The first end of the second branch is connected to the second end of the voltage-dividing resistor unit, and the second end of the second branch is grounded; The third end of the voltage divider circuit unit is connected to the first end of the subsequent operational amplifier.

7. The trimming circuit according to claim 5, wherein: The trimming circuit also includes: A voltage follower, wherein a first end of the voltage follower is connected to the output end of the preceding operational amplifier, and a second end of the voltage follower is connected to the first end of the proportional adjustment unit.

8. A chip, comprising: The trimming circuit as claimed in any one of claims 1 to 7.

9. A method for adjusting, comprising: Obtaining a voltage control signal; Different values ​​of the voltage control signal correspond to different values ​​of ideal output voltage, and the voltage control signal is in direct proportion or inverse proportion to the ideal output voltage; Sampling to obtain a test voltage, the test voltage comprising a first test voltage and a second test voltage; the first test voltage is a test output voltage corresponding to a first ideal output voltage, and the second test voltage is a test output voltage corresponding to a second ideal output voltage; Obtaining a test proportionality coefficient between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, and the voltage control signal corresponding to the second test voltage; Obtaining a proportional deviation parameter according to the test proportional coefficient and the direct proportional or inverse proportional relationship; The output voltage signal is adjusted according to the proportional deviation parameter.

10. The adjustment method according to claim 9, wherein: The adjustment method further comprises: Obtaining the test proportionality coefficient and the offset parameter between the test voltage and the voltage control signal according to the first test voltage, the voltage control signal corresponding to the first test voltage, the second test voltage, the voltage control signal corresponding to the second test voltage, the first ideal output voltage, and the second ideal output voltage; The output voltage signal is adjusted according to the offset parameter.

Images