Method and apparatus for determining physical address, and computing device and storage medium

Abstract

The present application belongs to the technical field of computers. Provided are a method and apparatus for determining a physical address, and a computing device and a storage medium. The method comprises: matching an input label, which is generated on the basis of a virtual page number in a first virtual address, with a plurality of entries in a page table cache; and if the input label is successfully matched with a first entry among the plurality of entries, and a merging flag bit in the first entry indicates that a page table entry corresponding to the first entry is a merged table entry, on the basis of the virtual page number in the first virtual address, an entry label in the first entry and a physical page number, determining a physical address corresponding to the first virtual address. In the method, one entry in a page table cache corresponds to at least one page table entry, such that the physical memory capacity covered by the entries in the page table cache can be increased, thereby increasing the hit rate of the page table cache and reducing page table walks, and thus also reducing the latency and overheads of memory access.

Description

Method, device, computing equipment and storage medium for determining physical address

[0001] This application claims priority to Chinese patent application No. 202310728507.8 filed on June 19, 2023, entitled “Method, device, computing device and storage medium for determining a physical address,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a method, apparatus, computing device, and storage medium for determining a physical address. Background Art

[0003] In a computing device, before executing an instruction, the processor must first determine the physical address (PA) corresponding to the virtual address (VA) in the instruction through the processor's memory management unit (MMU). Based on the determined physical address, the processor then reads the data required to execute the instruction from memory. A virtual address consists of a virtual page number (VPN) and an offset, while a physical address consists of a physical page number (PPN) and an offset. Each virtual page number corresponds to a physical page number, which indicates a segment of physical memory, i.e., a physical page. The offset in the virtual address is the same as the offset in the physical address.

[0004] In related technologies, a translation lookaside buffer (TLB), also known as a page table cache, includes multiple entries, each of which is used to store a mapping relationship between a virtual page number and a physical page number. When a processor executes an instruction, it searches the TLB for the physical page number corresponding to the virtual page number in the virtual address contained in the instruction. If the search is successful (TLB hit), the physical address is determined based on the physical page number found and the offset in the virtual address. If the search fails (TLB miss), the MMU reads the page table from memory, searches for the physical page number corresponding to the virtual page number from each page table entry (PTE) in the page table, and then determines the physical address. The mapping relationship found is stored as an entry in the TLB. This process is also called a page table walk. Each PTE indicates the mapping relationship between a virtual page number and a physical page number.

[0005] However, in the above method, an entry in the TLB only stores the mapping relationship between a virtual page number and a physical page number, and the storage space of the TLB is limited, and the number of page table entries in the page table is much greater than the number of entries in the TLB. Therefore, the size of physical memory that can be covered by the mapping relationship stored in the TLB is limited, resulting in a low TLB hit rate. Since a page table walk is required when a TLB misses, and the page table walk takes a long time, it leads to increased memory access latency and memory access overhead.

[0006] Summary of the Invention

[0007] The present invention provides a method, apparatus, computing device, and storage medium for determining a physical address, which can increase the physical memory capacity covered by entries in a page table cache, thereby improving the page table cache hit rate, reducing page table walks, and further reducing memory access latency and overhead. The technical solution is as follows.

[0008] In a first aspect, a method for determining a physical address is provided, which is applied to a computing device, the method comprising:

[0009] generating an input tag based on a virtual page number in a first virtual address to be translated;

[0010] Match the input tag with multiple entries in the page table cache, each entry including an entry tag, a physical page number, and a merge flag, where the merge flag is used to indicate whether the page table entry corresponding to the entry is a merge entry;

[0011] If the input tag successfully matches the first entry among the multiple entries, and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merge entry, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the entry tag in the first entry, and the physical page number.

[0012] Among them, the page table entry in the page table includes a physical page number and a quantity flag, the quantity flag is used to indicate the number of page table entries involved in the merge. C The physical page numbers in the two consecutive page table entries are also consecutive, so the computing device will C Merge these 2 page table entries C The value of the quantity flag in each of the page table entries is determined to be C, where C is an integer greater than or equal to 0. If the value C of the quantity flag in the page table entry queried by the computing device during the page table walk indicates that the page table entry is a merged entry, the computing device will merge the consecutive 2 pages including the queried page table entry. CThe two page table entries are merged and stored as one entry in the page table cache, so that C When the virtual address included in the virtual page corresponding to the page table entry is obtained, it can hit the page table cache.

[0013] In the above method, one entry in the page table cache corresponds to at least one page table entry, which can increase the physical memory capacity covered by the entries in the page table cache, thereby improving the hit rate of the page table cache, reducing page table walks, and further reducing the delay and overhead of memory access.

[0014] Optionally, generating an input tag based on a virtual page number in the first virtual address to be converted includes:

[0015] The virtual page number in the first virtual address is determined as an input tag.

[0016] In the above method, the virtual page number is directly determined as the input tag, and there is no need to extract a character string from the virtual page number as the input tag, which can improve efficiency.

[0017] Optionally, generating an input tag based on a virtual page number in the first virtual address to be converted includes:

[0018] A partial character string in the virtual page number in the first virtual address is determined as an input tag.

[0019] Optionally, determining a portion of a character string in a virtual page number in the first virtual address as an input tag includes:

[0020] A first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address are extracted, and the extracted characters are combined into an input tag.

[0021] Optionally, the page table cache includes multiple entry sets, entries in the same entry set correspond to the same index, and the method further includes:

[0022] Extracting the remaining character string from the virtual page number in the first virtual address, where the remaining character string refers to the character string excluding the first number of characters at the head and the second number of characters at the tail of the virtual page number in the first virtual address;

[0023] A first entry set having an index matching the remaining character string is determined from the plurality of entry sets, the first entry set including a plurality of entries.

[0024] In the above method, part of the character string in the virtual page number in the first virtual address is used as the input tag, and the remaining character string is used as the index, so as to first lock the entry set corresponding to the virtual page number in the first virtual address, and then match the input tag with each entry in the entry set respectively, without having to match the input tag with all entries in the page table cache, which can improve the matching efficiency, thereby improving the efficiency of determining the physical address and reducing latency.

[0025] Optionally, matching the input tag to multiple entries in the page table cache includes:

[0026] If the merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, the input tag is compared with the entry tag in the entry;

[0027] If the merge flag in the entry indicates that the page table entry corresponding to the entry is a merge entry, the first character string in the entry tag in the entry is compared with the second character string in the input tag, where the first character string is the previous target bit in the entry tag in the entry, the target bit is the bit before the first character with a value of 1 from right to left in the entry tag in the entry, and the second character string is the previous target bit in the input tag.

[0028] In the above method, when matching the input tag with the entry, the number of bits involved in the comparison in the input tag and the entry tag is determined based on the value of the merge flag in the entry. This can ensure that the input tag and the entry are correctly matched when the page table entry corresponding to the entry is a merged entry, avoiding misjudgment of the matching result due to the merged page table entry, thereby ensuring the accuracy of the match.

[0029] Optionally, if the input tag successfully matches a first entry among the multiple entries, and a merge flag of the first entry indicates that the first entry is a merge entry, determining a physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the entry tag in the first entry, and the physical page number includes:

[0030] determining, based on the entry tag in the first entry, from the plurality of page table entries corresponding to the first entry, a first page table entry, the first page table entry corresponding to the smallest virtual page number among the plurality of page table entries corresponding to the first entry;

[0031] Determining a first number of pages between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry based on the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry;

[0032] Determining a physical base address corresponding to the first virtual address based on the first page number, the capacity of the physical page, and the physical page number in the first entry;

[0033] A physical address corresponding to the first virtual address is determined based on the physical base address and the offset in the first virtual address.

[0034] Optionally, the multiple page table entries corresponding to the first entry are from a page table in the memory, and the page table entries in the page table include a physical page number and a quantity flag, where the quantity flag is used to indicate the number of page table entries corresponding to the first entry.

[0035] In the above method, one entry in the page table cache corresponds to at least one page table entry, which can increase the physical memory capacity covered by the entries in the page table cache, thereby improving the hit rate of the page table cache, reducing page table walks, and further reducing the delay and overhead of memory access.

[0036] Optionally, the method further includes:

[0037] generating an entry tag in a first entry based on a virtual page number and a quantity flag of any page table entry in the plurality of page table entries;

[0038] The smallest physical page number among the plurality of page table entries is determined as the physical page number in the first entry.

[0039] In the above method, one entry in the page table cache corresponds to at least one page table entry, which can increase the physical memory capacity covered by the entries in the page table cache, thereby improving the hit rate of the page table cache, reducing page table walks, and further reducing the delay and overhead of memory access.

[0040] Optionally, the method further includes:

[0041] If the input tag fails to match multiple entries, query the page table based on the virtual page number in the first virtual address;

[0042] Determining from the page table a second page table entry that matches the virtual page number in the first virtual address;

[0043] If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the third page table entry. The third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

[0044] Optionally, the method further includes:

[0045] If any page table entry in the page table is changed, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is a merge entry, then the entry corresponding to the changed page table entry is deleted from the page table cache;

[0046] If any page table entry in the page table changes, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is an unmerged entry, then the entry corresponding to the changed page table entry is updated based on the virtual page number, physical page number and quantity flag corresponding to the changed page table entry.

[0047] In the above method, after the page table entry is changed, the page table and the page table cache are refreshed based on the changed page table entry to ensure the consistency of the entry in the page table cache with the page table entry in the page table, thereby ensuring the accuracy of the determined physical address.

[0048] In a second aspect, a device for determining a physical address is provided, the device comprising at least one functional module, the at least one functional module being configured to execute a method for determining a physical address as provided in the first aspect or any possible implementation of the first aspect.

[0049] In a third aspect, a computing device is provided, the computing device comprising a processor and a memory;

[0050] The processor is used to execute instructions stored in the memory, so that the computing device executes the method for determining the physical address provided by the aforementioned first aspect or any possible implementation of the first aspect.

[0051] In a fourth aspect, a computer program product comprising instructions is provided, which, when executed by a computing device, enables the computing device to execute a method for determining a physical address as provided in the first aspect or any possible implementation of the first aspect.

[0052] In a fifth aspect, a computer-readable storage medium is provided, which includes computer program instructions. When the computer program instructions are executed by a computing device, the computing device executes the method for determining the physical address provided in the first aspect or any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] FIG1 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application;

[0054] FIG2 is a schematic diagram of a merged page table entry provided in an embodiment of the present application;

[0055] FIG3 is a schematic diagram of a process for merging page table entries and generating entries according to an embodiment of the present application;

[0056] FIG4 is a schematic diagram of a process for merging page table entries and generating entries according to an embodiment of the present application;

[0057] FIG5 is a schematic diagram of a process of merging page table entries and generating entries according to an embodiment of the present application;

[0058] FIG6 is a schematic diagram of a process for merging page table entries and generating entries according to an embodiment of the present application;

[0059] FIG7 is a schematic diagram of a process of merging page table entries and generating entries according to an embodiment of the present application;

[0060] FIG8 is a schematic diagram of a process for merging page table entries and generating entries according to an embodiment of the present application;

[0061] FIG9 is a flow chart of a method for determining a physical address provided in an embodiment of the present application;

[0062] FIG10 is a schematic diagram of a method for determining a physical address provided in an embodiment of the present application;

[0063] FIG11 is a schematic diagram of a process for determining a first item set from multiple item sets according to an embodiment of the present application;

[0064] FIG12 is a flow chart of a method for determining a physical address provided in an embodiment of the present application;

[0065] FIG13 is a schematic structural diagram of a device for determining a physical address provided in an embodiment of the present application. DETAILED DESCRIPTION

[0066] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0067] First, the structure of a computing device provided in an embodiment of the present application is introduced.

[0068] As shown in Figure 1, Figure 1 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application. The computing device 100 can be a host, a server, or a personal computer, etc. The computing device 100 can be implemented by a general bus architecture.

[0069] The computing device 100 includes at least one processor 101 , a communication bus 102 , a memory 103 , and at least one communication interface 104 .

[0070] The processor 101 is, for example, a general-purpose central processing unit (CPU), a network processor (NP), a graphics processing unit (GPU), a neural-network processing unit (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the solution of the present application. For example, the processor 101 includes an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The PLD is, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0071] The communication bus 102 is used to transmit information between the above components. The communication bus 102 can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG1 shows only one line, but this does not mean that there is only one bus or one type of bus.

[0072] The memory 103 is, for example, a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including a compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 103 is, for example, independent and connected to the processor 101 via the communication bus 102. The memory 103 can also be integrated with the processor 101.

[0073] The communication interface 104 uses any transceiver-like device for communicating with other devices or communication networks. The communication interface 104 includes a wired communication interface and may also include a wireless communication interface. The wired communication interface may be, for example, an Ethernet interface. The Ethernet interface may be an optical interface, an electrical interface, or a combination thereof. The wireless communication interface may be a wireless local area network (WLAN) interface, a cellular network communication interface, or a combination thereof.

[0074] As an embodiment, the processor 101 may include one or more CPUs.

[0075] As an example, the computing device 100 may include multiple processors, each of which may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). A processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0076] As an embodiment, the computing device 100 may further include an output device and an input device. The output device communicates with the processor 101 and can display information in a variety of ways. For example, the output device can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. The input device communicates with the processor 101 and can receive user input in a variety of ways. For example, the input device can be a mouse, a keyboard, a touch screen device, or a sensor device.

[0077] In some embodiments, the memory 103 is used to store program codes for executing the solution of the present application, and the processor 101 can execute the program codes stored in the memory 103. That is, the computing device 100 can implement the method for determining the physical address provided in the method embodiment through the processor 101 and the program codes in the memory 103.

[0078] In order to facilitate understanding of the contents of the embodiments of the present application, several technical terms involved in the embodiments of the present application are explained below.

[0079] 1. Virtual Pages and Physical Pages: In memory paging management, the virtual address space and the physical address space are divided into multiple storage units of equal capacity. The storage units divided into the virtual address space are called virtual pages, and the storage units divided into the physical address space are called physical pages. The capacity of a virtual page and a physical page is equal. The capacity of a virtual page or physical page can be 4 kilobytes, 2 megabytes, 1 gigabyte, and so on.

[0080] 2. Physical address: A physical address includes a physical page number and an offset. The physical page number indicates the physical page where the physical address is located, and the offset in the physical address refers to the offset of the physical address relative to the starting address of the physical page where the physical address is located.

[0081] 3. Virtual address: A virtual address includes a virtual page number and an offset. The virtual page number indicates the virtual page where the virtual address is located, and the offset in the virtual address refers to the offset of the virtual address relative to the starting address of the virtual page where the virtual address is located.

[0082] 4. Page Table: A page table is a data structure in memory that includes multiple page table entries, each of which indicates the mapping between a virtual page number and a physical page number. Based on this mapping, a computing device can determine the physical page corresponding to the virtual page containing the virtual address, and then determine the physical address corresponding to the virtual address based on the offset in the virtual address.

[0083] 5. Page Table Cache: The page table cache is a type of cache in the processor's memory management unit, also known as the translation lookaside buffer (TLB). The page table cache includes multiple entries, each of which is used to store the mapping relationship between virtual page numbers and physical page numbers retrieved from the page table. The computing device stores the mapping relationship retrieved from the page table as an entry in the page table cache. The computing device can then query the page table cache for an entry before the next mapping relationship is retrieved from the page table. If the computing device hits any entry in the page table cache, it obtains the mapping relationship stored in the entry without having to access the page table in memory, thus saving query time.

[0084] 6. Page table walk: If the computing device does not hit an entry in the page table cache, the computing device accesses the page table in the memory to query the mapping relationship in the page table and stores the queried mapping relationship as an entry in the page table cache. This process is called a page table walk.

[0085] In the embodiment of the present application, the page table entry in the page table includes a physical page number and a quantity flag, the quantity flag is used to indicate the number of page table entries involved in the merge. C The physical page numbers in the two page table entries are also continuous, so the computing device will C Merge these 2 page table entries C The value of the quantity flag in each of the page table entries is determined to be C, where C is an integer greater than or equal to 0. If the value C of the quantity flag in the page table entry queried by the computing device during the page table walk indicates that the page table entry is a merged entry, the computing device will merge the consecutive 2 pages including the queried page table entry. C The two page table entries are merged and stored as one entry in the page table cache, so that C When the virtual address of the virtual page corresponding to each page table entry is obtained, it can hit the page table cache, which increases the physical memory capacity covered by the page table cache, improves the hit rate of the page table cache, reduces page table walks, and thus reduces the delay and overhead of memory access, thereby improving the performance of the computing device.

[0086] The following first introduces the process of merging page table entries in an embodiment of the present application.

[0087] First, in the embodiment of the present application, the page table entry includes a physical page number and a quantity flag, and the value of the quantity flag indicates the number of page table entries participating in the merge. In some embodiments, the computing device uses three bits in the page table entry as the quantity flag, and the value of the quantity flag is recorded as Count, abbreviated as C, and the number of page table entries participating in the merge is recorded as Num, Num=2 C For example, C=000_2 =0, that is, Num=2 0 =1, indicating that the page table entry is not merged; C = 001 _2 =1, that is, Num=2 1 =2, indicating that the number of page table entries involved in the merge is 2; C=010 _2 =2, that is, Num = 2 2 =4, indicating that the number of page table entries participating in the merge is 4, and other values ​​of C are similar and will not be described in detail. It should be noted that the above description of the number of bits and the representation of the quantity flag is for illustrative purposes only and is not limited in the present embodiment.

[0088] The computing device merges the page table entries that can be merged when managing the page table entries. The computing device may manage the page table entries when allocating new virtual pages to the process or when swapping virtual pages.

[0089] The process of merging page table entries of the computing device includes: scanning the page table entries in the page table, if there are 2 consecutive C If the physical page numbers in the two page table entries are also continuous, then the two consecutive C The physical page number in each page table entry is replaced by the consecutive 2 C The smallest physical page number in the page table entries; C The value of the quantity flag in the page table entry is determined to be C, where C is a positive integer greater than or equal to 0.

[0090] The process of merging page table entries is illustrated below with an example of FIG2. FIG2 is a schematic diagram of a merged page table entry provided by an embodiment of the present application, FIG2 includes a page table cache 201 and a page table 202, the page table includes multiple page table entries, wherein the virtual page numbers and physical page numbers of page table entries 2021 to 2024 are continuous, and the computing device modifies the physical page numbers of page table entries 2022 to 2024 in these four page table entries to the physical page number 4 in page table entry 2021, and the number flag bits in these four page table entries are all 3 bits, and the values ​​are all 010. _2 , to indicate that the number of page table entries involved in the merge is 4.

[0091] The above describes the process of merging page table entries. The following describes the process of generating entries in the page table cache based on the merged page table entries.

[0092] In an embodiment of the present application, an entry in the page table cache includes an entry tag, a physical page number, and a merge flag, wherein the merge flag is used to indicate whether the page table entry corresponding to the entry is a merged entry. In some embodiments, the merge flag has a value of 1, indicating that the page table entry corresponding to the entry is an unmerged entry; the merge flag has a value of 0, indicating that the page table entry corresponding to the entry is a merged entry, which is not limited in the embodiment of the present application.

[0093] The process of a computing device generating an entry in a page table cache based on a merged page table entry includes: determining a value of a merge flag based on a quantity flag in the merged page table entry; generating an entry tag based on a virtual page number and a quantity flag corresponding to the merged page table entry; and generating an entry in the page table cache based on the value of the merge flag, the generated entry tag, and the smallest physical page number among the multiple page table entries involved in the merge.

[0094] The process of generating an entry tag by a computing device includes: the computing device sets the value of the rightmost bit of the virtual page number corresponding to the page table entry participating in the merger to 1, and shifts the rightmost bit to the left by C-1 bits, and sets the values ​​of the 1st to C-1th bits from right to left in the virtual page number to 0, to obtain the transformed virtual page number, which is the entry tag, wherein C is the value of the quantity flag bit, and C is an integer greater than or equal to 0. It should be noted that the virtual page numbers corresponding to the multiple page table entries participating in the merger all correspond to the same entry tag after the above transformation, so the entry tag generated in the above manner can indicate multiple page table entries in the page table.

[0095] The following continues to use Figure 2 as an example to illustrate the process of generating entry tags. In Figure 2, the page table entries involved in the merge are page table entries 2021 to page table entries 2024. Taking page table entry 2024 as an example, the virtual page number in the page table entry 2024 is "11" = "1011 _2 ", the value of the quantity flag is 010 _2 =2, indicating that the number of page table entries involved in the merge is 4, and the virtual page numbers in the other three page table entries 2021-2023 are "8" = "1000 _2 ”, “9” = “1001 _2 ” and “10” = “1010 _2 The computing device sets the rightmost bit of the virtual page number in the page table entry 2024 to 1, and obtains "1011 _2 ", and then the "1011 _2 Shift the rightmost bit in "1011" to the left by 2-1=1 bit, and _2 " is set to 0, and the value of the rightmost bit in " is 1010 _2 ”, “1010_2 " is the entry tag corresponding to the page table entry. If the virtual page numbers corresponding to the other three page table entries are transformed in the same way, then "1001 _2 ” becomes “1010 _2 ”, “1010 _2 ” becomes “1010 _2 ”, “1011 _2 ” becomes “1010 _2 Obviously, the virtual page numbers corresponding to the various page table entries involved in the merger all correspond to the same entry label "1010 _2 ”=“A _16 ". The page table entry 2021 is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge. The computing device uses the physical page number "4" in the page table entry 2021 as the physical page number in the entry and determines the value of the merge flag in the entry to be 0; the computing device generates an entry 2011 in the page table cache based on the generated entry tag, the physical page number "4" and the merge flag "0".

[0096] In the above method, the entry tag generated by the computing device based on the virtual page number and quantity flag corresponding to the page table entries participating in the merge can indicate multiple page table entries in the page table, thereby increasing the physical memory capacity covered by the page cache, improving the hit rate of the page table cache, reducing the failure rate, and thereby reducing page table walks and reducing the delay and overhead of memory access.

[0097] It should be noted that the above process is described using the example of a computing device generating entries in a page table cache based on merged page table entries. For unmerged entries, the computing device can also generate entries in a page table cache based on unmerged page table entries. This process is the same as the above process, with the difference being that this process does not require transforming the virtual page numbers corresponding to the unmerged page table entries, while the above process requires transforming the virtual page numbers corresponding to the merged page table entries. The similarities will not be repeated here.

[0098] The following uses Figures 3 to 8 as examples to illustrate the process of merging page table entries and generating entries in the page table cache based on the merged page table entries. Figures 3 to 8 are schematic diagrams of a process of merging page table entries and generating entries in an embodiment of the present application. As shown in Figure 3, Figure 3 includes a page table 301 and a page table cache 302. The page table entry corresponding to the virtual address VA0 is 3011, and the quantity flag in the page table entry 3011 is 000. The computing device generates an entry 3021 in the page table cache 302 based on the virtual page number corresponding to the page table entry 3011 and the physical page number in the page table entry 3011. As shown in Figure 4, the page table entry corresponding to the virtual address VA1 is 3012, and the page table entry 3012 is continuous with the physical page number of the page table entry 3011. The computing device modifies the physical page number in 3012 to the physical page number PPN0 in 3011, and sets the quantity flag values ​​in 3011 and 3012 to 001. -2 , and modifies entry 3021 in the page table cache. As shown in Figure 5, the page table entry corresponding to virtual address VA2 is 3013. The computing device generates entry 3022 in the page table cache 302 based on the virtual page number and physical page number in the page table entry 3013. As shown in Figure 6, the computing device queries the page table entry 3014 corresponding to virtual address VA3 from page table 301, and the physical page number of page table entry 3014 is continuous with that of page table entry 3013. The computing device modifies the physical page number in 3014 to the physical page number PPN2 in 3013, and sets the value of the quantity flag in 3013 and 3014 to 001. -2 At this time, as shown in FIG7 , the physical page numbers of the page table entries 3011 to 3014 are all continuous. As shown in FIG8 , the computing device modifies the physical page numbers in 3013 and 3014 to the physical page number PPN0 in 3011, and sets the number flag bits in 3011 to 3014 to 010. -2 , and modify the entry 3021 in the page table cache 302 and delete the entry 3022 in the page table cache 302.

[0099] It should be noted that the above Figures 3 to 8 are illustrated by taking the example of a computing device merging two of the multiple page table entries involved in the merger into one and then into four into one. In some embodiments, the computing device merges the page table entries involved in the merger at one time to improve the efficiency of merging the page table entries. The embodiments of the present application do not limit this.

[0100] The page table entries merged based on the above method and the generated entries can be applied to data reading and writing scenarios. In the data reading and writing scenario, before executing the data reading and writing instruction, the computing device first extracts the virtual address to be converted from the data reading and writing instruction, then determines the physical address corresponding to the virtual address, and then performs the data reading and writing operation based on the determined physical address. The following is an introduction to the method for determining the physical address in the above data reading and writing scenario. In this method, the computing device generates an input tag based on the virtual page number in the virtual address to be converted, determines the entry that matches the input tag from the page table cache, and if the entry in the page table cache does not match the input tag, determines the page table entry that matches the input tag from the page table, and then determines the physical address corresponding to the virtual address. There are two ways to generate the input tag based on the virtual page number in the virtual address to be converted. The first way is to determine a partial string in the virtual page number in the virtual address to be converted as the input tag; the second way is to determine the virtual page number in the virtual address to be converted as the input tag. The processes for determining the physical address under these two input label generation methods are different. The following describes the processes for determining the physical address under the two input label generation methods.

[0101] The following describes an example of determining a partial string within a virtual page number within a virtual address to be converted as an input tag. FIG9 is a flowchart of a method for determining a physical address provided by an embodiment of the present application. The method is executed by the computing device shown in FIG1 . As shown in FIG9 , the method includes steps 901 to 907 .

[0102] 901. A computing device extracts a first number of characters at the head and a second number of characters at the tail of a virtual page number in a first virtual address to be converted, and composes the extracted characters into an input tag.

[0103] The virtual page number includes a first number of characters at the head, a second number of characters at the tail, and a string in the middle. The second number is related to the number of page table entries that an entry in the page table cache corresponds to at most. If an entry in the page table cache corresponds to at most N page table entries, and N=2 X , then the second number is greater than or equal to X, N is an integer greater than or equal to 1, and X is an integer greater than or equal to 0. The page table cache includes multiple entry sets, and the number of bits in the middle string is related to the number of entry sets in the page table cache. If the page table cache includes M entry sets, and M=2 Y , the number of digits of the middle character string is Y, M is an integer greater than or equal to 1, and Y is an integer greater than or equal to 0. The first number is equal to the number of digits of the virtual page number minus the second number and the number of digits of the middle character string.

[0104] The following uses FIG10 as an example to illustrate the above step 901. FIG10 is a schematic diagram of a method for determining a physical address provided by an embodiment of the present application. As shown in FIG10, the first virtual address VA includes X0 to X7, where Xi represents 4 bits (bit), that is, 4-bit binary numbers, namely Xi3, Xi2, Xi1 and Xi0. Therefore, the number of bits of the first virtual address is 32 bits, of which the number of bits of the virtual page number is 20 bits and the number of bits of the offset is 12 bits. The page table cache includes 64 (2 6 ) entry set, the index of the entry set is set00-set63, then the number of bits of the middle string is 6, and each entry corresponds to a maximum of 64 (2 6 ) page table entries, the second number is greater than or equal to 6. In Figure 10, the second number is 6, and the first number is 20-6-6=8. The computing device extracts the first 8 characters {X6X7} and the last 6 characters {X3X41X40} of the virtual page number in the first virtual address, and composes the extracted 14 characters into an input label {T13…T6T5T4T3T2T1T0}, and the middle character string is {X5X43X42}.

[0105] It should be noted that step 901 is an implementation method of using a partial character string in the virtual page number in the first virtual address as an input tag. In some embodiments, this process is implemented based on other methods, and the embodiments of the present application do not limit this.

[0106] 902. The computing device extracts the remaining character string in the virtual page number in the first virtual address, where the remaining character string refers to the character string excluding a first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address.

[0107] It should be noted that the execution order of the above-mentioned step 901 and step 902 is only exemplary. Step 902 can be executed first, and then step 901, or step 901 and step 902 can be executed at the same time. The embodiment of the present application does not limit the execution order of step 901 and step 902.

[0108] 903. The computing device determines a first entry set whose index matches the remaining string from multiple entry sets, the page table cache includes multiple entry sets, entries in the same entry set correspond to the same index, the first entry set includes multiple entries, each entry includes an entry tag, a physical page number and a merge flag, the merge flag is used to indicate whether the page table entry corresponding to the entry is a merge entry, and the page table entry corresponding to the entry comes from the page table in the memory.

[0109] The number of bits of the entry tag in the page table cache is equal to the number of bits of the input tag. The entry tag is derived from the same process as the above-mentioned process of generating the entry tag, except that in step 903, if the page table entry corresponding to the entry is an unmerged entry, the entry tag in the entry is the first number of characters at the head and the second number of characters at the tail of the virtual page number corresponding to the page table entry corresponding to the entry; if the page table entry corresponding to the entry is a merged entry, the computing device first transforms the virtual page number corresponding to the page table entry, and then extracts the first number of characters at the head and the second number of characters at the tail of the transformed virtual page number to obtain the entry tag.

[0110] The following uses FIG11 as an example to illustrate step 903. FIG11 is a flow chart of determining a first entry set from multiple entry sets provided by an embodiment of the present application. As shown in FIG11, the entry tag in the entry in the page table cache is derived from the 8 characters at the head and 6 characters at the tail of the virtual page number corresponding to the page table entry. The index of the entry set to which the entry belongs is the 6 characters in the middle of the page table entry (000100 _2 =04). The six characters in the middle of the first virtual address are "000100 _2 = 04, the computing device determines the first entry set with an index of 04 from the plurality of entry sets, and the first entry set is consistent with the string "000100 _2 ” matches.

[0111] 904. The computing device matches the input tag with multiple entries in the first entry set.

[0112] The computing device matching the input tag with multiple entries in the first entry set means matching the input tag with each entry in the first entry set until a first entry matching the input tag is determined or until the matching process between the input tag and all entries in the first entry set is completed. The computing device matching the input tag with any entry in the page table cache includes the following two situations.

[0113] Case 1: The merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, and the computing device compares the input tag with the entry tag in the entry.

[0114] Among them, the merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, which means that the entry corresponds to only one page table entry, and the virtual page number corresponding to the page table entry was not transformed when the entry tag in the entry was generated. At this time, the input tag is compared with the entry tag in the entry to determine whether the input tag matches the entry.

[0115] The second case: the merge flag in the entry indicates that the page table entry corresponding to the entry is a merge entry, then the first string in the entry tag in the entry is compared with the second string in the input tag, the first string is the previous target bit in the entry tag in the entry, the target bit is the previous bit of the first character with a value of 1 from right to left in the entry tag in the entry, and the second string is the previous target bit in the input tag.

[0116] Among them, the merge flag bit in the entry indicates that the page table entry corresponding to the entry is a merged entry, which means that the entry is formed by merging multiple page table entries, and when generating the entry label in the entry, the virtual page number corresponding to the page table entry is transformed. In addition, since the virtual page numbers corresponding to the multiple page table entries participating in the merge are continuous, the front target bits in the virtual page numbers of the multiple page table entries participating in the merge are the same. Therefore, the computing device uses the front target bit in the entry label as the first string and the front target bit in the input label as the second string, and then compares the first string with the second string, which can ensure that the input label and the entry are correctly matched when the page table entry corresponding to the entry is a merged entry, avoiding misjudgment of the matching result due to the merged page table entries.

[0117] The second case is described below using FIG2 as an example. In FIG2 , entry 2011 comes from four page table entries in page table 202: 2021-2024. The virtual page numbers of these four page table entries are “8” (“1000 _2 ”), “9”(“1001 _2 ”), “10”(“1010 _2 ”) and “11” (“1011 _2 ”), the entry label in entry 2011 corresponding to these four page table entries is “A _16 ”(“1010 _2 ”). When the input label is “1011 _2 ", if the computing device directly inputs the label "1011 _2 ” and the entry tag “1010 _2" When the comparison is performed, the entry 2011 does not match the input label, resulting in a misjudgment. At this time, the computing device needs to determine the first character string in the entry label and the second character string in the input label: the entry label in entry 2011 includes a total of 4 bits, of which the first character with a value of 1 from right to left in the entry label is the third bit, and the target bit is the second bit, so that the first character string in the entry label is the first 2 bits in the entry label, that is, "10", and the second character string in the input label is the first 2 bits in the input label, that is, "10". The computing device compares the first character string ("10") in the entry label with the second character string ("10") in the input label, and the entry matches the input label.

[0118] In the above method, when matching the input tag with the entry, the number of bits involved in the comparison in the input tag and the entry tag is determined based on the value of the merge flag in the entry. This can ensure that the input tag and the entry are correctly matched when the page table entry corresponding to the entry is a merged entry, avoiding misjudgment of the matching result due to the merged page table entry, thereby ensuring the accuracy of the match.

[0119] Continuing with Figure 10 as an example, step 904 is described. As shown in Figure 10, the computing device matches {T13…T6T5…Ti+1} in the input tag with {B13…B6B5…Bi+1} in the entry tag, where i is an integer whose value is determined by the value of the merge flag F in the entry. When F = 1, i = -1, meaning {T13…T6T5…T0} is matched with {B13…B6B5…B0}. When F = 0, the computing device starts at B0 and searches for the first bit that is 1, corresponding to the value of bit i.

[0120] It should be noted that the above steps 903 and 904 are described using the example that the first entry set includes multiple entries. In some embodiments, the first entry set is an empty set, that is, there are no entries in the first entry set. At this time, the input tag fails to match the multiple entries in the page table cache, and the computing device queries the page table in the memory to determine the physical address corresponding to the first virtual address, that is, the computing device does not execute step 904, but executes the following steps 905 to 906.

[0121] 905. If the input tag matches a first entry among multiple entries in the first entry set, and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merge entry, the computing device determines the physical address corresponding to the first virtual address based on the virtual page number, the first entry tag, and the physical page number in the first virtual address.

[0122] Among them, since the physical page number in the first entry is the smallest physical page number among the multiple page table entries participating in the merge, the computing device first determines the page table entry with the smallest corresponding virtual page number among the multiple entries participating in the merge based on the entry tag, and then determines the physical address corresponding to the first virtual address based on the number of pages between the virtual page number corresponding to the page table entry and the virtual page number in the first virtual address. This process includes the following steps 905A to 905D.

[0123] 905A. Based on the entry tag in the first entry, determine a first page table entry from the multiple page table entries corresponding to the first entry, where the first page table entry has the smallest virtual page number among the multiple page table entries corresponding to the first entry.

[0124] Among them, corresponding to the generation process of the entry label, the string at the virtual page number header of the first page table entry is the first string in the entry label of the first entry, the middle string is the string corresponding to the index of the entry set where the first entry is located, and the value of each bit on the tail string is 0.

[0125] 905B. Determine a first number of pages between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry based on the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry.

[0126] The first page number is a difference between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry.

[0127] The above step 905B can be expressed by the following formula (1): N = VPN - VPN0 (1)

[0128] In the above formula (1), N is the first page number, VPN is the virtual page number in the first virtual address, and VPN0 is the virtual page number corresponding to the first page table entry.

[0129] 905C. Determine a physical base address corresponding to the first virtual address based on the first page number, the capacity of the physical page, and the physical page number in the first entry.

[0130] The physical page number in the first entry is the physical page number in the first page table entry, that is, the smallest physical page number among the multiple page table entries corresponding to the first entry.

[0131] The above step 905C can be expressed by the following formula (2): PA′=PA Base+Page Size×N (2)

[0132] In the above formula (2), PA′ is the physical base address corresponding to the first virtual address, PA Base is the physical base address corresponding to the physical page number in the first entry, Page Size is the capacity of the physical page, and N is the first page number.

[0133] 905D. Determine the physical address corresponding to the first virtual address based on the physical base address and the offset in the first virtual address.

[0134] The above step 905D can be expressed by the following formula (3): PA = PA' + VA Offset (3)

[0135] In the above formula (3), PA is the physical address corresponding to the first virtual address, PA′ is the physical base address corresponding to the first virtual address, and VA Offset is the offset in the first virtual address.

[0136] The above steps 905A to 905D can be combined into the following formula (4): PA = PA Base + Page Size × (VPN - VPN0) + VA Offset (4)

[0137] In the above formula (4), PA is the physical address corresponding to the first virtual address, PA Base is the physical base address corresponding to the physical page number in the first entry, Page Size is the capacity of the physical page, VA Offset is the offset in the first virtual address, VPN is the virtual page number in the first virtual address, and VPN0 is the virtual page number corresponding to the first page table entry.

[0138] It should be noted that the above step 905 is explained by taking the input tag matching the first entry among multiple entries, and the merge flag in the first entry indicating that the first entry is a merged table entry as an example. In some embodiments, the input tag matches the second entry among multiple entries, and the merge flag in the second entry indicates that the page table entry corresponding to the second entry is an unmerged table entry. The computing device determines the physical address corresponding to the first virtual address based on the physical page number in the second entry. The process includes: determining the starting address of the physical page corresponding to the physical page number based on the physical page number in the second entry; and determining the physical address corresponding to the first virtual address based on the starting address of the physical page and the offset in the first virtual address.

[0139] The above step 905 describes the case where the input tag successfully matches the first entry among the multiple entries. The following steps 906 to 907 describe the case where the input tag fails to match the multiple entries.

[0140] 906. If the input tag fails to match multiple entries, the computing device queries the page table in the memory based on the virtual page number in the first virtual address, and determines a second page table entry that matches the virtual page number in the first virtual address from the page table, where the page table entry includes a physical page number and a quantity flag, where the quantity flag is used to indicate the number of page table entries participating in the merge.

[0141] Determining from the page table a second page table entry that matches the virtual page number in the first virtual address refers to determining from the page table a second page table entry whose corresponding virtual page number is the same as the virtual page number in the first virtual address.

[0142] 907. If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, the computing device determines the physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the second page table entry, where the third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

[0143] Among them, due to the participation of 2 C After the merger, the physical page numbers in the page table entries are the smallest physical page numbers in the page table entries participating in the merger. When the number flag of the second page table entry indicates that the number of page table entries participating in the merger is greater than 1, the physical page number in the second page table entry is the physical page number in the third page table entry. Therefore, the computing device first determines the second page number between the virtual page number in the first virtual address and the virtual page number corresponding to the third page table entry, and then determines the physical base address corresponding to the first virtual address based on the second page number, the capacity of the physical page and the physical page number in the third page table entry, and then determines the physical address corresponding to the first virtual address based on the physical base address and the offset in the first virtual address. This process is the same as steps 905B to 905D in the above step 905 and will not be repeated.

[0144] It should be noted that the above steps 906 to 907 are explained by taking the example that the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1. In some embodiments, the number flag of the second page table entry indicates that the number of page table entries participating in the merge is equal to 1, that is, the second page table entry is an unmerged entry. The computing device determines the physical address corresponding to the first virtual address based on the physical page number in the second page table entry. The process includes: determining the starting address of the physical page corresponding to the physical page number based on the physical page number in the second page table entry; determining the physical address corresponding to the first virtual address based on the starting address of the physical page and the offset in the first virtual address.

[0145] In the above method, one entry in the page table cache corresponds to at least one page table entry, which can increase the physical memory capacity covered by the entries in the page table cache, thereby improving the hit rate of the page table cache, reducing page table walks, and further reducing the latency and overhead of memory access; in addition, when matching the input tag with the entry, the number of bits involved in the comparison between the input tag and the entry tag is determined based on the value of the merge flag bit in the entry, which can ensure that the input tag and the entry are correctly matched when the entry corresponds to the merged table entry, avoiding misjudgment of the matching result due to the merged page table entry, thereby ensuring the accuracy of the match; further, a partial character string in the virtual page number in the first virtual address is used as the input tag, and the remaining character string is used as the index, so as to first lock the entry set corresponding to the virtual page number in the first virtual address, and then match the input tag with each entry in the entry set separately, without having to match the input tag with all entries in the page table cache, which can improve the matching efficiency, thereby improving the efficiency of determining the physical address and reducing latency.

[0146] The following describes an example of determining the virtual page number in the first virtual address as an input tag. FIG12 is a flowchart of a method for determining a physical address provided by an embodiment of the present application. The method is executed by the computing device described above. As shown in FIG12 , the method includes the following steps 1201 to 1205 .

[0147] 1201. The computing device determines a virtual page number in a first virtual address to be converted as an input tag.

[0148] The computing device determines the virtual page number in the first virtual address as the input tag, that is, the character string corresponding to the virtual page number in the first virtual address is used as the input tag. For example, if the virtual page number is the first 20 bits of the first virtual address, the computing device uses the character string corresponding to the first 20 bits of the first virtual address as the input tag.

[0149] 1202. The computing device matches the input tag with multiple entries in the page table cache, each entry including an entry tag, a physical page number, and a merge flag, the merge flag being used to indicate whether the page table entry corresponding to the entry is a merge entry, and the page table entry corresponding to the entry is from the page table in the memory.

[0150] The computing device matching the input tag with multiple entries in the page table cache refers to matching the input tag with each entry in the page table cache until the first entry matching the input tag is determined or until the matching process between the input tag and all entries is completed. The process of the computing device matching the input tag with any entry in the page table cache is similar to step 904 above and is not further described.

[0151] 1203. If the input tag matches a first entry among multiple entries, and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merge entry, the computing device determines the physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the entry tag in the first entry tag, and the physical page number.

[0152] Among them, since the physical page number in the first entry is the smallest physical page number among the multiple page table entries participating in the merge, the computing device first determines the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge based on the entry label, and then determines the physical address corresponding to the first virtual address based on the number of pages between the virtual page number corresponding to the page table entry and the virtual page number in the first virtual address. This process is the same as the above step 905. The difference is that in this step 1303, the string at the head of the virtual page number corresponding to the first page table entry is the first string in the entry label in the first entry, and the value of each bit on the tail string is 0, and does not include the string corresponding to the index of the first entry set. The similarities are not repeated here.

[0153] 1204. If the input tag fails to match multiple entries, the computing device queries the page table in the memory based on the virtual page number in the first virtual address, and determines a second page table entry that matches the virtual page number in the first virtual address from the page table, where the page table entry includes a physical page number and a quantity flag, where the quantity flag is used to indicate the number of page table entries participating in the merge.

[0154] 1205. If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, the computing device determines the physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the third page table entry, where the third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

[0155] Steps 1204 to 1205 are similar to the above-mentioned steps 906 and 907 and are not described in detail.

[0156] In the above method, one entry in the page table cache corresponds to at least one page table entry, which can increase the physical memory capacity covered by the entries in the page table cache, thereby improving the hit rate of the page table cache, reducing page table walks, and further reducing the latency and overhead of memory access; further, when matching the input tag with the entry, based on the value of the merge flag in the entry, the number of bits involved in the comparison in the input tag and the entry tag is determined, which can ensure that the input tag and the entry are correctly matched when the entry corresponds to the merged table entry, avoiding misjudgment of the matching result due to the merged page table entry, thereby ensuring the accuracy of the matching result.

[0157] The above uses the process shown in Figures 9 and 12 as an example to introduce the process of a method for determining a physical address provided by an embodiment of the present application. In some embodiments, the page table entry in the page table will change. For example, the physical page number in the page table entry is modified, or the state of the page table entry changes (the virtual page corresponding to the page table entry is swapped in or out), resulting in the previously merged page table entry not being able to accurately indicate the mapping relationship between the virtual page number and the physical page number. The computing device refreshes the page table and the page table cache according to the changed page table entry. If the changed page table entry is a page table entry involved in the merge, the computing device deletes the entry corresponding to the page table entry, or sets the entry corresponding to the page table entry to invalid, and re-merges the page table entries in the page table.

[0158] Wherein, the process of refreshing the page table cache based on the changed page table entry by the computing device includes: if any page table entry in the page table is changed, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is a merged entry, then deleting the entry corresponding to the changed page table entry from the page table cache; if any page table entry in the page table is changed, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is an unmerged entry, then updating the entry corresponding to the changed page table entry based on the virtual page number, physical page number, and quantity flag corresponding to the changed page table entry. In some embodiments, when the changed page table entry is a merged entry, the computing device sets the entry corresponding to the changed page table entry in the page table cache to invalid.

[0159] The process of refreshing the page table based on the changed page table entries of the computing device includes: scanning the page table entries that can be merged before the change, and if there are 2 C The physical page numbers of the page table entries are continuous. C The physical page number in each page table entry is replaced by the consecutive 2 C The smallest physical page number in the page table entries; C The value of the quantity flag in each page table entry is determined to be C, where C is a positive integer greater than or equal to 0. For example, the page table entries involved in the merge are page table entries 2021-2024. If the physical page number in page table entry 2024 changes, causing page table entry 2024 to no longer be continuous with the physical page numbers in page table entries 2021-2023, the computing device will change the value C of the quantity flag in page table entries 2021-2022 from 0 to 10. _2 Refresh to 001 _2 , that is, the two page table entries are merged, and the value C of the number flag of the page table entry 2023-2024 is changed from 010_2 Refresh to 000 _2 , the physical page number in the page table entry 2023 is restored to 6, and the physical page number in the page table entry 2024 is replaced with the changed physical page number.

[0160] In the above method, after the page table entry is changed, the page table and the page table cache are refreshed based on the changed page table entry to ensure the consistency of the entry in the page table cache with the page table entry in the page table, thereby ensuring the accuracy of the determined physical address.

[0161] FIG13 is a schematic structural diagram of a physical address determination device provided in an embodiment of the present application. The device includes an input tag generation module 1301 , a matching module 1302 , and a physical address determination module 1303 .

[0162] The input tag generation module 1301 is configured to generate an input tag based on a virtual page number in a first virtual address to be converted;

[0163] The matching module 1302 is used to match the input tag with multiple entries in the page table cache, each entry including an entry tag, a physical page number, and a merge flag, the merge flag being used to indicate whether the page table entry corresponding to the entry is a merge entry;

[0164] The physical address determination module 1303 is used to determine the physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the entry tag in the first entry, and the physical page number if the input tag successfully matches the first entry among multiple entries and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merged entry.

[0165] Optionally, the input tag generating module 1301 is used to:

[0166] The virtual page number in the first virtual address is determined as an input tag.

[0167] Optionally, the input tag generating module 1301 includes:

[0168] The input label determining unit is configured to determine a portion of a character string in a virtual page number in a first virtual address as an input label.

[0169] Optionally, the input tag determination unit is configured to:

[0170] A first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address are extracted, and the extracted characters are combined into an input tag.

[0171] Optionally, the page table cache includes multiple entry sets, entries in the same entry set correspond to the same index, and the apparatus further includes:

[0172] a string extraction module, configured to extract a remaining string from the virtual page number in the first virtual address, wherein the remaining string refers to a string excluding a first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address;

[0173] The first item set determining module is configured to determine a first item set whose index matches the remaining character string from the plurality of item sets, wherein the first item set includes a plurality of items.

[0174] Optionally, the matching module 1302 is configured to:

[0175] If the merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, the input tag is compared with the entry tag in the entry;

[0176] If the merge flag in the entry indicates that the page table entry corresponding to the entry is a merge entry, the first character string in the entry tag in the entry is compared with the second character string in the input tag, where the first character string is the previous target bit in the entry tag in the entry, the target bit is the bit before the first character with a value of 1 from right to left in the entry tag in the entry, and the second character string is the previous target bit in the input tag.

[0177] Optionally, the physical address determination module 1303 is configured to:

[0178] determining, based on the entry tag in the first entry, from the plurality of page table entries corresponding to the first entry, a first page table entry, the first page table entry corresponding to the smallest virtual page number among the plurality of page table entries corresponding to the first entry;

[0179] Determining a first number of pages between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry based on the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry;

[0180] Determining a physical base address corresponding to the first virtual address based on the first page number, the capacity of the physical page, and the physical page number in the first entry;

[0181] A physical address corresponding to the first virtual address is determined based on the physical base address and the offset in the first virtual address.

[0182] Optionally, the multiple page table entries corresponding to the first entry are from a page table in a memory, and the page table entries in the page table include a physical page number and a quantity flag, where the quantity flag is used to indicate the number of page table entries corresponding to the first entry.

[0183] Optionally, the device further comprises:

[0184] An entry tag generating module, configured to generate an entry tag in a first entry based on a virtual page number and a quantity flag of any page table entry in the plurality of page table entries;

[0185] The physical page number determining module is configured to determine the smallest physical page number among the plurality of page table entries as the physical page number in the first entry.

[0186] Optionally, the physical address determination module 1303 is further configured to:

[0187] If the input tag fails to match multiple entries, query the page table based on the virtual page number in the first virtual address;

[0188] Determining from the page table a second page table entry that matches the virtual page number in the first virtual address;

[0189] If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the third page table entry. The third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

[0190] Optionally, the device further comprises:

[0191] An entry deletion module is configured to delete the entry corresponding to the changed page table entry from the page table cache if any page table entry in the page table is changed and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is a merge entry;

[0192] An entry update module is used to update the entry corresponding to the changed page table entry based on the virtual page number, physical page number and quantity flag corresponding to the changed page table entry if any page table entry in the page table is changed and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is an unmerged entry.

[0193] The input tag generation module 1301, matching module 1302, and physical address determination module 1303 can all be implemented via software or hardware. By way of example, the implementation of the input tag generation module 1301 will be described below using the input tag generation module 1301 as an example. Similarly, the implementation of the matching module 1302 and physical address determination module 1303 can refer to the implementation of the input tag generation module 1301.

[0194] As an example of a software functional unit, the input label generation module 1301 may include code running on a computing instance. The computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Furthermore, the computing instance may be one or more. For example, the input label generation module 1301 may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the code may be distributed in the same region or in different regions. Furthermore, the multiple hosts / virtual machines / containers used to run the code may be distributed in the same availability zone (AZ) or in different AZs, each AZ including one data center or multiple geographically close data centers. Typically, a region may include multiple AZs.

[0195] Similarly, multiple hosts / virtual machines / containers running the code can be distributed within the same virtual private cloud (VPC) or across multiple VPCs. Typically, a VPC is set up within a region. Cross-region communication between two VPCs within the same region, or between VPCs in different regions, requires a communication gateway within each VPC to interconnect the VPCs.

[0196] As an example of a hardware functional unit, input tag generation module 1301 may include at least one computing device, such as a server. Alternatively, input tag generation module 1301 may be implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0197] The multiple computing devices included in input label generation module 1301 can be distributed in the same region or in different regions. The multiple computing devices included in input label generation module 1301 can be distributed in the same AZ or in different AZs. Similarly, the multiple computing devices included in matching module 1302 and physical address determination module 1303 can be distributed in the same VPC or in multiple VPCs. These multiple computing devices can be any combination of servers, ASICs, PLDs, CPLDs, FPGAs, GALs, and other computing devices.

[0198] It should be noted that, in other embodiments, the steps that the above modules are responsible for implementing can be specified as needed, and the above modules can respectively implement different steps in the above physical address determination method to achieve all the functions of the above device. That is, the physical address determination device provided in the above embodiment only uses the division of the above functional modules as an example to illustrate the implementation of the physical address determination method. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment and the corresponding method embodiment belong to the same concept. The specific implementation process is detailed in the method embodiment and will not be repeated here.

[0199] The present application provides a computer program product comprising instructions, which may be software or a program product comprising instructions that can be run on a computing device or stored in any available medium. When the computer program product is run on at least one computing device, the at least one computing device performs the method for determining a physical address as provided in the above embodiments.

[0200] The present application provides a computer-readable storage medium, which can be any available medium capable of being stored by a computing device or a data storage device such as a data center that includes one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive). The computer-readable storage medium includes instructions that, when executed by a computing device cluster, cause the computing device cluster to execute the physical address determination method provided in the above-described embodiments.

[0201] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, storage, display, etc.), and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data must comply with the relevant laws, regulations, and standards of the relevant countries and regions. For example, the page tables involved in this application were obtained with full authorization.

[0202] Those skilled in the art will appreciate that the various method steps and units described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0203] Those skilled in the art will clearly understand that, for the sake of convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0204] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or can be electrical, mechanical or other forms of connection.

[0205] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0206] In addition, each unit in each embodiment of the present application may be integrated into a processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The above-mentioned integrated units may be implemented in the form of hardware or software units.

[0207] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computing device (which can be a personal computer, a server, or a computing device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0208] In this application, the terms "first", "second", etc. are used to distinguish between identical or similar items that have substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is there a limitation on quantity and execution order. It should also be understood that although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the various examples, a first page table entry may be referred to as a second page table entry, and similarly, a second page table entry may be referred to as a first page table entry. Both the first page table entry and the second page table entry may be page table entries, and in some cases, may be separate and different page table entries.

[0209] As used herein, the term "at least one" means one or more, and the term "plurality" means two or more. For example, a plurality of page table entries refers to two or more page table entries. The terms "system" and "network" are often used interchangeably herein.

[0210] It should also be understood that the term "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined that..." or "if [stated condition or event] is detected" may be interpreted to mean "upon determining that..." or "in response to determining that..." or "upon detecting [stated condition or event]" or "in response to detecting [stated condition or event]," depending on the context.

[0211] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

[0212] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer program instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.

[0213] The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired or wireless method. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, or a magnetic tape), an optical medium (e.g., a digital video disc (DVD), or a semiconductor medium (e.g., a solid-state drive)), etc.

[0214] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or may be accomplished by a program to instruct the relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0215] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for determining a physical address, characterized in that: Applied to a computing device, the method comprises: generating an input tag based on a virtual page number in a first virtual address to be converted; Matching the input tag with multiple entries in a page table cache, each of the entries comprising an entry tag, a physical page number, and a merge flag, wherein the merge flag is used to indicate whether the page table entry corresponding to the entry is a merge entry; If the input tag successfully matches the first entry among the multiple entries, and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merged entry, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the entry tag in the first entry, and the physical page number.

2. The method according to claim 1, characterized in that The step of generating an input tag based on a virtual page number in a first virtual address to be converted comprises: A virtual page number in the first virtual address is determined as the input tag.

3. The method according to claim 1, characterized in that The step of generating an input tag based on a virtual page number in a first virtual address to be converted comprises: A partial character string in the virtual page number in the first virtual address is determined as the input tag.

4. The method according to claim 3, characterized in that The step of determining a part of the character string in the virtual page number in the first virtual address as the input tag comprises: A first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address are extracted, and the extracted multiple characters are used to form the input tag.

5. The method according to claim 4, characterized in that The page table cache includes a plurality of entry sets, entries in the same entry set correspond to the same index, and the method further includes: Extracting the remaining character string in the virtual page number in the first virtual address, wherein the remaining character string refers to the character string in the virtual page number in the first virtual address excluding the first number of characters in the head and the second number of characters in the tail; A first entry set having an index matching the remaining string is determined from the plurality of entry sets, the first entry set including the plurality of entries.

6. The method according to any one of claims 1 to 5, characterized in that The matching the input tag with a plurality of entries in a page table cache comprises: If the merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, comparing the input tag with the entry tag in the entry; If the merge flag in the entry indicates that the page table entry corresponding to the entry is a merge entry, the first character string in the entry tag in the entry is compared with the second character string in the input tag, the first character string is the previous target bit in the entry tag in the entry, the target bit is the previous bit of the first character with a value of 1 from right to left in the entry tag in the entry, and the second character string is the previous target bit in the input tag.

7. The method according to claim 1, characterized in that If the input tag successfully matches a first entry among the multiple entries, and a merge flag bit of the first entry indicates that the first entry is a merge entry, determining a physical address corresponding to the first virtual address based on a virtual page number in the first virtual address, an entry tag in the first entry, and a physical page number, including: Based on the entry tag in the first entry, determine a first page table entry from the multiple page table entries corresponding to the first entry, the first page table entry having a smallest virtual page number among the multiple page table entries corresponding to the first entry; Determine a first number of pages between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry based on the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry; Determine a physical base address corresponding to the first virtual address based on the first number of pages, the capacity of the physical page, and the physical page number in the first entry; A physical address corresponding to the first virtual address is determined based on the physical base address and the offset in the first virtual address.

8. The method according to claim 1, characterized in that The multiple page table entries corresponding to the first entry are derived from a page table in a memory, and the page table entries in the page table include a physical page number and a quantity flag, and the quantity flag is used to indicate the quantity of the page table entries corresponding to the first entry.

9. The method according to claim 8, characterized in that The method further comprises: generating an entry tag in the first entry based on a virtual page number and a quantity flag bit corresponding to any page table entry in the plurality of page table entries; The smallest physical page number among the plurality of page table entries is determined as the physical page number in the first entry.

10. The method according to claim 8, characterized in that The method further comprises: If the input tag fails to match the plurality of entries, querying the page table based on the virtual page number in the first virtual address; Determining from the page table a second page table entry that matches the virtual page number in the first virtual address; If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the third page table entry, and the third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

11. The method according to claim 8, characterized in that The method further comprises: If any page table entry in the page table is changed, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is a merged entry, deleting the entry corresponding to the changed page table entry from the page table cache; If any page table entry in the page table changes, and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is an unmerged entry, then based on the virtual page number, physical page number and quantity flag corresponding to the changed page table entry, the entry corresponding to the changed page table entry is updated.

12. A device for determining a physical address, characterized in that: The device comprises: An input tag generation module, used to generate an input tag based on a virtual page number in a first virtual address to be converted; A matching module, used for matching the input tag with a plurality of entries in a page table cache, each of the entries comprising an entry tag, a physical page number and a merge flag, the merge flag being used for indicating whether the page table entry corresponding to the entry is a merge entry; A physical address determination module is used to determine the physical address corresponding to the first virtual address based on the virtual page number in the first virtual address, the entry tag in the first entry and the physical page number if the input tag successfully matches the first entry among the multiple entries and the merge flag in the first entry indicates that the page table entry corresponding to the first entry is a merged entry.

13. The device according to claim 12, characterized in that The input tag generation module is used to: A virtual page number in the first virtual address is determined as the input tag.

14. The device according to claim 12, characterized in that The input tag generation module includes: The input label determination unit is used to determine a part of the character string in the virtual page number in the first virtual address as the input label.

15. The device according to claim 14, characterized in that The input tag determination unit is used for: A first number of characters at the head and a second number of characters at the tail of the virtual page number in the first virtual address are extracted, and the extracted multiple characters are used to form the input tag.

16. The device according to claim 15, characterized in that The page table cache includes a plurality of entry sets, entries in the same entry set correspond to the same index, and the device further includes: A string extraction module, used to extract the remaining string in the virtual page number in the first virtual address, wherein the remaining string refers to the characters in the virtual page number in the first virtual address except the first number of characters in the head and the second number of characters in the tail string; The first entry set determining module is configured to determine, from the plurality of entry sets, a first entry set whose index matches the remaining character string, wherein the first entry set includes the plurality of entries.

17. The device according to any one of claims 12 to 16, characterized in that The matching module is used for: If the merge flag in the entry indicates that the page table entry corresponding to the entry is an unmerged entry, comparing the input tag with the entry tag in the entry; If the merge flag in the entry indicates that the page table entry corresponding to the entry is a merge entry, the first character string in the entry tag in the entry is compared with the second character string in the input tag, the first character string is the previous target bit in the entry tag in the entry, the target bit is the previous bit of the first character with a value of 1 from right to left in the entry tag in the entry, and the second character string is the previous target bit in the input tag.

18. The device according to claim 12, characterized in that The physical address determination module is used for: Based on the entry tag in the first entry, determine a first page table entry from the multiple page table entries corresponding to the first entry, the first page table entry having a smallest virtual page number among the multiple page table entries corresponding to the first entry; Determine a first number of pages between the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry based on the virtual page number in the first virtual address and the virtual page number corresponding to the first page table entry; Determine a physical base address corresponding to the first virtual address based on the first number of pages, the capacity of the physical page, and the physical page number in the first entry; A physical address corresponding to the first virtual address is determined based on the physical base address and the offset in the first virtual address.

19. The device according to claim 12, characterized in that The multiple page table entries corresponding to the first entry are derived from a page table in a memory, and the page table entries in the page table include a virtual page number, a physical page number, and a quantity flag, and the quantity flag is used to indicate the number of page table entries corresponding to the first entry.

20. The device according to claim 19, characterized in that The device also includes: An entry tag generating module, configured to generate an entry tag in the first entry based on a virtual page number and a quantity flag bit of any page table entry in the plurality of page table entries; The physical page number determination module is used to determine the smallest physical page number in the plurality of page table entries as the physical page number in the first entry.

21. The device according to claim 19, characterized in that The physical address determination module is also used for: If the input tag fails to match the plurality of entries, querying the page table based on the virtual page number in the first virtual address; Determining from the page table a second page table entry that matches the virtual page number in the first virtual address; If the number flag of the second page table entry indicates that the number of page table entries participating in the merge is greater than 1, then the physical address corresponding to the first virtual address is determined based on the virtual page number in the first virtual address, the virtual page number corresponding to the third page table entry, and the physical page number in the third page table entry, and the third page table entry is the page table entry with the smallest corresponding virtual page number among the multiple page table entries participating in the merge.

22. The device according to claim 19, characterized in that The device also includes: An entry deletion module, configured to delete the entry corresponding to the changed page table entry from the page table cache if any page table entry in the page table is changed and a merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is a merged entry; An entry update module is used to update the entry corresponding to the changed page table entry based on the virtual page number, physical page number and quantity flag corresponding to the changed page table entry if any page table entry in the page table is changed and the merge flag in the entry corresponding to the changed page table entry indicates that the changed page table entry is an unmerged entry.

23. A computing device, characterized in that The computing device includes a processor and a memory; The processor is configured to execute the instructions stored in the memory so that the computing device performs the steps of claim 1 to claim 11. A method for determining a physical address as described in any one of the above.

24. A computer program product comprising instructions, characterized in that When the instruction is executed by a computing device, the computing device is caused to perform the method for determining a physical address according to any one of claims 1 to 11.

25. A computer-readable storage medium, characterized in that: The method comprises computer program instructions. When the computer program instructions are executed by a computing device, the computing device performs the method for determining a physical address according to any one of claims 1 to 11.

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