Memory data migration method, related apparatus and computer device

By using different statistical models for different memory media to identify the frequency of page access, the problem of not being able to identify memory page popularity in a timely and accurate manner in existing technologies has been solved, thereby improving the system's data processing speed and storage space utilization.

WO2024260350A1PCT designated stage expired Publication Date: 2024-12-26HUAWEI TECH CO LTD

Patent Information

Application Number
PCT/CN2024/099933
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-01
Filing Date
2024-06-18
Publication Date
2024-12-26

AI Technical Summary

Technical Problem

Existing technologies cannot accurately and promptly identify the access frequency of memory pages, leading to improper allocation of memory resources and affecting system I/O performance and data processing speed.

Method used

The frequency of page access is identified by using statistical modes of different types of memory media (such as hot page statistical mode and cold page statistical mode). By using methods such as hot page window, saturation counter and information entropy processing, storage space and bandwidth consumption are reduced, and timely and accurate page identification is achieved.

Benefits of technology

It improved the system's data processing speed, reduced data processing latency, and enhanced storage space utilization and data migration performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the field of computers, and discloses a memory data migration method, a related apparatus, and a computer device. The method comprises: according to a statistical mode associated with the type of a memory medium accessed by an access request, counting access results of a page, so as to determine the access popularity of the page according to the access results of the page; according to the access popularity of the page, triggering memory data migration between at least two different types of memory media. Thus, the page access frequency is accurately counted in a timely manner, consumption of storage space and bandwidth is reduced by means of reducing the data volume of the access results of the page, and the utilization rate and data migration performance of the storage space are improved. Thus, the data processing speed of the system is improved, and the data processing time delay is reduced.
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Description

Memory data migration method, related device and computer equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on June 20, 2023, with application number 202310733172.9 and application name “A method for identifying hot and cold pages”. This application also claims priority to the Chinese patent application filed with the State Intellectual Property Office on September 1, 2023, with application number 202311133455.6 and application name “Memory data migration method, related device and computer equipment”. All of these contents are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computers, and in particular to a memory data migration method, related devices, and computer equipment. Background Art

[0003] Currently, data migration is performed based on memory access popularity, that is, it is hoped that memories with fast access speeds will store frequently accessed data, while memories with slow access speeds will store infrequently accessed data. For example, memory data migration is triggered based on the access popularity of a page. However, it is impossible to accurately and timely identify whether a page is frequently accessed. As a result, memories with fast access speeds may store infrequently accessed data, or memories with slow access speeds may store frequently accessed data, affecting the system's input / output (I / O) performance, as well as the system's data processing speed and latency.

[0004] Summary of the Invention

[0005] The present application provides a memory data migration method, related devices and computer equipment, thereby improving the data processing speed of the system and reducing the data processing delay.

[0006] In a first aspect, a memory data migration method is provided, which is executed by a controller in a computer device, and includes: counting page access results according to a statistical pattern associated with the type of memory medium accessed by an access request, so as to determine the access popularity of the page according to the page access results, and triggering memory data migration between at least two different types of memory media according to the access popularity of the page. The access request is used to instruct the application running on the processor in the computer device to operate on the memory medium. The statistical pattern includes at least one of a cold page statistical pattern and a hot page statistical pattern. For example, the page access results are counted according to the cold page statistical pattern associated with the type of memory medium accessed by the access request, or the page access results are counted according to the hot page statistical pattern associated with the type of memory medium accessed by the access request.

[0007] Compared with determining the memory access heat by counting the access frequency of the page. Since the amount of data on the access frequency of the page is large, the required storage space and bandwidth consumption are large. Moreover, the processor in the computer device also analyzes the access frequency of the page to determine the access heat of the page, resulting in the consumption of more computing resources. Alternatively, compared with periodically scanning the access bit (Access Bit) in the Page Table Entry (PTE), the access heat of the page is determined. Since only whether the page is accessed can be determined based on the access bit, it is impossible to timely and accurately identify whether the page is a frequently accessed page. Therefore, it is impossible to timely and accurately identify whether the page is a hot page or a cold page.

[0008] The solution provided by this application uses different statistical methods to calculate page access frequency for different types of memory media. For example, different statistical methods are used for hot pages and cold pages to calculate page access frequency, that is, hot pages are counted based on the hot page statistical model, and cold pages are counted based on the cold page statistical model. This allows for timely and accurate statistics on page access frequency, reduces the amount of data generated by page access results, reduces storage space and bandwidth consumption, and improves storage space utilization and data migration performance. This improves the system's data processing speed and reduces data processing latency.

[0009] In one possible implementation, a hot page statistics mode counts page access results according to a statistics mode associated with the type of memory medium accessed by an access request, including: updating a hot page window according to the address indicated by the access request, and the hot page window is used to record frequently accessed pages based on the page access order.

[0010] In another possible implementation, the hot page window is used to indicate that pages in the hot page window are replaced based on a page access sequence, so as to record frequently accessed pages.

[0011] Therefore, frequently accessed pages are identified based on the hot page statistical pattern, ensuring timely and accurate statistics of hot pages, reducing the storage space occupied by the access results of hot pages, reducing bandwidth consumption, and improving storage space utilization and data migration performance.

[0012] In another possible implementation, a hot page statistics mode counts page access results according to a statistics mode associated with the type of memory medium accessed by an access request, including: updating a saturation counter of a page associated with the address indicated by the access request, the saturation counter being used to count the access frequency of the page.

[0013] In this way, the access frequency of pages is counted based on the saturation counter. Only the number of times the saturation counter records needs to be counted, which reduces the storage space occupied by the access results of hot pages, reduces bandwidth consumption, and improves storage space utilization and data migration performance.

[0014] In another possible implementation, the method further includes: when the saturation counter overflows, determining that the page is a hot page and feeding back an identification that the page is a hot page; when the saturation counter does not overflow, determining that the page is a cold page and feeding back an identification that the page is a cold page.

[0015] By feeding back the identifiers of hot and cold pages, the amount of feedback data can be reduced, bandwidth consumption can be lowered, transmission efficiency can be improved, and data migration performance can be enhanced. This avoids the processor analyzing page access frequency to determine page popularity, which consumes more computing resources.

[0016] In another possible implementation, a cold page statistics mode counts page access results according to a statistics mode associated with the type of memory medium accessed by an access request, including: updating an indication bit of a page associated with the address indicated by the access request, the indication bit of the page being used to indicate that the page is accessed.

[0017] Therefore, based on the cold page statistical pattern, pages that are not frequently accessed are identified to ensure timely and accurate statistics of cold pages, reduce the storage space occupied by the access results of cold pages, reduce bandwidth consumption, and improve storage space utilization and data migration performance.

[0018] In another possible implementation, the method further includes: performing information entropy processing on the indicator bits of the multiple pages according to the spatial local features of the multiple pages accessed by the processor to obtain processed data, the processed data being used to indicate the indicator bits of the multiple pages; and storing the processed data.

[0019] Thus, information entropy processing is performed on the indicator bits of multiple pages, further reducing the data volume of the indicator bits of multiple pages, reducing the storage space occupied by the access results of cold pages, and reducing bandwidth consumption, thereby improving the utilization of storage space and data migration performance.

[0020] In another possible implementation, indicator bits of multiple pages are processed based on spatial local characteristics of multiple pages accessed by a processor, including: processing address indexes of multiple pages and indicator bits of multiple pages based on a storage efficiency target to obtain processed data, and the storage efficiency target is used to indicate the utilization rate of storing valid data in a limited storage space.

[0021] In another possible implementation, the method further includes: determining the type of memory medium accessed by the access request according to an address included in the access request.

[0022] In another possible implementation, the page access results are stored in a storage medium of a computer device. This allows a processor in the computer device to quickly obtain the page access results, and triggers memory data migration between at least two different types of memory media based on the page access popularity determined by the page access results.

[0023] In another possible implementation, the method further includes: compressing the page access results to obtain compressed data; and feeding back the compressed data. This further reduces bandwidth consumption and improves transmission efficiency, preventing out-of-band communication from becoming a bottleneck and improving hot and cold migration performance.

[0024] In a second aspect, a memory data migration device is provided, comprising modules for executing the memory data migration method of the first aspect or any possible design of the first aspect. For example, the memory data migration device comprises a communication module, a statistics module, and a migration module.

[0025] A communication module is used to obtain access requests, where the access requests are used to instruct an application program running on a processor in a computer device to operate on a memory medium; a statistical module is used to count page access results based on a statistical pattern associated with the type of memory medium accessed by the access request, where the page access results are used to determine the page access popularity, where the statistical pattern includes at least one of a cold page statistical pattern and a hot page statistical pattern; and a migration module is used to trigger memory data migration between at least two different types of memory media based on the access results.

[0026] In one possible implementation, in a hot page statistics mode, when a statistics module counts page access results according to a statistics mode associated with the type of memory medium accessed by an access request, it is specifically used to: update a hot page window according to the address indicated by the access request, and the hot page window is used to record frequently accessed pages based on the page access order.

[0027] In another possible implementation, the hot page window is used to indicate that pages in the hot page window are replaced based on a page access sequence, so as to record frequently accessed pages.

[0028] In another possible implementation, in the hot page statistics mode, when the statistics module counts the access results of the page according to the statistics mode associated with the type of memory medium accessed by the access request, it is specifically used to: update the saturation counter of the page associated with the address indicated by the access request, and the saturation counter is used to count the access frequency of the page.

[0029] In another possible implementation, the communication module is further configured to: when the saturation counter overflows, feedback an identifier that the page is a hot page; when the saturation counter does not overflow, feedback an identifier that the page is a cold page.

[0030] In another possible implementation, in the cold page statistics mode, when the statistics module counts the access results of the page according to the statistics mode associated with the type of memory medium accessed by the access request, it is specifically used to: update the indication bit of the page associated with the address indicated by the access request, and the indication bit of the page is used to indicate that the page is accessed.

[0031] In another possible implementation, the statistical module is also used to perform information entropy processing on the indicator bits of multiple pages based on the spatial local characteristics of the multiple pages accessed by the processor to obtain processed data, and the processed data is used to indicate the indicator bits of multiple pages; and the processed data is stored.

[0032] In another possible implementation, when the statistical module processes the indicator bits of multiple pages based on the spatial local characteristics of multiple pages accessed by the processor, it is specifically used to: process the address indexes of multiple pages and the indicator bits of multiple pages according to a storage efficiency target to obtain processed data, and the storage efficiency target is used to indicate the utilization rate of storing valid data in a limited storage space.

[0033] In another possible implementation, the statistical module is further configured to determine the type of memory medium accessed by the access request based on an address included in the access request.

[0034] In another possible implementation, the page access result is stored in a storage medium of the computer device.

[0035] In another possible implementation, the migration module also compresses page access results to obtain compressed data and returns the compressed data. This further reduces bandwidth consumption and improves transmission efficiency, preventing out-of-band communication from becoming a bottleneck and enhancing hot and cold migration performance.

[0036] In a third aspect, a memory is provided, which includes a storage medium and a controller, the storage medium being used to store a set of computer instructions; when the controller executes the set of computer instructions, the operating steps of the method in the first aspect or any possible implementation of the first aspect are executed to realize the identification of the access popularity of the page in the memory.

[0037] In a fourth aspect, a controller is provided, which is used to execute the operating steps of the method in the first aspect or any possible implementation of the first aspect to identify the access popularity of pages in the memory.

[0038] In a fifth aspect, a processor is provided, which includes at least two different types of associated memory media, and the processor is used to execute the operating steps of the method in the first aspect or any possible implementation of the first aspect to identify the access heat of pages in the memory.

[0039] In a sixth aspect, a computer device is provided, which includes a memory, multiple different types of memory media and a processor, wherein the memory is used to store a set of computer instructions; when the processor executes the set of computer instructions, the processor is used to execute the operating steps of the method in the first aspect or any possible implementation of the first aspect to identify the access popularity of pages in the memory.

[0040] In the seventh aspect, a computer-readable storage medium is provided, comprising: computer software instructions; when the computer software instructions are executed in a processor, the processor executes the operating steps of the method described in the first aspect or any possible implementation of the first aspect.

[0041] In an eighth aspect, a computer program product is provided. When the computer program product is run on a computer, the computer is caused to execute the operating steps of the method described in the first aspect or any possible implementation of the first aspect.

[0042] The technical effects brought about by any design method in the second to eighth aspects can be referred to the technical effects brought about by the first aspect or different design methods in the first aspect, and will not be repeated here.

[0043] Based on the implementation methods provided in the above aspects, this application can also be further combined to provide more implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] FIG1 is a schematic diagram of the composition of a computer device provided by the present application;

[0045] FIG2 is a schematic diagram of the relationship between an address and access frequency provided by this application;

[0046] FIG3 is a schematic diagram of various types of memory media deployment and data migration provided by the present application;

[0047] FIG4 is a schematic diagram of a memory access heat statistics scenario provided by this application;

[0048] FIG5 is a flow chart of a memory data migration method provided by the present application;

[0049] FIG6 is a schematic diagram of a hot page identification provided by the present application;

[0050] FIG7 is a schematic diagram of a hot page identification provided by the present application;

[0051] FIG8 is a schematic diagram of an address clipping method provided by the present application;

[0052] FIG9 is a schematic diagram of cold page identification and cold page information entropy processing provided by the present application;

[0053] FIG10 is a schematic diagram of a process of memory data migration provided by the present application;

[0054] FIG11 is a schematic diagram of a process of memory data migration provided by the present application;

[0055] FIG12 is a schematic diagram of a process of memory data migration provided by the present application;

[0056] FIG13 is a schematic diagram of a process of memory data migration provided by the present application;

[0057] FIG14 is a schematic structural diagram of a memory data migration device provided in this application. DETAILED DESCRIPTION

[0058] To facilitate understanding, the main terms involved in this application are first explained.

[0059] In the computer memory system hierarchy, the closer the memory is to the processor, the faster it is to access and the smaller its storage capacity. In descending order of distance from the processor, memory is divided into registers, cache memory, main memory, and external memory.

[0060] Main memory, also known as internal memory, is a crucial component of a computer system, serving as the bridge between external memory and the processor. It temporarily stores computational data within the processor and data exchanged between the processor and external memory, such as a hard drive. For example, when a computer starts running, data to be computed is loaded from main memory into the processor for computation. Once the computation is complete, the processor stores the result in main memory. Examples of main memory include dynamic random access memory (DRAM) and double data rate synchronous DRAM (DDR SDRAM).

[0061] External storage, also known as auxiliary storage or simply external memory, has a larger storage capacity than main memory but slower access speeds. Examples of external storage include network storage, solid-state drives (SSDs), and hard disk drives (HDDs).

[0062] Cache memory is a high-speed, small-capacity memory located between the processor and main memory. Cache memory is often referred to as cache. Compared to main memory, cache has a smaller storage capacity and faster access speeds. Cache includes Level 1 (L1 cache), Level 2 (L2 cache), and Level 3 (L3 cache). Level 1 cache is located inside the processor core. Level 2 cache can be located inside or outside the processor core. Level 1 and Level 2 caches are typically exclusive to the processor core they are located in. Level 3 cache is typically located outside the processor core and is shared by multiple processor cores.

[0063] A register is a small memory inside a processor that temporarily stores data and results involved in a calculation. A register can be a commonly used sequential logic circuit.

[0064] Hierarchical Storage Technology (HST) stores data in different storage devices with different performance based on data importance, access frequency, retention time, storage capacity, performance, and other indicators. It achieves automatic migration of data between storage media through hierarchical storage management.

[0065] Hot data refers to data frequently accessed by the processor. Storing hot data in memory close to the processor allows the processor to access the data as quickly as possible, increasing the system's data processing speed and reducing data processing latency, significantly improving system access performance.

[0066] Cold data refers to data that is infrequently accessed by the processor. Storing cold data in memory away from the processor allows for more data to be stored, while allowing memory closer to the processor to store more hot data, improving storage resource utilization and reducing system costs.

[0067] A cache line is a unit of memory that a computer device uses to read or write data. A cache line can be 64 bytes in size.

[0068] A page is a unit used by a computer to manage memory storage space. For example, a page size can be 4 kilobytes (KB), 2 megabytes (MB), or other byte sizes. A 4KB page is called a small page. A 2MB page is called a large page. The smaller the page, the more resources a computer needs to manage memory; the larger the page, the fewer resources a computer needs to manage memory. A page can include multiple cache lines, meaning the page size is a multiple of the cache line size.

[0069] To improve the data processing speed of a system and reduce data processing latency, the present application provides a memory data migration method. The method is applied to a hybrid memory system comprising multiple processors and multiple different types of memory media, wherein the processors are associated with at least two different types of memory media. The method comprises: calculating page access results based on a statistical pattern associated with the type of memory media accessed by the access request, so as to determine the page's access popularity based on the page access results; and triggering memory data migration between at least two different types of memory media based on the page's access popularity. Thus, different statistical methods are used for different memory media to calculate the frequency of page access, enabling timely and accurate identification of hot and cold pages. By reducing the amount of data generated by page access results, storage space and bandwidth consumption are reduced, improving storage space utilization and data migration performance. This improves the system's data processing speed and reduces data processing latency. This avoids the problem of determining memory access popularity solely by counting page access frequency, which consumes a large amount of storage space and bandwidth due to the large amount of data generated by the page access frequency, or the problem of determining whether a page has been accessed solely based on the page's access bit, which cannot accurately and timely identify whether a page is frequently accessed.

[0070] The memory data migration method provided in this application can be applied to fields such as artificial intelligence, big data, cloud computing, as well as scenarios such as high-performance, large-capacity storage systems that contain multiple types of storage media.

[0071] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0072] FIG1 is a schematic diagram of the composition of a computer device provided by the present application. As shown in FIG1 , the computer device 100 includes a processor 110 .

[0073] The processor 110 is the control center of the computer device 100. The processor 110 can be a computing unit with computing power, such as a central processing unit (CPU), a graphics processing unit (GPU), a data processing unit (DPU), a neural processing unit (NPU), and an embedded neural network processing unit (NPU). The processor 110 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), system on chip (SoC) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. For ease of description, the following embodiments are described by taking the processor 110 as a CPU as an example.

[0074] Computer device 100 in FIG1 may include one or more processors (e.g., processor 110 and processor 130). The processor may be a multi-core processor, i.e., a processor including one or more processor cores. For example, processor 110 shown in FIG1 includes N processor cores. A processor herein may refer to one or more devices, circuits, and / or computing units for processing data (e.g., computer program instructions).

[0075] As the number of cores in a single processor increases and processor computing speeds continue to improve, the processors' demands for memory access speed and capacity are also increasing. In one possible implementation, multiple different types of storage media are used together as the main memory (abbreviated as "RAM" or "main memory") of a computer device to increase memory capacity. Each processor core is allocated as much memory resources and memory bandwidth as possible from the memory to meet the processor's memory access speed and capacity requirements. A system that uses multiple different types of storage media as memory can be called a hybrid memory system. The storage media used as memory in a hybrid memory system can be called memory media. A processor can be associated with at least one type of memory media, meaning some processors are associated with one type of memory media, while others are associated with two or more types of memory media.

[0076] For example, a computer device includes multiple different types of memory media. The multiple different types of memory media include a first memory medium and a second memory medium. The storage capacity of the first memory medium is lower than the storage capacity of the second memory medium. The access speed of the first memory medium is higher than the access speed of the second memory medium. The access latency of the first memory medium is lower than the access latency of the second memory medium. The cost of the first memory medium is higher than the cost of the second memory medium.

[0077] The first memory medium may include dynamic random access memory (DRAM). The second memory medium is storage-class memory (SCM), which includes at least one of phase-change memory (PCM), magnetic random access memory (MRAM), resistive random access memory (RRAM / ReRAM), ferroelectric random access memory (FRAM), fast NAND, or nano-RAM (NRAM).

[0078] For example, the various types of memory media used as the main memory 120 in the computer device 100 include DRAM 121 and SCM 122. The processor 110 is connected to the DRAM 121 and SCM 122 via an interface supporting memory semantics.

[0079] The processor 110 is configured to run an application program to perform a read operation or a write operation on a memory medium (eg, DRAM 121 or SCM 122), and to trigger data migration based on the access hotness or coldness of the memory medium.

[0080] Triggering data migration based on the access hotness of the memory medium can be replaced by triggering data migration based on the access hotness of the data stored in the memory medium. Data migration includes migrating cold data to the next-level memory medium and migrating hot data to the previous-level memory medium.

[0081] For example, when the cache line is cold data and the memory medium where the cache line is located is DRAM, the cache line is migrated to the SCM.

[0082] For another example, when the cache line is hot data and the memory medium where the cache line is located is SCM, the cache line is migrated to DRAM.

[0083] Understandably, data migration can be triggered for any level of memory media in a computer device based on the level of data access. Each memory medium migrates data based on the level of data access. The next level of memory media has a larger storage capacity than the current one, while the previous level of memory media has a faster access speed.

[0084] In some embodiments, the computer device counts pages based on the Memory Access Tracking (MAT) method, that is, the page access frequency is counted at the granularity of the page (such as 4KB page, 2MB page), which is compatible with the computer device's page management method for memory, making the memory data migration method easy to use. For example, the processor operates the memory medium at the granularity of the cache line, and the cache line belongs to a certain page under management, then the cache line in the memory medium is operated once, and the page to which the cache line belongs is also read and written once. The controller counts the access frequency of the page to which the cache line being operated belongs to identify the access heat of the page. However, since the data volume of the page access frequency is large, the required storage space and bandwidth consumption are large, and the controller needs to process the page access frequency to obtain the hot and cold properties of the page, then the memory access heat recognition efficiency is low, resulting in the memory data migration efficiency affecting the data processing speed and latency of the system.

[0085] In some other embodiments, a computer device periodically scans the access bit in a page table entry (PTE) to determine whether a page has been accessed based on the access bit. However, this method cannot accurately and timely identify frequently accessed pages. Furthermore, frequent scanning of page table entries consumes significant computing resources (e.g., CPU resources).

[0086] It should be noted that by analyzing the processor's access behavior to the memory medium, for example, sorting the memory medium addresses by their access frequency, we can obtain the relationship between addresses and access frequency as shown in Figure 2. As shown in Figure 2, most pages are not accessed by the processor or are accessed only rarely, while a small number of pages are frequently accessed by the processor. Based on the access frequency of a page, pages can be divided into cold pages and hot pages. Frequently accessed pages are called hot pages. Hot pages can contain hot data. Pages that are not frequently accessed are called cold pages. Cold pages can contain cold data.

[0087] Optionally, pages can be further divided into different levels based on their access frequency. For example, a page that is never accessed is called an absolutely cold page. A page that is rarely accessed is called a relatively cold page. A page that is accessed more frequently than a relatively cold page but less frequently than a hot page is called a warm page.

[0088] Since only a small number of pages are frequently accessed during the process of memory medium access, and most pages are not accessed by the processor or are accessed in small quantities, there is only a small amount of valid data in the storage space used to store the access frequency. The small amount of valid data may refer to the access frequency of frequently accessed pages, resulting in low utilization of the storage space.

[0089] In the present application, the processor 110 is used to count the access results of the page according to the statistical model associated with the type of memory medium accessed by the access request, so as to determine the access popularity of the page according to the access results of the page and trigger data migration according to the access popularity.

[0090] For example, the statistical mode may include at least one of a cold page statistical mode and a hot page statistical mode. The processor 110 is configured to calculate page access results based on the cold page statistical mode associated with the type of memory medium accessed by the access request, or the processor 110 is configured to calculate page access results based on the hot page statistical mode associated with the type of memory medium accessed by the access request, or the processor 110 is configured to calculate page access results based on the cold page statistical mode and the hot page statistical mode associated with the type of memory medium accessed by the access request.

[0091] Optionally, the present application does not limit the division method of statistical modes. More types of modes can be divided. For example, the statistical mode can include at least one of a cold page statistical mode, a warm page statistical mode, or a hot page statistical mode.

[0092] For example, as shown in FIG3 , assume that processor 110 is associated with three different types of memory media, which are arranged in descending order of distance from processor 110 as memory medium 1, memory medium 2, and memory medium 3. Memory medium 1 has a higher rank than memory medium 2; memory medium 2 has a higher rank than memory medium 3. For example, memory medium 1 is a first-level memory medium, memory medium 2 is a second-level memory medium, and memory medium 3 is a third-level memory medium.

[0093] Generally, the storage capacity of memory medium 1 is lower than that of memory medium 2, the access speed of memory medium 1 is higher than that of memory medium 2, the access latency of memory medium 1 is lower than that of memory medium 2, and the cost of memory medium 1 is higher than that of memory medium 2. The storage capacity of memory medium 2 is lower than that of memory medium 3, the access speed of memory medium 2 is higher than that of memory medium 3, the access latency of memory medium 2 is lower than that of memory medium 3, and the cost of memory medium 2 is higher than that of memory medium 3.

[0094] Memory medium 1 is used to store frequently accessed hot data. Cold data that is not frequently accessed can be migrated to memory medium 2. The cold page statistics mode can be used to count the access results of pages in memory medium 1, identify cold pages, and trigger data migration, thereby ensuring the accuracy of cold page statistics.

[0095] Memory medium 3 is used to store cold data that is not frequently accessed. Frequently accessed hot data can be migrated to memory medium 2. The hot page statistics mode can be used to count access results of pages in memory medium 3, identify hot pages, and trigger data migration. This ensures the accuracy of hot page statistics.

[0096] Memory medium 2 is used to store warm data between infrequently accessed cold data and frequently accessed hot data. Hot page statistics mode and cold page statistics mode can be used to count access results of pages in memory medium 2. Cold data can be migrated to memory medium 3, and hot data can be migrated to memory medium 1.

[0097] Therefore, different statistical methods are used for different memory media to calculate the frequency of page accesses, and data migration is triggered based on the page access results. This allows for timely and accurate statistics on page access frequency. By reducing the amount of statistical data, storage space and bandwidth consumption are reduced, improving storage space utilization and data migration performance. This in turn increases the system's data processing speed and reduces data processing latency.

[0098] In addition, the present application does not limit the execution subject of the memory access heat statistics. The execution subject includes a media module in a computer device, a hardware module with computing function, or a processor.

[0099] For example, as shown in FIG4 (a), the access result of the page is counted in the media module. The media module can be any of a variety of different types of memory media. For example, the media module can be DRAM or SCM.

[0100] A processor in a computer device sends an access request to a media module, instructing it to perform a write or read operation on the media module. A controller in the media module (e.g., a register clock driver (RCD)) collects the access requests, calculates the page access results based on a statistical model associated with the type of memory medium being accessed, stores the page access results, and then feeds the page access results back to the processor via in-band or out-of-band communication.

[0101] As shown in Figure 4(b), the difference from Figure 4(a) is that another hardware module within the computer device counts page access results and feeds these results back to the processor in-band or out-of-band. This hardware module can be a memory controller or a peripheral device (e.g., a complex programmable logical device (CPLD) or FPGA).

[0102] As shown in (c) of FIG. 4 , the difference from (a) of FIG. 4 is that the page access results are counted by the processor in the computer device, and the processor core can obtain the page access results by reading the registers in the processor.

[0103] Computer device 100 may also include cache memory and registers.

[0104] The cache memory is used to store instructions or data that may be accessed multiple times by the processor core in the processor 110 , thereby increasing the speed at which the processor processes data and preventing the processor from frequently accessing the main memory 120 .

[0105] In physical form, cache memory can be random access memory (RAM), static random-access memory (SRAM), dynamic RAM (DRAM), or other types of storage devices that can store information and instructions.

[0106] In terms of logical form, a cache memory can be a level 1 cache (L1 cache), a level 2 cache (L2 cache), a level 3 cache (L3 cache), or any other level of cache. For example, a cache memory located inside a processor core can be a level 1 cache (L1 cache) or a level 2 cache (L2 cache). A cache memory located outside a processor core can be a level 3 cache (L3 cache).

[0107] Registers are used to store instructions or data that may be accessed multiple times by the processor core of processor 110. Since register access speed is higher than cache memory access speed, instructions or data that may be accessed multiple times by the processor core can be stored in registers first, which can further increase the speed at which the processor processes data.

[0108] The processor core is connected to other components in the processor (e.g., the processor core, cache memory, and main memory 120) via bus 111, and accesses other components via bus 111. For example, access results are transmitted between the processor core, cache memory, and main memory 120 via bus 111. For another example, the processor core transmits a write instruction or a read instruction to main memory 120 via bus 111, causing main memory 120 to write to a cache line according to the write instruction or read from a cache line according to the read instruction. Bus 111 can be an industry standard architecture (ISA) bus, a peripheral component interconnect express (PCIe) bus, an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), or a non-standard proprietary bus standard. This bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in FIG1 , but this does not mean that there is only one bus or one type of bus.

[0109] The connection between the processor core and other components in the processor in Figure 1 is merely illustrative. In one possible implementation, the processor core connects to the other components in the processor via a ring bus, accessing the other components via the ring bus. In another possible implementation, the processor core connects to the other components in the processor via a mesh bus, accessing the other components via the mesh bus.

[0110] The processor 110 is connected to the main memory 120 through a memory controller (MC) 112. The processor 110 can perform various functions of the computer device 100 by running or executing software programs stored in the main memory 120 and accessing data stored in the main memory 120. For example, the processor 110 can implement statistics on page access results through the memory controller 112.

[0111] The main memory 120 may be a read-only memory (ROM) or other static storage device capable of storing static information and instructions, a random access memory (RAM) or other dynamic storage device capable of storing information and instructions, or an electrically erasable programmable read-only memory (EEPROM). The main memory 120 is also used to store programs related to this embodiment.

[0112] The processor 110 may further include an external device 140 and a peripheral management module 113. The peripheral device 140 is connected to the peripheral management module 113 via the bus 111. The peripheral device 140 may be an application specific integrated circuit (ASIC). For example, a microprocessor (digital signal processor, DSP), or one or more field programmable gate arrays (field programmable gate array, FPGA), or a graphics processing unit (graphics processing unit, GPU), or a neural network processing unit (neural-network processing unit, NPU). The peripheral device 140 may also implement statistical page access results, and feed back the access results to the processor core via the bus 111, so that the processor core triggers data migration based on the access hotness or coldness of the data.

[0113] The device structure shown in FIG1 does not constitute a limitation on the computer device, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0114] Next, the memory data migration method provided in this application is described in detail with reference to the accompanying drawings.

[0115] For ease of explanation, the media module statistics scenario shown in (a) of Figure 4 is used as an example to illustrate the implementation of statistics on page access results within the memory medium. In other words, the controller that calculates the page access results can be a controller within the memory medium. Referring to Figure 5 , Figure 5 is a flow chart of a memory data migration method provided by this application. As shown in Figure 5 , the method includes the following steps.

[0116] Step 510: The processor sends an access request to the memory medium.

[0117] When an application program executed by a processor in a computer device needs to perform a read operation or a write operation on a memory medium, an access request is sent to the memory medium. Optionally, the access request indicates that a read operation or a write operation is performed on the memory medium in units of storage space (e.g., cache lines). The size of the unit storage space may be the size of a cache line when the processor accesses the memory medium. The access request may include the address and offset value of the memory medium, or the access request may include the starting address and the ending address of the memory medium to indicate a section of storage space to be accessed in the memory medium.

[0118] Step 520: Calculate page access results based on a statistical model associated with the type of memory medium accessed by the obtained access request.

[0119] The processor can access the memory medium based on the memory address, for example, reading data from the storage space indicated by the memory address from the memory medium based on the memory address, or writing data to the storage space indicated by the memory address in the memory medium. In some embodiments, the processor accesses the memory medium based on the logical address, and the memory management unit (MMU) maps the logical address to the physical address of the memory medium to facilitate access to the memory medium. Different memory media in the computer device have different physical addresses, and the processor can access different memory media based on the physical addresses of different memory media.

[0120] In some embodiments, after receiving an access request from a processor, the controller determines the type of memory medium accessed by the access request based on an address included in the access request, and calculates page access results based on a statistical model associated with the type of memory medium. The address included in the access request may be a physical address of the memory medium.

[0121] Optionally, the controller further sends an indication message, where the indication message includes the type of the memory medium accessed by the access request and a statistical pattern associated with the type of the memory medium.

[0122] In a first possible implementation, page access results are counted based on a hot page statistics mode associated with the type of memory medium accessed by the access request. For example, if a processor accesses a memory medium remote from the processor, the controller counts the page access results based on the hot page statistics mode. Specifically, if the address included in the access request indicates a memory medium remote from the processor, the controller determines based on the address included in the access request that the processor needs to access the memory medium remote from the processor and then counts the access results of the accessed page based on the hot page statistics mode.

[0123] Because memory media farther from the processor have slower access speeds and longer access latency than memory media closer to the processor, memory media farther from the processor is used to store cold data. When a processor accesses cold data in memory media farther from the processor, it indicates that the cold data is required by the processor. To enable the processor to retrieve hot data from memory media closer to the processor as quickly as possible, thereby improving the system's data processing speed and reducing data processing latency, pages containing cold data are counted as hot pages based on a hot page statistics model. This cold data is then converted to hot data, facilitating the migration of hot data from memory media farther from the processor to memory media closer to the processor.

[0124] Memory media close to the processor is called proximal memory. Memory media farther from the processor is called distal memory. Proximal memory has a higher access speed than distal memory. For example, proximal memory can be DRAM or DDR SDRAM. Proximal memory can be SCM. When the processor accesses the SCM, the controller can count the access results of pages in the SCM using the hot page statistics mode.

[0125] Optionally, the controller determines the statistical pattern based on the association between the address segments of multiple memory media and the statistical pattern. The controller queries the address segment of the memory medium to which the association belongs based on the address included in the access request, and determines the statistical pattern corresponding to the address segment of the memory medium in the association as the statistical pattern for statistically analyzing page access results. For example, if remote memory is associated with a hot page statistical pattern, when the processor accesses the remote memory, the controller can calculate the access results of the pages in the remote memory based on the hot page statistical pattern.

[0126] In some embodiments, the hot page window is updated according to the address indicated by the access request. The hot page window is used to filter frequently accessed pages based on the page access order. The hot page window can be a filtering window used to collect N frequently accessed pages based on the page access order, that is, the N frequently accessed pages collected by the hot page window are sorted according to the access order, and N is a positive integer. Understandably, the page currently accessed by the processor is placed in the first record of the N pages counted by the hot page window. The page access result includes N frequently accessed pages recorded based on the page access order. For example, the page access result includes the identifiers of N frequently accessed pages recorded based on the page access order.

[0127] After the controller obtains the access request, it can determine the page to which the accessed data block belongs according to the address indicated by the access request, and judge whether the hot page window contains the currently accessed page. If the hot page window contains the currently accessed page, the page containing the currently accessed page is adjusted to the first record of the hot page window. If the hot page window does not contain the currently accessed page, the page record of the hot page window is updated, and the currently accessed page is adjusted to the first record of the hot page window.

[0128] Optionally, the hot page window is used to indicate that pages in the hot page window should be replaced based on the page access order to record frequently accessed pages. That is, frequently accessed pages are used to replace less frequently accessed pages. If the hot page window does not contain the currently accessed page, and the hot page window has already collected N pages, the currently accessed page is used to replace the Nth record in the hot page window, and the currently accessed page is adjusted to the first record in the hot page window.

[0129] For example, the hot page window is used to record the identifier of the page. The identifier of the page can be the starting address of the page. As shown in (a) in Figure 6, the hot page window records the addresses of N pages. The page currently being accessed is the page at address 1, and the hot page window records the page at address 1. The addresses recorded by the hot page window are reordered, and the page at address 1 is adjusted to the first record of the hot page window. As shown in (b) in Figure 6, the hot page window records the addresses of N pages. The page currently being accessed is the page at address 4, and the hot page window does not record the page at address 4. The number of addresses recorded by the hot page window is equal to N. The page at address 4 is adjusted to the first record of the hot page window, replacing the Nth record of the hot page window, that is, deleting the Nth record address 10 of the hot page window, or, the number of addresses recorded by the hot page window is less than N, the hot page window adds a page at address 4, and adjusts the page at address 4 to the first record of the hot page window.

[0130] Compared with counting the access frequency of pages, the solution provided by this application only records the identification of hot pages, which can effectively reduce the storage capacity occupied by storing page access results and reduce the bandwidth consumption required for transmitting page access results.

[0131] In some other embodiments, a saturation counter of a page associated with the address indicated by the access request is updated. The saturation counter is used to count the access frequency of the page.

[0132] After receiving an access request, the controller determines the page to which the accessed data block belongs based on the address indicated in the access request and updates the page's access frequency. For example, each time the page is accessed, the page access frequency is incremented by one, which in turn increments the saturation counter by one. The page access result includes the page access frequencies recorded by the saturation counters for multiple pages.

[0133] When the saturation counter overflows, the page is determined to be a hot page; when the saturation counter does not overflow, the page is determined to be a cold page.

[0134] For example, as shown in FIG7 , the access frequencies of multiple pages are sorted according to the page identifiers. When the access frequency of a page is equal to the saturation value of the saturation counter, the value of the page indicator bit is 1. When the access frequency of a page is not equal to the saturation value of the saturation counter, the value of the page indicator bit is 0. The page indicator bit is used to indicate whether the page has been accessed.

[0135] Optionally, the memory medium may not need to store the page indicator bit. When the controller feeds back the page access result to the processor, it feeds back the page access result based on the page access frequency recorded by the saturation counter. For example, if the controller determines that the saturation counter overflows, the value of the indicator bit of the fed-back page is 1, indicating that the page is a hot page. If the controller determines that the saturation counter does not overflow, the value of the indicator bit of the fed-back page is 0, indicating that the page is a cold page. The controller can output a bitmap, and the bitmap represents the values ​​of the indicator bits of multiple pages. For example, the bitmap is 111000, indicating that the values ​​of the indicator bits of 6 pages are 111000.

[0136] Because the processor can directly retrieve page access popularity from storage media (such as RAM), it avoids analyzing page access frequency to determine page access popularity, reducing computing resource consumption. Furthermore, because the page access results obtained by the processor are determined based on page access frequency, the accuracy of hot page identification is ensured, avoiding the problem of inaccurate hot page identification caused by determining whether a page has been accessed based solely on the page's access bit.

[0137] It should be noted that the page identifier can be the starting address of the page or the address index of the starting address of the page. This reduces the storage space occupied by storing the access results of the page. Under different system architectures, the supported page size may be 4KB, 64KB, or 2MB. The address can be clipped according to different page sizes, and the clipped address can be used as the address index. The pages counted in the hot page window can be sorted based on the address index or the page access frequency can be recorded to obtain the page access results.

[0138] For example, as shown in Figure 8, assuming that the address indicated by the access request is 64 Bytes, that is, the address after acquisition is 64 Bytes, the address index obtained after clipping the address after acquisition can be 4 KB, 64 KB, or 2 MB.

[0139] In some embodiments, an address index is determined according to the address indicated by the access request, a saturation counter of a page associated with the address index is updated, and a count value of the saturation counter is increased by one.

[0140] In a second possible implementation, page access results are counted based on a cold page statistics mode associated with the type of memory medium accessed by the access request. For example, if a processor accesses a memory medium close to the processor, the controller counts page access results based on the cold page statistics mode. Specifically, the address included in the access request indicates a memory medium close to the processor. The controller determines, based on the address included in the access request, that the processor needs to access the memory medium close to the processor, and then counts the access results of the accessed page based on the cold page statistics mode.

[0141] Since the memory medium close to the processor has a faster access speed and shorter access latency than the memory medium far from the processor, the memory medium close to the processor is used to store hot data. When the processor accesses hot data in the memory medium close to the processor, it indicates that the hot data is data required by the processor. In order to enable the processor to obtain hot data from the memory medium close to the processor as quickly as possible, improve the system's data processing speed, and reduce data processing latency, the pages containing hot data are counted as hot pages and the pages containing cold data are counted as cold pages based on the cold page statistics mode. Unaccessed hot data is converted to cold data, so that the cold data can be migrated from the memory medium close to the processor to the memory medium far from the processor, allowing the memory medium close to the processor to store more hot data.

[0142] For example, the local memory can be DRAM or DDR SDRAM, and the remote memory can be SCM. When the processor accesses the DRAM, the controller can count the access results of the DRAM pages according to the cold page statistics mode.

[0143] For example, the near-end memory is associated with the cold page statistics mode. When the processor accesses the near-end memory, the controller can count the access results of the pages in the far-end memory according to the cold page statistics mode.

[0144] In some embodiments, an indicator bit of a page associated with the address indicated by the access request is updated.

[0145] The page indicator bit is used to indicate whether the page has been accessed or not. For example, the initial value of the page indicator bit indicates that the page has not been accessed. After receiving an access request, the controller can determine the page to which the accessed data block belongs based on the address indicated in the access request and adjust the value of the indicator bit corresponding to the page to indicate that the page has been accessed. The page access result includes the values ​​of the indicator bits of multiple pages.

[0146] In some embodiments, an address index is determined according to the address indicated by the access request, and indication bits of the page associated with the address index are counted.

[0147] For example, when the page indicator bit has a value of 1, it indicates that the page has been accessed; when the page indicator bit has a value of 0, it indicates that the page has not been accessed. Alternatively, when the page indicator bit has a value of 0, it indicates that the page has been accessed; when the page indicator bit has a value of 1, it indicates that the page has not been accessed.

[0148] Optionally, the initial value of the indicator bit of the page may be 0, indicating that the page has not been accessed.

[0149] For example, as shown in (a) of FIG9 , the indicator bits of multiple pages are sorted according to the page identifiers. When a page is accessed, the value of the indicator bit of the page is 1. When the page is not accessed, the value of the indicator bit of the page is 0.

[0150] Therefore, based on the bit array to record unaccessed pages and accessed pages, compared with determining the memory access heat by counting the access frequency of pages, this method only needs 1 bit of indicator bit to indicate cold pages, so as to identify cold pages, which can effectively reduce the data volume of page access results, reduce the consumption of storage space and bandwidth, and improve the utilization rate of storage space. In addition, there is no need for the processor to perform additional operations, and data migration can be performed according to the access results containing the value of the indicator bit, thereby improving the data migration performance.

[0151] In other embodiments, information entropy processing is performed on the indicator bits of the multiple pages accessed by the processor based on the spatial local characteristics of the multiple pages to obtain processed data. The processed data is used to indicate the indicator bits of the multiple pages; and the processed data is stored. The processor accesses the memory medium based on the spatial local characteristics of the pages, that is, it can access multiple consecutive pages or multiple adjacent pages. In this case, the indicator bits corresponding to the multiple consecutive pages or multiple adjacent pages can have the same value.

[0152] Optionally, the controller processes the address indexes of the multiple pages and the indicator bits of the multiple pages according to a storage efficiency target to obtain processed data. The storage efficiency target is used to indicate the utilization rate of storing valid data in a limited storage space. The controller may map the indicator bits corresponding to the address indexes of the multiple pages into at least two indicator bits according to a preset rule.

[0153] For example, the indication bits corresponding to the address indexes of the multiple pages are mapped to at least two indication bits based on a hash algorithm.

[0154] For another example, if the preset rule is to map the indicator bits corresponding to the address indexes of at least two pages into one indicator bit, then the indicator bits corresponding to the address indexes of multiple pages are mapped into at least two indicator bits according to the preset rule. For example, the indicator bits corresponding to the address indexes of two adjacent pages are mapped into one indicator bit. For another example, the indicator bits corresponding to the address indexes of two pages spaced apart are mapped into one indicator bit, and the two spaced apart pages may be spaced apart by at least one page.

[0155] Optionally, multiple indicator bits with the same value are mapped into one indicator bit. For example, an indicator bit with a value of 1 is mapped into one indicator bit; an indicator bit with a value of 0 is mapped into one indicator bit. The processed data includes the identifiers of the pages corresponding to the indicator bits with a value of 1 and the identifiers of the pages corresponding to the indicator bits with a value of 0.

[0156] For example, as shown in (b) of FIG9 , the values ​​of the indicator bits corresponding to the address indexes of at least two pages are ORed and mapped into one indicator bit. When the value of at least one indicator bit is 1, the values ​​of the indicator bits corresponding to the address indexes of at least two pages are ORed together to form 1; when the values ​​of the indicator bits corresponding to the address indexes of at least two pages are both 0, the values ​​of the indicator bits corresponding to the address indexes of at least two pages are ORed together to form 0.

[0157] Thus, information entropy processing is performed on the indicator bits of multiple pages, further reducing the data volume of the indicator bits of multiple pages, reducing the storage space occupied by the access results of cold pages, and reducing bandwidth consumption, thereby improving the utilization of storage space and data migration performance.

[0158] In other embodiments, multiple pages accessible to the processor are sampled, and an indication bit of the sampled page associated with the address indicated by the access request is updated. For example, the initial value of the indication bit associated with the sampled page is 0. When the access request indicates access to the sampled page, the indication bit associated with the sampled page is updated to 1.

[0159] This application does not limit the sampling rules and sampling rate of pages, for example, random sampling, equal interval sampling, sampling based on spatial local features of pages, etc. The sampling rate can refer to the ratio of the number of pages after sampling to the total amount of data on the pages.

[0160] It should be noted that the above-mentioned methods for counting page access results can be used alone or in combination, and this application is not limited thereto. For example, for a memory medium storing warm data between cold data and hot data, the controller can use both the hot page statistics mode and the cold page statistics mode to count page access results.

[0161] In addition, the storage location storing the address indicated by the access request and the storage location storing the page access result may be the same or different. For example, a portion of the storage space in the memory medium may be used to store the page access result. The address indicated by the access request may be stored in a storage medium other than the memory medium. For another example, a storage medium other than the memory medium (e.g., RAM) may store the page access result.

[0162] Optionally, the RAM stores an address index corresponding to each page, and after the memory medium obtains the address index by clipping according to the address indicated by the access request, the access result corresponding to the address index in the RAM is updated.

[0163] Optionally, when the RAM does not store the address index determined by the memory medium, the new address index and the corresponding access result are written into the RAM.

[0164] Step 530: trigger memory data migration between at least two different types of memory media according to the access result.

[0165] The processor determines the access heat of the page based on the access result of the page and triggers data migration. When triggering data migration based on the access heat of the page, hot data can be migrated to the near-end memory, and cold data can be migrated to the far-end memory. For example, the access result indicates N hot pages, and the hotness of the data blocks in the N hot pages is determined to be hot. For another example, if the access result indicates the indicator bit of the page, it is determined that the indicator bit indicates that the page has not been accessed, and the hotness of the data blocks in the page is cold, or if the indicator bit indicates that the page has been accessed, the hotness of the data blocks in the page is hot.

[0166] Optionally, the access result indicates the processed data after information entropy processing, and the processed data is restored to the indicator bits of multiple pages, and the access heat of the page is determined according to the indicator bits. For example, the controller counts the indicator bits of 4 pages, and takes or maps the values ​​of the indicator bits corresponding to the address indexes of 2 adjacent pages into one indicator bit, and the processed data contains the indicator bits of 2 pages. Assuming that the processed data contains 01, the processed data is restored to the indicator bits of 4 pages, then the value of the indicator bit of page 1 and the value of the indicator bit of page 2 are both 0; the value of the indicator bit of page 3 is 1, and the value of the indicator bit of page 4 is 0, or the value of the indicator bit of page 3 is 0, and the value of the indicator bit of page 4 is 1, or the value of the indicator bit of page 3 is 1, and the value of the indicator bit of page 4 is 1, or the value of the indicator bit of page 3 is 1, and the value of the indicator bit of page 4 is 1.

[0167] Therefore, different statistical methods are used for different types of memory media to calculate page access frequency, achieving timely and accurate statistics on page access frequency. By reducing the amount of data in page access results, storage space and bandwidth consumption are reduced, improving storage space utilization and data migration performance. This increases the system's data processing speed and reduces data processing latency.

[0168] The following is an example of the memory data migration process with reference to the accompanying drawings.

[0169] FIG10 is a schematic diagram of a flow chart of memory data migration provided by this application.

[0170] 1. Configuration process

[0171] (1) Configuring a statistical mode. For example, configuring a cold page statistical mode to identify cold pages in a memory medium (step 1010).

[0172] (2) You can also configure a collection stop threshold. If the time for the collection access request reaches the collection stop threshold, or the number of collection access requests reaches the collection stop threshold, the collection access request is stopped. For example, configure the collection stop threshold size register.

[0173] 2. Collection process

[0174] (1) Determine whether the RAM is empty (step 1020). If the RAM is not empty, that is, data is stored in the RAM, clear the data in the RAM (step 1030). The RAM is used to store the access results of the page.

[0175] (2) If the RAM is empty, enable acquisition (step 1040) and acquire access requests (step 1050).

[0176] (3) The page pointer corresponding to the address in the RAM is set to 1 according to the address in the access request (step 1060). If the page has not been accessed, the value of the page pointer is not changed. The RAM stores a one-to-one mapping between pages and pointers in the system.

[0177] (4) After the sampling period, the acquisition can be stopped. For example, there are two ways to stop the acquisition.

[0178] For example, the processor core instructs to stop acquisition (step 1070), and the value of the indicator bit of the accessed page is stored in RAM. If the processor core instructs to stop acquisition, step 1090 is executed to compress the page access results and feedback the compressed data to the processor. If the processor core does not instruct to stop acquisition, step 1080 is executed.

[0179] For another example, the number of indicator bits with a value of 1 is detected, and it is determined whether the number of indicator bits with a value of 1 reaches a collection stop threshold (step 1080). If the number of indicator bits with a value of 1 reaches the collection stop threshold, collection is stopped and step 1090 is executed. Optionally, an interrupt is issued to notify the processor core that collection has stopped. If the number of indicator bits with a value of 1 does not reach the collection threshold, collection of access requests continues and step 1050 is executed.

[0180] 3. Hot and cold page reading process

[0181] (1) The processor core reads the access results of the page stored in RAM. Since the data stored in RAM may contain a large number of consecutive 0s and a large number of consecutive 1s, the access results of the page are compressed and the compressed data is fed back to the processor (step 1090). The compression processing method is not limited.

[0182] (2) The processor core decompresses the compressed data and obtains the access result of the page (step 10100).

[0183] 4. Hot and cold page migration process

[0184] (1) The processor core triggers memory data migration between at least two different types of memory media according to the access popularity of the page indicated by the access result of the page (step 10110). After the migration is completed, the processor core continues to execute the acquisition process, the hot and cold page reading process, and the hot and cold page migration process.

[0185] FIG11 is a flow chart of a memory data migration process provided by this application.

[0186] 1. Configuration process

[0187] (1) Configuring a statistical mode. For example, configuring a cold page statistical mode to identify cold pages in a memory medium (step 1110).

[0188] (2) You can also configure a collection stop threshold. If the time for the collection access request reaches the collection stop threshold, or the number of collection access requests reaches the collection stop threshold, the collection access request is stopped. For example, configure the collection stop threshold size register.

[0189] 2. Collection process

[0190] (1) Determine whether the RAM is empty (step 1120). If the RAM is not empty, that is, data is stored in the RAM, clear the data in the RAM (step 1130).

[0191] (2) If the RAM is empty, enable acquisition (step 1140) and acquire the access request (step 1150).

[0192] (3) A hash function is performed on the address index of the page to obtain a new address index, and the indicator bit corresponding to the new address index is set to 1 (step 1160). If the page has not been accessed, the value of the indicator bit of the page is not changed. The one-to-one mapping relationship between the address index and the indicator bit of the page in the system is stored in RAM (step 1170).

[0193] (4) After the sampling period, the acquisition can be stopped. For example, there are two ways to stop the acquisition.

[0194] For example, the processor core instructs to stop data collection (step 1180), and the value of the indicator bit of the accessed page is stored in RAM. If the processor core instructs to stop data collection, step 11100 is executed to compress the access results of the page and feed the compressed data back to the processor. If the processor core does not instruct to stop data collection, step 1190 is executed.

[0195] For another example, the number of indicator bits with values ​​of 1 is detected, and it is determined whether the number of indicator bits with values ​​of 1 reaches the acquisition stop threshold (step 1190). If the number of indicator bits with values ​​of 1 reaches the acquisition stop threshold, acquisition is stopped and step 11100 is executed. Optionally, an interrupt is issued to notify the processor core that acquisition has stopped. If the number of indicator bits with values ​​of 1 does not reach the acquisition threshold, acquisition of access requests continues and step 1150 is executed.

[0196] 3. Hot and cold page reading process

[0197] (1) The processor core reads the access results of the page stored in RAM. Since the data stored in RAM may contain a large number of consecutive 0s and a large number of consecutive 1s, the access results of the page are compressed and the compressed data is fed back to the processor (step 11100). The compression processing method is not limited.

[0198] (2) The processor core decompresses the compressed data and obtains the access result of the page (step 11110).

[0199] 4. Hot and cold page migration process

[0200] (1) The processor core uses the hash function to remap the bit array, calculates the address index corresponding to the bit array through the hash function, and queries the address index. If the values ​​of the indicator bits corresponding to the address index are all 1, it indicates that the page is an extremely cold attribute page; if the corresponding values ​​queried are not all 1, it indicates that the page is not an extremely cold attribute page (step 11120).

[0201] (2) The processor core triggers memory data migration between at least two different types of memory media according to the access popularity of the page indicated by the access result of the page (step 11130). After the migration is completed, the processor core continues to execute the acquisition process, the hot and cold page reading process, and the hot and cold page migration process.

[0202] FIG12 is a flow chart of a memory data migration process provided by this application.

[0203] 1. Configuration process

[0204] (1) Configuring a statistical mode. For example, configuring a hot page statistical mode to identify hot pages in a memory medium (step 1210).

[0205] (2) You can also configure a collection stop threshold. If the time for the collection access request reaches the collection stop threshold, or the number of collection access requests reaches the collection stop threshold, the collection access request is stopped. For example, configure the collection stop threshold size register.

[0206] 2. Collection process

[0207] (1) Determine whether the RAM is empty (step 1220). If the RAM is not empty, that is, data is stored in the RAM, clear the data in the RAM (step 1230).

[0208] (2) If the RAM is empty, enable acquisition (step 1240), and acquire the access request, for example, acquire the address indicated by the access request (step 1250).

[0209] (3) There is a hot page window of size N. The hot page window can sort pages according to the order in which they are accessed. For example, the currently accessed page is recorded in the first entry, and the least recently accessed page is recorded in the last entry. If the currently accessed page is not recorded in the hot page window, the least recently accessed page record is replaced and the currently accessed page is placed in the first entry (step 1260). The identifiers of the N pages filtered by the hot page window are stored in RAM.

[0210] (4) After the sampling period, the acquisition can be stopped. For example, the processor core instructs the acquisition to stop (step 1270), and the identifiers of the N pages filtered by the hot page window are stored in RAM. If the processor core instructs the acquisition to stop, step 1280 is executed to feedback the identifiers of the N pages filtered by the hot page window to the processor. If the processor core does not instruct the acquisition to stop, step 1250 is executed.

[0211] 3. Hot and cold page reading process

[0212] (1) The processor core reads the access result of the page stored in the RAM, that is, performs hot page identification based on the access result (step 1280).

[0213] 4. Hot and cold page migration process

[0214] (1) The processor core triggers memory data migration between at least two different types of memory media according to the access popularity of the page indicated by the access result of the page (step 1290). After the migration is completed, the processor core continues to execute the acquisition process, the hot and cold page reading process, and the hot and cold page migration process.

[0215] FIG13 is a flow chart of a memory data migration process provided by this application.

[0216] 1. Configuration process

[0217] (1) Configuring a statistical mode. For example, configuring a hot page statistical mode to identify hot pages in a memory medium (step 1310).

[0218] (2) You can also configure a collection stop threshold. If the time for the collection access request reaches the collection stop threshold, or the number of collection access requests reaches the collection stop threshold, the collection access request is stopped. For example, configure the collection stop threshold size register.

[0219] (3) Configure the saturation value of the saturation counter.

[0220] (4) If sampling operations are involved, the sampling rate must also be configured.

[0221] 2. Collection process

[0222] (1) Determine whether the RAM is empty (step 1320). If the RAM is not empty, that is, data is stored in the RAM, clear the data in the RAM (step 1330).

[0223] (2) If the RAM is empty, enable acquisition (step 1340) and acquire access requests (step 1350).

[0224] (3) Determine whether the saturation counter has overflowed (step 1360). If the saturation counter has not overflowed, increment the count value of the saturation counter corresponding to the page by 1 (step 1370). If the saturation counter has overflowed, do not change the count value of the saturation counter (step 1380). If the page has not been accessed, do not change the count value of the saturation counter. The count value of the saturation counter for the page is stored in RAM.

[0225] (4) After the sampling period, the acquisition can be stopped. For example, there are two ways to stop the acquisition.

[0226] For example, if the processor core instructs to stop data collection (step 1390), the value of the indicator bit of the accessed page is stored in RAM. If the processor core instructs to stop data collection, step 13110 is executed to compress the access results of the page and feed the compressed data back to the processor. If the processor core does not instruct to stop data collection, step 13100 is executed.

[0227] For another example, the number of indicator bits with values ​​of 1 is detected, and it is determined whether the number of indicator bits with values ​​of 1 reaches the acquisition stop threshold (step 13100). If the number of indicator bits with values ​​of 1 reaches the acquisition stop threshold, acquisition is stopped and step 13110 is executed. Optionally, an interrupt is issued to notify the processor core that acquisition has stopped. If the number of indicator bits with values ​​of 1 does not reach the acquisition threshold, acquisition of access requests continues and step 1350 is executed.

[0228] 3. Hot and cold page reading process

[0229] (1) The processor core reads the access results of the pages stored in the RAM. During the reading process, the count value of each page is detected. If the count value is equal to the saturation value, the page is represented by bit 1. If the count value is not equal to the saturation value, it is represented by bit 0. Because the data stored in the RAM may contain a large number of consecutive 0s and a large number of consecutive 1s, the access results of the page are compressed and the compressed data is fed back to the processor (step 13110). The compression processing method is not limited.

[0230] (2) The processor core decompresses the compressed data and obtains the access result of the page (step 13120).

[0231] 4. Hot and cold page migration process

[0232] (1) The processor core triggers memory data migration between at least two different types of memory media according to the access popularity of the page indicated by the access result of the page (step 13130). After the migration is completed, the processor core continues to execute the acquisition process, the hot and cold page reading process, and the hot and cold page migration process.

[0233] Optionally, if the access request statistics function is implemented by other hardware modules or memory outside the processor in the computer device, the statistical mode can be transmitted by out-of-band communication or in-band communication to configure, enable the access request sampling function and the page access results.

[0234] For a detailed explanation of the process of collecting statistics on page access results, please refer to the description of the above embodiment and will not be repeated here.

[0235] It is worth noting that for the memory access heat statistics scenarios within the hardware module shown in Figure 4 (b) and Figure 4 (c), as well as the memory access heat statistics scenario within the processor, the data processing process is similar to the processing process in Figure 4 (a). For the sake of brevity, only the scenario shown in Figure 4 (a) is used as an example. The data processing processes for other scenarios are similar to those shown in Figures 5-9 and will not be repeated here.

[0236] It is understandable that in order to implement the functions in the above embodiments, the controller includes hardware structures and / or software modules that perform the corresponding functions. Those skilled in the art should easily appreciate that, in combination with the units and method steps of each example described in the embodiments disclosed in this application, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0237] The memory data migration method provided in accordance with the present embodiment is described in detail above with reference to FIG. 1 to FIG. 13 . The memory data migration device provided in accordance with the present embodiment will be described below with reference to FIG. 14 .

[0238] FIG14 is a schematic diagram of the structure of a possible memory data migration device provided in this embodiment. These memory data migration devices can be used to implement the memory functions of the above-mentioned method embodiments, thereby also achieving the beneficial effects of the above-mentioned method embodiments. In this embodiment, the memory data migration device can be the first memory medium shown in FIG5 , or it can be a module (such as a chip) applied to a processor.

[0239] As shown in Figure 14, the memory data migration device 1400 includes a communication module 1410, a statistics module 1420, a migration module 1430, and a storage module 1440. The memory data migration device 1400 is used to implement the functions of the memory and the processor in the method embodiment shown in Figure 5 above.

[0240] The communication module 1410 is used to obtain an access request, where the access request is used to instruct an application program running on a processor in a computer device to operate on a memory medium. For example, the communication module 1410 is used to execute step 510 in FIG5 .

[0241] Statistics module 1420 is configured to collect statistics on page access results based on a statistics mode associated with the type of memory medium accessed by the access request. The page access results are used to determine page access popularity. The statistics mode includes at least one of a cold page statistics mode and a hot page statistics mode. For example, statistics module 1420 is configured to execute step 520 in FIG. 5 .

[0242] Optionally, the statistics module 1420 is specifically configured to update a hot page window according to the address indicated by the access request, where the hot page window is configured to record frequently accessed pages based on a page access sequence.

[0243] Optionally, the statistics module 1420 is specifically configured to update a saturation counter of a page associated with the address indicated by the access request, where the saturation counter is configured to count the access frequency of the page.

[0244] Optionally, the statistics module 1420 is specifically configured to update an indication bit of a page associated with the address indicated by the access request, where the indication bit of the page is used to indicate that the page is accessed.

[0245] The migration module 1430 is configured to trigger memory data migration between at least two different types of memory media according to the access result. For example, the migration module 1430 is configured to execute step 530 in FIG5 .

[0246] The storage module 1440 is used to store the page access results and statistical patterns, so that the statistical module 1420 can count the page access results according to the statistical pattern associated with the type of memory medium accessed by the access request.

[0247] It should be understood that the memory data migration device 1400 of the embodiment of the present application can be implemented by an application-specific integrated circuit (ASIC) or a programmable logic device (PLD), wherein the PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. Alternatively, when the memory data migration shown in FIG. 5 is implemented by software, the memory data migration device 1400 and its modules can also be software modules.

[0248] According to the embodiment of the present application, the memory data migration device 1400 can correspond to executing the method described in the embodiment of the present application, and the above-mentioned and other operations and / or functions of each unit in the memory data migration device 1400 are respectively for implementing the corresponding processes of each method in Figure 5. For the sake of brevity, they will not be repeated here.

[0249] The present application also provides a processor, which includes a memory and at least two processor cores. The processor is associated with at least two different types of memory media, and the memory is used to store a set of computer instructions. When the processor core executes the set of computer instructions, the operating steps of the method described in the above embodiments are executed to identify the access popularity of pages in the memory.

[0250] The present application also provides a chip comprising: a processor and a power supply circuit; wherein the power supply circuit is used to supply power to the processor; and the processor is used to execute the operation steps of the methods described in the above embodiments to identify the access popularity of pages in memory.

[0251] The present application also provides a computer system, which includes multiple computer devices, and the computer devices are used to execute the operating steps of the methods described in the above embodiments.

[0252] The method steps in this embodiment can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, mobile hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an ASIC. In addition, the ASIC can be located in a computing device. Of course, the processor and storage medium can also exist as discrete components in a computing device.

[0253] In the above embodiments, they can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, they can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are performed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it can also be an optical medium, such as a digital video disc (DVD); it can also be a semiconductor medium, such as a solid-state drive (SSD). The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A memory data migration method, characterized in that: The method is executed by a controller in a computer device, and the method includes: Obtaining an access request, the access request being used to instruct an application program running on a processor in the computer device to operate a memory medium; Counting access results of pages according to a statistical mode associated with the type of memory medium accessed by the access request, wherein the access results of the pages are used to determine access heat of the pages, and the statistical mode includes at least one of a cold page statistical mode and a hot page statistical mode; Memory data migration is triggered between at least two different types of memory media according to the access result.

2. The method according to claim 1, characterized in that: The hot page statistics mode counts the access results of the page according to the statistics mode associated with the type of the memory medium accessed by the access request, including: A hot page window is updated according to the address indicated by the access request, wherein the hot page window is used to record frequently accessed pages based on a page access sequence.

3. The method according to claim 2, characterized in that The hot page window is used to indicate that pages in the hot page window are replaced based on a page access sequence to record frequently accessed pages.

4. The method according to any one of claims 1 to 3, characterized in that The hot page statistics mode counts the access results of the page according to the statistics mode associated with the type of the memory medium accessed by the access request, including: A saturation counter of the page associated with the address indicated by the access request is updated, wherein the saturation counter is used to count the access frequency of the page.

5. The method according to claim 4, characterized in that The method further comprises: When the saturation counter overflows, feeding back an indication that the page is a hot page; When the saturation counter does not overflow, an indication that the page is a cold page is fed back.

6. The method according to any one of claims 1 to 5, characterized in that The cold page statistics mode counts the access results of the page according to the statistics mode associated with the type of the memory medium accessed by the access request, including: An indication bit of the page associated with the address indicated by the access request is updated, wherein the indication bit of the page is used to indicate that the page is accessed.

7. The method according to claim 6, characterized in that The method further comprises: Performing information entropy processing on the indicator bits of the multiple pages accessed by the processor according to the spatial local features of the multiple pages to obtain processed data, wherein the processed data is used to indicate the indicator bits of the multiple pages; The processed data is stored.

8. The method according to claim 7, characterized in that Processing indication bits of the plurality of pages according to spatial local features of the plurality of pages accessed by the processor comprises: The address indexes of the plurality of pages and the indicator bits of the plurality of pages are processed according to a storage efficiency target to obtain the processed data, wherein the storage efficiency target is used to indicate a utilization rate of storing valid data in a limited storage space.

9. The method according to any one of claims 1 to 8, characterized in that The method further comprises: The type of the memory medium accessed by the access request is determined according to the address included in the access request.

10. The method according to any one of claims 1 to 9, characterized in that The access result of the page is stored in the storage medium of the computer device.

11. A memory data migration device, characterized in that: include: A communication module, used for obtaining an access request, wherein the access request is used for instructing an application program running on a processor in the computer device to operate a memory medium; a statistical module, configured to count access results of pages according to a statistical mode associated with the type of memory medium accessed by the access request, wherein the access results of the pages are used to determine access popularity of the pages, and the statistical mode includes at least one of a cold page statistical mode and a hot page statistical mode; A migration module is used to trigger memory data migration between at least two different types of memory media according to the access result.

12. A controller, characterized in that: The controller is used to execute the operation steps of the method described in any one of claims 1 to 10 to identify the access heat of pages in the memory.

13. A chip, characterized in that: The chip includes a logic circuit and a power supply circuit; wherein the power supply circuit is used to supply power to the logic circuit; and the logic circuit is used to execute the operation steps of the method described in any one of claims 1 to 10.

14. A computer device, characterized in that: The computer device includes a memory, a processor and multiple different types of memory media, the processor is associated with at least two different types of memory media, and the memory is used to store a set of computer instructions; when the processor executes the set of computer instructions, the operating steps of the method described in any one of claims 1 to 10 are executed to identify the access heat of pages in the memory.

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