Method for determining number of times of access to memory page, and computing device

Abstract

Provided in the embodiments of the present application are a method for determining the number of times of access to a memory page, and a computing device. The method comprises: in response to receiving a first instruction which is sent by a processor, acquiring a storage address of a page attribution table, wherein the first instruction comprises the address of a memory page, the first instruction is used for instructing to access the address of the memory page, and the page attribution table is used for recording a mapping relationship between the address of the memory page and a bucket identifier; determining, on the basis of the storage address of the page attribution table and the address of the memory page, the bucket identifier corresponding to the address of the memory page; and progressively increasing, according to a preset step value, the count value of a counter corresponding to the bucket identifier, wherein the preset step value is 1. The scheme can improve the accuracy of counting the number of times of access to a memory page.

Description

Method for determining the number of memory page accesses and computing device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on June 30, 2023, with application number 202310804111.7 and application name “A method for determining the number of accesses to a memory page and a computing device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of server technology, and in particular to a method for determining the number of times a memory page is accessed and a computing device. Background Art

[0003] Because different storage media have different performances, users want to store data in frequently accessed memory pages (hot pages) in memory to storage media with better performance. To this end, it is necessary to determine the number of accesses to each memory page in the memory.

[0004] In the process of determining the number of memory page accesses, the related art regards a continuous device physical address (DPA) area as a bucket, and determines the number of memory page accesses by determining the number of bucket accesses.

[0005] However, in the related art, when the hot data (high-frequency access data) of the same task is dispersed into different buckets, and each bucket includes multiple memory pages, the statistics of the number of accesses to each memory page included in these multiple buckets will be affected by the hot data, resulting in the method for determining the number of accesses to the memory page in the related art having a low accuracy problem.

[0006] Summary of the Invention

[0007] The embodiments of the present application provide a method and a computing device for determining the number of memory page accesses, which can improve the accuracy of determining the number of memory page accesses.

[0008] In a first aspect, an embodiment of the present application provides a method for determining the number of accesses to a memory page, the method comprising:

[0009] In response to receiving a first instruction sent by the processor, obtaining a storage address of a page affiliation table; wherein the first instruction includes an address of a memory page; the first instruction is used to indicate access to the address of the memory page; the page affiliation table is used to record a mapping relationship between the address of the memory page and the bucket identifier;

[0010] Based on the storage address of the page ownership table and the address of the memory page, determine the bucket identifier corresponding to the address of the memory page;

[0011] The count value of the counter corresponding to the bucket identifier is incremented according to a preset step value; wherein the preset step value is 1.

[0012] A page attribution table is provided, which describes the mapping relationship between the physical address of the memory page and the bucket identifier. When receiving a first instruction, the memory access controller can find the bucket identifier corresponding to the address of the memory page from the page attribution table, and increment the count value of the counter corresponding to the bucket identifier according to a preset step value. By flexibly defining the bucket identifier mapping relationship by software, the memory bucket and the memory page have a flexible mapping relationship, which can realize the placement of hot and cold data in different buckets, and the uneven division of the bucket size, thereby ensuring the accuracy of the determination of the number of memory page accesses.

[0013] In one implementation, the page ownership table is a multi-level page table;

[0014] The multi-level page table includes a first page belonging table, a second page belonging table and a third page belonging table;

[0015] Among them, the first page belonging table is the first-level page table; the second page belonging table is the middle-level page table; the third page belonging table is the last-level page table; the third page belonging table is the first-level or multi-level page table;

[0016] Each page table entry of the first page affiliation table and the second page affiliation table is used to store a storage address of a next-level page affiliation table; each page table entry of the third page affiliation table is used to store a bucket identifier.

[0017] By setting each page table entry of the last-level page attribution table to include a bucket identifier, and each page table entry of the first-level page attribution table and the intermediate-level page attribution table to include the storage address of the next-level page attribution table, the page attribution table can be stored discretely, avoiding the need for continuous memory space to store the entire content of the page attribution table, and improving memory space utilization.

[0018] In one implementation, the storage address of the page affiliation table is the storage address of the first page affiliation table;

[0019] Based on the storage address of the page ownership table and the address of the memory page, the bucket identifier corresponding to the address of the memory page is determined, including:

[0020] Determine, in the first page affiliation table, a storage address of the second page affiliation table based on the storage address of the page affiliation table and the first K bits of the address of the memory page;

[0021] Determine, in the second page affiliation table, a storage address of a third page affiliation table based on the storage address of the second page affiliation table and the middle M bits of the memory page address;

[0022] Based on the storage address of the third page affiliation table and the last N bits of the memory page address, a bucket identifier corresponding to the address of the memory page is determined in the third page affiliation table.

[0023] Based on the storage address of the page attribution table and the address of the memory page, the bucket identifier corresponding to the address of the memory page can be searched level by level.

[0024] In one implementation, the page ownership table is stored in memory.

[0025] By storing the page ownership table that occupies a large space in the memory, the storage pressure of the memory controller is reduced.

[0026] In one implementation, after determining the bucket identifier corresponding to the address of the memory page, the method further includes:

[0027] The bucket identifier corresponding to the address of the memory page is stored in the first memory.

[0028] After determining the bucket identifier corresponding to the storage address of the memory page, the storage address of the memory page and its corresponding bucket identifier are stored in the first memory of the memory access controller so that the bucket identifier corresponding to the address of the memory page can be directly determined later, thereby improving the speed of obtaining the bucket identifier.

[0029] In one implementation, before obtaining the storage address of the page ownership table, the method further includes:

[0030] Determining whether the first memory stores a bucket identifier corresponding to the address of the memory page;

[0031] In the case where the first memory stores a bucket identifier corresponding to the address of the memory page, the count value of the counter corresponding to the bucket identifier is incremented according to a preset step value, wherein the preset step value is 1.

[0032] Upon receiving the first instruction, it is possible to identify whether the first memory of the memory access controller stores a bucket identifier corresponding to the address of the memory page, thereby determining whether the bucket identifier can be quickly obtained. Based on the identification that the first memory stores the bucket identifier corresponding to the address of the memory page, the bucket identifier can be directly obtained, thereby increasing the speed of obtaining the bucket identifier and, in turn, increasing the speed of incrementing the number of memory page accesses based on the first instruction.

[0033] In one implementation, the method further includes:

[0034] When the first memory does not store the bucket identifier corresponding to the address of the memory page, the storage address of the page affiliation table is obtained.

[0035] When it is identified that the first memory of the memory access controller does not store the bucket identifier corresponding to the address of the memory page, the page ownership table may be searched to determine the bucket identifier corresponding to the memory page.

[0036] After incrementing the count value of the counter corresponding to the bucket identifier according to the preset step value, the method further includes:

[0037] The count value of the counter corresponding to the bucket identifier is stored in the second memory.

[0038] The count value of the counter corresponding to the bucket identifier (the number of accesses to the memory page corresponding to the bucket identifier) ​​can be securely stored by storing the count value of the counter corresponding to the bucket identifier in the second memory.

[0039] In one implementation, the method further includes:

[0040] In response to receiving a second instruction sent by the processor, sending a count value of a counter corresponding to the bucket identifier to the processor;

[0041] The second instruction is used to instruct to obtain the number of accesses to the memory page.

[0042] In response to receiving the second instruction sent by the processor, the count value of the counter corresponding to the bucket identifier can be sent to the processor, so that the processor can count the hot and cold pages based on the count value of the counter corresponding to the bucket identifier.

[0043] In a second aspect, an embodiment of the present application provides a memory access controller, including:

[0044] a transceiver module, configured to obtain a storage address of a page attribution table in response to receiving a first instruction sent by the processor; wherein the first instruction includes an address of a memory page; the first instruction is used to indicate access to the address of the memory page; and the page attribution table is used to record a mapping relationship between the address of the memory page and the bucket identifier;

[0045] A processing module, configured to determine a bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page;

[0046] The processing module is further configured to increment the count value of the counter corresponding to the bucket identifier according to a preset step value; wherein the preset step value is 1.

[0047] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0048] In one implementation, the page ownership table is a multi-level page table;

[0049] The multi-level page table includes a first page belonging table, a second page belonging table and a third page belonging table;

[0050] Among them, the first page belonging table is the first-level page table; the second page belonging table is the middle-level page table; the third page belonging table is the last-level page table; the third page belonging table is the first-level or multi-level page table;

[0051] Each page table entry of the first page affiliation table and the second page affiliation table is used to store a storage address of a next-level page affiliation table; each page table entry of the third page affiliation table is used to store a bucket identifier.

[0052] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0053] In one implementation, the storage address of the page affiliation table is the storage address of the first page affiliation table; the processing module is specifically configured to:

[0054] Determine, in the first page affiliation table, a storage address of the second page affiliation table based on the storage address of the page affiliation table and the first K bits of the address of the memory page;

[0055] Determine, in the second page affiliation table, a storage address of a third page affiliation table based on the storage address of the second page affiliation table and the middle M bits in the memory address;

[0056] Based on the storage address of the third page affiliation table and the last N bits of the memory address, a bucket identifier corresponding to the address of the memory page is determined in the third page affiliation table.

[0057] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0058] In one implementation, the page ownership table is stored in memory.

[0059] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0060] In one implementation, after determining the bucket identifier corresponding to the address of the memory page, the processing module is further configured to:

[0061] The bucket identifier corresponding to the address of the memory page is stored in the first memory.

[0062] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0063] In one implementation,

[0064] Before obtaining the storage address of the page attribution table, the processing module is further configured to:

[0065] Determining whether the first memory stores a bucket identifier corresponding to the address of the memory page;

[0066] In the case where the first memory stores a bucket identifier corresponding to the address of the memory page, the count value of the counter corresponding to the bucket identifier is incremented according to a preset step value, wherein the preset step value is 1.

[0067] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0068] In one implementation, the processing module is further configured to:

[0069] When the first memory does not store the bucket identifier corresponding to the address of the memory page, the storage address of the page affiliation table is obtained.

[0070] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0071] In one implementation, after incrementing the count value of the counter corresponding to the bucket identifier according to the preset step value, the processing module is further configured to:

[0072] The count value of the counter corresponding to the bucket identifier is stored in the second memory.

[0073] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0074] In one implementation, the transceiver module is further configured to:

[0075] In response to receiving a second instruction sent by the processor, sending a count value of a counter corresponding to the bucket identifier to the processor;

[0076] The second instruction is used to instruct to obtain the number of accesses to the memory page.

[0077] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0078] In a third aspect, an embodiment of the present application further provides a computing device, comprising: a memory, a memory access controller, and a processor; wherein the memory and the memory access controller are electrically connected; and the memory access controller and the processor are electrically connected;

[0079] The memory access controller is used to execute the method for determining the number of memory page accesses of the first aspect.

[0080] The memory access controller in the computing device provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here. BRIEF DESCRIPTION OF THE DRAWINGS

[0081] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following is a brief introduction to the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0082] FIG1a is a schematic diagram of a scenario of a method for determining the number of accesses to a memory page applicable to the related art;

[0083] FIG1b is a schematic diagram of another method for determining the number of memory page accesses applicable to the related art;

[0084] FIG2 is a system architecture diagram of a computing device provided in an embodiment of the present application;

[0085] FIG3 is a flow chart of a first embodiment of a method for determining the number of accesses to a memory page according to an embodiment of the present application;

[0086] FIG4a is a schematic diagram showing the structure of page table entries in page tables of various levels in a page ownership table provided by an embodiment of the present application;

[0087] FIG4 b is a schematic diagram showing the principle of searching for a bucket identifier according to an embodiment of the present application;

[0088] FIG4c is a schematic diagram showing the structure of page table entries in page tables of various levels in another page ownership table provided by an embodiment of the present application;

[0089] FIG5 is a flow chart of a third embodiment of a method for determining the number of accesses to a memory page provided by an embodiment of the present application;

[0090] FIG6 is a flow chart of a fourth embodiment of a method for determining the number of accesses to a memory page provided by an embodiment of the present application;

[0091] FIG7 is a schematic diagram of a scenario for constructing a page attribution table applicable to an embodiment of the present application;

[0092] FIG8 is a schematic structural diagram of a memory access controller provided in an embodiment of the present application. DETAILED DESCRIPTION

[0093] To make the purpose, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments made by ordinary technicians in this field based on the inspiration of these embodiments fall within the scope of protection of this application.

[0094] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the numbers used in this way are interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0095] Figure 1a is a schematic diagram of a scenario for determining the number of memory page accesses applicable to the related art. Figure 1a shows three buckets (bucket 1, bucket 2, and bucket 3) and three counters (bucket 1 counter, bucket 2 counter, and bucket 3 counter). Each bucket (contiguous physical address area) includes four memory pages. A, B, C, and D represent four different tasks.

[0096] The four memory pages in bucket 1 store the data for tasks A, B, C, and D, respectively. The four memory pages in bucket 2 store the data for tasks A, B, C, and D, respectively. The four memory pages in bucket 3 store the data for tasks A, B, C, and D, respectively.

[0097] If the data for task A is hot data, and the data for tasks B, C, and D are all cold data, buckets 1, 2, and 3 all contain data for task A. Therefore, buckets 1, 2, and 3 are all identified as containing hot data. This means that the determination of the access count for each memory page included in these buckets is affected by the hot data, resulting in low accuracy in the related art methods for determining the access count for memory pages, and also impacting the accuracy of determining hot and cold data.

[0098] Figure 1b is a schematic diagram of another method for determining the number of memory page accesses applicable to the related art. Figure 1b shows three buckets (bucket 4, bucket 5, and bucket 6) and three counters (bucket 4 counter, bucket 5 counter, and bucket 6 counter). Each bucket (contiguous physical address area) can be evenly divided into four memory pages. E, F, G, and H represent four different tasks.

[0099] Of the four memory pages in bucket 4, three store data for task E and one for task H. Of the four memory pages in bucket 5, two store data for task F, one for task G, and one for task H. Of the four memory pages in bucket 6, four store data for task H.

[0100] If the data of task H is hot data and the data of tasks E, F, and G are cold data, buckets 4, 5, and 6 will all be identified as containing hot data because they all contain data from task H. In other words, the determination of the access count for each memory page included in these buckets will be affected by the hot data.

[0101] In summary, in the related art, a continuous device physical address area is regarded as a bucket, and the continuous device physical address area corresponding to each bucket occupies the same memory space. This method of evenly dividing the buckets and treating a continuous device physical address as a bucket has the problem of low accuracy in determining the number of memory page accesses.

[0102] In addition, it should be noted that the hardware (such as the memory access controller) lacks sufficient heuristic information (bucketing logic method) to perform non-uniform bucketing, and the hardware can only perform non-uniform bucketing based on the information transmitted by the software. It should be noted that the software can also tell the hardware how to perform non-uniform bucketing through multiple interactions with the hardware. For example, the software can tell the hardware to divide the buckets into 4KB sizes for the physical address area of ​​the first device (such as address segment A). For the physical address area of ​​the second device (such as address segment B), the buckets are divided into 8KB sizes. However, when the physical address area (address segment) of the device is relatively fragmented, multiple interactions between the software and hardware are required to complete the bucketing process, and the bucketing process is relatively cumbersome.

[0103] Based on the above technical problems, an embodiment of the present application provides a method for determining the number of accesses to a memory page, in which a page attribution table that records the mapping relationship between the address of the memory page and the bucket identifier is provided. When receiving a first instruction including the address of the memory page, the memory access controller can determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page, and increment the count value of the counter corresponding to the bucket identifier according to a preset step value. By flexibly defining the mapping relationship between bucket numbers by software, the buckets and memory pages have a flexible mapping relationship, which can realize the placement of hot and cold data in different buckets, and the uneven division of the bucket sizes, thereby ensuring the accuracy of determining the number of memory page accesses.

[0104] The following is a detailed description of the method for determining the number of memory page accesses according to an embodiment of the present application.

[0105] FIG2 is a system architecture diagram of a computing device provided in an embodiment of the present application.

[0106] As shown in FIG. 2 , the computing device 400 includes a memory access controller 200 , and a processor 100 and a memory 300 electrically connected to the memory access controller 200 .

[0107] The memory controller 200 is used to control the memory 300 and is responsible for data exchange between the memory 300 and the processor 100 .

[0108] Processor 100: can be a central processing unit (CPU), an out-of-band controller, or other devices with specific processing capabilities.

[0109] Memory access controller 200: The memory access controller 200 may be a memory controller, a computer express link (CXL) memory access controller, or other types of controllers that can control memory and exchange data between the memory and the processor.

[0110] Memory 300: Also known as internal memory, memory 300 is a key component of computing device 400. It temporarily stores processor computation data and data exchanged between the processor and external memory. It serves as a bridge between external memory (or auxiliary memory) and the processor. Memory 300 can be CXL memory or dynamic random access memory (DRAM).

[0111] It should be noted that one or more software programs may be run on the processor 100. For example, the processor 100 may run management software 101, application software 103, and application software 104. The processor 100 may also include a third memory 102 for storing a page attribution table. The page attribution table describes the mapping relationship between the address of a memory page and a bucket identifier.

[0112] The memory access controller 200 may include a memory access interface 201, a setting interface 202, and a query interface 203. The above three interfaces may be a multiplexed interface or multiple independent interfaces.

[0113] The memory controller 200 may further include a first memory 205 .

[0114] In one achievable manner, the first memory 205 may be used to store a mapping relationship table of memory page addresses and their corresponding bucket identifiers.

[0115] In one achievable manner, the first memory 205 may also be used to store the storage address of the page affiliation table.

[0116] In one implementable manner, there may be two first memories 205, wherein one first memory 205 stores a mapping relationship table of the addresses of memory pages and their corresponding bucket identifiers; exemplarily, the memory for storing the mapping relationship table of the addresses of memory pages and their corresponding bucket identifiers may be a memory such as a flash memory; the other first memory 205 is used to store the storage address of the page attribution table; exemplarily, the memory for storing the storage address of the page attribution table may be a register.

[0117] The memory access controller 200 may include a second memory 206, which may store count values ​​of counters corresponding to bucket identifiers. It should be noted that the first memory 205 and the second memory 206 may be the same memory or different memories.

[0118] The memory controller 200 may run a mapping relationship lookup logic 204 (program).

[0119] The memory access controller 200 may also run a counter 207 (program) (each bucket identifier may correspond to a counter). The count value of the timer may be incremented according to a preset step value.

[0120] The memory controller 200 can obtain the page attribution table and the storage address of the page attribution table sent by the processor 100. The memory controller 200 can store the storage address of the page attribution table in the first memory 205 and store the page attribution table in the memory 300. Specifically, the management software 101 on the processor 100 can send the storage address of the page attribution table and the page attribution table to the memory controller 200 through the setting interface 202. The memory controller 200 can store the storage address of the page attribution table in the first memory 205. The memory controller 200 can store the page attribution table in the memory 300.

[0121] The memory controller 200 can respond to the first instruction sent by the host 100, and search the page attribution table stored in the memory 100 for the bucket identifier corresponding to the address of the memory page in the first instruction, and increment the count value of the counter corresponding to the bucket identifier according to the preset step value. Specifically, when the application software 103 or the application software 104 of the processor 100 accesses the memory 300 through the memory access interface 201 of the memory controller 200, the mapping relationship search logic 204 is triggered to search the storage address of the page attribution table recorded in the first memory 205, and then determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page, and increment the count value of the counter corresponding to the bucket identifier according to the preset step value.

[0122] In response to the second instruction sent by the processor 100, the memory access controller 200 may send the count value of the counter corresponding to each bucket identifier to the processor 100, so that the processor 100 can count the hot and cold pages based on the count value of the counter corresponding to each bucket identifier. Specifically, the management software 101 on the processor 100 may obtain the count value of the counter corresponding to the bucket identifier stored in the second memory 206 through the query interface 203 of the memory access controller 200.

[0123] It should be noted that the processor 100, memory controller 200, and memory 300 shown in Figure 2 belong to the same computing device. The processor 100, memory controller 200, and memory 300 may also belong to different computing devices.

[0124] In one implementation, when the processor 100 , the memory controller 200 , and the memory 300 belong to the same computing device, the memory controller 200 and the memory 300 may be integrated into the same memory device, for example, both may be integrated into the same board.

[0125] In one implementation, when the processor 100, the memory controller 200, and the memory 300 belong to the same computing device, the processor 100 and the memory controller 200 can be integrated together; for example, the memory controller 200 can be a memory controller, and the memory controller 200 can be integrated into the processor 100.

[0126] In one implementation, when the processor 100, memory controller 200, and memory 300 belong to different computing devices, the processor 100 may belong to a first computing device, the memory controller 200 and memory 300 may belong to a second computing device (for example, the second computing device may be a CXL device), or the memory controller 200 and memory 300 may be integrated into the same memory device. The first computing device and the second computing device may be connected via a cable.

[0127] It should also be noted that the computing device 400 may be a server or a terminal device (such as a computer, etc.).

[0128] It should also be noted that Figure 2 is only a system architecture diagram of a computing device provided in an embodiment of the present application. The embodiment of the present application does not limit the actual form of the various devices included in Figure 2, nor does it limit the interaction method between the devices in Figure 2. In the application of the solution, it can be set according to actual needs.

[0129] The technical solution of the present application is described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0130] FIG3 is a flow chart of a method for determining the number of accesses to a memory page according to an embodiment of the present application. Referring to FIG3 , the method specifically includes the following steps:

[0131] S301: In response to receiving a first instruction sent by a processor, obtaining a storage address of a page affiliation table.

[0132] In this embodiment, the memory access controller may obtain the storage address of the page affiliation table in response to receiving the first instruction sent by the processor.

[0133] The page ownership table is used to record the mapping relationship between the address of the memory page and the bucket number.

[0134] The first instruction includes the address of the memory, and the first instruction is used to instruct access to the address of the memory page. It should be noted that, since the address of the memory includes the address of the memory page, the first instruction includes the address of the memory page.

[0135] In addition, when receiving the first instruction sent by the memory, the memory access controller can also read the data in the memory page from the memory based on the address of the memory page in the first instruction, and feed the data in the memory page back to the processor.

[0136] It should be noted that the access controller can pre-acquire the page affiliation table sent by the processor and store the page affiliation table in the memory. The memory controller can also pre-acquire the storage address of the page affiliation table sent by the processor and store the storage address of the page affiliation table in the first memory of the memory controller.

[0137] It should also be noted that the processor can flexibly construct a page ownership table based on user needs. The page ownership table describes the mapping relationship between the address of a memory page and the bucket identifier. It should be noted that the memory space occupied by the bucket corresponding to each bucket identifier can be the same or different in size.

[0138] By flexibly defining the bucket number mapping relationship by software, a flexible mapping relationship is established between memory buckets and memory pages, which enables hot and cold data to be placed in different buckets, and enables uneven division of bucket sizes, thereby ensuring the accuracy of determining the number of memory page accesses.

[0139] Exemplarily, the processor can identify the address of the memory page corresponding to the data of each task based on user requirements (the requirement that the data in all memory pages corresponding to each bucket identifier is the data of the same task) to divide the bucket identifiers corresponding to the addresses of the memory pages corresponding to the data of each task. During the division process, the addresses of multiple memory pages corresponding to the data of each task are mapped to the same bucket identifier, or to different bucket identifiers. The addresses of memory pages corresponding to the data of different tasks are mapped to different bucket identifiers. In other words, the data of the same task can be stored in the same bucket or in different buckets, and the data stored in the same bucket is the data of the same task. In one implementation, the processor can construct a page attribution table based on the mapping relationship between the address of the memory page input by the user and the bucket identifier. By setting the page attribution table in such a way that the same bucket only includes the data of the same task, it is possible to place hot and cold data in different buckets, thereby ensuring the accuracy of determining the number of memory page accesses, thereby improving the accuracy of the subsequent processor's statistics of hot and cold pages based on the number of memory page accesses.

[0140] S302: Determine a bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page.

[0141] In this embodiment, after obtaining the storage address of the page attribution table and the address of the memory page, the memory access controller can determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page. In other words, the memory access controller can search the page attribution table stored in the memory based on the storage address of the page attribution table and the address of the memory page to determine the bucket identifier corresponding to the address of the memory page. Exemplarily, the bucket identifier can be a bucket number. This embodiment does not limit the specific form of the bucket identifier.

[0142] It should be noted that, in one implementation, a page attribution table may also be stored in the memory access controller. In the case where the memory access controller stores the page attribution table, the memory access controller may, in response to the first instruction sent by the processor, directly search for the bucket identifier corresponding to the address of the memory page from the page attribution table stored in the memory access controller, and increment the count value of the counter corresponding to the bucket identifier according to a preset step value. It should also be noted that, before searching for the bucket identifier corresponding to the address of the memory page in the first instruction from the page attribution table, the memory access controller may obtain the page attribution table sent by the processor and store the page attribution table in the first memory of the memory access controller.

[0143] S303: Increment the count value of the counter corresponding to the bucket identifier according to a preset step value.

[0144] In this embodiment, after determining the bucket identifier corresponding to the address of the memory page, the memory access controller may increment the count value of the counter corresponding to the bucket identifier according to a preset step value, wherein the preset step value is 1.

[0145] In other words, the memory access controller may increase the number of accesses corresponding to the bucket identifier by 1.

[0146] In this embodiment, a page attribution table is provided, which describes the mapping relationship between the address of the memory page and the bucket identifier. When receiving a first instruction including the address of the memory page, the memory access controller can obtain the storage address of the page attribution table, determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page, and increment the count value of the counter corresponding to the bucket identifier by a preset step value to add 1 to the number of accesses to the memory page. By flexibly defining the bucket number mapping relationship by software, the memory bucket and the memory page have a flexible mapping relationship, which can realize the placement of hot and cold data in different buckets, and the uneven division of the bucket size, thereby ensuring the accuracy of identifying hot and cold data, and thereby improving the accuracy of the subsequent processor's statistics on hot and cold pages.

[0147] The following describes in detail a process in which the memory access controller determines the bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page through a second method embodiment.

[0148] In this embodiment, the page affiliation table may be a multi-level page table and is stored in a memory.

[0149] In the case where the page attribution table is a multi-level page table, the multi-level page table includes a first page attribution table, a second page attribution table, and a third page attribution table. The first page attribution table is a first-level page table; the second page attribution table is an intermediate-level page table; the third page attribution table is a last-level page table; and the second page attribution table is a first-level or multi-level page table.

[0150] For example, Figure 4a is a schematic diagram of the structure of page table entries in each level of page tables in a page attribution table provided in an embodiment of the present application. Each page table entry in the first page attribution table and the second page attribution table is used to store the storage address of the next level page attribution table; each page table entry in the third page attribution table is used to store a bucket identifier.

[0151] The memory controller determines the bucket identifier corresponding to the memory page address based on the storage address in the page ownership table and the address of the memory page:

[0152] After obtaining the storage address of the page affiliation table (the storage address of the first page affiliation table), the memory controller determines the storage address of the second page affiliation table in the first page affiliation table based on the storage address of the page affiliation table (the storage address of the first page affiliation table) and the first K bits of the address of the memory page. In other words, the memory controller can determine that a page table entry in the first page affiliation table is the first target page table entry based on the storage address of the first page affiliation table and the first K bits of the address of the memory page, and use the storage address of the next-level page affiliation table stored in the first target page table entry as the storage address of the second page affiliation table.

[0153] The memory controller determines the storage address of the third page affiliation table in the second page affiliation table based on the storage address of the second page affiliation table and the middle M bits of the memory address. In other words, the memory controller can determine that a page table entry in the second page affiliation table is the second target page table entry based on the storage address of the second page affiliation table and the middle M bits of the address of the memory page, and use the storage address of the next-level page affiliation table stored in the second target page table entry as the storage address of the third page affiliation table.

[0154] The memory controller determines the bucket identifier corresponding to the address of the memory page in the third page affiliation table based on the storage address in the third page affiliation table and the last N bits of the memory address. In other words, the memory controller can determine that a page table entry in the third page affiliation table is the third target page table entry based on the storage address in the third page affiliation table and the last N bits of the memory address, and use the bucket identifier stored in the third target page table entry as the bucket identifier corresponding to the address of the memory page.

[0155] Figure 4b is a schematic diagram of the principle of searching for a bucket identifier provided by an embodiment of the present application. As shown in Figure 4b, for the address of a first memory page and the address of a second memory page, the memory access controller can determine the bucket identifier corresponding to the address of the first memory page and determine the bucket identifier corresponding to the address of the second memory page.

[0156] Specifically, when the page ownership table is a three-level page table, in the process of determining the bucket identifier corresponding to the address of the first memory page:

[0157] The memory controller may determine, based on the storage address of the page affiliation table (the storage address of the first page affiliation table) and the first K bits of the address of the first memory page, that the fourth page table entry among the multiple page table entries in the first page affiliation table is the first target page table entry. The memory controller may determine, based on the storage address of the next-level page affiliation table in the first target page table entry, the storage address of the second page affiliation table. The memory controller may determine, based on the storage address of the second page affiliation table and the middle M bits of the address of the first memory page, that the second page table entry among the multiple page table entries in the second page affiliation table is the second target page table entry. The memory controller may determine, based on the storage address of the next-level page affiliation table in the second target page table entry, the storage address of the third page affiliation table. The memory controller may determine, based on the storage address of the third page affiliation table and the last N bits of the address of the first memory page, that the third page table entry among the multiple page table entries in the third page affiliation table is the third target page table entry. The memory controller may determine, based on the storage address of the third page affiliation table and the last N bits of the address of the first memory page, the bucket identifier (bucket identifier 1) stored in the third target page table entry as the bucket identifier corresponding to the address of the first memory page.

[0158] When the page ownership table is a three-level page table, in the process of determining the bucket identifier corresponding to the address of the second memory page:

[0159] The memory access controller may determine that the fourth page table entry among the multiple page table entries in the first page affiliation table is the first target page table entry based on the storage address of the page affiliation table (the storage address of the first page affiliation table) and the first K bits of the address of the second memory page. The memory access controller may determine that the storage address of the next-level page affiliation table in the first target page table entry is the storage address of the second page affiliation table. The memory access controller may determine that the fourth page table entry among the multiple page table entries in the second page affiliation table is the second target page table entry based on the storage address of the second page affiliation table and the middle M bits of the address of the second memory page. The memory access controller may determine that the storage address of the next-level page affiliation table in the second target page table entry is the storage address of the third page affiliation table. The memory access controller may determine that the fifth page table entry among the multiple page table entries in the third page affiliation table is the third target page table entry based on the storage address of the third page affiliation table and the last N bits of the address of the second memory page. The memory access controller may determine that the bucket identifier (bucket identifier 4) stored in the third target page table entry is the bucket identifier corresponding to the address of the first memory page. In one implementation, when the page affiliation table is a multi-level page table, each page table entry of the first page affiliation table and the second page affiliation table is used to store the storage address of the next level page affiliation table and the bucket identifier corresponding to the next level page affiliation table.

[0160] Figure 4c is a schematic diagram of the structure of page table entries in each level of page tables in another page attribution table provided in an embodiment of the present application. As shown in Figure 4c, when the page attribution table is a three-level page table, each page table entry in the first page attribution table includes the storage address of the next level page attribution table (the second page attribution table) and the corresponding bucket identifier. Each page table entry in the second page attribution table includes the storage address of the next level page attribution table (the third page attribution table) and the corresponding bucket identifier. Each page table entry in the third page attribution table includes a bucket identifier.

[0161] In the process of finding the bucket identifier corresponding to the address of the memory page:

[0162] Based on the fact that each page table entry of the first page attribution table (first-level page attribution table) includes the storage address of the next-level page attribution table and the corresponding bucket identifier, the memory access controller can directly determine the bucket identifier corresponding to the address of the memory page in the first page attribution table based on the storage address of the page attribution table (the storage address of the first page attribution table) and the first K bits of the address of the memory page.

[0163] It should be noted that when all page table entries in a certain level of page attribution table correspond to the same bucket identifier, the bucket identifier can be directly registered in the page table entry of the upper level page attribution table corresponding to the page attribution table, so that the memory does not need to store the page attribution table of this level, thereby achieving the effect of saving memory.

[0164] Furthermore, it should be noted that, since it is easy to distinguish between the bucket identifier and the storage address of the next-level page affiliation table, the storage address of the next-level page affiliation table included in a page table entry can reuse the same memory unit as the bucket identifier, thereby further saving the memory space required to store the page affiliation table. For example, the storage address of the next-level page affiliation table included in a page table entry can be stored in the same page as the bucket identifier, where a page represents the smallest read / write unit in memory.

[0165] In this embodiment, the page attribution table that occupies a larger space is stored in the memory, and the storage address of the page attribution table that occupies a smaller space is stored in the memory access controller. The memory access controller can search the page attribution table for the bucket identifier corresponding to the address of the memory page by reading the storage address of the page attribution table stored in the memory access controller and the address of the memory page. The embodiment of the present application reduces the storage pressure of the memory access controller by storing the storage address of the page attribution table in the memory access controller and storing the page attribution table in the memory with a larger storage space.

[0166] FIG5 is a flow chart of a third embodiment of a method for determining the number of accesses to a memory page provided by an embodiment of the present application. Referring to FIG5 , the method specifically includes the following steps:

[0167] S501: In response to receiving a first instruction sent by a processor, determining whether a first memory stores a bucket identifier corresponding to an address of a memory page.

[0168] In this embodiment, in response to receiving the first instruction sent by the processor, the memory access controller may determine whether the first memory stores the bucket identifier corresponding to the address of the memory page.

[0169] If the memory access controller determines that the first memory does not store the bucket identifier corresponding to the address of the memory page, it executes S502; if the memory access controller determines that the first memory stores the bucket identifier corresponding to the address of the memory page, it executes S506.

[0170] S502: Obtain the storage address of the page ownership table.

[0171] In this embodiment, when the memory access controller determines that the first memory does not store the bucket identifier corresponding to the address of the memory page, it can obtain the storage address of the page affiliation table.

[0172] S503: Determine a bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page.

[0173] In this embodiment, after obtaining the storage address of the page affiliation table, the memory access controller can determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page. The specific execution is the same as S302 and will not be repeated here.

[0174] S504: Increment the count value of the counter corresponding to the bucket identifier according to the preset step value.

[0175] In this embodiment, the memory access controller may increment the count value of the counter corresponding to the bucket identifier according to a preset step value, wherein the preset step value is 1. The specific execution is the same as S303 and will not be repeated here.

[0176] S505: Store the address of the memory page and its corresponding bucket identifier in the first memory.

[0177] In this embodiment, after determining the bucket identifier corresponding to the address of the memory page, the memory access controller can store the address of the memory page and its corresponding bucket identifier in the first memory of the memory access controller. For example, the address of the memory page and its corresponding bucket identifier are stored in a mapping table so that the bucket identifier corresponding to the memory page can be quickly obtained later.

[0178] It should be noted that the embodiment of the present application does not limit the execution order of S504 and S505. The memory access controller may execute S504 first and then execute S505; or the memory access controller may execute S505 first and then execute S504.

[0179] S506: Increment the count value of the counter corresponding to the bucket identifier according to the preset step value.

[0180] In this embodiment, when the memory access controller determines the bucket identifier corresponding to the address of the memory page stored in the first memory, it can increase the count value of the counter corresponding to the bucket identifier according to the preset step value. The preset step value is 1. In one implementation, the memory access controller can also add 1 to the number of calls corresponding to the address of the memory page. The memory access controller can sort the addresses of multiple memory pages stored in the memory access controller according to the number of calls corresponding to the address of each memory page, and delete the addresses of memory pages whose sorting is less than the preset sequence number and their corresponding bucket identifiers.

[0181] In one implementation, the memory access controller may establish a mapping relationship between the address of the memory page and the call time information. The memory access controller may filter out memory pages whose corresponding call time information and the current time information have a time interval greater than a preset time interval, and delete the mapping relationship between the filtered memory pages and the bucket identifier.

[0182] In this embodiment, the memory access controller can determine whether the bucket identifier corresponding to the address of the memory page is stored in the first memory when receiving the first instruction. In the case where the bucket identifier corresponding to the address of the memory page is stored in the first memory, the count value of the counter corresponding to the bucket identifier is incremented according to the preset step value; in the case where the bucket identifier corresponding to the address of the memory page is not stored in the first memory, the storage address of the page attribution table is obtained, and based on the storage address of the page attribution table and the address of the memory page, the bucket identifier corresponding to the address of the memory page is determined, and the count value of the counter corresponding to the bucket identifier is incremented according to the preset step value. By directly obtaining the bucket identifier based on the bucket identifier corresponding to the address of the memory page stored in the first memory of the memory access controller, the speed of obtaining the bucket identifier is improved, thereby improving the speed of adding 1 to the number of memory page accesses based on the first instruction.

[0183] FIG6 is a flow chart of a fourth embodiment of a method for determining the number of accesses to a memory page provided by an embodiment of the present application. Referring to FIG6 , the method specifically includes the following steps:

[0184] S601: In response to receiving a first instruction sent by a processor, obtaining a storage address of a page affiliation table.

[0185] In this embodiment, the memory access controller obtains the storage address of the page attribution table in response to receiving the first instruction sent by the processor; wherein the first instruction includes the address of the memory page; the first instruction is used to indicate the address of the memory page to be accessed; the page attribution table is used to record the mapping relationship between the address of the memory page and the bucket identifier.

[0186] The specific implementation method is the same as S301 and will not be repeated here.

[0187] S602: Determine a bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page.

[0188] In this embodiment, the memory access controller may determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page affiliation table and the address of the memory page.

[0189] The specific implementation method is the same as S302 and will not be repeated here.

[0190] S603: Increment the count value of the counter corresponding to the bucket identifier according to the preset step value.

[0191] In this embodiment, the memory access controller may increment the count value of the counter corresponding to the bucket identifier according to a preset step value, wherein the preset step value is 1.

[0192] The specific implementation method is the same as S303 and will not be repeated here.

[0193] S604: Store the count value of the counter corresponding to the bucket identifier in the second memory.

[0194] In this embodiment, the memory access controller may store the count value of the counter corresponding to the bucket identifier in the second memory of the memory access controller, so as to save the count value of the counter corresponding to the bucket number.

[0195] S605: In response to receiving the second instruction sent by the processor, send the count value of the counter corresponding to the bucket identifier to the processor.

[0196] In this embodiment, the memory access controller may send the count value of the counter corresponding to the bucket identifier to the processor in response to receiving a second instruction sent by the processor, wherein the second instruction is used to indicate the number of access times to obtain the memory page.

[0197] It should be noted that the processor can count the hot and cold pages according to the count value of the counter corresponding to the bucket identifier.

[0198] In one implementation, after receiving the count value of the counter corresponding to the bucket identifier, the processor determines the memory page corresponding to the bucket identifier whose count value is greater than a preset threshold as a hot page; and determines the memory page corresponding to the bucket identifier whose count value is less than or equal to the preset threshold as a cold page.

[0199] Specifically, the management software in the processor can determine the hot and cold page status corresponding to each bucket identifier based on the preset threshold in the user's needs and the count value of the counter corresponding to the bucket identifier sent by the memory access controller, thereby determining the hot and cold page status corresponding to each memory page.

[0200] After counting the hot and cold pages, the processor's management software can migrate the data in the hot pages from memory to the dynamic random access memory (DRAM) directly connected to the processor. Specifically, the processor's management software can allocate a new page in DRAM and then copy the data from the old page (the memory page counted as the hot page) to the new page. The processor's management software can then unmap the old page (the mapping relationship between the logical address and the physical address), remap the mapping relationship to the new page, and release the old page.

[0201] In this embodiment, a page attribution table is provided, which describes the mapping relationship between the address of the memory page and the bucket identifier. The memory access controller obtains the storage address of the page attribution table in response to receiving the first instruction sent by the processor. The memory access controller determines the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page. The memory access controller increments the count value of the counter corresponding to the bucket identifier according to a preset step value. The memory access controller stores the count value of the counter corresponding to the bucket identifier in a second memory. The memory access controller can send the count value of the counter corresponding to the bucket identifier to the processor in response to receiving the second instruction sent by the processor. By the above-mentioned method of flexibly defining the bucket identifier mapping relationship by software, a more refined bucketing rule can be provided, thereby improving the accuracy of the subsequent processor in counting hot and cold pages based on the count value of the counter corresponding to the bucket identifier.

[0202] The following describes in detail the process in which the memory controller obtains the page ownership table sent by the processor and stores the page ownership table in the memory through the fifth method embodiment.

[0203] In this embodiment, the memory access controller may obtain the page ownership table sent by the processor, and store the page ownership table in the memory.

[0204] Taking a CXL type 3 memory device as an example, the memory controller may obtain a page ownership table sent by the processor. The page ownership table may be a four-level page table, including a first page ownership table, a second page ownership table, and a third page ownership table. The second page ownership table may be a two-level page table.

[0205] The size of each level of page ownership table is 4KB. The length of each page table entry in the first page ownership table is 2 bytes, which supports up to 65536 buckets (2 bytes 16 bits, which can represent 2 16 = 65536 states). The page table entries of the remaining levels are all 8 bytes long. The entire page ownership table can describe the bucket mapping relationship of up to 512*512*512*2048 memory pages.

[0206] In one implementation, the memory access controller may include 256 counters, that is, supports the use of 256 bucket identifiers.

[0207] FIG7 is a schematic diagram of a scenario for constructing a page attribution table applicable to an embodiment of the present application.

[0208] As shown in FIG7 , the virtual address space (logical address range) of task 1 is 0x1000-0x6000 and 0x21000-0x23000 respectively.

[0209] The memory pages corresponding to 0x1000-0x6000 are 0x800000, 0x802000, 0x900000, 0x901000, and 0x902000. The memory pages corresponding to 0x21000-0x23000 are 0x801000 and 0x803000.

[0210] The virtual address spaces of task 2 are 0x1000-0x2000 and 0x41000-0x45000 respectively.

[0211] The memory page corresponding to 0x1000-0x2000 is 0x804000. The memory pages corresponding to 0x41000-0x45000 are 0x805000, 0x903000, 0x904000, and 0x905000.

[0212] The management software in the processor can build a page ownership table that describes the mapping between memory page addresses and bucket identifiers. In other words, the page ownership table describes the bucket identifiers corresponding to memory pages 0x800000, 0x802000, 0x90000, 0x901000, 0x902000, 0x801000, 0x803000, 0x804000, 0x805000, 0x903000, 0x904000, and 0x905000.

[0213] In one implementation, 0x800000, 0x802000, 0x90000, 0x901000, and 0x902000 correspond to bucket identifier 1; 0x801000 and 0x803000 correspond to bucket identifier 2; 0x804000 corresponds to bucket identifier 3; and 0x805000, 0x903000, 0x904000, and 0x905000 correspond to bucket identifier 4.

[0214] After constructing the page ownership table, the processor can send the page ownership table to the memory controller. After receiving the page ownership table, the memory controller can read the page ownership table using Direct Memory Access (DMA) and store it in the memory.

[0215] In this embodiment, the processor can flexibly construct a page attribution table based on user needs. By flexibly defining the bucket identifier mapping relationship through software, more refined bucketing rules can be provided, thereby improving the accuracy of the subsequent processor's calculation of hot and cold pages based on the count value of the counter corresponding to the bucket identifier.

[0216] The following are device embodiments of the present application, which can be used to implement the method embodiments of the present application. For details not disclosed in the device embodiments of the present application, please refer to the method embodiments of the present application.

[0217] The embodiment of the present application also provides a memory access controller. Figure 8 is a structural diagram of a memory access controller provided by the embodiment of the present application; as shown in Figure 8, the memory access controller 80 includes: a transceiver module 81 and a processing module 82. The transceiver module 81 is used to obtain the storage address of the page attribution table in response to receiving a first instruction sent by the processor; the first instruction includes the address of the memory page; the first instruction is used to indicate the address of the memory page to be accessed; the page attribution table is used to record the mapping relationship between the address of the memory page and the bucket identifier; the processing module 82 is used to determine the bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page; the processing module 82 is also used to increment the count value of the counter corresponding to the bucket identifier according to a preset step value; the preset step value is 1.

[0218] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0219] In one implementation, the page attribution table is a multi-level page table; the multi-level page table includes a first page attribution table, a second page attribution table and a third page attribution table; wherein, the first page attribution table is a first-level page table; the second page attribution table is an intermediate-level page table; the third page attribution table is a last-level page table; the second page attribution table is a first-level or multi-level page table; each page table entry of the first page attribution table and the second page attribution table is used to store the storage address of the next-level page attribution table; each page table entry of the third page attribution table is used to store a bucket identifier.

[0220] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0221] In one implementation, the storage address of the page attribution table is the storage address of the first page attribution table; the processing module 82 is specifically used to: determine the storage address of the second page attribution table in the first page attribution table based on the storage address of the page attribution table and the first K bits in the address of the memory page; determine the storage address of the third page attribution table in the second page attribution table based on the storage address of the second page attribution table and the middle M bits in the memory page address; determine the bucket identifier corresponding to the address of the memory page in the third page attribution table based on the storage address of the third page attribution table and the last N bits in the memory page address.

[0222] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0223] In one implementation, the page ownership table is stored in memory.

[0224] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0225] In one implementation, after determining the bucket identifier corresponding to the address of the memory page, the processing module 82 is further configured to: store the bucket identifier corresponding to the address of the memory page in the first memory.

[0226] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0227] In one implementation, before obtaining the storage address of the page attribution table, the processing module 82 is also used to: determine whether the first memory stores the bucket identifier corresponding to the address of the memory page; if the first memory stores the bucket identifier corresponding to the address of the memory page, increase the count value of the counter corresponding to the bucket identifier according to a preset step value, wherein the preset step value is 1.

[0228] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0229] In one implementation, the processing module 82 is further configured to: when the first memory does not store the bucket identifier corresponding to the address of the memory page, obtain the storage address of the page affiliation table.

[0230] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0231] In one implementation, after the count value of the counter corresponding to the bucket identifier is incremented according to the preset step value, the processing module 82 is further configured to: store the count value of the counter corresponding to the bucket identifier in the second memory.

[0232] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0233] In one implementation, the transceiver module 81 is further used to: in response to receiving a second instruction sent by the processor, send the count value of the counter corresponding to the bucket identifier to the processor; wherein the second instruction is used to indicate the number of times the memory page is accessed.

[0234] The memory access controller provided in this embodiment can execute the technical solution in the above method embodiment, and its beneficial effects are similar, which will not be described again here.

[0235] The embodiment of the present application further provides a computing device, comprising: a memory, a memory access controller, and a processor; wherein the memory and the memory access controller are electrically connected; the memory access controller and the processor are electrically connected;

[0236] The memory access controller is used to execute the technical solution in the aforementioned method embodiment. Its implementation principle and technical effects are similar and will not be repeated here.

[0237] Those skilled in the art will appreciate that all or part of the steps in the above-described method embodiments can be implemented by hardware associated with program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM, magnetic disk, or optical disk.

[0238] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for determining the number of accesses to a memory page, characterized in that: The method comprises: In response to receiving a first instruction sent by the processor, a storage address of a page attribution table is obtained; wherein the first instruction includes an address of a memory page; the first instruction is used to indicate an address of accessing the memory page; the page attribution table is used to record a mapping relationship between the address of the memory page and a bucket identifier; Determine a bucket identifier corresponding to the address of the memory page based on the storage address of the page attribution table and the address of the memory page; The count value of the counter corresponding to the bucket identifier is incremented according to a preset step value; wherein the preset step value is 1.

2. The method according to claim 1, characterized in that The page attribution table is a multi-level page table; The multi-level page table includes a first page attribution table, a second page attribution table and a third page attribution table; Wherein, the first page attribution table is a first-level page table; the second page attribution table is a middle-level page table; the third page attribution table is a last-level page table; the second page attribution table is a first-level or multi-level page table; Each page table entry of the first page attribution table and the second page attribution table is used to store the storage address of the next-level page attribution table; each page table entry of the third page attribution table is used to store a bucket identifier.

3. The method according to claim 2, characterized in that The storage address of the page belonging table is the storage address of the first page belonging table; The determining, based on the storage address of the page attribution table and the address of the memory page, a bucket identifier corresponding to the address of the memory page includes: Determine the storage address of the second page belonging table in the first page belonging table based on the storage address of the page belonging table and the first K bits of the address of the memory page; Determine the storage address of the third page belonging table in the second page belonging table based on the storage address of the second page belonging table and the middle M bits in the memory page address; Based on the storage address of the third page attribution table and the last N bits of the memory page address, a bucket identifier corresponding to the address of the memory page is determined in the third page attribution table.

4. The method according to any one of claims 1 to 3, characterized in that: The page belonging table is stored in the memory.

5. The method according to any one of claims 2 to 4, characterized in that: After determining the bucket identifier corresponding to the address of the memory page, the method further includes: The address of the memory page and the corresponding bucket identifier are stored in the first memory.

6. The method according to any one of claims 1 to 5, characterized in that: Before obtaining the storage address of the page attribution table, the method further includes: Determine whether the first memory stores a bucket identifier corresponding to the address of the memory page; In a case where the first memory stores the bucket identifier corresponding to the address of the memory page, the count value of the counter corresponding to the bucket identifier is incremented according to a preset step value, wherein the preset step value is 1.

7. The method according to any one of claims 1 to 6, characterized in that: The method further comprises: When the first memory does not store the bucket identifier corresponding to the address of the memory page, the storage address of the page attribution table is obtained.

8. The method according to any one of claims 1 to 7, characterized in that After the count value of the counter corresponding to the bucket identifier is incremented according to the preset step value, the method further includes: The count value of the counter corresponding to the bucket identifier is stored in the second memory.

9. The method according to claim 8, characterized in that The method further comprises: In response to receiving a second instruction sent by the processor, sending a count value of the counter corresponding to the bucket identifier to the processor; The second instruction is used to instruct obtaining the number of accesses to the memory page.

10. A computing device, characterized in that: The computing device comprises: a memory, a memory access controller and a processor; wherein the memory and the memory access controller are electrically connected; the memory access controller and the processor are electrically connected; The memory access controller is used to execute the method for determining the number of accesses to a memory page according to any one of claims 1-9.

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