Display processing system and electronic device
By designing a combination of image processing integrated circuits, display driver integrated circuits and bridge integrated circuits in electronic devices, the problem of coexistence of image processing chips and multiple display driver chips is solved, and the display quality is optimized.
Patent Information
- Application Number
- PCT/CN2024/102109
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-30
- Filing Date
- 2024-06-27
- Publication Date
- 2025-01-02
AI Technical Summary
Since the image processing chip can only be interconnected with one display driver chip, the coexistence of the image processing chip and multiple display driver chips cannot be achieved, resulting in the display quality not being optimal.
Design a display processing system, including an image processing integrated circuit, at least two display driver integrated circuits and a bridge integrated circuit, which is used to crop the data output by the image processing integrated circuit and transmit it to multiple display driver integrated circuits. Achieve the coexistence of image processing and multiple display driver integrated circuits.
Ensures the maximum resolution supported by the display screen, and the best display quality is achieved through image processing, ensuring high-quality display of displayed data.
Smart Images

Figure CN2024102109_02012025_PF_FP_ABST
Abstract
Description
Display processing systems and electronics
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to the Chinese patent application filed with the China Patent Office on June 30, 2023, with application number 202310801219.0 and title “Display Processing System and Electronic Device,” the entire contents of which are incorporated by reference into this application. Technical Field
[0003] The present application belongs to the field of communication technology, and specifically relates to a display processing system and an electronic device. Background Art
[0004] Currently, the resolution of display screens of most electronic devices is greater than the resolution supported by a display driver integrated circuit (DDIC), and therefore, at least two DDICs need to be connected in series.
[0005] However, an image processing chip can usually only be interconnected with one DDIC. Therefore, electronic devices cannot achieve the coexistence of an image processing chip and multiple DDICs, resulting in suboptimal final display quality.
[0006] Summary of the Invention
[0007] The purpose of the embodiments of the present application is to provide a display processing system and an electronic device, which can solve the problem that the display quality of the electronic device cannot reach the optimal level.
[0008] In a first aspect, an embodiment of the present application provides a display processing system, comprising:
[0009] An image processing integrated circuit, at least two display driver integrated circuits, and a bridge integrated circuit connecting the image processing integrated circuit and the at least two display driver integrated circuits;
[0010] The bridge integrated circuit is used for cropping the first display data output by the image processing integrated circuit, and transmitting each of the plurality of second display data obtained after cropping to one of the display driver integrated circuits.
[0011] In a second aspect, an embodiment of the present application provides an electronic device, comprising the display processing system as described in the first aspect.
[0012] In an embodiment of the present application, the bridge integrated circuit of the display processing system can crop the first display data output by the image processing integrated circuit, and then transmit each of the multiple second display data obtained after cropping to one of the display driver integrated circuits, so that the coexistence of the image processing circuit and the multiple display driver integrated circuits not only ensures the maximum application of the resolution supported by the display screen, but also the display data can also be processed by the image to achieve the best display quality. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] FIG1 is a schematic diagram of a display processing system according to an embodiment of the present application;
[0014] FIG2 is a second schematic diagram of a display processing system according to an embodiment of the present application;
[0015] FIG3 is a third schematic diagram of a display processing system according to an embodiment of the present application;
[0016] FIG4 is a schematic structural diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION
[0017] The following will be combined with the accompanying drawings to clearly describe the technical solutions in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. All other embodiments derived by ordinary technicians in this field based on the embodiments of this application are within the scope of protection of this application.
[0018] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.
[0019] The display processing system provided by the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.
[0020] As shown in FIG1 , a display processing system according to an embodiment of the present application includes:
[0021] An image processing integrated circuit, at least two display driver integrated circuits, and a bridge integrated circuit connecting the image processing integrated circuit and the at least two display driver integrated circuits;
[0022] The bridge integrated circuit is used for cropping the first display data output by the image processing integrated circuit, and transmitting each of the plurality of second display data obtained after cropping to one of the display driver integrated circuits.
[0023] In this way, the display processing system of the embodiment of the present application, since the bridge integrated circuit can crop the first display data output by the image processing integrated circuit, and then transmit each of the multiple second display data obtained after cropping to one of the display driver integrated circuits, enables the coexistence of the image processing circuit and multiple display driver integrated circuits, which not only ensures the maximum application of the resolution supported by the display screen, but also enables the display data to be processed by the image to achieve the best display quality.
[0024] It should be noted that, in this embodiment, the image processing integrated circuit is also referred to as an image processing chip, the bridge integrated circuit is also referred to as a bridge chip (Mobile Industry Processor Interface, MIPI), and the display driver integrated circuit is also referred to as a display driver chip (DDIC).
[0025] Optionally, as shown in FIG1 , the display processing system further includes:
[0026] A main control integrated circuit connected to the image processing integrated circuit.
[0027] The main control integrated circuit (also called main control chip) can pre-process the source display data and then transmit it to the image processing integrated circuit for subsequent processing.
[0028] For example, the receiving end of the master control integrated circuit is connected to the camera of an electronic device using the display processing system of the present application. After the content captured by the camera is directly transmitted to the master control integrated circuit for preprocessing, the master control integrated circuit transmits the preprocessed content to the image processing integrated circuit. Of course, the receiving end of the master control integrated circuit can also receive source display data other than the content captured by the camera.
[0029] Optionally, the bridge integrated circuit includes a decoding component, a storage component and a clipping component;
[0030] The decoding component is used to decode the first display data;
[0031] The storage component is used to store the decoded first display data;
[0032] The cropping component is used to crop the decoded first display data.
[0033] Thus, after receiving the first display data, the bridge integrated circuit can decode the first display data through the decoding component and store it in the storage component. The cropping component can directly crop the first display data decoded by the decoding component or extract the decoded first display data from the storage component for cropping.
[0034] Optionally, each of the at least two display driver integrated circuits drives a different display area.
[0035] For example, the display processing system includes two display driver integrated circuits, which are used to drive the left and right screens of the display screen respectively. After receiving the first display data, the bridge integrated circuit of the display processing system crops it into left half screen and right half screen data, and then transmits it to the two display driver integrated circuits to achieve high-quality display of the first display data on the display screen.
[0036] Optionally, in this embodiment, the first receiving end of the image processing integrated circuit is connected to the first transmitting end of the main control integrated circuit, the second receiving end of the image processing integrated circuit is connected to the second transmitting end of the main control integrated circuit, the first transmitting end of the image processing integrated circuit is connected to the first receiving end of the bridge integrated circuit, and the second transmitting end of the image processing integrated circuit is connected to the first receiving end of the main control integrated circuit.
[0037] Here, considering the use of different data, the content captured by the camera of the electronic device using the display processing system of this application is recorded as the first type of source display data, and other source display data is recorded as the second type of source display data. The main control integrated circuit will transmit different types of source display data to the image processing integrated circuit through different ports. The image processing integrated circuit can output the first display data to the bridge integrated circuit via the first transmitting terminal, and can also output the fifth display data to the main control integrated circuit via the second transmitting terminal.
[0038] As an implementation method, the fifth display data is the data of the first type of source display data processed by the image processing chip, so as to ensure that the display of the screenshot or screen recording image output by the main control integrated circuit is consistent with what the user sees when shooting.
[0039] Optionally, the image processing integrated circuit includes:
[0040] a first selection circuit, a data processing component, and a second selection circuit;
[0041] The first selection circuit is configured to transmit the third display data to the first transmitting end of the image processing integrated circuit or the data processing component, wherein the third display data includes data received by at least one of the first receiving end and the second receiving end of the image processing integrated circuit;
[0042] The data processing component is used to perform corresponding data processing on the third display data according to the processing requirements of the third display data;
[0043] The second selection circuit is used to transmit the fourth display data output by the data processing component to the first sending end or the second sending end of the image processing integrated circuit.
[0044] In this way, the data received by at least one of the first receiving end and the second receiving end of the image processing integrated circuit can be directly output to the bridge integrated circuit through the first selection circuit; or the data can be transmitted to the data processing component through the first selection circuit for data processing according to the corresponding processing requirements, and then output to the bridge integrated circuit or the main control integrated circuit through the second selection circuit.
[0045] If the fourth display data is transmitted to the first transmitting end of the image processing integrated circuit, the fourth display data is the first display data; if the fourth display data is transmitted to the second transmitting end of the image processing integrated circuit, the fourth display data is the fifth display data.
[0046] Optionally, the data processing component supports at least one of the following processes:
[0047] Noise reduction;
[0048] interpolation;
[0049] High dynamic range;
[0050] Super score.
[0051] Of course, the data processing supported by the data processing component is not limited to the above processing content, and will not be listed one by one here.
[0052] It should be understood that, in this embodiment, the processing requirement is used to indicate what processing the data processing component needs to perform. Specifically, different types of display data have different processing requirements. For example, the second type of source display data does not require noise reduction.
[0053] Optionally, the first selection circuit includes a first switch and a second switch;
[0054] Wherein, the first end of the first switch is connected to the first receiving end of the image processing integrated circuit, and the second end of the first switch is connected to the first transmitting end of the image processing integrated circuit;
[0055] The first end of the second switch is connected to the first receiving end of the image processing integrated circuit, the second end of the second switch is connected to the second receiving end of the image processing integrated circuit, and the third end of the second switch is connected to the input end of the data processing component.
[0056] Therefore, for data received by the first receiving end of the image processing integrated circuit, the first switch can be used to control whether the data is transmitted to the first transmitting end of the image processing integrated circuit; and the second switch can be used to control whether the data is transmitted to the data processing component of the image processing integrated circuit. For data received by the second receiving end of the image processing integrated circuit, the second switch can also be used to control whether the data is transmitted to the data processing component of the image processing integrated circuit.
[0057] Optionally, the second selection circuit includes a third switch and a fourth switch;
[0058] Wherein, the first end of the third switch is connected to the third end of the fourth switch, and the second end of the third switch is connected to the first transmitting end of the image processing integrated circuit;
[0059] A first end of the fourth switch is connected to the output end of the data processing component, and a second end of the fourth switch is connected to the second transmitting end of the image processing integrated circuit.
[0060] That is, for the output data of the data processing component of the image processing integrated circuit, on the one hand, the fourth switch can be used to control whether the data is transmitted to the second transmitting end of the image processing integrated circuit or to the first end of the third switch; on the other hand, the third switch can be used to control whether the data is transmitted to the first transmitting end of the image processing integrated circuit.
[0061] Optionally, when the first switch is closed, the second switch is opened and the first end of the second switch is connected to the third end, the third switch is opened, the fourth switch is opened and the first end of the fourth switch is connected to the third end, the data received by the first receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the first transmitting end of the image processing integrated circuit through the data processing component, the fourth switch and the third switch in sequence, and is sent from the first transmitting end of the image processing integrated circuit to the bridge integrated circuit.
[0062] Optionally, when the first switch is turned on, the second switch is turned off, the third switch is turned off, and the fourth switch is turned off, the data received by the first receiving end of the image processing integrated circuit is transmitted to the first transmitting end of the image processing integrated circuit through the first switch, and is sent by the first transmitting end of the image processing integrated circuit to the bridge integrated circuit.
[0063] Optionally, when the first switch is closed, the second switch is opened and the second end of the second switch is connected to the third end, and the third switch is closed, the fourth switch is opened and the first end of the fourth switch is connected to the second end, the data received by the second receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the second sending end of the image processing integrated circuit through the data processing component and the fourth switch in sequence, and is sent from the second sending end of the image processing integrated circuit to the main control integrated circuit.
[0064] Here, after the main control integrated circuit obtains the data sent by the second transmitting end of the image processing integrated circuit, it can transmit the data processed by the image processing integrated circuit to the first receiving end of the image processing integrated circuit. At this time, the first switch is turned on and the second switch is turned off. The first receiving end of the image processing integrated circuit is connected to the first transmitting end of the image processing integrated circuit via the first switch, so that the data received by the first receiving end of the image processing integrated circuit is output through analog bypass within the image processing integrated circuit, and finally transmitted to the bridge chip by the first transmitting end of the image processing integrated circuit.
[0065] Of course, in this embodiment, the third switch can also be a single-pole double-throw switch, whose fixed end is connected to the first transmitting end of the image processing integrated circuit, its first active end is connected to the third end of the fourth switch, and its second active end is connected to the second end of the first switch, so as to realize the transmission of data output by the data processing component of the image processing integrated circuit or data received by the first receiving end of the image processing integrated circuit to the first transmitting end of the image processing integrated circuit through the control of the third switch.
[0066] Optionally, in this embodiment, the second selection circuit further includes a fifth switch and a sixth switch;
[0067] Wherein, a first end of the fifth switch is connected to the output end of the data processing component, and a second end of the fifth switch is connected to the first transmitting end of the image processing integrated circuit;
[0068] A first end of the sixth switch is connected to the output end of the data processing component, and a second end of the sixth switch is connected to the second transmitting end of the image processing integrated circuit.
[0069] That is, for the output data of the data processing component of the image processing integrated circuit, on the one hand, the sixth switch can be used to control whether the data is transmitted to the second transmitting end of the image processing integrated circuit; on the other hand, the fifth switch can be used to control whether the data is transmitted to the first transmitting end of the image processing integrated circuit.
[0070] Optionally, when the first switch is closed, the second switch is opened and the second end of the second switch is connected to the third end, and the fifth switch is opened, the data received by the second receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the first transmitting end of the image processing integrated circuit through the data processing component and the fifth switch in sequence, and then sent from the first transmitting end of the image processing integrated circuit to the bridge integrated circuit.
[0071] Optionally, when the sixth switch is turned on, the data output by the data processing component can also be sent to the main control integrated circuit via the second sending end of the image processing integrated circuit.
[0072] That is, when the first switch is closed, the second switch is open, and the second end of the second switch is connected to the third end, and the sixth switch is open, the data output by the data processing component is transmitted through the sixth switch to the second transmitting end of the image processing integrated circuit, and then sent to the main control integrated circuit. For example, the data processed by the data processing component needs to be stored in the storage space of the main control integrated circuit.
[0073] Optionally, when the first switch is turned on, the second switch is turned off, the fifth switch is turned off, and the sixth switch is turned off, the data received by the first receiving end of the image processing integrated circuit is transmitted to the first transmitting end of the image processing integrated circuit through the first switch, and is sent by the first transmitting end of the image processing integrated circuit to the bridge integrated circuit.
[0074] Of course, in this embodiment, the fifth switch can also be a single-pole double-throw switch, whose fixed end is connected to the first transmitting end of the image processing integrated circuit, its first active end is connected to the output end of the data processing component, and its second active end is connected to the second end of the first switch, so as to realize the transmission of data output by the data processing component of the image processing integrated circuit or data received by the first receiving end of the image processing integrated circuit to the first transmitting end of the image processing integrated circuit through the control of the seventh switch.
[0075] The following uses FIG. 2 and FIG. 3 as examples to illustrate the specific structural implementation of the display processing system according to an embodiment of the present application:
[0076] In Figures 2 and 3, only part of the camera serial interface transmitter (CSI-TX) and part of the camera serial interface receiver (CSI-RX), as well as part of the display serial interface transmitter (DSI-TX) and part of the display serial interface receiver (DSI-RX) are shown. The DSI-TX, DSI-RX, CSI-TX, and CSI-RX of each integrated circuit are not limited to those shown in the figures. In Figures 2 and 3, the display processing system is equipped with DDIC1 and DDIC2.
[0077] In Figures 2 and 3, CSI-TX1: the second transmitter of the image processing integrated circuit; CSI-RX1: the first receiver of the main control integrated circuit; CSI-TX2: the output of the camera; CSI-RX2: the second receiver of the main control integrated circuit; DSI-TX3: the first transmitter of the main control integrated circuit; the first receiver of the DSI-RX3 image processing integrated circuit; DSI-TX4: the second transmitter of the main control integrated circuit; DSI-RX4: the second receiver of the image processing integrated circuit; DSI-TX5: the first transmitter of the image processing integrated circuit; DSI-RX5: the first receiver of the bridge integrated circuit; DSI-TX6: the first transmitter of the bridge integrated circuit; DSI-RX6: the receiver of DDIC1; DSI-TX7: the second transmitter of the bridge integrated circuit; DSI-RX7: the receiver of DDIC2; Switch 1: the first switch, when open, DSI-RX3 and analog bypass are connected, when closed, DSI-RX3 and analog bypass are connected Bypass is disconnected; Switch 2: The second switch, which is selected to be connected to DSI-RX3 or DSI-RX4; Switch 3: The third switch, when turned on, the display content processed by the image processing chip (the first display data output) is transmitted to the bridge chip (such as the Mobile Industry Processor Interface (MIPI) bridge chip) via TX5. When turned off, the display content processed by the image processing chip is not transmitted to the MIPI bridge chip via TX5; Switch 4: The fourth switch, which is selected to be connected to Switch 3 or CSI-TX1; Switch 5: The fifth switch, when turned on, the display content processed by the image processing chip (the first display data output) is transmitted to the MIPI bridge chip via TX5. When turned off, the display content processed by the image processing chip is not transmitted to the MIPI bridge chip via TX5; Switch 6: When turned on, the display content processed by the image processing chip (the first display data output) is transmitted to the main control chip via TX1. When turned off, the display content processed by the image processing chip is not transmitted to the main control chip via TX1.
[0078] The switches are all single-pole, single-throw switches. The DSI-TX3 mainly transmits the second type of source display data, while the DSI-TX4 mainly transmits the first type of source display data.
[0079] Scenario 1, as shown in Figure 2, the main control chip transmits the content to be displayed on the display (the second type of source display data) via the main control chip's DSI-TX3 to the image processing chip's DSI-RX3. At this point, switch 1 is closed and switch 2 is open. The image processing chip's DSI-RX3 transmits the display content to the image processing chip's internal data processing component. The data processing component can choose to perform super-resolution, frame interpolation, and High-Dynamic Range (HDR) processing on the data based on processing requirements (which can be scene-defined). The processed data becomes clearer, the video becomes smoother, and the HDR processing improves the contrast and color display effects. At this point, switches 3 and 4 are both open. The display content processed by the image processing chip is connected to switch 3 via switch 4. After switch 3 is turned on, it is transmitted to the MIPI bridge chip's DSI-RX5 via DSI-TX5. The MIPI bridge chip will crop the received display content into left and right half-screen data. The data of the left half of the screen is transmitted to DDIC1 via DSI-TX6, and the data of the right half of the screen is transmitted to DDIC 2 via DSI-TX7. After being processed by DDIC1 and DDIC 2, the data is displayed on the display screen.
[0080] Scenario 2, as shown in Figure 2, the main control chip transmits the content to be displayed on the display (second-type source display data) via DSI-TX3 of the main control chip to DSI-RX3 of the image processing chip. At this time, switches 2, 3, and 4 are closed, and switch 1 is open. The display content is transmitted via DSI-RX3 of the image processing chip to the analog bypass path within the image processing chip. Then, it is transmitted via DSI-TX5 to DSI-RX5 of the MIPI bridge chip. The MIPI bridge chip then crops the received display content into left and right half-screen data. The left half-screen data is transmitted to DDIC1 via DSI-TX6, and the right half-screen data is transmitted to DDIC2 via DSI-TX7. After processing by DDIC1 and DDIC2, the data is displayed on the display. Of course, for video and images captured by the camera (first-type source display data), after the camera transmits them to the main control chip via CSI-TX2, the main control chip can also use a similar method to display the first-type source display data on the display.
[0081] Scenario 3, as shown in Figure 2, involves the camera capturing video and images (first-category source display data) via CSI-TX2. The main control chip then transmits the received video and images to the image processing chip DXI-RX4 via DSI-TX4. Switch 1 is closed, and switch 2 is open, connecting to the image processing chip DXI-RX4. The captured content is then transmitted to the image processing chip's internal data processing components. Depending on the processing requirements, the captured content can be subjected to noise reduction, frame interpolation, or HDR processing. After passing through the data processing components, content captured at night becomes clearer. Switch 4 is open, connecting to the image processing chip CSI-TX1. The processed content is then transmitted via CSI-TX1 to the main control chip's CSI-RX1. The main control chip then transmits the processed video and images via DSI-TX3 to the image processing chip's DSI-RX3. At this point, switch 1 is on, switch 2 is off, and switch 3 is off. The image processing chip's DSI-RX3 and the analog bypass within the image processing chip transmit data via the image processing chip's DSI-TX5 to the MIPI bridge chip's DSI-RX5. The MIPI bridge chip then crops the received display content into left and right half-screen data. The left half-screen data is transmitted to DDIC1 via DSI-TX6, and the right half-screen data is transmitted to DDIC2 (display driver chip 2) via DSI-TX7. After processing by DDIC1 and DDIC2, it is displayed in real time on the display, achieving what you see is what you get. The main control chip's CSI-RX1 receives the processed video or image from the image processing chip, and the main control chip can choose to store the processed video or image in storage space for easy viewing later.
[0082] In this scenario, the content captured by screenshots or screen recordings also undergoes noise reduction by the independent graphics card, solving the problem of no noise reduction in the screenshots or screen recordings when users take photos.
[0083] Scenario 4, as shown in Figure 3, video and images captured by the camera (the first type of source display data) are transmitted to the main control chip via CSI-TX2. The main control chip then transmits the received video and images to the image processing chip DXI-RX4 via DSI-TX4. At this point, switch 1 is closed, and switch 2 is open, connecting the image processing chip DXI-RX4. The captured content is then transmitted to the internal data processing components of the image processing chip. Depending on the processing requirements, noise reduction, frame interpolation, and HDR processing can be performed on the internal projection. These processes enhance the clarity of content, especially at night. At this point, switch 6 is closed, and switch 5 is open. The processed image from the image processing chip is transmitted via the image processing chip DSI-TX5 to the MIPI bridge chip DSI-RX5. The MIPI bridge chip then crops the received display data into left and right half-screen data. The left half is transmitted to DDIC1 via DSI-TX6, while the right half is transmitted to DDIC2 via DSI-TX7. After processing by the DDIC, the data is displayed in real time on the display, achieving what you see is what you get. If the main control chip needs to store the processed graphic data, switch 6 is turned on, and the content processed by the image processing chip is transmitted to the CSI-RX1 of the main control chip through CSI-TX1. The main control chip stores the processed image data in the storage space for later viewing.
[0084] In this scenario, the display processing latency is lower.
[0085] In Scenario 5, the video and images captured by the camera (first-class source display data) are transmitted to the main control chip via CSI-TX2. The main control chip then transmits the received video and images to the image processing chip DXI-RX3 via DSI-TX3. At this point, switches 2, 5, and 6 are closed, and switch 1 is open, connecting the image processing chip DXI-RX3. The captured content is transmitted to the image processing chip's internal analog bypass. Then, it is transmitted via the image processing chip's DSI-TX5 to the MPI bridge chip's DSI-RX5. The MIPI bridge chip internally crops the received display data into left and right half-screen data. The left half is transmitted to DDIC1 via DSI-TX6, and the right half is transmitted to DDIC2 via DSI-TX7. After DDIC processing, the data is displayed in real time on the display. The main control chip can also choose to store the video or images captured by the camera in storage for later viewing. Of course, a similar method can be used to display the content to be displayed on the display (second-class source display data).
[0086] Scenario 6, as shown in Figure 3, the main control chip transmits the content to be displayed on the display (the second type of source display data) via the main control chip's DSI-TX3 to the image processing chip's DSI-RX3. At this point, switch 1 is closed and switch 2 is open. The image processing chip's DSI-RX3 transmits the display content to the image processing chip's internal data processing component. The data processing component can then perform super-resolution, frame interpolation, and HDR processing on the data based on processing requirements (which can be scenario-defined). The processed data becomes clearer, the video becomes smoother, and the HDR processing improves the contrast and color display. At this point, switch 5 is open and switch 6 is closed. The image processing chip transmits the processed display content via switch 5's DSI-TX5 to the MIPI bridge chip's DSI-RX5. The MIPI bridge chip crops the received display content into left and right half-screen data. The left half-screen data is transmitted to DDIC1 via DSI-TX6, and the right half-screen data is transmitted to DDIC2 via DSI-TX7. After processing by DDIC1 and DDIC2, the data is displayed on the display.
[0087] To sum up, in the display processing system of the embodiment of the present application, the video interpolation, video super-resolution, HDR processing and other functions of the independent image processing integrated circuit can be used, and the pictures and videos taken by the camera are processed by noise reduction and super-resolution, with better clarity and better user experience.
[0088] An embodiment of the present application also provides an electronic device, including the display processing system as described above.
[0089] The electronic device may be a terminal or other device other than a terminal. For example, the electronic device may be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. It may also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), an ATM, or an kiosks, etc., and the embodiments of the present application do not specifically limit this.
[0090] Of course, the display screen of this electronic device is a folding screen.
[0091] The electronic device provided in the embodiment of the present application can implement each process implemented by the display processing system embodiment of Figures 1 to 3. To avoid repetition, they will not be described here.
[0092] FIG4 is a schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.
[0093] The electronic device 400 includes but is not limited to components such as a radio frequency unit 401 , a network module 402 , an audio output unit 403 , an input unit 404 , a sensor 405 , a display unit 406 , a user input unit 407 , an interface unit 408 , a memory 409 , and a processor 410 .
[0094] Those skilled in the art will appreciate that the electronic device 400 may further include a power source (e.g., a battery) to power various components. The power source may be logically connected to the processor 410 via a power management system, thereby enabling the power management system to manage charging, discharging, and power consumption. The electronic device structure shown in FIG4 does not limit the electronic device. The electronic device may include more or fewer components than shown, or may combine certain components or arrange the components differently, which will not be described in detail here.
[0095] Wherein, the electronic device further includes the display processing system as described above.
[0096] It should be understood that in an embodiment of the present application, the input unit 404 may include a graphics processing unit (GPU) 4041 and a microphone 4042, and the graphics processor 4041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 406 may include a display panel 4061, and the display panel 4061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 407 includes a touch panel 4071 and at least one of other input devices 4072. The touch panel 4071 is also called a touch screen. The touch panel 4071 may include two parts: a touch detection device and a touch controller. Other input devices 4072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and an operating stick, which will not be repeated here.
[0097] The memory 409 can be used to store software programs and various data. The memory 409 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 409 may include a volatile memory or a non-volatile memory, or the memory 409 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DRRAM). The memory 409 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.
[0098] Processor 410 may include one or more processing units. Optionally, processor 410 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 410.
[0099] It should be understood that the main control chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.
[0100] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.
[0101] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.
[0102] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.
Claims
1. A display processing system, wherein: include: An image processing integrated circuit, at least two display driver integrated circuits, and a bridge integrated circuit connecting the image processing integrated circuit and the at least two display driver integrated circuits; The bridge integrated circuit is used for cropping the first display data output by the image processing integrated circuit, and transmitting each of the plurality of second display data obtained after cropping to one of the display driver integrated circuits.
2. The display processing system according to claim 1, wherein: Also includes: A main control integrated circuit connected to the image processing integrated circuit.
3. The display processing system according to claim 2, wherein: The first receiving end of the image processing integrated circuit is connected to the first transmitting end of the main control integrated circuit, the second receiving end of the image processing integrated circuit is connected to the second transmitting end of the main control integrated circuit, the first transmitting end of the image processing integrated circuit is connected to the first receiving end of the bridge integrated circuit, and the second transmitting end of the image processing integrated circuit is connected to the first receiving end of the main control integrated circuit.
4. The display processing system according to claim 3, wherein: The image processing integrated circuit comprises: a first selection circuit, a data processing component, and a second selection circuit; The first selection circuit is used to transmit the third display data to the first transmitting end of the image processing integrated circuit or the data processing component, and the third display data includes data received by at least one of the first receiving end and the second receiving end of the image processing integrated circuit; The data processing component is used for performing corresponding data processing on the third display data according to the processing requirements of the third display data; The second selection circuit is used to transmit the fourth display data output by the data processing component to the first sending end or the second sending end of the image processing integrated circuit.
5. The display processing system according to claim 4, wherein: The first selection circuit includes a first switch and a second switch; Wherein, the first end of the first switch is connected to the first receiving end of the image processing integrated circuit, and the second end of the first switch is connected to the first transmitting end of the image processing integrated circuit; The first end of the second switch is connected to the first receiving end of the image processing integrated circuit, the second end of the second switch is connected to the second receiving end of the image processing integrated circuit, and the third end of the second switch is connected to the input end of the data processing component.
6. The display processing system according to claim 5, wherein: The second selection circuit includes a third switch and a fourth switch; Wherein, the first end of the third switch is connected to the third end of the fourth switch, and the second end of the third switch is connected to the first transmitting end of the image processing integrated circuit; A first end of the fourth switch is connected to the output end of the data processing component, and a second end of the fourth switch is connected to the second transmitting end of the image processing integrated circuit.
7. The display processing system according to claim 5, wherein: The second selection circuit further includes a fifth switch and a sixth switch; Wherein, a first end of the fifth switch is connected to the output end of the data processing component, and a second end of the fifth switch is connected to the first transmitting end of the image processing integrated circuit; The first end of the sixth switch is connected to the output end of the data processing component, and the second end of the sixth switch is connected to the second sending end of the image processing integrated circuit.
8. The display processing system according to claim 6, wherein: When the first switch is closed, the second switch is opened and the first end of the second switch is connected to the third end, the third switch is opened, the fourth switch is opened and the first end of the fourth switch is connected to the third end, the data received by the first receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the first sending end of the image processing integrated circuit via the data processing component, the fourth switch and the third switch in sequence, and is sent from the first sending end of the image processing integrated circuit to the bridge integrated circuit.
9. The display processing system according to claim 6, wherein: When the first switch is turned on, the second switch is turned off, the third switch is turned off, and the fourth switch is turned off, data received by the first receiving end of the image processing integrated circuit is transmitted to the first transmitting end of the image processing integrated circuit through the first switch, and is sent by the first transmitting end of the image processing integrated circuit to the bridge integrated circuit.
10. The display processing system according to claim 6, wherein: When the first switch is closed, the second switch is opened and the second end of the second switch is connected to the third end, and the third switch is closed, the fourth switch is opened and the first end of the fourth switch is connected to the second end, the data received by the second receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the second sending end of the image processing integrated circuit through the data processing component and the fourth switch in sequence, and then sent to the main control integrated circuit by the second sending end of the image processing integrated circuit.
11. The display processing system according to claim 7, wherein: When the first switch is closed, the second switch is opened and the second end of the second switch is connected to the third end, and the fifth switch is opened, the data received by the second receiving end of the image processing integrated circuit is transmitted to the data processing component through the second switch, and then transmitted to the first transmitting end of the image processing integrated circuit through the data processing component and the fifth switch in sequence, and then sent to the bridge integrated circuit by the first transmitting end of the image processing integrated circuit.
12. The display processing system according to claim 11, wherein: When the sixth switch is turned on, the data output by the data processing component can also be sent to the main control integrated circuit via the second sending end of the image processing integrated circuit.
13. The display processing system according to claim 7, wherein: When the first switch is turned on, the second switch is turned off, the fifth switch is turned off, and the sixth switch is turned off, data received by the first receiving end of the image processing integrated circuit is transmitted to the first transmitting end of the image processing integrated circuit through the first switch, and is sent to the bridge integrated circuit by the first transmitting end of the image processing integrated circuit.
14. The display processing system according to claim 1, wherein: The bridge integrated circuit includes a decoding component, a storage component and a cutting component; The decoding component is used to decode the first display data; The storage component is used to store the decoded first display data; The cropping component is used to crop the decoded first display data.
15. The display processing system according to claim 1, wherein: Each of the at least two display driver integrated circuits drives a different display area.
16. The display processing system according to claim 4, wherein: The data processing component supports at least one of the following processes: Noise reduction; Insertion frame; High dynamic range; Over score.
17. An electronic device, wherein: The invention comprises a display processing system as claimed in any one of claims 1 to 16.
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