Device and method for generating parameter page library of NAND flash memory

Abstract

The present invention relates to a device and method for generating a parameter page library of a NAND flash memory and, more specifically, to a device and method for generating a parameter page library for each memory chip on the basis that a parameter page of the corresponding memory is readable in an environment in which an internal controller of a NAND flash memory device is unavailable.

Description

Device and method for creating a parameter page library of NAND flash memory

[0001] The present invention relates to a device and method capable of generating a parameter page library for each memory chip by enabling the reading of parameter pages of a NAND flash memory device in an environment where the internal controller of the memory device is unavailable.

[0002] Flash memory is a semiconductor memory that can read and write data with electrical signals and retains stored data even after power is cut off. It can read / write in specific units within the memory, but must be erased in block units when erasing, so it has the characteristic that an area that has been written once must be erased before it can be written.

[0003] These flash memories can be broadly categorized into parallel NOR and serial NAND. While NAND offers slower data read speeds than NOR, its memory blocks are divided into multiple pages, allowing for faster write and erase speeds. Furthermore, its unit density is superior to NOR's, making it primarily used in solid-state drives (SSDs) and USB memory devices.

[0004] USB memory devices consist of flash memory and a controller, each in the form of separate chips, integrated onto a single board. If the device experiences physical damage or malfunction, the memory chip corresponding to the flash memory can be removed from the device board and installed in a recovery device equipped with a data recovery program. The program then uses the memory chip's parameter data to reassemble the dump data, allowing data recovery.

[0005] However, even if you use a data recovery program, in order to access the data area of ​​the memory chip, it is necessary that the controller that controls the memory operation of the memory chip is functioning normally.

[0006] Therefore, if there is a problem with the controller itself and it does not operate properly, it is difficult to recover the data in the memory chip.

[0007] The purpose of the present invention is to solve the above problem, and to provide a device and method capable of creating a parameter page library for each memory chip by being able to read the parameter page of the memory in an environment where the internal controller of the NAND flash memory device is unavailable.

[0008] In order to achieve the above object, a parameter page library generation device of a NAND flash memory according to one aspect of the present invention is a device for generating a library for a parameter page of a memory chip in a NAND flash type memory device in an environment where a memory controller of the memory device is unavailable, the device comprises: an ID data acquisition module for obtaining ID data of the memory chip according to execution of an ID read command by applying an initial setting voltage corresponding to a preset voltage level to a power terminal of the memory chip and inputting an initial command value and an initial address value to an input / output terminal of the memory chip; a data loading unit for loading parameter data stored in the parameter page area by inputting a call command value and a call address value, which are commands for calling a parameter page area of ​​the memory chip, to the input / output terminal when the ID data is obtained; a mode classification unit for extracting binary data recorded at a specific byte position of the loaded parameter data and assigning a mode classification value based on a result of comparing the extracted binary data with a plurality of preset protocol signature information; and, based on a preset parameter page length and byte-by-byte item value information corresponding to the assigned mode classification value, matching the byte-by-byte item value for the corresponding mode classification value with the contents of the parameter data in byte order. It is characterized by including a restoration information generation unit that generates parameter page restoration information, and a library generation unit that creates and stores a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned corresponding to the parameter page.

[0009] In addition, a method for generating a parameter page library of a NAND flash memory according to another aspect of the present invention for achieving the above object is a method for generating a library for a parameter page of a memory chip in a NAND flash type memory device in an environment where a memory controller of the memory device is unavailable, comprising the steps of: applying an initial setting voltage corresponding to a preset voltage level to a power terminal of the memory chip, inputting an initial command value and an initial address value to an input / output terminal of the memory chip to obtain ID data of the memory chip according to the execution of an ID read command; and, when the ID data is obtained, inputting a call command value and a call address value, which are commands for calling a parameter page area of ​​the memory chip, to the input / output terminal to load the parameter data stored in the parameter page area; and, extracting binary data recorded at a specific byte position of the loaded parameter data and comparing it with a plurality of preset protocol signature information, and assigning a mode classification value according to the result of comparing the extracted binary data with a plurality of preset protocol signature information; and, corresponding to the assigned mode classification value, based on preset parameter page length and byte-by-byte item value information, matching the byte-by-byte item value for the corresponding mode classification value and the contents of the parameter data in byte order to generate a parameter page. It is characterized by including a step of generating restoration information, and a step of generating and storing a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned corresponding to the parameter page.

[0010] According to the present invention, even if the internal controller of a NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and commands of the memory chip can be executed, thereby obtaining parameter data required for data restoration.

[0011] In addition, according to the present invention, a parameter page library for each memory chip can be constructed, so that information necessary for data recovery of the memory can be obtained in a short period of time using only a memory chip image or data recorded on the memory chip.

[0012] The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the claims.

[0013] FIG. 1 is a diagram schematically showing the configuration of a parameter page library creation device of a NAND flash memory according to one embodiment of the present invention.

[0014] Figure 2 is a block diagram showing in detail the internal configuration of the ID data acquisition module, memory restoration module, and library module of Figure 1.

[0015] Figure 3 is a diagram showing the operation timing of a command input by the initial command input section and data loading section of Figure 2.

[0016] FIG. 4 is a drawing showing a part of a parameter page corresponding to a case classified as a first classification value by the mode classification unit of FIG. 2.

[0017] Fig. 5 is a drawing showing an example of a parameter page corresponding to a case where the second classification value is classified by the mode classification unit of Fig. 2.

[0018] FIG. 6 is a flowchart illustrating a method for creating a parameter page library of a NAND flash memory according to one embodiment of the present invention.

[0019] Figure 7 is a flowchart showing step S100 of Figure 6 in detail.

[0020] Figure 8 is a flowchart showing the data restoration process between steps S500 and S700 of Figure 6.

[0021] Figure 9 is a flowchart showing the library recommendation process after step S700 of Figure 6.

[0022] In order to achieve the above object, a parameter page library generation device of a NAND flash memory according to one aspect of the present invention is a device for generating a library for a parameter page of a memory chip in a NAND flash type memory device in an environment where a memory controller of the memory device is unavailable, the device comprises: an ID data acquisition module for obtaining ID data of the memory chip according to execution of an ID read command by applying an initial setting voltage corresponding to a preset voltage level to a power terminal of the memory chip and inputting an initial command value and an initial address value to an input / output terminal of the memory chip; a data loading unit for loading parameter data stored in the parameter page area by inputting a call command value and a call address value, which are commands for calling a parameter page area of ​​the memory chip, to the input / output terminal when the ID data is obtained; a mode classification unit for extracting binary data recorded at a specific byte position of the loaded parameter data and assigning a mode classification value based on a result of comparing the extracted binary data with a plurality of preset protocol signature information; and, based on a preset parameter page length and byte-by-byte item value information corresponding to the assigned mode classification value, matching the byte-by-byte item value for the corresponding mode classification value with the contents of the parameter data in byte order. It is characterized by including a restoration information generation unit that generates parameter page restoration information, and a library generation unit that creates and stores a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned corresponding to the parameter page.

[0023] In addition, a method for generating a parameter page library of a NAND flash memory according to another aspect of the present invention for achieving the above object is a method for generating a library for a parameter page of a memory chip in a NAND flash type memory device in an environment where a memory controller of the memory device is unavailable, comprising the steps of: applying an initial setting voltage corresponding to a preset voltage level to a power terminal of the memory chip, inputting an initial command value and an initial address value to an input / output terminal of the memory chip to obtain ID data of the memory chip according to the execution of an ID read command; and, when the ID data is obtained, inputting a call command value and a call address value, which are commands for calling a parameter page area of ​​the memory chip, to the input / output terminal to load the parameter data stored in the parameter page area; and, extracting binary data recorded at a specific byte position of the loaded parameter data and comparing it with a plurality of preset protocol signature information, and assigning a mode classification value according to the result of comparing the extracted binary data with a plurality of preset protocol signature information; and, corresponding to the assigned mode classification value, based on preset parameter page length and byte-by-byte item value information, matching the byte-by-byte item value for the corresponding mode classification value and the contents of the parameter data in byte order to generate a parameter page. It is characterized by including a step of generating restoration information, and a step of generating and storing a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned corresponding to the parameter page.

[0024] The specific details of the present invention, including the problems to be solved, the means for solving them, and the effects of the invention, are included in the embodiments and drawings described below. The advantages and features of the present invention, as well as the methods for achieving them, will become clearer with reference to the embodiments described below in detail, along with the accompanying drawings. Like reference numerals designate like elements throughout the specification.

[0025] FIG. 1 is a diagram schematically showing the configuration of a parameter page library generation device of a NAND flash memory according to an embodiment of the present invention, FIG. 2 is a block diagram showing in detail the internal configuration of an ID data acquisition module, a memory restoration module, and a library module of FIG. 1, FIG. 3 is a diagram showing an operation timing diagram of a command input by an initial command input unit and a data loading unit of FIG. 2, FIG. 4 is a diagram showing a part of a parameter page corresponding to a case where the mode classification unit of FIG. 2 classifies the parameter page into a first classification value, and FIG. 5 is a diagram showing an example of a parameter page corresponding to a case where the mode classification unit of FIG. 2 classifies the parameter page into a second classification value.

[0026] In addition, FIG. 6 is a flowchart showing a method for creating a parameter page library of a NAND flash memory according to one embodiment of the present invention, FIG. 7 is a flowchart showing step S100 of FIG. 6 in detail, FIG. 8 is a flowchart showing a data restoration process between steps S500 and S700 of FIG. 6, and FIG. 9 is a flowchart showing a library recommendation process after step S700 of FIG. 6.

[0027] Hereinafter, with reference to the drawings described above, a device and method for generating a parameter page library of a NAND flash memory according to a preferred embodiment of the present invention will be described.

[0028] The present invention relates to a device and method for generating a library for a parameter page of a memory chip (14) in a NAND flash type memory device (10) in an environment where the memory controller (12) of the memory device is unavailable.

[0029] First, referring to FIG. 1, a parameter page library generation device of a NAND flash memory according to one embodiment of the present invention is largely configured to include an ID data acquisition module (100), a data loading unit (200), a mode classification unit (400), a restoration information generation unit (500), a memory restoration module (600), and a library module (700).

[0030] The ID data acquisition module (100) is for checking the operating voltage of the memory chip (14) and then operating it to acquire the ID data of the memory chip (14).

[0031] Here, the ID data may correspond to unique identification information for distinguishing one memory chip from another, and may include, for example, information such as a manufacturer ID, a manufacturer's identification code, a device ID, and a device identification code.

[0032] The ID data acquisition module (100) can acquire ID data of the memory chip (14) by applying an initial setting voltage corresponding to a preset voltage level to the power terminal (VDD) of the memory chip (14) and inputting an initial command value and an initial address value to the input / output terminal (I / Ox) of the memory chip (14) according to the execution of the ID read command.

[0033] Specifically, the ID data acquisition module (100) may include a voltage application unit (110), an initial command input unit (120), an execution confirmation unit (130), and a control unit (140) as illustrated in FIG. 2.

[0034] The voltage application unit (110) applies a first voltage value corresponding to one of a plurality of preset voltage levels to the initial setting voltage (V S) and set the initial setting voltage (V S ) is applied to the power terminal (VDD) of the memory chip (14).

[0035] Here, the initial setting voltage (V S ) refers to the voltage to set the memory chip to operate, and the preset multiple voltage levels may include 1.2V, 1.8V, and 3.3V.

[0036] The initial command input section (120) is the initial setting voltage (V S ) based on the initial setting voltage (V S ) is authorized, an initial command (C) including an initial command value and an initial address value is input to the input / output terminal (I / Ox) of the memory chip (14). I ) is entered.

[0037] Here, the initial command (C I ) may include “90h”, which is an initial command value indicating a read ID command of ID data as shown in FIG. 3.

[0038] The execution confirmation unit (130) is the initial command (C I ) to check whether the ID data of the memory chip (14) is acquired by executing the ID extraction command corresponding to the input.

[0039] The execution confirmation unit (130) may check whether ID data has been loaded according to the initial command value (“90h”).

[0040] The control unit (140) controls the operation of the voltage application unit (110) and the initial command input unit (120) to obtain the ID data of the memory chip (14) based on the verification result of the execution verification unit (130).

[0041] If the ID data is not obtained as a result of the confirmation of the execution confirmation unit (130), the control unit (140) determines the currently set initial setting voltage (V) among the plurality of voltage levels. S) and a second voltage value having a different voltage level than the initial setting voltage (V S ) and apply it to the power terminal (VDD) and then the initial command (C I ) can be controlled to repeatedly perform the operation of re-inputting the input / output terminal (I / Ox) until ID data is acquired.

[0042] For example, if the first voltage value (1.8 V) is set to the initial setting voltage (V) of the memory chip (14) S ) is set and authorized as the initial command (C I ) is entered but ID data is not obtained as a result of verification, the control unit (140) sets the second voltage value (3.3 V) to the initial setting voltage (V S ) to control the voltage application unit (110) to apply the reset initial setting voltage (V S ) is authorized, the initial command (C I ) can be controlled to re-enter the initial command input section (120).

[0043] At this time, if the ID data acquisition module (100) confirms that the ID data has been acquired by the execution confirmation unit (130), the voltage value applied to the voltage terminal (VDD) of the memory chip (14) at the time the ID data was acquired, i.e., the initial setting voltage (V S ) may further include a configuration of an execution condition storage unit (150) that stores the value as voltage condition information that enables the operation and command execution of the memory chip (14).

[0044] The data loading unit (200) checks the acquisition of ID data and then loads the parameter data (D) of the memory chip (14). P ) is for loading.

[0045] When the data loading unit (200) obtains ID data as a result of the confirmation of the execution confirmation unit (130), it sends a command (C) to the input / output terminal (I / Ox) of the memory chip (14) to call the parameter page area of ​​the memory chip (14). P ) to enter the parameter data (D) stored in the parameter page area. P ) is loaded.

[0046] Here, the command to call the parameter page area (C P ) may include a call command value "ECh" indicating a call command for a parameter page including a manufacturer code (Make Code) and a device code (Device code) as illustrated in FIG. 3.

[0047] The mode classification unit (400) is a parameter data (D P ) to determine the mode classification value (M) for the memory chip (14).

[0048] The mode classification unit (400) loads parameter data (D) loaded by the data loading unit (200). P ) extracts binary data written at a specific byte location.

[0049] At this time, the binary data extracted by the mode classification unit (400) is parameter data (D P ) is preferably the first to fourth byte data.

[0050] Meanwhile, the mode classification unit (400) can also convert the extracted binary data into an ASCII code-based string.

[0051] In this case, the mode classification unit (400) is parameter data (D P ) are converted into the first string (S1), the second string (S2), the third string (S3), and the fourth string (S4), respectively.

[0052] The mode classification unit (400) assigns a mode classification value (M) based on the result of comparing the extracted binary data or converted string data with a plurality of preset protocol signature information.

[0053] Here, the plurality of protocol signature information may include "ONFI", an abbreviation for Open NAND Flash Interface Working Group, and "JESD", an abbreviation for a memory standard document (JEDEC standard) published by JEDEC (Joint Electron Device Engineering Council).

[0054] When binary data is used as a comparison target, the mode classification unit (400) uses parameter data (D P ) is compared with the binary conversion value of the first string of the agreement signature information ("O", "J"), and the parameter data (D P ) is compared with the binary conversion value of the second string of the agreement signature information ("N", "E"), and the parameter data (D P ) is compared with the binary conversion value of the third string of the agreement signature information ("F", "S"), and the parameter data (D P ) is compared with the binary conversion value of the fourth string of the agreement signature information (“I”, “D”).

[0055] When the mode classification unit (400) uses string data as a comparison target, it compares the first string (S1) with "O" and "J", which are the first strings of the protocol signature information, the second string (S2) with "N" and "E", which are the second strings of the protocol signature information, the third string (S3) with "F" and "S", which are the third strings of the protocol signature information, and the fourth string (S4) with "I" and "D", which are the fourth strings of the protocol signature information.

[0056] The mode classification unit (400) assigns a first classification value as the mode classification value (M) when it corresponds to “ONFI” according to the above-described comparison result, a second classification value when it corresponds to “JESD”, and a third classification value when it does not correspond to the first classification value or the second classification value.

[0057] The restoration information generation unit (500) generates the parameter data (D) loaded by the data loading unit (200) and the byte-by-byte item value for the mode classification value (M) based on the preset parameter page length and byte-by-byte item value information corresponding to the mode classification value (M) provided by the mode classification unit (400). P ) to match the contents in byte order to restore the parameter page information (I R ) is created.

[0058] At this time, a DB may be further included that stores table data of a parameter page corresponding to the first classification value (ONFI) illustrated in FIG. 4 and table data of a parameter page corresponding to the second classification value (JESD) illustrated in FIG. 5 by dividing them by classification value.

[0059] Here, the table data of the parameter page may be table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest item of the table.

[0060] For example, the last byte number of the lowest entry in the parameter page table for "ONFI" is '767', and the last byte number of the lowest entry in the parameter page table for "JESD" is '1535', so the parameter page lengths of the first classification value (ONFI) and the second classification value (JESD) are different.

[0061] The data restoration module (600) restores parameter page information (I R ) to restore the data originally stored in the memory chip (14).

[0062] The data recovery module (600) restores the dump data of the memory chip (14) to parameter page recovery information (I R ) can be used to restore the data originally stored in the memory chip (14).

[0063] The data recovery module (600) is composed of a dump extraction unit (610), a descrambling unit (620), and a data restoration unit (630), as shown in FIG. 2. The dump extraction unit (610) performs an operation of extracting dump data of a memory chip (14), and the descrambling unit (620) converts the extracted dump data into parameter restoration information (I). R ) and then performs an operation of descrambling through an XOR operation, and the data restoration unit (630) may perform an operation of restoring data originally stored in the memory chip (14) based on the descrambled data.

[0064] The library module (700) is for constructing a library for parameter page information of a memory chip (14).

[0065] Specifically, the library module (400) may include a camera unit (710), an interface unit (720), an image storage unit (730), a string extraction unit (750), a library creation unit (740), and a library recommendation unit (760) as illustrated in FIG. 2.

[0066] The library creation unit (740) restores parameter page information (I R ), the initial setting voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the memory chip (14) S ), a parameter page library (L) can be created and stored by matching and storing the assigned mode classification value (M) corresponding to the parameter page.

[0067] The camera unit (710) acquires an image of the front or bottom surface of the first memory chip and transmits the image to the image storage unit (730).

[0068] The interface unit (720) receives an image of the front or bottom surface of the first memory chip from the user through the user terminal (30) and transmits it to the image storage unit (730).

[0069] The image storage unit (730) acquires and stores images transmitted from the camera unit (710) or interface unit (720).

[0070] The string extraction unit (750) extracts strings included in an image stored in the image storage unit (730) using a preset string extraction algorithm.

[0071] In this case, the library creation unit (740) restores the parameter page restoration information (I) described above. R ), initial setting voltage value (V S ), the image stored corresponding to the first memory chip and the string value extracted therefrom are matched and stored together, so that a parameter page library (L) can be created and stored for each memory chip.

[0072] The library recommendation unit (760) is for recommending a parameter page library of a memory chip similar to a newly stored memory chip image based on a pre-stored parameter page library.

[0073] The library recommendation unit (760) can generate recommendation information recommending a parameter page library having the most similar string value based on the result of comparing the extracted target string with the parameter page library for each memory chip pre-stored by the library generation unit (740) when the first image for a given memory chip is newly stored in the image storage unit (730) and the target string included in the first image is extracted by the string extraction unit (750).

[0074] At this time, it is desirable that the pre-saved parameter page library has string values ​​extracted from the memory chip image pre-saved for each memory chip.

[0075]

[0076] Based on the description of the components illustrated in the aforementioned Figures 1 and 2, a method for creating a parameter page library of a NAND flash memory according to the present invention will be described with reference to Figures 6 to 9 as follows.

[0077] A method for creating a parameter page library of a NAND flash memory according to one embodiment of the present invention largely includes an ID data acquisition step (S100), a parameter data loading step (S200), a binary data extraction step (S300), a mode classification value assignment step (S400), a restoration information generation step (S500), a memory restoration step (S600), and a library creation step (S700).

[0078] First, the ID data acquisition step (S100) is to check the operating voltage of the memory chip (14) and operate it, and then acquire the ID data of the memory chip (14).

[0079] Here, the ID data may correspond to unique identification information for distinguishing one memory chip from another, and may include, for example, information such as a manufacturer ID, a manufacturer's identification code, a device ID, and a device identification code.

[0080] In the above S100 step, an initial setting voltage corresponding to a preset voltage level is applied to the power terminal (VDD) of the memory chip (14), and an initial command value and an initial address value are input to the input / output terminal (I / Ox) of the memory chip (14), so that the ID data of the memory chip (14) can be obtained according to the execution of the ID read command.

[0081] Specifically, the above step S100 sets the first voltage value as the initial setting voltage (V) as shown in FIG. 7. S) and the set initial setting voltage (V S ) to the power terminal (VDD) of the memory chip (14) (S114), and the initial command (C) to the input / output terminal (I / Ox) of the memory chip (14) I ) input step (S120), and the initial command (C I ) to check whether the ID data of the memory chip (14) is acquired by executing the ID extraction command corresponding to the input (S130), and if the ID data is not acquired as a result of the confirmation, the currently set initial setting voltage (V) among the plurality of voltage levels S ) and a second voltage value having a different voltage level than the initial setting voltage (V S ) and a step of controlling the steps S114, S120, S130 and S140 described above to be repeatedly performed until ID data is acquired.

[0082] Here, the initial setting voltage (V S ) refers to the voltage to set the memory chip to operate, and the preset multiple voltage levels may include 1.2V, 1.8V, and 3.3V.

[0083] Here, the initial command (C I ) may include “90h”, which is an initial command value indicating a read ID command of ID data as shown in FIG. 3.

[0084] In the above step S130, it may be checked whether ID data has been loaded according to the initial command value (“90h”).

[0085] At this time, if it is confirmed that the ID data has been acquired, the voltage value applied to the voltage terminal (VDD) of the memory chip (14) at the time the ID data was acquired, i.e., the initial setting voltage (V S) may further include a step (not shown) of storing the value as voltage condition information that enables the operation and command execution of the memory chip (14).

[0086] Next, the parameter data loading step (S200) is performed after confirming the acquisition of ID data by the above S100 step, and then the parameter data (D) of the memory chip (14) is loaded. P ) is for loading.

[0087] In the above S200 step, if ID data is obtained as a result of the confirmation in the above S130 step, a command (C) for calling the parameter page area of ​​the memory chip (14) is sent to the input / output terminal (I / Ox) of the memory chip (14). P ) to enter the parameter data (D) stored in the parameter page area. P ) is loaded.

[0088] Here, the command to call the parameter page area (C P ) may include a call command value "ECh" indicating a call command for a parameter page including a manufacturer code (Make Code) and a device code (Device code) as illustrated in FIG. 3.

[0089] Next, the binary data extraction step (S300) is performed by extracting the parameter data (D) loaded in the S200 step. P ) extracts binary data written at a specific byte location.

[0090] At this time, the binary data extracted in the above S300 step is parameter data (D P ) is preferably the first to fourth byte data.

[0091] In addition, a step (S350) of converting the binary data extracted by the above step S300 into an ASCII code-based string may be further included.

[0092] In this case, parameter data (D) is obtained by the above S350 step. P) are converted into the first string (S1), the second string (S2), the third string (S3), and the fourth string (S4), respectively.

[0093] Next, the mode classification value assignment step (S400) is to assign parameter data (D P ) to determine the mode classification value (M) for the memory chip (14).

[0094] In the above step S400, a mode classification value (M) is assigned based on the result of comparing the binary data extracted in the above step S300 or the string data converted in the above step S350 with a plurality of preset protocol signature information.

[0095] Here, the plurality of protocol signature information may include "ONFI", an abbreviation for Open NAND Flash Interface Working Group, and "JESD", an abbreviation for a memory standard document (JEDEC standard) published by JEDEC (Joint Electron Device Engineering Council).

[0096] In the above S400 step, when the binary data extracted in the S300 step is used as a comparison target, the parameter data (D P ) is compared with the binary conversion value of the first string of the agreement signature information ("O", "J"), and the parameter data (D P ) is compared with the binary conversion value of the second string of the agreement signature information ("N", "E"), and the parameter data (D P ) is compared with the binary conversion value of the third string of the agreement signature information ("F", "S"), and the parameter data (D P ) is compared with the binary conversion value of the fourth string of the agreement signature information (“I”, “D”).

[0097] In the above step S400, when the string data converted in the above step S350 is used as a comparison target, the first string (S1) is compared with "O" and "J", which are the first strings of the agreement signature information, the second string (S2) is compared with "N" and "E", which are the second strings of the agreement signature information, the third string (S3) is compared with "F" and "S", which are the third strings of the agreement signature information, and the fourth string (S4) is compared with "I" and "D", which are the fourth strings of the agreement signature information.

[0098] In the above S400 step, if it corresponds to “ONFI” according to the above-described comparison result, a first classification value is assigned, if it corresponds to “JESD”, a second classification value is assigned, and if it does not correspond to the first classification value or the second classification value, a third classification value is assigned as the mode classification value (M).

[0099] Next, the restoration information generation step (S500) is based on the parameter page length and byte-by-byte item value information set in response to the mode classification value (M) assigned in the S400 step, and the byte-by-byte item value for the corresponding mode classification value (M) and the parameter data (D) loaded by the data loading unit (200). P ) to match the contents in byte order to restore the parameter page information (I R ) is created.

[0100] At this time, between the S400 step and the S500 step, a step (not shown) of storing the table data of the parameter page corresponding to the first classification value (ONFI) shown in FIG. 4 and the table data of the parameter page corresponding to the second classification value (JESD) shown in FIG. 5 by dividing them by classification value may be further included.

[0101] Here, the table data of the parameter page may be table data in which byte numbers and item value information are mapped and stored, and the parameter page length may be determined by the last byte number corresponding to the lowest item of the table.

[0102] Next, the memory restoration step (S600) restores the parameter page restoration information (I) generated in the S500 step. R ) to restore the data originally stored in the memory chip (14).

[0103] In the above S600 step, the dump data of the memory chip (14) is extracted to restore the parameter page information (I R ) and then descrambled using an XOR operation, the data originally stored in the memory chip (14) can be restored.

[0104] Specifically, the above S600 step includes a step (S612) of extracting dump data of a memory chip (14) as shown in FIG. 8, and a step of restoring the extracted dump data as parameter restoration information (I R ) and then descrambling through an XOR operation (S614 to S620), and restoring the data originally stored in the memory chip (14) based on the descrambled data (S630).

[0105] Next, the library creation step (S700) is to build a library for parameter page information of the memory chip (14).

[0106] In the above S700 step, parameter page restoration information (I R ), the initial setting voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the memory chip (14) S ), a parameter page library (L) is created and stored by matching and storing the assigned mode classification value (M) corresponding to the parameter page.

[0107] At this time, before the S700 step, a step (S71) of acquiring and storing an image of the front of the first memory chip or an image of the front of the first memory chip according to user input, and a step (S72) of extracting a string included in the image stored corresponding to the first memory chip using a preset string extraction algorithm may be further included.

[0108] Here, the above step S71 may be to acquire and store an image of the front or bottom of the first memory chip captured through a camera, or to acquire and store an image of the front or bottom of the first memory chip input by a user through a user terminal (30).

[0109] Here, the S72 step may be to extract a string included in the memory chip image stored in the S71 step using a preset string extraction algorithm.

[0110] In this case, the above S700 step restores parameter page information (I) for the first memory chip. R ) and the voltage value (V) applied to the power terminal (VDD) at the time of acquiring the ID data of the first memory chip. S ) and the mode classification value (M) assigned corresponding to the parameter page of the first memory chip, and the image stored corresponding to the first memory chip by the steps S71 and S72 and the string value extracted therefrom are matched and stored together, thereby generating and storing the parameter page library (L) for each memory chip.

[0111] Meanwhile, in the case of a method for creating a parameter page library of a NAND flash memory according to one embodiment of the present invention, in addition to the processes described above, the library recommendation process (S730 to S764) illustrated in FIG. 9 may be further included.

[0112] The above library recommendation process is performed on the premise that each memory chip image and the string value extracted therefrom are matched and stored in the parameter page library for each memory chip stored in step S700, and specifically, may include a step (S730) of newly acquiring and storing a first image for a given memory chip, a step (S750) of extracting a target string included in the stored first image using a preset string extraction algorithm, and a step (S764) of generating recommendation information that recommends a parameter page library having the most similar string value based on a result of comparing the extracted target string with the parameter page library for each memory chip.

[0113] Accordingly, according to the present invention described above, even if the internal controller of a NAND flash memory device is physically damaged or malfunctions and becomes unusable, the operation and commands of the memory chip can be executed, thereby obtaining parameter data required for data restoration.

[0114] In addition, according to the present invention, a parameter page library for each memory chip can be constructed, so that information necessary for data recovery of the memory can be obtained in a short period of time using only a memory chip image or data recorded in the memory chip.

[0115] Although the present invention has been described in detail through preferred embodiments, the present invention is not limited thereto and may be implemented in various ways within the scope of the claims.

[0116] In particular, since the foregoing has broadly described the features and technical strengths of the present invention so as to enable a better understanding of the claims of the invention to be described later, it should be recognized by those skilled in the art that the concept and specific embodiments of the present invention described above can be immediately used as a basis for designing or modifying other shapes for carrying out similar purposes to the present invention.

[0117] Furthermore, it will be understood that the above-described embodiment is merely one embodiment according to the present invention, and that various modifications and changes can be implemented within the scope of the technical idea of ​​the present invention by those skilled in the art. Therefore, the disclosed embodiment should be considered from an illustrative rather than a limiting perspective, and such various modifications and changes are also included within the scope of the technical idea of ​​the present invention, as indicated in the claims of the present invention described above, and all differences within the scope equivalent thereto should be interpreted as being included in the present invention.

[0118] The present invention can be used in the industrial field for creating a parameter page library for each memory chip by enabling the reading of the parameter page of a NAND flash memory device in an environment where the internal controller of the memory is unavailable.

Claims

1. In a device that creates a library for a parameter page of a memory chip in a NAND flash memory device in an environment where the memory controller of the memory device is unavailable, An ID data acquisition module that acquires ID data of the memory chip by applying an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip and inputting an initial command value and an initial address value to the input / output terminal of the memory chip and executing an ID read command; When the above ID data is acquired, a data loading unit that inputs a call command value and a call address value, which are commands for calling the parameter page area of ​​the memory chip, to the input / output terminal to load the parameter data stored in the parameter page area; A mode classification unit that extracts binary data recorded at a specific byte position of the loaded parameter data and assigns a mode classification value based on the result of comparing the extracted binary data with a plurality of preset protocol signature information; A restoration information generation unit that generates parameter page restoration information by matching the byte-by-byte item values ​​for the mode classification value and the contents of the parameter data in byte order based on the preset parameter page length and byte-by-byte item value information corresponding to the assigned mode classification value; and A parameter page library generation device of a NAND flash memory, characterized in that it includes a library generation unit that generates and stores a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned corresponding to the parameter page.

2. In paragraph 1, The above ID data acquisition module, A voltage application unit that sets a first voltage value corresponding to any one of a plurality of preset voltage levels as an initial setting voltage and applies the voltage value to the power terminal of the memory chip; An initial command input unit that inputs an initial command including the initial command value and the initial address value to the input / output terminal of the memory chip based on the time point of application of the initial setting voltage; An execution confirmation unit that confirms whether the ID data of the memory chip has been acquired by executing an ID extraction command corresponding to the input of the initial command; and A device for generating a parameter page library of a NAND flash memory, characterized in that it includes a control unit that controls the voltage application unit and the initial command input unit to repeatedly perform an operation of resetting a second voltage value having a voltage level different from the currently set initial setting voltage among the plurality of voltage levels to the initial setting voltage and applying it to the power terminal and then re-inputting the initial command to the input / output terminal until the ID data is acquired.

3. In paragraph 1, A device for creating a parameter page library of a NAND flash memory, characterized in that it further includes a data restoration module for extracting dump data of the memory chip, recombining it based on the parameter page restoration information, and then descrambling it through an XOR operation to restore data originally stored in the memory chip.

4. In paragraph 1, An image storage unit that acquires and stores an image of the front surface of the first memory chip or an image of the front surface of the first memory chip according to user input; and It further includes a string extraction unit that extracts a string included in an image stored corresponding to the first memory chip using a preset string extraction algorithm; The above library creation unit, A parameter page library creation device of a NAND flash memory characterized in that a parameter page library is created and stored for each memory chip by matching and storing the parameter page restoration information for the first memory chip, the voltage value applied to the power terminal at the time of acquiring the ID data of the first memory chip, the mode classification value assigned corresponding to the parameter page of the first memory chip, and the image stored corresponding to the first memory chip and the string value extracted therefrom.

5. In paragraph 4, A parameter page library generation device for a NAND flash memory, characterized in that it further includes a library recommendation unit that generates recommendation information recommending a parameter page library having the most similar string value based on a result of comparing the extracted target string with the parameter page library for each memory chip when a first image for a given memory chip is newly stored in the image storage unit and the target string included in the first image is extracted in the string extraction unit.

6. A method for creating a library for a parameter page of a memory chip in a NAND flash memory device in an environment where the memory controller of the memory device is unavailable, A step of applying an initial setting voltage corresponding to a preset voltage level to the power terminal of the memory chip, and inputting an initial command value and an initial address value to the input / output terminal of the memory chip to obtain ID data of the memory chip according to the execution of an ID read command; When the above ID data is acquired, a step of loading parameter data stored in the parameter page area by inputting a call command value and a call address value, which are commands for calling the parameter page area of ​​the memory chip, into the input / output terminal; A step of extracting binary data recorded at a specific byte position of the loaded parameter data and assigning a mode classification value based on the result of comparing the extracted binary data with a plurality of preset protocol signature information; A step of generating parameter page restoration information by matching the byte-by-byte item value for the mode classification value and the contents of the parameter data in byte order based on the preset parameter page length and byte-by-byte item value information corresponding to the given mode classification value; A method for creating a parameter page library of a NAND flash memory, characterized by comprising: a step of creating and storing a parameter page library by matching and storing the parameter page restoration information, the voltage value applied to the power terminal at the time of acquiring the ID data, and the mode classification value assigned in response to the parameter page.

7. In paragraph 6, The step of obtaining the above ID data is: A step of setting a first voltage value corresponding to any one of a plurality of preset voltage levels as an initial setting voltage and applying it to a power terminal of the memory chip; A step of inputting an initial command including the initial command value and the initial address value to the input / output terminal of the memory chip based on the time of application of the initial setting voltage; A step of confirming whether the ID data of the memory chip has been obtained by executing an ID read command corresponding to the input of the initial command; and A method for creating a parameter page library of a NAND flash memory, characterized in that it comprises a step of controlling the voltage application unit and the initial command input unit to repeatedly perform an operation of resetting a second voltage value having a voltage level different from the currently set initial setting voltage among the plurality of voltage levels to the initial setting voltage and applying the second voltage value to the power terminal and then re-inputting the initial command to the input / output terminal until the ID data is obtained.

8. In paragraph 6, After the step of generating the above parameter page restoration information, A method for creating a parameter page library of a NAND flash memory, characterized in that it further includes a step of extracting dump data of the memory chip, recombining it based on the parameter page restoration information, and then descrambling it through an XOR operation to restore data originally stored in the memory chip.

9. In paragraph 6, Before the step of creating the above parameter page library, A step of acquiring and storing an image of the front surface of the first memory chip or an image of the front surface of the first memory chip according to user input; and It further includes a step of extracting a string included in an image stored corresponding to the first memory chip using a preset string extraction algorithm; The steps for creating the above parameter page library are: A method for creating a parameter page library of a NAND flash memory, characterized in that the parameter page restoration information for the first memory chip, the voltage value applied to the power terminal at the time of acquiring the ID data of the first memory chip, the mode classification value assigned corresponding to the parameter page of the first memory chip, and the image stored corresponding to the first memory chip and the string value extracted therefrom are matched and stored together to create and store a parameter page library for each memory chip.

10. In paragraph 9, After the step of creating the above parameter page library, A step of newly acquiring and storing a first image for a given memory chip; A step of extracting a target string included in the first image using the above string extraction algorithm; and A method for generating a parameter page library of a NAND flash memory, characterized in that it further comprises a step of generating recommendation information for recommending a parameter page library having the most similar string value based on a result of comparing the extracted target string with the parameter page library for each memory chip.

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