Circuit board and semiconductor package comprising same

Abstract

A circuit board according to an embodiment includes: a substrate having a top surface and a bottom surface and having a through hole passing through the top surface and the bottom surface; a connection member arranged in the through hole of the substrate; and an insulating member provided to surround a side portion of the connection member in the through hole of the substrate, wherein the top surface of the insulating member includes at least one of a concave surface concave toward the bottom surface of the insulating member and a convex surface convex with respect to the bottom surface of the insulating member.

Description

Circuit boards and semiconductor packages including the same

[0001] The embodiment relates to a circuit board and a semiconductor package including the same.

[0002] As the performance of electrical and electronic products continues to improve, technologies are being proposed and researched to accommodate a greater number of semiconductor devices on circuit boards within limited-size semiconductor packages. However, because conventional semiconductor packages typically consist of a single semiconductor device, achieving desired performance is limited.

[0003] Accordingly, semiconductor packages that incorporate multiple semiconductor devices across multiple circuit boards have recently been developed. These semiconductor packages have a structure in which multiple semiconductor devices are connected horizontally and / or vertically on the circuit board. Consequently, semiconductor packages offer the advantages of efficiently utilizing the mounting area of ​​semiconductor devices and enabling high-speed signal transmission through short signal transmission paths between semiconductor devices.

[0004] In addition, semiconductor packages applied to products that provide the Internet of Things (IoT), autonomous vehicles, and high-performance servers are expanding their concept to semiconductor chiplets as the number of semiconductor elements and / or the size of each semiconductor element increases in line with the trend toward high integration, or as the functional parts of semiconductor elements are divided.

[0005] Accordingly, intercommunication between semiconductor devices and / or semiconductor chiplets is becoming more important, and accordingly, there is a trend toward placing an interposer between the circuit board of a semiconductor package and the semiconductor devices.

[0006] An interposer can function as a redistribution layer that gradually increases the width or depth of a circuit pattern from a semiconductor device toward a semiconductor package to facilitate communication between semiconductor devices and / or semiconductor chiplets, or to interconnect a semiconductor device and a circuit board of a semiconductor package, thereby facilitating electrical signals between the semiconductor device and a circuit board of a semiconductor package having a relatively large circuit pattern compared to the circuit pattern of the semiconductor device.

[0007] Meanwhile, the package substrate and / or interposer corresponding to the circuit board of the semiconductor package includes a cavity and a connecting member positioned within the cavity. The connecting member may electrically connect multiple semiconductor chips to each other or connect signal communication between multiple semiconductor elements. Alternatively, the connecting member may refer to a semiconductor element.

[0008] In one embodiment, a package substrate and / or interposer applied to a semiconductor package may have a connecting member embedded therein that functions to horizontally connect a plurality of semiconductor elements and / or semiconductor chiplets.

[0009] That is, in the package substrate and / or interposer according to the prior art, the process of laminating an additional insulating layer and the process of forming an electrode portion are performed while the connecting member is embedded in the circuit board. At this time, stress due to heat cycles such as shrinkage and / or expansion that occur as the process of laminating the insulating layer and forming the electrode portion progresses may be applied. In addition, the connecting member may be continuously stressed due to the stress, and this may cause a problem of deterioration in the physical reliability and / or electrical reliability of the connecting member. For example, the adhesion between the insulating layer and the connecting member may be reduced due to the stress, and the deterioration in adhesion may cause a lifting phenomenon at the interface between the insulating layer and the connecting member. In addition, when the interfacial lifting phenomenon occurs, the connecting member may not be stably bonded to the package substrate and / or interposer. Accordingly, a problem of the connecting member being electrically opened from the package substrate and / or interposer may occur, and this may cause a problem of the connecting member not operating stably.

[0010] In addition, the insulating layer and electrode portion of the package substrate and / or interposer have a first region that vertically overlaps the connecting member and a second region that does not vertically overlap the connecting member. At this time, the formation process of the insulating layer and electrode portion is performed while the connecting member is embedded, and thus a height deviation between the first region and the second region may occur. Accordingly, the flatness of the package substrate and / or interposer may be reduced, and thus a problem may arise in which a semiconductor device cannot be stably mounted on the package substrate and / or interposer.

[0011] The embodiment provides a circuit board capable of improving adhesion with a connecting member and a semiconductor package including the same.

[0012] In addition, the embodiment provides a circuit board capable of efficiently dispersing stress acting on the circuit board and a semiconductor package including the same.

[0013] Additionally, the embodiment provides a circuit board with improved warpage characteristics and a semiconductor package including the same.

[0014] Additionally, the embodiment provides a circuit board with improved flatness and a semiconductor package including the same.

[0015] In addition, the embodiment provides a circuit board applied to an interposer, which is divided into an upper substrate having a connecting member and a lower substrate not having a connecting member, and a semiconductor package including the circuit board.

[0016] The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiment belongs from the description below.

[0017] A circuit board according to an embodiment includes a substrate having an upper surface and a lower surface, and a through hole penetrating the upper surface and the lower surface; a connecting member disposed within the through hole of the substrate; and an insulating member disposed within the through hole of the substrate to surround a side of the connecting member, wherein an upper surface of the insulating member includes at least one of a concave surface concave toward a lower surface of the insulating member and a convex surface convex with respect to a lower surface of the insulating member.

[0018] In addition, the substrate comprises an insulating layer formed of at least one layer; an upper protective layer disposed on the insulating layer; and a lower protective layer disposed under the insulating layer, wherein an upper surface of the substrate is an upper surface of the upper protective layer, and a lower surface of the substrate is a lower surface of the lower protective layer.

[0019] Additionally, the insulating member includes an insulating material different from the insulating material of the substrate.

[0020] Additionally, the upper surface of the insulating member includes a convex surface provided on one side of the connecting member and a concave surface provided on the other side of the connecting member other than the one side.

[0021] Additionally, the vertical length between the upper surface of the substrate and the lower surface of the substrate is different from the vertical length between the uppermost end of the insulating member and the lowermost end of the insulating member.

[0022] In addition, the substrate includes an inner surface forming the through hole, the connecting member includes an outer surface facing the inner surface of the substrate, and a horizontal separation distance between the outer surface of the connecting member and the inner surface of the substrate includes a first separation distance along the circumferential direction of the outer surface of the connecting member and a second separation distance different from the first separation distance.

[0023] In addition, the circuit board further includes an electrode portion disposed on the substrate, the electrode portion includes an upper bonding portion disposed on the substrate, and the connecting member includes an upper pad portion horizontally overlapping the upper bonding portion.

[0024] Additionally, the lowermost part of the lower surface of the insulating member is located on the same plane as the lower surface of the substrate.

[0025] In addition, the lower surface of the insulating member includes at least one of a flat surface, a concave surface concave toward the upper surface of the insulating member, and a convex surface convex with respect to the upper surface of the insulating member.

[0026] Additionally, the outer surface of the connecting member has a step, and the insulating member includes a portion of the connecting member that comes into contact with the step.

[0027] In addition, the insulating member includes one side facing the inner side of the through hole of the substrate and the other side facing the outer side of the connecting member, and a horizontal width between the one side and the other side of the insulating member includes a first width and a second width different from the first width.

[0028] Additionally, the first width is smaller than the second width, the first width corresponds to the convex surface, and the second width corresponds to the concave surface.

[0029] In addition, the connecting member further includes a plurality of lower pad portions arranged on a lower surface of the connecting member; and the insulating member includes a first portion provided between an inner surface of the through hole of the substrate and an outer surface of the connecting member; and a second portion extended from the first portion and arranged on a lower surface of the connecting member and provided between the plurality of lower pad portions.

[0030] Additionally, the circuit board further includes a lower circuit board disposed on a lower portion of the board; and a connection portion disposed between the board and the lower circuit board.

[0031] Meanwhile, a circuit board according to an embodiment includes a substrate having an upper surface and a lower surface, and a plurality of through holes penetrating the upper surface and the lower surface; a plurality of connecting members arranged within the plurality of through holes of the substrate; and a plurality of insulating members arranged within the plurality of through holes of the substrate to surround side portions of each of the plurality of connecting members, wherein the arrangement positions of each of the plurality of connecting members within the plurality of through holes are different from each other, and the upper surface of each of the plurality of insulating members includes at least one of a concave surface and a convex surface.

[0032] Additionally, each of the plurality of connecting members is arranged offset in a direction toward the horizontal central axis of the substrate in each of the plurality of through holes.

[0033] In addition, the plurality of through holes include first and second through holes provided at positions symmetrical to each other with respect to the central axis, and the plurality of connecting members include a first connecting member arranged in the first through hole; and a second connecting member arranged in the second through hole, wherein the arrangement position of the first connecting member in the first through hole is symmetrical with the arrangement position of the second connecting member in the second through hole with respect to the central axis.

[0034] In addition, the plurality of insulating members include a first insulating member provided to surround a side of the first connecting member within the first through hole; and a second connecting member provided to surround a side of the second connecting member within the second through hole, wherein the upper surfaces of each of the first and second connecting members include a convex surface and a concave surface, and the positions of the convex surface and the concave surface of the upper surface of the first connecting member are symmetrical to the positions of the convex surface and the concave surface of the upper surface of the second connecting member with respect to the central axis.

[0035] A circuit board of an embodiment includes a substrate having a through hole and a connecting member arranged in the through hole of the substrate. In addition, the circuit board includes an insulating member arranged to surround a side of the connecting member within the through hole of the substrate. In this case, the embodiment arranges the connecting member in the through hole that passes through the substrate, rather than arranging the connecting member in a cavity that passes through a portion of the substrate. By arranging the connecting member in the through hole that passes through the substrate, the embodiment can improve the processability in a process of forming the through hole corresponding to the arrangement space of the connecting member, thereby improving the product yield.

[0036] In addition, conventional circuit boards have connecting members arranged in cavities, and thus the upper and lower components may have an asymmetrical structure with respect to the central axis in the vertical direction of the circuit board, and depending on the characteristics of the asymmetrical structure, the circuit board may have a problem of being greatly bent in a specific direction.

[0037] In contrast, the embodiment can have a symmetrical structure of the upper and lower components with respect to the central axis in the vertical direction of the circuit board by arranging the connecting member within the through hole penetrating the circuit board, thereby preventing the circuit board from being significantly warped in a specific direction. Accordingly, the embodiment can enable a semiconductor device to be stably mounted on the circuit board, thereby enabling the semiconductor device to operate stably, and further enabling a product such as a server to which the semiconductor package is applied to operate stably.

[0038] In addition, the insulating member surrounding the side of the connecting member may include an insulating material different from the insulating material of the substrate. For example, the insulating member may include a porous material that can more efficiently absorb and / or alleviate stress acting on the circuit board. Accordingly, the embodiment can absorb and / or alleviate thermal stress and other stresses applied to the connecting member by using the insulating member. In addition, when the connecting member is provided as an organic bridge, the insulating member can alleviate damage such as cracks in the semiconductor package caused by a difference in thermal expansion coefficients between the connecting member and the substrate. In particular, when the connecting member is an organic bridge, the insulating member can more stably protect the connecting member from stress caused by heat cycles such as shrinkage and / or expansion of the substrate.

[0039] In addition, the upper surface of the insulating member may include at least one of a convex surface and a concave surface. Through this, the embodiment can improve the contact area of ​​the semiconductor element with the molding member. For example, a molding member for molding a semiconductor element is provided on the circuit board and the connecting member. The molding member can contact the upper surface of the insulating member. At this time, the upper surface of the insulating member may include a convex surface and a concave surface, and through this, the lower surface of the molding member may include a concave surface corresponding to the convex surface of the upper surface of the insulating member and a convex surface corresponding to the concave surface of the upper surface of the insulating member. The embodiment can increase the contact area between the insulating member and the molding member, thereby improving the adhesion between the insulating member and the molding member. Therefore, the embodiment can stably protect the connecting member and the semiconductor element through the molding member, and thereby improve the physical reliability and / or electrical reliability of the semiconductor package.

[0040] In addition, the convex and concave surfaces provided on the upper surface of the insulating member can serve to buffer thermal deformation such as expansion and / or contraction acting on the circuit board. For example, the convex and concave surfaces of the upper surface of the insulating member function to increase the surface area of ​​the upper surface of the insulating member. Through this, the embodiment can solve problems such as electrical open and / or cracks of the connecting member that may occur due to thermal stress acting on the semiconductor package. In addition, the convex and concave surfaces provided on the upper surface of the insulating member can be used to prevent stress from acting on the electrodes of the connecting member having a fine pitch. Through this, the embodiment can improve the mechanical reliability and / or electrical reliability of the semiconductor package.

[0041] Furthermore, the concave and convex surfaces provided on the upper surface of the insulating member can prevent the circuit board from being significantly warped in a specific direction. For example, the insulating member may have a different thickness in an area where the concave surface is provided and a different thickness in an area where the convex surface is provided. For example, the thickness of the insulating member in an area where the convex surface is provided may be greater than the thickness of the insulating member in an area where the concave surface is provided. Through this, the embodiment can adjust the positions of the convex and concave surfaces provided on the upper surface of the insulating member depending on the direction in which the circuit board is warped. Through this, the embodiment can prevent the circuit board from being significantly warped in a specific direction by making the rigidity of the insulating member in a position where the convex surface is provided different from the rigidity of the insulating member in a position where the concave surface is provided.

[0042] In addition, the concave and convex surfaces provided on the upper surface of the insulating member may be provided corresponding to the positions where the connecting members are arranged. For example, the circuit board may include a substrate having a plurality of through holes, and a plurality of connecting members respectively arranged within the plurality of through holes of the substrate. In this case, the embodiment can control the positions of the concave and convex surfaces provided on the upper surface of the insulating member by controlling the positions where each connecting member is arranged within each through hole, thereby more easily absorbing stress acting on the circuit board and / or the semiconductor package, or further improving the prevention of the circuit board and / or the semiconductor package from being greatly bent in a specific direction. Accordingly, the embodiment can minimize the height deviation of the upper surface of the bonding portion provided on the circuit board, and further minimize the height deviation of the upper pad portions of the plurality of connecting members, thereby enabling the semiconductor element to be more stably attached to the circuit board.

[0043] Specifically, the arrangement positions of the connecting members within each through hole may be different. Preferably, the substrate includes a central axis in a horizontal direction, and the arrangement positions of the connecting members within each through hole may be provided to be offset in the horizontal direction toward the central axis. Through this, the embodiment can control the shapes of the convex and concave surfaces of the insulating member surrounding each connecting member based on the position of each connecting member, thereby more easily absorbing stress acting on the circuit board and / or semiconductor package, or further improving the circuit board and / or semiconductor package from being greatly bent in a specific direction.

[0044] Furthermore, the embodiment may provide connecting members and insulating members positioned symmetrically with respect to the central axis of the substrate so that they are positioned symmetrically within each through hole and further have symmetrical shapes. Through this, the embodiment may more easily absorb stress applied to the circuit board and / or semiconductor package, or further improve the circuit board and / or semiconductor package from being significantly bent in a specific direction.

[0045] In addition, the substrate includes an inner surface forming a through hole, and the connecting member includes an outer surface facing the inner surface of the substrate. At this time, a horizontal separation distance between the outer surface of the connecting member and the inner surface of the substrate includes a first separation distance and a second separation distance different from the first separation distance. That is, the insulating member includes one side facing the inner surface of the substrate and the other side facing the outer surface of the connecting member, and a horizontal width between the one side and the other side of the insulating member includes a first width and a second width different from the first width. Through this, the embodiment can adjust the first separation distance and the second separation distance, or the first width and the second width, in consideration of the direction and / or position of the stress acting by the heat cycle or the warping direction of the circuit board and / or the semiconductor package, thereby making it easier to absorb the stress acting on the circuit board and / or the semiconductor package, or further improving the circuit board and / or the semiconductor package from being greatly warped in a specific direction.

[0046] In addition, the embodiment provides an interposer disposed between a semiconductor package substrate and a semiconductor, such that the interposer includes an upper circuit substrate corresponding to a circuit substrate including the above-described connecting member, and a lower substrate coupled under the upper circuit substrate. In this case, the embodiment can manufacture and provide an upper circuit substrate corresponding to the number of semiconductor elements, the mounting positions of the semiconductor elements, the positions of the connecting members, and the number of the connecting members according to the product design of the semiconductor package, and can electrically couple a lower circuit substrate thereto to provide an interposer. In this case, in the case of an interposer including a plurality of semiconductor elements and a plurality of connecting members, the embodiment can improve the product yield by manufacturing the upper circuit substrate and the lower circuit substrate separately, and further, can more stably protect the connecting members and the semiconductor elements from cracks compared to the conventional technology in which the upper circuit substrate and the lower circuit substrate are provided integrally.

[0047] FIG. 1a is a cross-sectional view illustrating a configuration of a semiconductor package according to the first embodiment.

[0048] Figure 1b is an enlarged plan view of area A shown in Figure 1a.

[0049] FIG. 2 is a cross-sectional view illustrating a configuration of a semiconductor package according to a second embodiment.

[0050] FIG. 3a is a cross-sectional view illustrating a configuration of a semiconductor package according to a third embodiment.

[0051] Figure 3b is an enlarged plan view of area A shown in Figure 3a.

[0052] FIG. 4 is a cross-sectional view showing the configuration of a semiconductor package according to the fourth embodiment.

[0053] FIG. 5 is a cross-sectional view showing the configuration of a semiconductor package according to the fifth embodiment.

[0054] Fig. 6 is a cross-sectional view showing the configuration of a semiconductor package according to the sixth embodiment.

[0055] Figure 7 is a cross-sectional view showing the configuration of a semiconductor package according to the seventh embodiment.

[0056] FIG. 8A is a plan view showing a circuit board having a plurality of through holes and a plurality of connecting members according to the eighth embodiment.

[0057] Figure 8b is a plan view showing the shape of the upper surface of a plurality of insulating members illustrated in Figure 8a.

[0058] FIG. 9 is a cross-sectional view showing the configuration of a semiconductor package according to the ninth embodiment.

[0059] Fig. 10 is a cross-sectional view showing the configuration of a semiconductor package according to the 10th embodiment.

[0060] Fig. 11 is a cross-sectional view showing the configuration of a semiconductor package according to the 11th embodiment.

[0061] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

[0062] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0063] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by those of ordinary skill in the technical field to which the present invention pertains, unless explicitly and specifically defined and described. Commonly used terms, such as terms defined in a dictionary, may have their meanings interpreted in consideration of the contextual meaning of the relevant technology. In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention.

[0064] In this specification, singular forms may also include plural forms unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C. In addition, when describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0065] These terms are only intended to distinguish the component from other components, and are not intended to limit the nature, order, or sequence of the component by the term. In addition, when a component is described as being "connected," "coupled," or "connected" to another component, it may include not only cases where the component is directly connected, coupled, or connected to the other component, but also cases where the component is "connected," "coupled," or "connected" by another component between the component and the other component.

[0066] Additionally, when it is described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Furthermore, when it is expressed as "above" or "below", it can include the meaning of not only the upward direction but also the downward direction based on one component.

[0067]

[0068] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0069] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0070] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by those of ordinary skill in the technical field to which the present invention pertains, unless explicitly and specifically defined and described. Commonly used terms, such as terms defined in a dictionary, may have their meanings interpreted in consideration of the contextual meaning of the relevant technology. In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention.

[0071] In this specification, singular forms may also include plural forms unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C,” it may include one or more of all combinations that can be combined with A, B, and C. In addition, when describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0072] These terms are intended only to distinguish a component from other components, and are not intended to limit the nature, order, or sequence of the component. Furthermore, when a component is referred to as being "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may be other components intervening. Conversely, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there are no other intervening components.

[0073] The terminology used in this application is only used to describe specific embodiments and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, it should be understood that the terms "comprise" or "have" indicate the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not exclude in advance the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0074] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by those of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0075] Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or corresponding components are given the same reference numbers, and redundant descriptions thereof will be omitted.

[0076] Before describing the embodiment, an electronic device to which the semiconductor package of the embodiment is applied will be briefly described. The electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to the semiconductor package of the embodiment. In addition, the semiconductor package includes a circuit board having a connection member embedded therein, a semiconductor element, and a connection portion for electrically connecting the semiconductor element and the circuit board. Here, various semiconductor elements may be mounted on the semiconductor package.

[0077] The semiconductor device may include active components and / or passive components. The active component may be a semiconductor chip in the form of an integrated circuit (IC) in which hundreds to millions of components are integrated into a single chip. The semiconductor device may be a logic chip, a memory chip, or the like. The logic chip may be a central processor (CPU), a graphics processor (GPU), or the like. For example, the logic chip may be an application processor (AP) chip including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, a cryptographic processor, a microprocessor, a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), or the like, or a chip set including a specific combination of the above-mentioned components.

[0078] The memory chip may be a stacked memory such as HBM. Additionally, the memory chip may include a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), or a flash memory.

[0079] Meanwhile, the product group to which the semiconductor package of the embodiment is applied may be any one of CSP (Chip Scale Package), FC-CSP (Flip Chip-Chip Scale Package), FC-BGA (Flip Chip Ball Grid Array), POP (Package On Package), and SIP (System In Package), but is not limited thereto.

[0080] Additionally, the electronic device may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive device, etc. However, the present invention is not limited thereto, and it is to be understood that the electronic device may be any other electronic device that processes data.

[0081]

[0082] Fig. 1a is a cross-sectional view showing the configuration of a semiconductor package according to the first embodiment, and Fig. 1b is an enlarged plan view of area A shown in Fig. 1a.

[0083] Referring to FIGS. 1A and 1B, a semiconductor package according to a first embodiment includes a circuit board (100) that electrically connects a main board of an electronic device and semiconductor elements (410, 420), a plurality of semiconductor elements (410, 420) mounted on the circuit board (100), and a connection portion (310, 320) that electrically connects the plurality of semiconductor elements (410, 420) and the circuit board (100).

[0084] For easy explanation of the semiconductor package of the embodiment, terms referring to components included in the semiconductor package are described, and a description of each component referred to is provided below.

[0085] The circuit board (100) illustrated in FIGS. 1A and 1B includes a substrate (110), an insulating member (140), an electrode portion (150), and a connecting member (200). The substrate (110) may refer to a supporting substrate of the circuit board (100) on which the electrode portion (150) is formed. The substrate (110) includes an insulating layer (120), an upper protective layer (130), and a lower protective layer (135). The insulating layer (120) is provided in a structure in which a first insulating layer (121), a second insulating layer (122), and a third insulating layer (123) are sequentially laminated. The lower surface of the insulating layer (120) is provided as the lower surface of the first insulating layer (121), and the upper surface of the insulating layer (120) is provided as the upper surface of the third insulating layer (123). An upper protective layer (130) is disposed on the upper surface of the insulating layer (120), and a lower protective layer (140) is disposed on the lower surface of the insulating layer (120). The electrode portion (150) includes a wiring electrode, a via electrode, and a bonding portion. The wiring electrode includes a first wiring electrode (151) disposed on the lower surface of the first insulating layer (121), a second wiring electrode (152) disposed on the upper surface of the first insulating layer (121) or the lower surface of the second insulating layer (122), a third wiring electrode (153) disposed on the upper surface of the second insulating layer (122) or the lower surface of the third insulating layer (123), and a fourth wiring electrode (154) disposed on the upper surface of the third insulating layer (153). The via electrode includes a first via electrode (155) penetrating the first insulating layer (121) and connecting the first wiring electrode (151) and the second wiring electrode (152), a second via electrode (156) penetrating the second insulating layer (122) and connecting the second wiring electrode (152) and the third wiring electrode (153), and a third via electrode (157) penetrating the third insulating layer (123) and connecting the third wiring electrode (153) and the fourth wiring electrode (154). Each of the wiring electrodes (151, 152, 153, 154) includes a plurality of pads and traces connected to the plurality of pads.Here, the pad may mean an electrode pattern connected to each via electrode (155, 156, 157), or an electrode pattern connected to a bonding portion (158), and in the case of the first wiring electrode (151), it further includes a pad connected to the lower substrate (500) to be described later. In addition, the electrode portion includes a bonding portion (158) disposed on the upper protective layer (130). The bonding portion (158) includes a protrusion (not shown) protruding above the upper protective layer (130) and a penetration portion (not shown) penetrating the upper protective layer (130) and connected to the pad of the fourth wiring electrode (154). The connecting member (200) may be disposed within the substrate (110). For example, the substrate (110) includes a penetration hole (110TH), and the connecting member (200) is disposed in the penetration hole (110TH) of the substrate (110). In addition, the circuit board (100) further includes an insulating member (140) disposed within the through hole (110TH) of the board (110). The insulating member (140) may be a separate component distinct from the board (110). The insulating member (140) is disposed within the through hole (110TH) of the board (110). The insulating member (140) may be provided to surround a side of a connecting member (200) disposed within the through hole (110TH).

[0086] The first to third insulating layers (121, 122, 123) may be formed of an insulating material having the functions of ease of process, excellent insulating properties, reducing loss of signals transmitted through the electrode portion (150), or creating a fine gap in the electrode portion (150). In addition, the first to third insulating layers (121, 122, 123) may all be formed of the same insulating material, but are not limited thereto, and at least one layer may be formed of an insulating material different from the other insulating layers. For example, ABF (Ajinomoto Build-up Film), a product released by Ajinomoto, can be used, and FR-4, BT (Bismaleimide Triazine), and PID (Photo Image-able Dielectric resin) can also be used.

[0087] In addition, at least one of the first to third insulating layers (121, 122, 123) may include a reinforcing member including at least one of glass fiber and GCP (Glass Core Primer). The reinforcing member may improve the rigidity of the insulating layer (120), thereby preventing the circuit board (100) and / or the semiconductor package from being bent in a specific direction. If the insulating layer (120) is bent in a specific direction during the process of forming the circuit board (100), the accuracy of the position may decrease during the process of arranging the electrode portion (150), but this problem can be solved as the rigidity of the circuit board (100) is improved. In addition, even when mounting the semiconductor elements (410, 420) on the circuit board (100), the problem of electrical short-circuiting or opening of the semiconductor elements (410, 420) due to the bending of the circuit board (100) can be prevented. In addition, it is possible to prevent warpage problems caused by heat cycles that occur during the operation of a semiconductor package, thereby enabling stable operation of products such as servers to which the semiconductor package of the embodiment is applied, thereby improving the overall reliability of the product.

[0088] An upper protective layer (130) is disposed on the upper surface of the insulating layer (120), and a lower protective layer (135) is disposed on the lower surface of the insulating layer (120). The upper protective layer (130) and the lower protective layer (135) can have the function of protecting the pad from external moisture or contaminants, and can be provided with a photosensitive material and / or solder resist to prevent a short circuit problem between the connection parts (310, 320) when bonding between the semiconductor element and the circuit board (100) and / or the main board and the circuit board (100). In addition, the upper protective layer (130) and the lower protective layer (135) can be, for example, a photosensitive solder resist. According to the present embodiment, a plurality of terminals for connecting to a circuit board (100) such as a semiconductor element (410, 420) and / or a main board of an electronic device can be arranged at a high density, and when a plurality of terminals and a bonding portion (158) of the circuit board (100) are joined, solder can be used. When solder is used, a solder short-circuit problem may occur between terminals having a high density. In order to solve this short-circuit problem, a solder resist having poor wettability with the solder is arranged to prevent diffusion or movement of the solder, thereby preventing the solder short-circuit problem between the terminals. The upper protective layer (130) and the lower protective layer (135) can be arranged with different thicknesses in consideration of the warpage or coefficient of thermal expansion of the circuit board (100).

[0089] The substrate (110) has a through hole (110TH). The through hole (110TH) can penetrate the upper surface and the lower surface of the substrate (110). Here, the upper surface of the substrate (110) may mean the upper surface of the upper protective layer (130), and the lower surface of the substrate (110) may mean the lower surface of the lower protective layer (135). However, the embodiment is not limited thereto, and the upper protective layer (130) and / or the lower protective layer (135) may be omitted depending on the design of the product to which the circuit board (100) is applied. In this case, the upper surface and / or the lower surface of the substrate (110) may mean the upper surface of the third insulating layer (123) and / or the lower surface of the first insulating layer (121).

[0090] The through hole (110TH) can be formed to penetrate the substrate (110) using at least one of punch processing, laser processing, and mechanical drill processing after the substrates (110) are sequentially laminated.

[0091] The connecting member (200) is disposed within the through hole (110TH) of the substrate (110). The connecting member (200) may be a die. At this time, although FIG. 1A illustrates that one connecting member (200) is disposed within the substrate (110), the present invention is not limited thereto. For example, the substrate (110) may have a plurality of through holes spaced apart in the horizontal direction, and the connecting members (200) may be disposed within each of the plurality of through holes. Hereinafter, the basic structures of the connecting members (200) and the insulating members (140) disposed within the through hole (110TH) of the substrate (110) will be described first, taking as an example the structure in which one connecting member (200) is disposed within the substrate (110). In addition, the structure in which the connecting members are disposed within each of the plurality of through holes and the plurality of through holes will be described in detail with reference to FIGS. 8A and 8B below.

[0092] In one embodiment, the connecting member (200) may be a bridge die. For example, the connecting member (200) partially overlaps with the semiconductor elements (410, 420) arranged on the circuit board (100) in a vertical direction. In addition, the connecting member (200) electrically connects a part of the terminal (415) of the first semiconductor element (410) and a part of the terminal (425) of the second semiconductor element (420). The connecting member (200) may be formed of the same material as the semiconductor element, such as silicon, or may be formed of an organic material, such as a photosensitive resin or a thermosetting resin.

[0093] A plurality of semiconductor devices having different functions, such as chiplet units separated according to function and / or pitch, or CPU and GPU, or GPU and HBM, may be mounted on a circuit board, and a connecting member (200) may function to horizontally electrically connect them.

[0094] The connecting member (200) may not be embedded in the circuit board (100). Here, the fact that the connecting member (200) is not embedded in the circuit board (100) may mean that the upper area of ​​the connecting member (200) is not entirely covered by the substrate (110) constituting the circuit board (100). For example, the fact that the connecting member (200) is not embedded in the circuit board (100) may mean that the insulating layer (120) and / or the electrode portion (150) of the circuit board (100) are not disposed on the connecting member (200).

[0095] For example, the comparative example has a structure in which the connecting member is embedded within the insulating layer of the circuit board. That is, the comparative example is provided with an insulating layer and an electrode portion additionally built up on the connecting member. At this time, the insulating layer disposed on the connecting member of the comparative example is disposed on the connecting member while filling the cavity into which the connecting member is inserted. Therefore, it may be difficult to secure the flatness of the insulating layer disposed on the connecting member in the comparative example. For example, in the comparative example, the height of the first region of the insulating layer that vertically overlaps the connecting member and the height of the second region of the insulating layer that does not vertically overlap the connecting member may be different from each other. Accordingly, the first electrode portion disposed on the first region of the insulating layer and the second electrode portion disposed on the second region of the insulating layer may have different heights. As a result, a height difference may occur between the first electrode portion and the second electrode portion in the comparative example, and thus the yield of the semiconductor package may be reduced. In addition, in the comparative example, the semiconductor element may not be stably attached due to the height difference between the first electrode portion and the second electrode portion, and this may deteriorate the electrical reliability and / or mechanical reliability of the semiconductor package. For example, in the comparative example, a size difference may occur between a plurality of electrode portions due to a process difference in the process of forming the electrode portion that vertically overlaps the connecting member, and thus a height difference may occur between the plurality of electrode portions that vertically overlap the connecting member. Furthermore, the insulating layer disposed on the connecting member may have a thickness difference by region. Accordingly, some of the electrode portions disposed on the connecting member may penetrate the insulating layer and be connected to the pad portion of the connecting member, but other portions may not penetrate the insulating layer and may not be electrically connected to the pad portion of the connecting member, which may cause a problem.

[0096] For example, when a large-area circuit board using high power and multiple signals, such as a server or HPC, is applied, a plurality of connecting members may be arranged. At this time, as the area of ​​the circuit board increases, the circuit board may warp more in a specific direction. In addition, a height difference between the first electrode portion and the second electrode portion may accumulate depending on the arrangement of the plurality of connecting members. In addition, there is a problem of warping, etc., of a large-area circuit board, and a problem of semiconductor devices not being stably mounted due to a height difference between the first and second electrode portions that accumulates depending on the arrangement of the plurality of connecting members. For example, in the comparative example, the semiconductor device may be mounted in a tilted state due to the height difference between the first and second electrode portions. Therefore, in the comparative example, an electrical open problem may occur between the electrode portion of the circuit board and the terminal of the semiconductor device, and thus, the semiconductor device may not operate stably.

[0097] Additionally, in the comparative example, the connecting member is positioned within a cavity that partially penetrates the insulating layer. This may result in difficulties in the manufacturing process for forming a cavity that penetrates a portion of the insulating layer, which may result in a decrease in product yield. Furthermore, since the cavity is provided only in a portion of the insulating layer, the upper and lower components may have an asymmetrical structure with respect to the central axis in the vertical direction of the circuit board, which may result in the circuit board being significantly warped in a specific direction.

[0098] In contrast, the embodiment can improve the processability in the process of forming the through hole (110TH) by arranging the connecting member (200) in the through hole (110TH) penetrating the substrate (110), thereby improving the product yield. In addition, the embodiment can have a symmetrical structure of the upper component and the lower component with respect to the central axis in the vertical direction of the circuit board (100) by arranging the connecting member (200) in the through hole (110TH) penetrating the substrate (110), thereby preventing the circuit board from being significantly bent in a specific direction. Therefore, the embodiment can enable the semiconductor elements (410, 420) to be stably mounted on the circuit board (100), thereby enabling the semiconductor elements (410, 420) to operate stably, and further enabling the stable operation of products such as servers to which the semiconductor package is applied.

[0099] In addition, the connecting member (200) includes an upper pad portion (210). At this time, the embodiment can design and manufacture the vertical length of the circuit board (100) (for example, the vertical distance from the lower surface of the substrate (110) to the upper surface of the bonding portion (158)) to correspond to the thickness of the connecting member (200), for example, the vertical length from the lower surface of the connecting member (200) to the upper surface of the upper pad portion (210). Alternatively, the embodiment can design and manufacture the vertical length of the connecting member (200) to correspond to the vertical length of the circuit board (100). Therefore, the embodiment can make the upper surface of the bonding portion (158) and the upper surface of the upper pad portion (210) of the connecting member (200) positioned on the same plane only by forming a through hole (110TH) in the substrate (110) and arranging the connecting member (200) within the through hole (110TH). Through this, the embodiment can enable the semiconductor elements (410, 420) to be mounted more stably on the circuit board (100). At this time, designing the vertical length of the connecting member (200) and the vertical length of the circuit board (100) to correspond to each other can be achieved by adjusting at least one of the thickness of the insulating layer (120) of the board (110), the thickness of the upper protective layer (130) of the board (110), the thickness of the lower protective layer (135) of the board (110), and the thickness of the bonding portion (158), or can be achieved by adjusting at least one of the thickness of the insulating material of the connecting member (200) and the thickness of the upper pad portion (210).

[0100] In addition, the embodiment can more stably protect the connecting member (200) from stress due to heat cycles such as expansion and / or contraction of the circuit board (100) since the connecting member (200) is not embedded in the substrate (110). For example, the upper pad portion (210) of the connecting member (200) of the embodiment is not covered by the substrate (110). Therefore, the embodiment can prevent vertical stress due to heat cycles such as expansion and / or contraction of the substrate (110) from being transmitted to the connecting member (200) and the upper pad portion (210) of the connecting member (200). Through this, the embodiment can maintain the bonding force between the upper pad portion (210) of the connecting member (200) and the terminals (415, 425) of the semiconductor elements (410, 420) through the connecting portions (310, 320), thereby improving the physical reliability and / or electrical reliability of the semiconductor package.

[0101] To explain this more specifically, the substrate (110) and the insulating member (140) may overlap with the connecting member (200) in the horizontal direction, and the substrate (110) may not overlap with the connecting member (200) in the vertical direction. Accordingly, in the comparative example, the stress according to the heat cycle, such as expansion and / or contraction, acting on the substrate (110) may directly act on the connecting member (200), and thus, a problem occurs in that the physical reliability and / or electrical reliability of the connecting member (200) is deteriorated. For example, in the comparative example, the upper part of the connecting member may be covered by any one of the first to third insulating layers (121, 122, 123) of the substrate (110), and thus, the stress in the vertical direction acting according to the heat cycle may directly be transmitted to the connecting member. At this time, if stress in the vertical direction is transmitted to the connecting member, a crack may occur at the connection portion between the connecting member (200) and the semiconductor element (410, 420), which may cause electrical reliability and / or mechanical reliability problems.

[0102] In contrast, the embodiment can minimize the vertical stress applied to the substrate (110) from being transferred to the connecting member (200) by preventing the connecting member (200) and the substrate (110) from vertically overlapping each other by placing the connecting member (200) in the through hole (110TH). Through this, the embodiment can maintain the bonding force between the connecting member (200) and the semiconductor elements (410, 420), thereby improving the physical reliability and / or electrical reliability of the semiconductor package.

[0103] Furthermore, the thickness of the substrate (110) may be different from the thickness of the insulating member (140). For example, the thickness of the substrate (110) may refer to the vertical distance from the lower surface of the lower protective layer (135) to the upper surface of the upper protective layer (130). In addition, the thickness of the insulating member (140) may refer to the vertical distance from the lower surface (140BS) of the insulating layer (120) to the upper surface (140TS) of the insulating member (140). At this time, the upper surface (140TS) of the insulating member (140) of the first embodiment has a convex surface that is convex toward the semiconductor elements (410, 420), and accordingly, the thickness of the insulating member (140) may refer to the vertical distance from the lower surface (140BS) of the insulating layer (120) to the uppermost end of the convex surface of the upper surface (140TS) of the insulating member (140). Through this, it is possible to minimize the vertical stress caused by the heat cycle acting on the substrate (110) from being transferred to the connecting member (200). Through this, the bonding force between the connecting member (200) and the semiconductor element (410, 420) can be maintained, and thus the physical reliability and / or electrical reliability of the semiconductor package can be improved.

[0104] In addition, the embodiment can more stably protect the connecting member (200) from stress due to heat cycles such as shrinkage and / or expansion by utilizing the difference in the properties of the substrate (110) and the insulating member (140). For example, the substrate (110) has a through hole (110TH), and accordingly, the inner surface (S1) of the substrate (110) forming the through hole (110TH) and the outer surface (S2) of the connecting member (200) can be spaced apart from each other by a first width (W1) in the horizontal direction along the circumferential direction of the outer surface of the connecting member (200). Here, the inner surface (S1) of the substrate (110) forming the through hole (110TH) can refer to the outer surface of the insulating member (140), and the outer surface (S2) of the connecting member (200) can refer to the inner surface of the insulating member (140). And the horizontal width between the outer surface (S1) of the insulating member (140) and the inner surface (S2) of the insulating member (140) may have a constant first width (W1) along the circumferential direction of the outer surface of the connecting member (200). Through this, the embodiment allows the stress due to the heat cycle acting on the substrate (110) to be more efficiently absorbed or alleviated through the insulating member (140).

[0105] At this time, the insulating member (140) may include an insulating material different from the insulating material constituting the substrate (110). For example, the thermal expansion coefficient of the insulating member (140) may be different from the thermal expansion coefficient of the substrate (110). For example, the rigidity of the substrate (110) may be different from the rigidity of the insulating member (140). For example, the insulating member (140) may include a porous material capable of efficiently absorbing and / or alleviating stress, and may be provided with a non-conductive adhesive material (Non-Conductive Paste) for example.

[0106] Accordingly, the embodiment can absorb and / or alleviate thermal stress and other stresses applied to the connecting member (200) by using the insulating member (140). In addition, when the connecting member (200) is provided as an organic bridge, the insulating member (140) can further alleviate damage such as cracks in the semiconductor package caused by a difference in thermal expansion coefficients between the connecting member (200) and the body.

[0107] Additionally, for example, the thermal expansion coefficient of the insulating member (140) may be different from the thermal expansion coefficient of the substrate (110) (e.g., the thermal expansion coefficient of the insulating layer (120), the thermal expansion coefficient of the upper protective layer (130), or the thermal expansion coefficient of the lower protective layer (135)), and for example, the thermal expansion coefficient of the insulating member (140) may have a value between the thermal expansion coefficient of the substrate (110) and the thermal expansion coefficient of the connecting member (200).

[0108] In particular, when the connecting member (200) is an organic bridge, the insulating member (140) can more stably protect the connecting member (200) from stress caused by heat cycles such as shrinkage and / or expansion of the substrate (110). The connecting member (200) may be an organic bridge that can smoothly supply power from the bottom to the top while minimizing the loss of the supplied power. In this case, in the case of an inorganic bridge including a silicon substrate, power can be supplied through a Through Silicon Via (TSV), but there is a problem that the process cost for TSV processing increases and the product yield decreases. Therefore, it is preferable that the connecting member (200) of the embodiment is an organic bridge. In addition, the arrangement structure of the substrate (110) and the insulating member (140) can be maximized in effect when the connecting member (200) is an organic bridge. For example, in the case of an organic bridge, an insulating material such as a Photo Image-able Dielectric resin (PID) is used. At this time, the PID has a relatively large coefficient of thermal expansion, and accordingly, the adhesion between the connecting member (200) and the substrate (110) is reduced, resulting in a defect in which the interface is separated. Therefore, the embodiment provides an insulating member (140) surrounding the side of the connecting member (200) within the through hole (110TH) of the substrate (110), thereby more efficiently resolving electrical reliability and / or physical reliability issues occurring in the connecting member (200) including the organic bridge.

[0109] Furthermore, the insulating member (140) can prevent the semiconductor package from being significantly warped in a specific direction. Specifically, the semiconductor package may be significantly warped in a specific direction. This may occur due to a difference in the thickness of each layer of the substrate (110), a difference in the density of the wiring electrodes (151, 152, 153, 154) provided on the substrate (110), a difference in the thickness of the wiring electrodes (151, 152, 153, 154), etc. At this time, the insulating member (140) can have a thermal expansion coefficient matching function that alleviates the difference between the thermal expansion coefficient of the substrate (110) and the thermal expansion coefficient of the connecting member (200), thereby preventing the circuit board (100) and the semiconductor package from being significantly warped in a specific direction.

[0110] In addition, the insulating member (140) includes a top surface (140TS). The top surface (140TS) of the insulating member (140) may have a step with the top surface of the substrate (110) and / or the top surface of the connecting member (200). In addition, the top surface (140TS) of the insulating member (140) may have a curvature in the thickness direction. At this time, the curvature of the top surface (140TS) of the insulating member (140) may be determined in consideration of the direction in which the circuit board (100) is bent. For example, the top surface (140TS) of the insulating member (140) of the first embodiment may be provided as a convex surface that is convex toward the semiconductor elements (410, 420). At this time, the convex surface of the top surface (140TS) of the insulating member (140) may increase the surface area of ​​the top surface (140TS) of the insulating member (140). Through this, when a horizontal stress is applied to the substrate (110), the convex surface of the upper surface (140TS) of the insulating member (140) can have the function of increasing the surface movement distance between the inner surface (S1) of the through hole (110TH) of the substrate (110) and the outer surface (S2) of the connecting member (200), thereby preventing or alleviating the stress applied in the horizontal direction from being transferred to the connecting member (200).

[0111] Furthermore, although not shown in the drawing, a molding member (not shown) for molding the semiconductor elements (410, 420) may be further provided on the circuit board (100). At this time, the convex surface of the upper surface (140TS) of the insulating member (140) can increase the contact area between the molding member and the circuit board (100), thereby improving the adhesion between the molding member and the circuit board (100). Therefore, the embodiment can stably protect the connection member (200) and the semiconductor elements (410, 420) through the molding member, thereby improving the physical reliability and / or electrical reliability of the semiconductor package. For example, the embodiment can prevent substances such as moisture from penetrating into the molding member in the usage environment of the semiconductor package and being transmitted to the connection member (200) and / or the semiconductor elements (410, 420), thereby improving the physical reliability and / or electrical reliability of the semiconductor package.

[0112] At this time, the convex surface of the upper surface (140TS) of the insulating member (140) may be provided to control the filling conditions of the insulating member (140) in the process of filling the insulating member (140) into the through hole (110TH) of the substrate (110). For example, the filling conditions may include the filling amount of the insulating member (140), the filling time, the filling speed, etc.

[0113] In addition, the convex surface of the upper surface (140TS) of the insulating member (140) can be provided by adjusting the distance between the inner surface (S1) of the through hole (110TH) of the substrate (110) and the outer surface (S2) of the connecting member (200). The distance between the inner surface (S1) of the through hole (110TH) and the outer surface (S2) of the connecting member (200) corresponds to the horizontal width (W1) of the insulating member (140), and by reducing the width (W1), the upper surface (140TS) of the insulating member (140) can be made to have a convex surface.

[0114] In addition, the lower surface (140BS) of the insulating member (140) in the first embodiment may be flat. A brief description of the process of filling the insulating member (140) is as follows. The embodiment performs a process of manufacturing a substrate (110) and forming a through hole (110TH) in the substrate (110). Thereafter, the embodiment may position the connecting member (200) on the upper surface of the carrier film that vertically overlaps the through hole (110TH) while placing a carrier film (not shown) that blocks the through hole (110TH) on the lower surface of the substrate (110). Thereafter, the embodiment may perform a process of filling the insulating member (140) that wraps the side of the connecting member (200) while the connecting member (200) is placed on the carrier film. Accordingly, the lower surface (140BS) of the insulating member (140) in the first embodiment may be provided flat to correspond to the upper surface of the carrier film.

[0115] In addition, the lower surface (140BS) of the insulating member (140) may be positioned on the same plane as the lower surface of the substrate (110). In addition, the lower surface (140BS) of the insulating member (140) may be positioned on the same plane as the lower surface of the connecting member (200). This is because, as the process of filling the insulating member (140) is performed while the substrate (110) and the connecting member (200) are placed on the carrier film, the lower surface of the insulating member (140), the lower surface of the substrate (110), and the lower surface of the connecting member (200) may be positioned to correspond to the upper surface of the carrier film, respectively. Through this, the embodiment can make it possible for the lower surface of the substrate (110) constituting the lower surface of the circuit board (100), the lower surface of the connecting member (200), and the lower surface (140BS) of the insulating member (140) to be positioned on the same plane, thereby further improving the flatness of the circuit board (100), and further enabling the semiconductor elements (410, 420) to be mounted more stably on the circuit board (1000).

[0116] In the first embodiment, a connecting member (200) is placed within a through hole (110TH) penetrating a substrate (110), and then an insulating member (140) is placed to surround a side of the connecting member (200) and fill the through hole (110TH). Through this, the embodiment can improve the overall electrical reliability and / or mechanical reliability of the circuit board and the semiconductor package as described above, and thus, the semiconductor elements (410, 420) can be stably mounted on the circuit board (100), and thus, the semiconductor elements (410, 420) can be stably operated.

[0117]

[0118] Below, various embodiments of the structure of an insulating member provided on a circuit board are described.

[0119] FIG. 2 is a cross-sectional view showing a configuration of a semiconductor package according to a second embodiment, FIG. 3a is a cross-sectional view showing a configuration of a semiconductor package according to a third embodiment, FIG. 3b is an enlarged plan view of area A shown in FIG. 3a, FIG. 4 is a cross-sectional view showing a configuration of a semiconductor package according to a fourth embodiment, FIG. 5 is a cross-sectional view showing a configuration of a semiconductor package according to a fifth embodiment, FIG. 6 is a cross-sectional view showing a configuration of a semiconductor package according to a sixth embodiment, FIG. 7 is a cross-sectional view showing a configuration of a semiconductor package according to a seventh embodiment, FIG. 8a is a plan view showing a circuit board having a plurality of through holes and a plurality of connecting members according to an eighth embodiment, and FIG. 8b is a plan view showing the shape of the upper surface of a plurality of insulating members shown in FIG. 8a.

[0120] Hereinafter, the second to eighth embodiments will be described in detail with reference to FIGS. 2 to 8b, and components identical or corresponding to those of the first embodiment are given the same reference numerals and redundant descriptions thereof are omitted.

[0121] Referring to FIG. 2, the semiconductor package of the second embodiment includes a circuit board (1000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420).

[0122] The circuit board (1000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110).

[0123] Additionally, the circuit board (1000) includes a connecting member (200) positioned within a through hole (110TH) of the board (110). The connecting member (200) includes an upper pad portion (210).

[0124] Additionally, the circuit board (1000) includes an insulating member (1140) that surrounds the side of the connecting member (200) within the through hole (110TH) of the board (110).

[0125] The insulating member (1140) includes an upper surface (1140TS) and a lower surface (1140BS). At this time, the lower surface (1140BS) of the insulating member (1140) may be flat.

[0126] Additionally, the upper surface (1140TS) of the insulating member (1140) may have a curvature in a different direction from the upper surface of the insulating member of the first embodiment. For example, the upper surface (1140TS) of the insulating member (1140) of the second embodiment may include a concave surface that is concave from the upper surface (1140TS) of the insulating member (1140) toward the lower surface (1140BS) of the insulating member (1140).

[0127] That is, in the second embodiment, the concave surface of the upper surface (1140TS) of the insulating member (1140) can be provided by making the separation distance between the inner surface (S1) of the through hole (110TH) of the substrate (110) and the outer surface (S2) of the connecting member (200) larger than the separation distance in the first embodiment. For example, the upper surface (1140TS) of the insulating member (1140) of the second embodiment has a concave surface, and thus the horizontal width of the insulating member (1140) along the circumferential direction of the outer surface of the connecting member (200) can be larger than the horizontal width of the insulating member (140) of the first embodiment.

[0128] Accordingly, the embodiment can adjust the upper surface of the insulating member (1140) to have either a convex surface or a concave surface in consideration of the direction in which the circuit board (1000) is bent, thereby further preventing the circuit board from being bent in a specific direction.

[0129]

[0130] Referring to FIGS. 3A and 3B, the semiconductor package of the third embodiment includes a circuit board (2000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420).

[0131] The circuit board (2000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110). In addition, the circuit board (2000) includes a connecting member (200) disposed within the through hole (110TH) of the substrate (110). The connecting member (200) includes an upper pad portion (210).

[0132] Additionally, the circuit board (2000) includes an insulating member (2140) that surrounds the side of the connecting member (200) within the through hole (110TH) of the board (110).

[0133] At this time, the lower surface (2140BS) of the insulating member (2140) may be flat. In addition, the upper surface of the insulating member (2140) may have a curved surface with a specific radius of curvature in a different vertical direction along the circumferential direction of the side surface of the connecting member (200). That is, the upper surface of the insulating member (2140) may include a concave surface (2140TS1) and a convex surface (2140TS2).

[0134] Specifically, the insulating member (2140) may include a concave surface (2140TS1) that is concave toward the lower surface (2140BS) of the insulating member (2140) along the circumferential direction of the side surface of the connecting member (200) and a convex surface (2140TS2) that is convex toward the semiconductor element (410, 420).

[0135] Through this, the embodiment can have both a convex surface (2140TS2) and a convex surface (2140TS2) along the circumferential direction of the side surface of the connecting member (200), and based on this, a structure optimized for the bending direction of the circuit board (2000) can be provided, thereby further improving the electrical reliability and / or mechanical reliability of the circuit board and semiconductor package.

[0136] For example, the horizontal central axis of the connecting member (200) may not be aligned with the horizontal central axis of the through hole (110TH) provided in the substrate (110) and may be provided to be offset in a specific direction.

[0137] Accordingly, the separation distance between the inner surface (S1) of the through hole (110TH) of the substrate (110) and the outer surface (S2) of the connection member (200) may include a first separation distance (W2) and a third separation distance (W3) that are different from each other. Correspondingly, the insulating member (2140) includes an outer surface that contacts the inner surface (S1) of the through hole (110TH) of the substrate (110) and an inner surface that contacts the outer surface (S2) of the connection member (200). At this time, the width between the inner surface and the outer surface of the insulating member (2140) may include a first width (W2) and a second width (W3) that are different from each other along the circumferential direction of the side surface of the connection member (200).

[0138] Accordingly, the upper surface of the insulating member (2140) may include a concave surface (2140TS1) provided in an area corresponding to the first width (W2) and a convex surface (2140TS2) provided in an area corresponding to the second width (W3). Through this, the embodiment may be able to respond to bending in various directions acting on the circuit board (2000), thereby further improving the electrical reliability and / or mechanical reliability of the circuit board and the semiconductor package.

[0139] In this way, the upper surface of the insulating member (140, 1140, 2140) of the first to third embodiments may be provided with at least one of a convex surface (140TS, 2140TS2) and a concave surface (240TS, 2140TS1), which may serve to buffer thermal deformation such as expansion and / or contraction acting on the circuit board and the semiconductor package. That is, the convex surface (140TS, 2140TS2) and the concave surface (240TS, 2140TS1) on the upper surface of the insulating member (140, 1140, 2140) may serve to increase the surface area of ​​the upper surface of the insulating member (140, 1140, 2140), thereby solving problems such as electrical open and / or cracks of the connecting member (200) that may occur due to thermal stress acting on the semiconductor package. In addition, the convex surfaces (140TS, 2140TS2) and concave surfaces (240TS, 2140TS1) provided on the upper surfaces of the insulating members (140, 1140, 2140) can be used to prevent stress from being applied to the electrodes of the connecting member (200) having a fine pitch. Through this, the embodiment can improve the mechanical reliability and / or electrical reliability of the semiconductor package. For example, stress due to a heat cycle such as expansion and / or contraction of the circuit board may be applied to the connecting member (200). At this time, if the stress is continuously transmitted to the connecting member (200), a crack may occur in the joint portion between the connecting member (200) and the semiconductor element (410, 420) through the connection portion (320). This may cause an electrical open problem between the circuit board and the semiconductor element.

[0140] In contrast, the convex surface (140TS, 2140TS2) and the concave surface (240TS, 2140TS1) provided on the upper surface of the insulating member (140, 1140, 2140) can function to alleviate expansion and / or contraction according to the heat cycle, and further, can absorb stress due to thermal deformation of the substrate (110). Accordingly, the stress acting on the substrate (110) can be minimized from being transferred to the connecting member (200). Accordingly, the embodiment can stably attach the semiconductor element on the circuit board and the connecting member (200), and thus improve the mechanical reliability and electrical reliability between the circuit board and the semiconductor element. Furthermore, the embodiment can stably operate the semiconductor element, and thereby improve the operational reliability of electronic products such as servers to which the semiconductor package is applied.

[0141] Furthermore, the upper surface of the insulating member (140, 1140, 2140) can adjust the position and / or shape of the convex surface (140TS, 2140TS2) and the concave surface (240TS, 2140TS1) according to the bending direction of the circuit board, thereby preventing the circuit board and the semiconductor package including the same from being significantly bent in a specific direction. Through this, the embodiment can enable the semiconductor element to operate, and improve the operating characteristics of the semiconductor package and electronic products such as servers.

[0142]

[0143] Meanwhile, although the lower surface of the insulating member provided on the circuit board in the previous embodiment is said to be flat, this is not limited thereto. For example, the embodiment can control the insulating member not to be filled in an area adjacent to the lower portion of the side surface of the connecting member (200) by changing the filling conditions in the filling process of the insulating member. Through this, the lower surface of the insulating member can have a convex or concave curvature in a specific direction rather than a flat surface.

[0144] Referring to FIG. 4, a semiconductor package includes a circuit board (3000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420). The circuit board (3000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110). In addition, the circuit board (3000) includes a connecting member (200) disposed within the through hole (110TH) of the substrate (110). The connecting member (200) includes an upper pad portion (210).

[0145] Additionally, the circuit board (3000) includes an insulating member (3140) that surrounds the side of the connecting member (200) within the through hole (110TH) of the board (110).

[0146] At this time, the upper surface (3140TS) of the insulating member (3140) may have a convex surface, and the lower surface (3140BS) of the insulating member (3140) may have a concave surface that is concave toward the upper surface (3140TS) of the insulating member (3140). That is, the embodiment may provide a convex surface and a concave surface on each of the upper surface (3140TS) and the lower surface (3140BS) of the insulating member (3140), thereby further alleviating or absorbing stress acting on the connecting member (200), and thereby further improving electrical reliability and / or mechanical reliability of the semiconductor package.

[0147]

[0148] Referring to FIG. 5, a semiconductor package includes a circuit board (4000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420). The circuit board (4000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110). In addition, the circuit board (4000) includes a connecting member (200) disposed within the through hole (110TH) of the substrate (110). The connecting member (200) includes an upper pad portion (210).

[0149] Additionally, the circuit board (4000) includes an insulating member (4140) that surrounds the side of the connecting member (200) within the through hole (110TH) of the board (110).

[0150] At this time, the upper surface (4140TS) of the insulating member (4140) may have a concave surface, and the lower surface (4140BS) of the insulating member (4140) may have a convex surface that is convex toward the downward direction. That is, the embodiment may provide a convex surface and a concave surface on each of the upper surface (4140TS) and the lower surface (4140BS) of the insulating member (4140), thereby further alleviating or absorbing stress applied to the connecting member (200), and thereby further improving electrical reliability and / or mechanical reliability of the semiconductor package.

[0151]

[0152] Meanwhile, the shapes of the upper and lower surfaces of the insulating member of the embodiment are not limited thereto, and various combinations of the shapes described above may also be possible. For example, the upper surface of the insulating member may have a convex surface and a concave surface along the circumferential direction of the upper surface of the connecting member (200), and the lower surface of the insulating member may have only a convex surface or a concave surface. For example, the upper surface of the insulating member may have a convex surface and a concave surface along the circumferential direction of the upper surface of the connecting member (200), and the lower surface of the insulating member may also have only a convex surface or a concave surface along the circumferential direction of the connecting member (200). In addition, for example, the upper surface of the insulating member may have only a convex surface or a concave surface of the connecting member (200), and the lower surface of the insulating member may have only a convex surface or a concave surface along the circumferential direction of the connecting member (200).

[0153]

[0154] Referring to FIG. 6, a semiconductor package includes a circuit board (5000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420). The circuit board (5000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110).

[0155] Additionally, the circuit board (5000) includes a connecting member (5200) positioned within a through hole (110TH) of the board (110). The connecting member (5200) includes an upper pad portion (5210).

[0156] At this time, the side surface of the connecting member (5200) may have a step. For example, the distance between the outer surface of the connecting member (5200) on the upper surface of the connecting member (5200) and the inner surface of the through hole (110TH) of the substrate (110) may be different from the distance between the outer surface of the connecting member (5200) on the lower surface of the connecting member (5200) and the inner surface of the through hole (110TH) of the substrate (110). For example, the distance between the outer surface of the connecting member (5200) on the upper surface of the connecting member (5200) and the inner surface of the through hole (110TH) of the substrate (110) may be smaller than the distance between the outer surface of the connecting member (5200) on the lower surface of the connecting member (5200) and the inner surface of the through hole (110TH) of the substrate (110). For example, the side surface of the connecting member (5200) may be provided with a concave step (5200) facing inward toward the lower portion of the connecting member (5200).

[0157] Additionally, the circuit board (5000) includes an insulating member (5140) that surrounds the side of the connecting member (5200) within the through hole (110TH) of the board (110).

[0158] At this time, the insulating member (5140) may be in contact with a step (5200) provided on a side surface of the connecting member (5200). For example, the insulating member (5140) may include a first portion (5140-1) provided between the outer surface of the connecting member (5200) and the inner surface of the through hole (110TH) of the substrate (110), and a second portion (5140-2) extending from the first portion (5140-1) and in contact with the step (5200) of the connecting member (5200).

[0159] Through this, the embodiment can more stably position and / or fix the connecting member (5200) within the through hole (110TH) of the substrate (110) by using the second part (5140-2) of the insulating member (3140). For example, the second part (5140-2) of the insulating member (3140) can function as an anchor to more firmly fix the connecting member (5200) within the through hole (110TH) of the substrate (110). Through this, the embodiment can further improve the electrical reliability and / or mechanical reliability of the circuit board (5000) and the semiconductor package.

[0160]

[0161] Referring to FIG. 7, a semiconductor package includes a circuit board (6000), a connection portion (310, 320), and a plurality of semiconductor elements (410, 420). The circuit board (6000) includes a substrate (110) including an insulating layer (120) including first to third insulating layers (121, 122, 123), an upper protective layer (130), and a lower protective layer (135). In addition, the substrate (110) includes a through hole (110TH) penetrating the upper and lower surfaces of the substrate (110).

[0162] Additionally, the circuit board (6000) includes a connecting member (6200) positioned within a through hole (110TH) of the board (110).

[0163] The connecting member (6200) includes an upper pad portion (6210). The upper pad portion (6210) is disposed on the upper surface of the connecting member (6200) and can be connected to a semiconductor element (410, 420) through a connection portion (320).

[0164] The connecting member (6200) may further include a lower pad portion (6220). At this time, the lower pad portion (6220) may be electrically connected to the upper pad portion (6210), or may be a dummy pad that is not electrically connected to the upper pad portion (6210).

[0165] When the lower pad portion (6220) is a dummy pad, the lower pad portion (6220) may be provided to improve the processability in the process of filling the insulating member (6140) while the connecting member (6200) is placed on the carrier film.

[0166] Additionally, when the lower pad portion (6220) is a dummy pad, the lower pad portion (6220) can function as a heat dissipation pad that releases heat generated from the connecting member (6200) to the outside of the substrate (110).

[0167] Alternatively, the lower pad portion (6220) may be electrically connected to the upper pad portion (6210). To this end, the connecting member (6200) may further include connecting electrodes provided on the inside. The connecting electrodes may include a redistribution layer. In addition, the connecting member (6200) may further include a through electrode (6230) that electrically connects the lower pad portion (6220) and the upper pad portion (6210).

[0168] At this time, when the connecting member (6200) is made of silicon, the through electrode (6230) may be a TSV (Through Silicon Via) provided in the connecting member (6200), and may have a structure that connects the upper pad portion (6210) and the lower pad portion (6220) of the connecting member (6200) through the TSV. In addition, when the connecting member (6200) is made of an organic material, the connecting member (6200) may have a structure in which a via layer corresponding to a circuit layer and a through electrode (6230) connected to the circuit layer are laminated, and through this, the upper pad portion (6210) and the lower pad portion (6220) of the connecting member (6200) may have a structure in which they are electrically connected.

[0169] For example, the connecting member (6200) may be provided with an upper pad portion (6210) and a lower pad portion (6220) so as to enable smooth power supply from the lower side to the upper side while minimizing loss of the supplied power.

[0170] At this time, in the case of an inorganic bridge including a silicon substrate, power can be supplied through a Through Silicon Via (TSV), but there is a problem that the process cost for TSV processing increases and the product yield decreases. Therefore, it is preferable that the connecting member (6200) of the embodiment is an organic bridge. Furthermore, the structure for efficiently dispersing the stress acting on the connecting member (6200) while allowing the connecting member (6200) of the embodiment to be placed within the through hole (110TH) of the substrate (110) can be maximized in the case where the connecting member (6200) is an organic bridge. For example, the organic bridge includes an insulating material such as a Photo Imageable Dielectric resin (PID). At this time, the PID has a relatively large coefficient of thermal expansion, and therefore, the adhesion between the connecting member (6200) and the substrate (110) is reduced, resulting in a popcorn defect in which the interface is separated. Accordingly, the embodiment can provide a structure that can improve the adhesion between the connecting member (6200) and the circuit board while efficiently alleviating and / or dispersing the stress acting on the connecting member (6200) including the organic bridge.

[0171] An insulating member (6140) may be provided to surround a connecting member (6200) within a through hole (110TH). At this time, the connecting member (6200) has a lower pad portion (6220), and the insulating member (6140) may be in contact with the lower pad portion (6220). For example, the insulating member (6140) may include a first portion (6140-1) provided between an inner surface of the through hole (110TH) of the substrate (110) and an outer surface of the connecting member (6200). In addition, the insulating member (6140) may further include a second portion (6140-2) extending from the first portion (6140-1) and provided on a lower surface of the connecting member (6200). The second part (6140-2) of the insulating member (6140) can be arranged between a plurality of lower pad parts (6220) provided on the lower surface of the connecting member (6200). The second part (6140-2) of the insulating member (6140) can be arranged between a plurality of lower pad parts (6220) to serve as an anchor function to more firmly couple the connecting member (6200) within the through hole (110TH) of the substrate (110), and further, can stably protect the lower pad part (6220) from an electrical short circuit that occurs during bonding with the lower circuit board to be described later. At this time, the lower surface of the second part (6140-2) of the insulating member (6140) may include at least one of a concave surface and / or a convex surface, thereby increasing the surface area of ​​the lower surface of the second part (6140-2), thereby more stably protecting the lower pad part (6220) from electrical short circuit due to diffusion of the conductive adhesive.

[0172]

[0173] Referring to FIGS. 8A and 8B, the circuit board (7000) may have a multi-arrangement structure in which a plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4) are arranged.

[0174] For example, the circuit board (7000) includes a substrate (7110). The substrate (7110) includes an upper surface and a lower surface. In addition, the substrate (7110) includes a through hole penetrating the upper surface and the lower surface. At this time, the substrate (7110) may include a plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4) that are spaced apart from each other in the horizontal direction. At this time, the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4) may be arranged in different horizontal directions based on a central axis (CA) in the horizontal direction of the substrate (7110). Here, the central axis (CA) may mean the center of the substrate (7110), and further may mean the center of the circuit board (7000). For example, when the substrate (7110) has a rectangular shape in planar shape, the central axis (CA) may mean a point where imaginary straight lines connecting two opposing corners among the four corners of the upper surface of the substrate (7110) meet each other. In addition, the central axis of each of the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4) may mean a horizontal central axis for each of the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4), and the central axis of each of the plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4) may mean a horizontal central axis for each of the plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4).

[0175] The first through hole (TH1) may be provided in the left-back direction from the central axis (CA) of the substrate (7110), the second through hole (TH2) may be provided in the right-front direction from the central axis (CA) of the substrate (7110), the third through hole (TH3) may be provided in the right-back direction from the central axis (CA) of the substrate (7110), and the fourth through hole (TH4) may be provided in the left-front direction from the central axis (CA) of the substrate (7110). At this time, the first through hole (TH1) and the second through hole (TH2) may be provided at positions that are symmetrical to each other with respect to the central axis (CA) of the substrate (7110). In addition, the third through hole (TH3) and the fourth through hole (TH4) may be provided at positions that are symmetrical to each other with respect to the central axis (CA) of the substrate (7110).

[0176] Additionally, the circuit board (7000) may include a first connecting member (7200-1) provided in a first through hole (TH1) of the board (7110), a second connecting member (7200-2) provided in a second through hole (TH2) of the board (7110), a third connecting member (7200-3) provided in a third through hole (TH3) of the board (7110), and a fourth connecting member (7200-4) provided in a fourth through hole (TH4) of the board (7110).

[0177] The first connecting member (7200-1) and the second connecting member (7200-2) may be provided at positions symmetrical to each other with respect to the central axis (CA) of the substrate (7110). In addition, the third connecting member (7200-3) and the fourth connecting member (7200-4) may be provided at positions symmetrical to each other with respect to the central axis (CA) of the substrate (7110).

[0178] Additionally, the circuit board (7000) may include a first insulating member (7140-1) provided to surround a side of a first connecting member (7200-1) within a first through hole (TH1) of the board (7110), a second insulating member (7140-2) provided to surround a side of a second connecting member (7200-2) within a twelfth through hole (TH2) of the board (7110), a third insulating member (7140-31) provided to surround a side of a third connecting member (7200-3) within a third through hole (TH3) of the board (7110), and a fourth insulating member (7140-4) provided to surround a side of a fourth connecting member (7200-4) within a fourth through hole (TH4) of the board (7110). In addition, the first insulating member (7140-1) and the second insulating member (7140-2) may be provided at positions that are symmetrical with respect to the central axis (CA). In addition, the third insulating member (7140-3) and the fourth insulating member (7140-4) may be provided at positions that are symmetrical with respect to the central axis (CA). Furthermore, the first insulating member (7140-1) and the second insulating member (7140-2) may have shapes that are symmetrical with respect to the central axis (CA). In addition, the third insulating member (7140-3) and the fourth insulating member (7140-4) may have shapes that are symmetrical with respect to the central axis (CA).

[0179] That is, each of the plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4) may be provided at different positions within the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4). For example, each of the plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4) may be provided at different horizontal orientations within the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4). Preferably, each of the plurality of connecting members (7200-1, 7200-2, 7200-3, 7200-4) may be provided offset in the direction toward the central axis (CA) within the plurality of through holes (7110TH1, 7110TH2, 7110TH3, 7110TH4).

[0180] That is, the first connecting member (7200-1) may be provided so as to be offset in the right-front direction toward the central axis (CA) from the first through hole (110TH). In addition, the second connecting member (7200-2) may be provided so as to be offset in the left-rear direction toward the central axis (CA) from the second through hole (TH2). In addition, the third connecting member (7200-3) may be provided so as to be offset in the left-front direction toward the central axis (CA) from the third through hole (TH3). In addition, the fourth connecting member (7200-4) may be provided so as to be offset in the right-rear direction toward the central axis (CA) from the fourth through hole (TH4).

[0181] Accordingly, the separation distance between the outer surface of the first connecting member (7200-1) and the inner surface of the first through hole (TH1) of the substrate (7110) may include a first separation distance (W2) and a second separation distance (W3) that are different from each other along the circumferential direction of the outer surface of the first connecting member (7200-1). In addition, the separation distance between the outer surface of the second connecting member (7200-2) and the inner surface of the second through hole (TH2) of the substrate (7110) may include a first separation distance (W2) and a second separation distance (W3) that are different from each other along the circumferential direction of the outer surface of the second connecting member (7200-2). At this time, the first and second separation distances between the outer surface of the first connecting member (7200-1) and the inner surface of the first through hole (TH1) of the substrate (7110) may be symmetrical with the first and second separation distances between the outer surface of the second connecting member (7200-2) and the inner surface of the second through hole (TH2) of the substrate (7110) based on the central axis (CA) of the substrate (7110).

[0182] Additionally, the distance between the outer surface of the third connecting member (7200-3) and the inner surface of the third through hole (TH3) of the substrate (7110) may include a first distance (W2) and a second distance (W3) that are different from each other along the circumferential direction of the outer surface of the third connecting member (7200-3). Additionally, the distance between the outer surface of the fourth connecting member (7200-4) and the inner surface of the fourth through hole (TH4) of the substrate (7110) may include a first distance (W2) and a second distance (W3) that are different from each other along the circumferential direction of the outer surface of the fourth connecting member (7200-4). At this time, the first and second separation distances between the outer surface of the third connecting member (7200-3) and the inner surface of the third through hole (TH3) of the substrate (7110) may be symmetrical with the first and second separation distances between the outer surface of the fourth connecting member (7200-4) and the inner surface of the fourth through hole (TH4) of the substrate (7110) with respect to the central axis (CA) of the substrate (7110). That is, the embodiment allows the connecting members provided at positions symmetrical to each other to be provided at positions symmetrical to each other with respect to the central axis (CA) within each through hole, thereby allowing the first and second separation distances between the inner surface of each through hole and the outer surface of each connecting member to be symmetrical to each other with respect to the central axis (CA). Through this, the embodiment can control the arrangement position of each connecting member within each through hole in consideration of the bending direction of the circuit board and / or semiconductor package, thereby further improving bending of the circuit board and the semiconductor package in a specific direction.

[0183] Through this, the insulating members provided in each through hole can have a first width (W2) and a second width (W3) in different horizontal directions along the circumferential direction of each connecting member, and further, the positions of the first width (W2) and the second width (W3) of each insulating member can be different from each other, and further, the positions of the concave surface and the convex surface of the upper surface of each insulating member can be provided in different directions with respect to the central axis (CA).

[0184] For example, as shown in (a) of FIG. 8B, the first insulating member (7140-1) may include a concave surface (7140-11) that surrounds the left side and rear side of the first connecting member (7200-1) and has a relatively large width (W2) in the horizontal direction. In addition, the first insulating member (7140-1) may include a convex surface (7140-12) that is connected to the concave surface (7140-11) and surrounds the right side and front side of the first connecting member (7200-1) that is relatively closer to the central axis (CA) and has a width (W3) that is smaller than the width (W2) of the concave surface (7140-11).

[0185] For example, as in (b) of FIG. 8B, the second insulating member (7140-2) may include a concave surface (7140-21) that surrounds the right side and the front side of the second connecting member (7200-2) and has a relatively large width (W2) in the horizontal direction. In addition, the second insulating member (7140-2) may include a convex surface (7140-22) that is connected to the concave surface (7140-21) and surrounds the left side and the rear side of the second connecting member (7200-2) that is relatively closer to the central axis (CA) and has a width (W3) that is smaller than the width (W2) of the concave surface (7140-21).

[0186] At this time, the first insulating member (7140-1) and the second insulating member (7140-2) may have shapes that are symmetrical with respect to the central axis (CA) of the substrate (7110). For example, the concave surface (7140-11) and the convex surface (7140-12) of the first insulating member (7140-1) may be provided at positions that are symmetrical with respect to the concave surface (7140-21) and the convex surface (7140-22) of the second insulating member (7140-2) with respect to the central axis (CA) of the substrate (7110). Through this, the embodiment can further secure the flatness of the first connecting member (7200-1) and the second connecting member (7200-2) by using the first insulating member (7140-1) and the second insulating member (7140-2), and accordingly, can minimize the height deviation of the upper pad portions of each of the first connecting member (7200-1) and the second connecting member (7200-2).

[0187] In addition, as shown in (c) of FIG. 8b, the third insulating member (7140-3) may include a concave surface (7140-31) that surrounds the right side and rear side of the third connecting member (7200-3) and has a relatively large width (W2) in the horizontal direction. In addition, the third insulating member (7140-3) may include a convex surface (7140-32) that is connected to the concave surface (7140-31) and surrounds the left side and front side of the third connecting member (7200-3) that is relatively closer to the central axis (CA) and has a width (W3) that is smaller than the width (W2) of the concave surface (7140-31).

[0188] For example, as in (d) of FIG. 8b, the fourth insulating member (7140-4) may include a concave surface (7140-41) that surrounds the left side and the front side of the fourth connecting member (7200-4) and has a relatively large horizontal width (W2). In addition, the fourth insulating member (7140-4) may include a convex surface (7140-42) that is connected to the concave surface (7140-41) and surrounds the right side and the rear side of the fourth connecting member (7200-4) that is relatively closer to the central axis (CA) and has a width (W3) that is smaller than the width (W2) of the concave surface (7140-41).

[0189] At this time, the third insulating member (7140-3) and the fourth insulating member (7140-4) may have shapes that are symmetrical with respect to the central axis (CA) of the substrate (7110). For example, the concave surface (7140-31) and the convex surface (7140-32) of the third insulating member (7140-3) may be provided at positions that are symmetrical with respect to the concave surface (7140-41) and the convex surface (7140-42) of the fourth insulating member (7140-4) with respect to the central axis (CA) of the substrate (7110). Through this, the embodiment can further secure the flatness of the third connecting member (7200-3) and the fourth connecting member (7200-4) by using the third insulating member (7140-3) and the second insulating member (7140-4), and accordingly, the height deviation of the upper pad portions of each of the third connecting member (7200-3) and the fourth connecting member (7200-4) can be minimized.

[0190]

[0191] FIG. 9 is a cross-sectional view illustrating a configuration of a semiconductor package according to the ninth embodiment, FIG. 10 is a cross-sectional view illustrating a configuration of a semiconductor package according to the tenth embodiment, and FIG. 11 is a cross-sectional view illustrating a configuration of a semiconductor package according to the eleventh embodiment.

[0192] Prior to the description of FIGS. 9 to 11, the semiconductor package includes a semiconductor package substrate connected to a main board of an electronic device. In addition, the semiconductor package includes an interposer positioned between a semiconductor element (410, 420) and the semiconductor package substrate. In this case, the interposer may be a circuit board (100, 1000, 2000, 3000, 4000, 5000, 6000, 7000) described with reference to FIGS. 1 to 8b.

[0193] However, the embodiment is not limited thereto, and the interposer of the semiconductor package may further include a lower circuit board connected to the upper circuit board while using the circuit board (100, 1000, 2000, 3000, 4000, 5000, 6000, 7000) described with reference to FIGS. 1 to 8b as an upper circuit board having a connecting member. In this case, the embodiment may manufacture and provide the upper circuit board corresponding to the number of semiconductor elements, the mounting positions of the semiconductor elements, the positions of the connecting members, and the number of the connecting members according to the product design of the semiconductor package, and may electrically couple the lower circuit board thereto to provide the interposer. In this case, in the case of an interposer including a plurality of semiconductor elements and a plurality of connecting members, the embodiment may improve the product yield by manufacturing the upper circuit board and the lower circuit board separately, and further, may protect the connecting members and the semiconductor elements from cracks more stably compared to the conventional technology in which the upper circuit board and the lower circuit board are provided integrally.

[0194]

[0195] Referring to FIG. 9, the semiconductor package may include an upper circuit board, a connection portion (310, 320), and a semiconductor element (410, 420). The upper circuit board may be any one of the circuit boards (100, 1000, 2000, 3000, 4000, 5000, 6000, 7000) described in the previous embodiments. For example, as illustrated in FIG. 9, the upper circuit board may be the circuit board (100) illustrated in FIG. 1.

[0196] Additionally, a lower circuit board (500) may be placed under the upper circuit board (100). The lower circuit board (500) may not have a connecting member and may be electrically coupled to the upper circuit board (100) to form an interposer.

[0197] The lower circuit board (500) includes a bonding portion (510) provided on the upper surface. In addition, the upper circuit board (100) may include a lower bonding portion that is coupled with the bonding portion (510) of the lower circuit board (500). For example, the electrode portion (150) of the upper circuit board (100) may include a first wiring electrode (151), and the first wiring electrode (151) may include a lower bonding portion that vertically overlaps an opening of the lower protective layer (135) of the substrate (110). In addition, a connection portion (330) may be arranged between the lower bonding portion of the upper circuit board (100) and the bonding portion (510) of the lower circuit board (500), through which the upper circuit board (100) and the lower circuit board (500) may be electrically coupled.

[0198] At this time, the connecting member (200) provided on the upper circuit board (100) may not have a lower pad portion, and through this, the bonding portion (510) of the lower circuit board (500) may not be directly electrically coupled with the connecting member (200) of the upper circuit board (100).

[0199]

[0200] Referring to FIG. 10, the semiconductor package may include an upper circuit board, a connection portion (310, 320), and a semiconductor element (410, 420). The upper circuit board may be any one of the circuit boards (100, 1000, 2000, 3000, 4000, 5000, 6000, 7000) described in the previous embodiments. For example, the upper circuit board may be the circuit board (6000) illustrated in FIG. 7.

[0201] Additionally, a lower circuit board (500) may be placed under the upper circuit board (6000). The lower circuit board (500) may not have a connecting member and may be electrically coupled to the upper circuit board (6000) to form an interposer.

[0202] The lower circuit board (500) includes a bonding portion (510) provided on the upper surface. In addition, the upper circuit board (6000) may include a lower bonding portion that is coupled to the bonding portion (510) of the lower circuit board (500). At this time, the connecting member (6200) provided on the upper circuit board (600) includes an upper pad portion (6210), a lower pad portion (6220), and a through electrode (6230).

[0203] Accordingly, the lower circuit board (500) may include a first bonding portion (511) that is bonded to the lower bonding portion of the first wiring electrode (151) of the upper circuit board (6000) and a second bonding portion (512) that is bonded to the lower pad portion (6220) of the connecting member (6200).

[0204] In addition, a first connection portion (330) may be arranged between the lower bonding portion of the first wiring electrode (151) of the upper circuit board (6000) and the first bonding portion (511) of the lower circuit board (500), and a second connection portion (340) may be arranged between the lower pad portion (6220) of the connecting member (6200) and the second bonding portion (512) of the lower circuit board (500). Through this, the embodiment can enable a more stable power supply to the connecting member (6200) and prevent the connecting member from operating abnormally due to power loss.

[0205] Referring to FIG. 11, the semiconductor package may further include a semiconductor package substrate (600) positioned below the lower circuit board (500). The semiconductor package substrate (600) may be connected to a main board of an electronic device.

[0206] To this end, the lower circuit board (500) may further include a second bonding portion (520) disposed on the lower surface, and the semiconductor package substrate (600) may further include a third bonding portion (610) disposed on the upper surface. In addition, a connection portion (350) may be disposed between the second bonding portion (520) and the third bonding portion (610) to electrically couple them therebetween.

[0207]

[0208] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor elements from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor elements. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integrity or technical interoperability with each other.

[0209] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor elements controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuits between terminals, or electrical open circuits of terminals supplying semiconductor elements, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

[0210] The features, structures, effects, etc. described in the embodiments above are included in at least one embodiment, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0211] Although the above has been described focusing on embodiments, these are merely examples and are not intended to limit the embodiments. Those skilled in the art to which the embodiments pertain will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

1. A substrate having an upper surface and a lower surface, and a through hole penetrating the upper surface and the lower surface; a connecting member disposed within the through hole of the substrate; and Including an insulating member provided to surround the side of the connecting member within the through hole of the substrate, A circuit board, wherein the upper surface of the insulating member includes at least one of a concave surface that is concave toward the lower surface of the insulating member and a convex surface that is convex with respect to the lower surface of the insulating member.

2. In paragraph 1, The above substrate is, An insulating layer comprising at least one layer; an upper protective layer disposed on the insulating layer; and A lower protective layer is provided under the above insulating layer, The upper surface of the above substrate is the upper surface of the upper protective layer, A circuit board, wherein the lower surface of the above substrate is the lower surface of the lower protective layer.

3. In paragraph 1 or 2, A circuit board wherein the insulating member comprises an insulating material different from the insulating material of the substrate.

4. In paragraph 1, A circuit board, wherein the upper surface of the insulating member includes a convex surface provided on one side of the connecting member and a concave surface provided on the other side of the connecting member other than the one side.

5. In paragraph 1, A circuit board, wherein the vertical length between the upper surface of the substrate and the lower surface of the substrate is different from the vertical length between the uppermost end of the insulating member and the lowermost end of the insulating member.

6. In paragraph 1, The substrate includes an inner surface forming the through hole, The above connecting member includes an outer surface facing the inner surface of the substrate, A circuit board, wherein a horizontal separation distance between an outer surface of the connecting member and an inner surface of the substrate includes a first separation distance and a second separation distance different from the first separation distance along the circumferential direction of the outer surface of the connecting member.

7. In paragraph 1, Further comprising an electrode portion arranged on the above substrate, The above electrode portion includes an upper bonding portion arranged on the substrate, A circuit board, wherein the connecting member includes an upper pad portion that overlaps the upper bonding portion in a horizontal direction.

8. In paragraph 1, A circuit board, wherein the lowermost part of the lower surface of the insulating member is located on the same plane as the lower surface of the substrate.

9. In paragraph 1, A circuit board having a lower surface of the insulating member including at least one of a flat surface, a concave surface concave toward the upper surface of the insulating member, and a convex surface convex with respect to the upper surface of the insulating member.

10. In paragraph 1, The outer surface of the above connecting member has a step, A circuit board, wherein the insulating member has a portion that contacts the step of the connecting member.

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