Circuit board and semiconductor package comprising same

Abstract

A circuit board according to an embodiment comprises: a build-up structure; a plurality of bonding parts arranged on the build-up structure; and a reinforcing part arranged in the build-up structure, wherein: the plurality of bonding parts include a first bonding part, a second bonding part closer than the first bonding part to a first outer side of the build-up structure, and a third bonding part closer than the first and second bonding parts to a second outer side of the build-up structure, which is opposite to the first outer side of the build-up structure; and the reinforcing part is arranged in the build-up structure so as to connect the second bonding part and the third bonding part to each other.

Description

Circuit boards and semiconductor packages including the same

[0001] The embodiment relates to a circuit board and a semiconductor package including the same.

[0002] As the performance of electrical and electronic products continues to improve, technologies are being proposed and researched to accommodate a greater number of semiconductor devices on a limited-size semiconductor package substrate. However, conventional semiconductor packages typically consist of a single semiconductor device, limiting their ability to achieve desired performance.

[0003] Accordingly, semiconductor packages that place a plurality of semiconductor elements on multiple semiconductor package substrates have recently been provided. These semiconductor packages have a structure in which multiple semiconductor elements are connected to each other horizontally and / or vertically on the semiconductor package substrate. Accordingly, these semiconductor packages have the advantage of efficiently utilizing the mounting area of ​​the semiconductor elements and enabling high-speed signal transmission through short signal transmission paths between the semiconductor elements.

[0004] In addition, semiconductor packages applied to products that provide the Internet of Things (IoT), autonomous vehicles, and high-performance servers are expanding their concept to semiconductor chiplets as the number of semiconductor elements and / or the size of each semiconductor element increases in line with the trend toward high integration, or as the functional parts of semiconductor elements are divided.

[0005] Meanwhile, as the number of semiconductor devices and / or semiconductor chiplets mounted in a semiconductor package increases, the area of ​​the semiconductor package is increasing.

[0006] Accordingly, as the area of ​​a semiconductor package increases, the semiconductor package suffers from greater warpage. Furthermore, as the number of semiconductor devices and / or semiconductor chiplets increases, heat generation becomes more severe, necessitating further improvements in heat dissipation characteristics.

[0007] The embodiment provides a circuit board of a novel structure and a semiconductor package including the same.

[0008] In addition, the embodiment provides a circuit board with improved bending characteristics and a semiconductor package including the same.

[0009] Additionally, the embodiment provides a circuit board with improved heat dissipation characteristics and a semiconductor package including the same.

[0010] In addition, the embodiment provides a circuit board and a semiconductor package including the same with improved emission characteristics of gas generated during curing of an insulating layer.

[0011] The technical tasks to be achieved in the proposed embodiment are not limited to the technical tasks mentioned above, and other technical tasks not mentioned can be clearly understood by a person having ordinary skill in the technical field to which the proposed embodiment belongs from the description below.

[0012] A circuit board according to an embodiment comprises: a build-up structure; a plurality of bonding portions arranged on the build-up structure; and a reinforcing portion arranged within the build-up structure, wherein the plurality of bonding portions include a first bonding portion, a second bonding portion closer to a first outer side of the build-up structure than the first bonding portion, and a third bonding portion closer to a second outer side of the build-up structure opposite to the first outer side than the first and second bonding portions, wherein the reinforcing portion is arranged within the build-up structure to connect between the second bonding portion and the third bonding portion.

[0013] Additionally, the reinforcing portion overlaps vertically with each of the second bonding portion and the third bonding portion.

[0014] Additionally, the reinforcing portion includes a first pad vertically overlapping with the second bonding portion, a second pad vertically overlapping with the third bonding portion, and an electrode pattern connecting the first and second pads.

[0015] In addition, the reinforcement portion further includes a first via electrode penetrating at least a portion of the build-up structure and connecting between the second bonding portion and the first pad, and a second via electrode penetrating at least a portion of the build-up structure and connecting between the third bonding portion and the second pad.

[0016] In addition, the build-up structure includes a first insulating layer having a first insulating material; and a second insulating layer having a second insulating material different from the first insulating material, and the reinforcing member is disposed on the second insulating layer.

[0017] Additionally, the second insulating material includes a photosensitive material.

[0018] Additionally, the length of the electrode pattern is greater than the straight line length between the first pad and the second pad.

[0019] Additionally, the circuit board is disposed within the build-up structure and further includes a wiring electrode from the reinforcement portion, and a vertical thickness of the reinforcement portion is greater than a vertical thickness of the wiring electrode.

[0020] Meanwhile, a circuit board according to an embodiment includes a build-up structure; a plurality of bonding portions arranged on the build-up structure; and an electrode portion arranged within the build-up structure, wherein the electrode portion includes a reinforcing portion arranged within the build-up structure and vertically overlapping each of the plurality of bonding portions.

[0021] In addition, the electrode portion includes a wiring electrode disposed within the build-up structure and connected to the plurality of bonding portions; and a via electrode disposed within the build-up structure and connected to the wiring electrode.

[0022] Additionally, the reinforcement portion does not contact the wiring electrode and the via electrode within the build-up structure.

[0023] In addition, the wiring electrode includes a first wiring electrode that overlaps the reinforcing portion in a horizontal direction; and a second wiring electrode that does not overlap the reinforcing portion in a horizontal direction and is vertically spaced from the reinforcing portion, and a vertical thickness of the reinforcing portion is greater than a vertical thickness of the second wiring electrode.

[0024] In addition, the first wiring electrode includes a pad that overlaps the reinforcement portion in a horizontal direction, and the reinforcement portion has a first through hole that penetrates the upper and lower surfaces of the reinforcement portion and overlaps the pad in a vertical direction.

[0025] Additionally, the area of ​​the first through hole of the reinforcement part is larger than the area of ​​the pad.

[0026] Additionally, the via electrode includes a first via electrode that overlaps the reinforcement portion in a horizontal direction, and the reinforcement portion has a second through hole that penetrates the upper and lower surfaces of the reinforcement portion and overlaps the first via electrode in a vertical direction.

[0027] Additionally, the reinforcing member has a third through hole that penetrates the upper and lower surfaces of the reinforcing member and is filled with an insulating material that constitutes the build-up structure.

[0028] Additionally, the above reinforcement is a ground pattern.

[0029] The circuit board of the embodiment includes a build-up structure and an electrode portion arranged within the build-up structure. At this time, the electrode portion includes a reinforcing portion. The reinforcing portion may function as an electrode for electrically connecting a plurality of semiconductor elements and may also have a reinforcing function for improving the rigidity of the build-up structure. Specifically, the embodiment changes the design of the arrangement position and / or arrangement shape of the electrode portion provided within the build-up structure so that the electrode portion performs a communication function for signal transmission and also has a reinforcing function for improving the rigidity of the build-up structure. Therefore, the embodiment does not require arranging a separate reinforcing portion for securing rigidity within the build-up structure, and thus the build-up structure can be miniaturized because the space required for arranging the separate reinforcing portion does not have to be secured. Furthermore, the embodiment allows the electrode portion to be arranged in a space where a separate reinforcing portion having only a reinforcing function would otherwise be arranged, thereby ensuring circuit integration.

[0030] Accordingly, the embodiment can improve the rigidity of the circuit board, thereby preventing the circuit board from being significantly warped in a specific direction, and further, can enable the semiconductor element to be stably installed on the circuit board. That is, the circuit board may be significantly warped in a specific direction due to differences in the thicknesses of each layer constituting the build-up structure, differences in the density and / or thickness of the wiring electrodes provided in each layer, etc. In addition, when the circuit board is significantly warped in a specific direction, a height deviation of the plurality of bonding portions may occur, and thus the semiconductor element may be mounted in a tilted state on the plurality of bonding portions. Accordingly, at least one of the plurality of bonding portions may not be electrically connected to the terminal of the semiconductor element, and thus an electrical open problem may occur, which may prevent the semiconductor element from operating stably.

[0031] The embodiment can improve the rigidity of a circuit board, thereby preventing the circuit board from being significantly bent in a specific direction, thereby stably mounting semiconductor devices, thereby enabling stable operation of the semiconductor devices. Accordingly, the embodiment can enable stable operation of products such as servers to which semiconductor packages are applied.

[0032] Additionally, the reinforcing portion of the embodiment may be provided entirely, avoiding areas where the wiring electrodes are arranged on the same layer. For example, the reinforcing portion may be a flat ground pattern. This allows the embodiment to increase the area of ​​the reinforcing portion, thereby further improving the rigidity of the built-up structure.

[0033] In addition, the embodiment provides that the reinforcing member is provided with at least one through hole. The reinforcing member may include at least one of a first through hole provided in an area where a pad is to be placed, a second through hole provided in an area where a via electrode is to be placed, and a third through hole filled with an insulating material constituting the build-up structure. In this case, the second and third through holes may function as gas exhaust holes to address reliability issues that arise when gases generated during curing of the build-up structure are prevented from being released to the outside by the reinforcing member.

[0034] Through this, the embodiment can facilitate the discharge of gases generated during the curing of the build-up structure through the through-holes provided in the reinforcing member. Accordingly, the embodiment can resolve the problem of delamination between the build-up structure and the electrode member caused by the gas, thereby improving electrical reliability and / or mechanical reliability.

[0035]

[0036] FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor package according to the first embodiment.

[0037] Fig. 2a is a plan view showing the configuration of the bonding portion illustrated in Fig. 1.

[0038] Figure 2b is a plan view showing the configuration of the fifth wiring electrode illustrated in Figure 1.

[0039] Fig. 2c is a plan view showing the configuration of a fourth wiring electrode having a reinforcing member as shown in Fig. 1.

[0040] FIG. 2d is a drawing showing various embodiments of the reinforcement part illustrated in FIG. 2c.

[0041] Fig. 3 is a cross-sectional view showing the configuration of a semiconductor package according to the second embodiment.

[0042] Figure 4 is a plan view showing a layer in which the reinforcement part illustrated in Figure 3 is arranged.

[0043] Figure 5 is a cross-sectional view showing the configuration of a semiconductor package according to the third embodiment.

[0044] Figure 6 is a plan view showing a layer in which the reinforcement part illustrated in Figure 5 is arranged.

[0045] Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or similar components will be given the same reference numbers, and redundant descriptions thereof will be omitted. The suffixes "module" and "part" used for components in the following description are assigned or used interchangeably only for the convenience of writing the specification, and do not in themselves have distinct meanings or roles. In addition, when describing the embodiments disclosed in this specification, if it is determined that a specific description of a related known technology may obscure the gist of the embodiments disclosed in this specification, a detailed description thereof will be omitted. In addition, the attached drawings are only intended to facilitate easy understanding of the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited by the attached drawings, and should be understood to include all modifications, equivalents, and substitutes included in the spirit and technical scope of the present invention.

[0046] Terms that include ordinal numbers, such as first, second, etc., may be used to describe various components, but the components are not limited by these terms. These terms are used solely to distinguish one component from another.

[0047] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components intervening. Conversely, when a component is referred to as being "directly connected" or "connected" to another component, it should be understood that there are no other components intervening.

[0048] Singular expressions include plural expressions unless the context clearly indicates otherwise.

[0049] In this application, terms such as “include” or “have” are intended to specify the presence of a feature, number, step, operation, component, part or combination thereof described in the specification, but should be understood not to exclude in advance the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts or combinations thereof.

[0050] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by those of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0051] Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or corresponding components are given the same reference numbers, and redundant descriptions thereof will be omitted.

[0052] Before describing the embodiment, an electronic device to which the semiconductor package of the embodiment is applied will be briefly described. The electronic device includes a main board (not shown). The main board may be physically and / or electrically connected to various components. For example, the main board may be connected to the semiconductor package of the embodiment. In addition, the semiconductor package includes a circuit board having a connection member embedded therein, a semiconductor element, and a connection portion for electrically connecting the semiconductor element and the circuit board. Here, various semiconductor elements may be mounted on the semiconductor package.

[0053] The semiconductor device may include active components and / or passive components. The active component may be a semiconductor chip in the form of an integrated circuit (IC) in which hundreds to millions of components are integrated into a single chip. The semiconductor device may be a logic chip, a memory chip, or the like. The logic chip may be a central processor (CPU), a graphics processor (GPU), or the like. For example, the logic chip may be an application processor (AP) chip including at least one of a central processor (CPU), a graphics processor (GPU), a digital signal processor, a cryptographic processor, a microprocessor, a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), or the like, or a chip set including a specific combination of the above-mentioned components.

[0054] The memory chip may be a stacked memory such as HBM. Additionally, the memory chip may include a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), or a flash memory.

[0055] Meanwhile, the product group to which the semiconductor package of the embodiment is applied may be any one of CSP (Chip Scale Package), FC-CSP (Flip Chip-Chip Scale Package), FC-BGA (Flip Chip Ball Grid Array), POP (Package On Package), and SIP (System In Package), but is not limited thereto.

[0056] Additionally, the electronic device may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive device, etc. However, the present invention is not limited thereto, and it is to be understood that the electronic device may be any other electronic device that processes data.

[0057]

[0058] FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor package according to a first embodiment, FIG. 2a is a plan view illustrating a configuration of a bonding portion illustrated in FIG. 1, FIG. 2b is a plan view illustrating a configuration of a fifth wiring electrode illustrated in FIG. 1, FIG. 2c is a plan view illustrating a configuration of a fourth wiring electrode having a reinforcing portion illustrated in FIG. 1, and FIG. 2d is a diagram illustrating various embodiments of the reinforcing portion illustrated in FIG. 2c.

[0059] Hereinafter, a circuit board and a semiconductor package including the same according to the first embodiment will be described in detail with reference to FIGS. 1 to 2d.

[0060]

[0061] Referring to FIG. 1, a semiconductor package according to a first embodiment includes a circuit board (100) that electrically connects a main board of an electronic device and semiconductor elements (310, 320), a plurality of semiconductor elements (310, 320) mounted on the circuit board (100), and a connection portion (210, 220) that electrically connects the plurality of semiconductor elements (310, 320) and the circuit board (100).

[0062] For easy explanation of the semiconductor package of the embodiment, terms referring to components included in the semiconductor package are described, and a description of each component referred to is provided below.

[0063] The circuit board (100) illustrated in FIG. 1 includes a build-up structure (110) and an electrode portion (150). The build-up structure (110) may refer to a support substrate of the circuit board (100) on which the electrode portion (150) is formed. The build-up structure (110) includes an insulating layer (120), an upper protective layer (130), and a lower protective layer (140). The insulating layer (120) is provided in a structure in which a first insulating layer (121) and a second insulating layer (122) are sequentially laminated. Accordingly, the lower surface of the insulating layer (120) is provided as the lower surface of the first insulating layer (121), and the upper surface of the insulating layer (120) is provided as the upper surface of the second insulating layer (122). Each of the first insulating layer (121) and the second insulating layer (122) is provided as a plurality of layers. For example, the first insulating layer (121) may have a structure in which multiple layers are laminated, and the second insulating layer (122) may have a structure in which multiple layers are laminated or built up on the first insulating layer (121). An upper protective layer (130) is disposed on the upper surface of the insulating layer (120), and a lower protective layer (140) is disposed on the lower surface of the insulating layer (120). Accordingly, the upper surface of the build-up structure (110) is provided as the upper surface of the upper protective layer (130), and the lower surface of the build-up structure (110) is provided as the lower surface of the lower protective layer (140). The electrode portion (150) includes a wiring electrode, a via electrode, and a bonding portion. The wiring electrode includes a first wiring electrode (151) disposed on the lower surface of the first layer of the first insulating layer (121), a second wiring electrode (152) disposed on the upper surface of the first layer of the first insulating layer (121) or the lower surface of the second layer of the first insulating layer (121), a third wiring electrode (153) provided on the upper surface of the second layer of the first insulating layer (121) or the lower surface of the first layer of the second insulating layer (122), a fourth wiring electrode (154) provided on the upper surface of the first layer of the second insulating layer (122) or the lower surface of the second layer of the second insulating layer (122), and a fifth wiring electrode (155) provided on the upper surface of the second layer of the second insulating layer (122).The via electrode includes a first via electrode (156) penetrating the first layer of the first insulating layer (121) and connecting the first wiring electrode (151) and the second wiring electrode (152), a second via electrode (157) penetrating the second layer of the first insulating layer (121) and connecting the second wiring electrode (152) and the third wiring electrode (153), a third via electrode (158) penetrating the first layer of the second insulating layer (122) and connecting the third wiring electrode (153) and the fourth wiring electrode (154), and a fourth via electrode (159) penetrating the second layer of the second insulating layer (122) and connecting the fourth wiring electrode (154) and the fifth wiring electrode (155). At this time, each of the wiring electrodes (151, 152, 153, 154, 155) includes a plurality of pads and traces connected to the plurality of pads. Here, the pad may mean an electrode pattern connected to each via electrode (156, 157, 158, 159), an electrode pattern connected to a bonding portion (160), or an electrode pattern connected to a semiconductor package substrate. In addition, the electrode portion includes a bonding portion (160) disposed on an upper protective layer (130). The bonding portion (160) includes a protrusion (not shown) protruding above the upper protective layer (130) and a penetration portion (not shown) penetrating the upper protective layer (130) and connected to a pad of a fifth wiring electrode (155).

[0064] The laminated first and second insulating layers (121, 122) may be formed of an insulating material having the functions of ease of process, excellent insulating properties, reducing loss of signals transmitted through the electrode portion (150), or creating a fine gap in the electrode portion (150). In addition, both the first and second insulating layers (121, 122) may be formed of the same insulating material, but are not limited thereto, and at least one layer may be formed of an insulating material different from the other insulating layers.

[0065] Preferably, the first insulating layer (121) and the second insulating layer (122) may include different insulating materials. The first insulating layer (121) may include a thermosetting material, and the second insulating layer (122) may include a photocurable material (or photosensitive material).

[0066] For example, the first insulating layer (121) is provided with a plurality of layers, and each of the plurality of layers of the first insulating layer (121) can use ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Co., Ltd., and FR-4 and BT (Bismaleimide Triazine) can be used.

[0067] In addition, at least one of the plurality of layers of the first insulating layer (121) may include a reinforcing member including at least one of glass fiber and GCP (Glass Core Primer). The reinforcing member may improve the rigidity of the build-up structure (110), thereby preventing the circuit board (100) and / or the semiconductor package from being bent in a specific direction. If the build-up structure (110) is bent in a specific direction during the process of forming the circuit board (100), the accuracy of the position may decrease during the process of arranging the electrode portion (150), but this problem can be solved as the rigidity of the build-up structure (110) is improved. In addition, even when mounting semiconductor elements (310, 320) on the circuit board (100), the problem of electrical short-circuiting or open-circuiting of the semiconductor elements (310, 320) due to bending of the circuit board (100) can be prevented.

[0068] In addition, it is possible to prevent warpage problems caused by heat cycles that occur during the operation of a semiconductor package, thereby enabling stable operation of products such as servers to which the semiconductor package of the embodiment is applied, thereby improving the overall reliability of the product.

[0069] The second insulating layer (122) may include a photosensitive material different from that of the first insulating layer (121). For example, the second insulating layer (122) may include an insulating material capable of forming an electrode portion having a width and / or spacing finer than that of the electrode portion provided on the first insulating layer (121).

[0070] For example, the second insulating layer (122) may include PID (Photoimageable dielectrics). The second insulating layer (122) may include epoxy resin, a photoinitiator, a silicon-based filler (Si filler), a curing agent, and the like. For example, the second insulating layer (122) may be formed by laminating a photosensitive resin film or applying a photosensitive resin paste or liquid. In this case, in one example, the photosensitive resin material may include at least one selected from photosensitive polyhydroxystyrene (PHS), photosensitive polybenzoxazole (PBO), photosensitive polyimide (PI), photosensitive benzocyclobutene (BCB), photosensitive polysiloxane, photosensitive epoxy, and novolac resin.

[0071] In an embodiment, the second insulating layer (122) includes a photosensitive material such as PID, thereby enabling formation of an electrode portion having a fine width and / or spacing compared to the electrode portion provided in the first insulating layer (121).

[0072] An upper protective layer (130) is disposed on the upper surface of the insulating layer (120), and a lower protective layer (140) is disposed on the lower surface of the insulating layer (120). The upper protective layer (130) and the lower protective layer (140) can have the function of protecting the pad from external moisture or contaminants, and can be provided with a photosensitive material and / or solder resist to prevent short circuit problems between the connecting portions (210, 220) when bonding between the semiconductor element and the circuit board (100) and / or the main board and the circuit board (100).

[0073] In addition, the upper protective layer (130) and the lower protective layer (140) can apply photosensitive solder resist as an example. According to the present embodiment, a plurality of terminals for connection to the circuit board (100) of the semiconductor element (310, 320) and / or the main board of the electronic device can be arranged at a high density, and when the plurality of terminals and the bonding portion (160) of the circuit board (100) are joined, solder can be used. When solder is used, a solder short-circuit problem may occur between terminals having a high density, and in order to solve this short-circuit problem, a solder resist having poor wettability with the solder is arranged to prevent the diffusion or movement of the solder, thereby preventing the solder short-circuit problem between the terminals. The upper protective layer (130) and the lower protective layer (140) can be arranged with different thicknesses in consideration of the warpage or coefficient of thermal expansion of the circuit board (100).

[0074] For example, a plurality of semiconductor devices (310, 320) having different functions, such as chiplet units separated according to functionality and / or pitch, or CPU and GPU, GPU and HBM, etc., may be mounted on a circuit board (100), and the plurality of semiconductor devices (310, 320) may be electrically connected to each other. At this time, the number of terminals (315, 325) of the plurality of semiconductor devices (310, 320) is increasing, and the width and / or spacing of the terminals (315, 325) are becoming smaller. Accordingly, the circuit board (100) must include microelectrodes in order to arrange all electrode portions for connecting between the plurality of semiconductor devices (310, 320) within a limited space. At this time, there is a limit to forming microelectrodes in an insulating layer including a thermosetting material. Therefore, in the embodiment, a second insulating layer (122) including a photosensitive material is laminated on a first insulating layer (121). Based on this, the embodiment forms microelectrodes for connecting between a plurality of semiconductor elements (310, 320) in the second insulating layer (122).

[0075] In addition, at least one of the first insulating layer (121) and the second insulating layer (122) may include a filler composed of an inorganic material. The diameter and content of the filler may be adjusted in consideration of the coefficient of thermal expansion, rigidity, etc. of each of the first insulating layer (121) and the second insulating layer (122), and in order to solve problems such as light scattering during a laser process for densely arranging the electrode portion (150). For example, in order to solve the above-described problems, the diameter may be applied to 0.1 ㎛ to 5.0 ㎛, and the content may be applied to 30 wt% to 40 wt% or 78 wt% to 85 wt%, but is not limited thereto.

[0076] The first to fifth wiring electrodes (151, 152, 153, 154, 155) can be designed in various shapes in consideration of the impedance for transmitting signals and power between the plurality of semiconductor elements (310, 320) and the main board of the electronic device and the warpage of the circuit board (100). The first to fifth wiring electrodes (151, 152, 153, 154, 155) can be arranged with a high density in consideration of signals and impedance, and can be arranged with a width and interval of 2 µm to 10 µm to prevent peeling and ensure adhesion to each insulating layer (120). That is, the electrode portion (150) can be arranged to have various widths and intervals, from a design in which the width is 2 µm and the interval is 2 µm to a design in which the width is 10 µm and the interval is 10 µm. However, the embodiment may apply different widths and spacings of each wiring electrode in consideration of the position and function of each wiring electrode. In this case, such widths and spacings may refer to the widths and spacings of the traces of the first to fifth wiring electrodes (151, 152, 153, 154, 155).

[0077] In addition, among the first to fifth wiring electrodes (151, 152, 153, 154, 155), the wiring electrodes provided adjacent to the main board of the electronic device can exchange signals with a semiconductor package substrate having a relatively large width and / or spacing. In addition, among the first to fifth wiring electrodes (151, 152, 153, 154, 155), the wiring electrodes provided adjacent to a plurality of semiconductor elements (310, 320) can exchange signals with semiconductor elements (310, 320) having a relatively small width and / or spacing. Accordingly, the first to fifth wiring electrodes (151, 152, 153, 154, 155) can have different widths and / or spacings. For example, the fourth wiring electrode (154) and the fifth wiring electrode (155) positioned closer to the semiconductor element (310, 320) may have a relatively small width and / or spacing.

[0078] Additionally, the first to third wiring electrodes (151, 152, 153) arranged closer to the semiconductor package substrate may have relatively larger widths and / or spacings. Preferably, the embodiment may allow the widths and / or spacings of the wiring electrodes to increase in a vertical direction from the upper surface to the lower surface of the build-up structure (110). For example, the wiring electrode arranged on the uppermost side of the build-up structure (110) may have the smallest width and / or spacing, and the wiring electrode arranged on the lowermost side of the build-up structure (110) may have the largest width and / or spacing. Through this, the embodiment can arrange the first to fifth wiring electrodes (151, 152, 153, 154, 155) so that the width and / or spacing gradually increase in the direction from the upper surface to the lower surface of the build-up structure (110), thereby enabling more efficient electrical connection between the semiconductor element (310, 320) and the semiconductor package substrate. Accordingly, the embodiment can minimize signal transmission loss, and thus provide a semiconductor package with excellent communication characteristics. Through this, the embodiment can enable the semiconductor element to operate more stably, and through this, the semiconductor package can operate more stably.

[0079] At this time, the width and spacing of the first to fifth wiring electrodes (151, 152, 153, 154, 155) described above are too fine to arrange the first to fourth via electrodes (156, 157, 158, 159) for vertically connecting the first to fifth wiring electrodes (151, 152, 153, 154, 155), respectively, and the width of the first to fifth wiring electrodes (151, 152, 153, 154, 155) described above is too narrow to secure the positional alignment of the first to fourth via electrodes (156, 157, 158, 159) or to form the first to fourth via electrodes (156, 157, 158, 159). Therefore, here, vertical means the direction in which the first and second insulating layers (121, 122) are laminated, and vertical and vertical direction can be used interchangeably. In addition, the same definition applies to the vertical relationship of the components described later. Therefore, in order to secure the positional alignment of the first to fourth via electrodes (156, 157, 158, 159) and to place the first to fourth via electrodes (156, 157, 158, 159), each of the first to fifth wiring electrodes (151, 152, 153, 154, 155) includes a pad. Here, each pad of the first to fifth wiring electrodes (151, 152, 153, 154, 155) means a wiring electrode that directly contacts the first to fourth via electrodes (156, 157, 158, 159) in each wiring electrode. And, each pad of the first to fifth wiring electrodes (151, 152, 153, 154, 155) has a width wider than the width of the trace of the first to fifth wiring electrodes (151, 152, 153, 154, 155) described above in order to be connected to the first to fourth via electrodes (156, 157, 158, 159). For example, each pad of the first to fifth wiring electrodes (151, 152, 153, 154, 155) may have a circular structure, and its diameter may be within 30 µm to 100 µm.

[0080] The electrode portion (150) may include a reinforcing portion. Here, the reinforcing portion may be a part of the first to fifth wiring electrodes (151, 152, 153, 154, 155) and the first to fourth via electrodes (156, 157, 158, 159) constituting the electrode portion (150). That is, the embodiment designs the first to fifth wiring electrodes (151, 152, 153, 154, 155) and the first to fourth via electrodes (156, 157, 158, 159) so that they function as electrode portions of a communication line connecting a plurality of semiconductor elements (310, 320) while also functioning as reinforcing portions that improve the rigidity of the circuit board (100).

[0081] Preferably, the fourth wiring electrode (154) may include a reinforcing portion that improves the rigidity of the circuit board (100) while electrically connecting between the plurality of semiconductor elements (310, 320). In addition, a portion of each of the fifth wiring electrode (155), the fourth via electrode (159), and the bonding portion (160) may connect between the reinforcing portion of the fourth wiring electrode (154) and the terminals (315, 325) of the semiconductor elements (310, 320). Therefore, a portion of each of the fifth wiring electrode (155), the fourth via electrode (159), and the bonding portion (160) that connect between the reinforcing portion of the fourth wiring electrode (154) and the terminals (315, 325) of the semiconductor elements (310, 320) may also be referred to as a reinforcing portion.

[0082] In addition, the electrode portion (150) includes a bonding portion (160). The bonding portion (160) is disposed on the build-up structure (110). For example, the bonding portion (160) may be a bonding area where a connection portion (210, 220) for electrically connecting a circuit board (100) and terminals (315, 325) of semiconductor elements (310, 320) are disposed.

[0083] The bonding portion (160) has a protrusion positioned on the upper protective layer (130) of the build-up structure (110) and a penetration portion penetrating the upper protective layer (130). The penetration portion of the bonding portion (160) is connected to the pad of the fifth wiring electrode (155) of the electrode portion (150). That is, the bonding portion (160) has a protrusion protruding onto the build-up structure (110), and based on this, by using thermal compression bonding, the volume of the connecting portion (210, 220), such as solder, can be reduced while preventing short circuits between a plurality of bonding portions (150).

[0084] Specifically, as the width of the terminals (315, 325) of the semiconductor elements (310, 320) bonded on the circuit board (100) and the pitch of the terminals become smaller, when the semiconductor elements (310, 320) are mounted by means of connecting portions (210, 220) such as solder, the connecting portions (210, 220) may spread, which may cause an electrical short-circuit problem in which a plurality of connecting portions (210, 220) are connected to each other. Accordingly, the embodiment may perform thermal compression bonding to reduce the volume of the connecting portions (210, 220). At this time, if the electrode portion (150) does not include a bonding portion (160) having a protrusion that protrudes onto the build-up structure (110), it may be difficult to reduce the volume of the connecting portions (210, 220). This may be because the height of the electrode on which the connection portion (210, 220) is arranged is positioned lower than the height of the build-up structure (110), and accordingly, the volume of the connection portion (210, 220) increases by the amount of the difference between the height of the electrode and the height of the substrate. Accordingly, the embodiment may include a bonding portion (160) having a protrusion to improve the alignment with the terminal (315, 325) of the semiconductor element (310, 320) and to prevent the intermetallic compound (IMC) formed by the connection portion (210, 220) from diffusing through the build-up structure (110).

[0085] At this time, the embodiment is such that at least a portion of each of the first to fifth wiring electrodes (151, 152, 153, 154, 155), the first to fourth via electrodes (156, 157, 158, 159), and the bonding portion (160) electrically connects between terminals (315, 325) of a plurality of semiconductor elements (310, 320) while improving the rigidity of the circuit board (100) and functions as a reinforcing portion. At this time, the reinforcing portion of the first embodiment is a portion of each of the first to fifth wiring electrodes (151, 152, 153, 154, 155), the first to fourth via electrodes (156, 157, 158, 159), and the bonding portion (160), and accordingly, a separate drawing symbol is not assigned thereto.

[0086] That is, the circuit board (100) can be significantly bent in a specific direction. For example, the circuit board (100) can be significantly bent in a specific direction due to the difference in the thickness of each layer constituting the build-up structure (110), the difference in the density of the first to fifth wiring electrodes (151, 152, 153, 154, 155), the difference in the thickness of the first to fifth wiring electrodes (151, 152, 153, 154, 155), etc. In addition, when the circuit board (100) is significantly bent in a specific direction, there is a problem that the semiconductor elements (310, 320) cannot be stably mounted. For example, when the circuit board (100) is significantly bent in a specific direction, a height deviation of the plurality of bonding portions (160) may occur, and thus, the semiconductor elements (310, 320) may be mounted in an inclined state on the plurality of bonding portions (160). Accordingly, at least one of the plurality of bonding portions (160) may not be electrically connected to the terminals (315, 325) of the semiconductor elements (310, 320), and thus an electrical open problem may occur, preventing the semiconductor elements from operating stably.

[0087]

[0088] Below, the arrangement structure of the electrode part (150) and the function of the reinforcement part according to it are described in detail.

[0089] Referring to FIG. 2A, a plurality of bonding portions (160) are provided on the upper protective layer (130) of the build-up structure (110). The plurality of bonding portions (160) can be divided into a plurality of groups. For example, the plurality of bonding portions (160) can be divided into a first group of bonding portions (160A) and a second group of bonding portions (160B).

[0090] The bonding portion (160A) of the first group may refer to a bonding portion that overlaps the first semiconductor element (310) in a vertical direction among a plurality of bonding portions. For example, the bonding portion (160A) of the first group may refer to a bonding portion provided between the terminal (315) of the first semiconductor element (310) and the connection portion (210).

[0091] The bonding portion (160B) of the second group may refer to a bonding portion that overlaps the second semiconductor element (320) in a vertical direction among the plurality of bonding portions. For example, the bonding portion (160B) of the second group may refer to a bonding portion provided between the terminal (325) of the second semiconductor element (320) and the connection portion (220).

[0092] At this time, the bonding part (160A) of the first group and the bonding part (160B) of the second group can be divided into a first part that must be electrically connected to each other to exchange signals, and a second part that does not have to be electrically connected to each other.

[0093] And in the embodiment, the first part of each of the first group of bonding portions (160A) and the second group of bonding portions (160B) is provided adjacent to the outer sides facing each other of the build-up structure (110). Through this, the embodiment can improve the rigidity of the build-up structure (110) while electrically connecting a plurality of semiconductor elements (310, 320) by using the electrode pattern (154-3) connecting between the plurality of bonding portions provided adjacent to the outer sides facing each other. For example, the electrode pattern (154-3) may be provided to extend in the direction toward the outer sides facing each other within the build-up structure (110) in order to electrically connect between two bonding portions provided adjacent to the outer sides facing each other. Through this, the electrode pattern (154-3) may not have an open portion in the middle, and may be provided to extend between the facing outer sides of the build-up structure (110). Through this, the embodiment can secure the rigidity of the build-up structure (110) by using the electrode pattern (154-3), and further, can allow the semiconductor package to be more stably installed on the circuit board (100). At this time, in a typical circuit board, a plurality of electrode patterns that are separated from each other are arranged between the facing outer sides of the board. In this way, when a plurality of separated electrode patterns are arranged, the rigidity may be reduced in the area where the plurality of electrode patterns are separated from each other, and thus there may be a limit to improving the rigidity of the circuit board. In contrast, the embodiment is provided with one electrode pattern (154-3) that extends across the facing outer sides of the build-up structure (110), and this electrode pattern (154-3) connects the terminals of the plurality of semiconductor elements (310, 320) to each other.Through this, the embodiment does not require a separate reinforcing member to secure the rigidity of the build-up structure (110), and thus does not require a space required to secure a separate reinforcing member, thereby ensuring the circuit integration of the circuit board (100).

[0094] That is, the bonding portion (160A) of the first group and the bonding portion (160B) of the second group may include a first bonding portion (161), a second bonding portion (162), and a third bonding portion (163) depending on the location.

[0095] The first bonding portion (161) may refer to a bonding portion that is positioned relatively further away from the outer side (S1, S2) of the build-up structure (110) among the bonding portions (160A) of the first group and the bonding portions (160B) of the second group. At this time, the first bonding portion of the bonding portion (160A) of the first group and the first bonding portion of the bonding portion (160B) of the second group may be electrically connected to each other, or may not be electrically connected to each other.

[0096] In addition, the bonding portion (160A) of the first group includes a second bonding portion (162) arranged adjacent to the first outer side (S1) of the build-up structure (110). The second bonding portion (162) may refer to a bonding portion that is the farthest apart from the bonding portion (160B) of the second group among the bonding portions (160A) of the first group. That is, the build-up structure (110) may include a first outer side (S1) and a second outer side (S2) opposite to the first outer side (S1). At this time, the first outer side (S1) and the second outer side (S2) may refer to two outer sides facing each other in the longitudinal direction of the build-up structure (110). That is, the planar shape of the build-up structure (110) may be a rectangle including a long-axis direction and a short-axis direction, and the first outer side (S1) and the second outer side (S2) may mean two outer sides facing each other in the long-axis direction. At this time, the second bonding part (162) of the bonding part (160A) of the first group may mean a bonding part that must be electrically connected to the bonding part (160B) of the second group among the bonding parts (160A) of the first group.

[0097] In addition, the bonding portion (160B) of the second group includes a third bonding portion (163) arranged adjacent to the second outer side (S2) of the build-up structure (110). The third bonding portion (163) may refer to a bonding portion that is the farthest apart from the bonding portion (160A) of the first group among the bonding portions (160B) of the second group. For example, the third bonding portion (163) may refer to a bonding portion that is provided most adjacent to the second outer side (S2) of the build-up structure (110) among the bonding portions (160B) of the second group. In addition, the third bonding portion (163) may refer to a bonding portion that is electrically connected to the bonding portion (160A) of the first group, and preferably, may refer to a bonding portion that is electrically connected to the second bonding portion (162) of the bonding portion (160A) of the first group.

[0098] Referring to FIG. 2B, the fifth wiring electrode (155) has pads that are respectively connected to the first bonding portion (161), the second bonding portion (162), and the third bonding portion (163). For example, the fifth wiring electrode (155) includes a 5-1 pad (155-1) that is connected to the first bonding portion (161) of the first group of bonding portions (160A). In addition, the fifth wiring electrode (155) includes a 5-2 pad (155-2) that is connected to the first bonding portion (161) of the second group of bonding portions (160B). In addition, the fifth wiring electrode (155) includes a first electrode pattern (155-3) that connects the 5-1 pad (155-1) and the 5-2 pad (155-2) to each other. Additionally, the fifth wiring electrode (155) includes a 5-3 pad (155-4) connected to the second bonding portion (162) of the first group bonding portion (160A). Additionally, the fifth wiring electrode (155) includes a 5-4 pad (155-5) connected to the third bonding portion (163) of the second group bonding portion (160B).

[0099] Referring to FIG. 2c, the fourth wiring electrode (154) may include a reinforcing portion. At this time, the fourth wiring electrode (154) may include other electrodes in addition to the electrode functioning as the reinforcing portion, but the fourth wiring electrode (154) functioning as the reinforcing portion will be described below.

[0100] The fourth wiring electrode (154) includes a 4-1 pad (154-1). The 4-1 pad (154-1) may vertically overlap with the 5-3 pad (155-4). Alternatively, the 4-1 pad (154-1) may be electrically connected to the 5-3 pad (155-4) via the 4-1 via electrode (159-1). The fourth wiring electrode (154) includes a 4-2 pad (154-2). The 4-2 pad (154-2) may vertically overlap with the 5-4 pad (155-5). Alternatively, the 4-2 pad (154-2) may be electrically connected to the 5-4 pad (155-5) via the 4-2 via electrode (159-2).

[0101] At this time, the fourth wiring electrode (154) may include a second electrode pattern (154-3) connecting the 4-1 pad (154-1) and the 4-2 pad (154-2). The second electrode pattern (154-3) may be disposed within the build-up structure (110), and thus may be disposed to extend in a direction from the first outer side (S1) toward the second outer side (S2) of the build-up structure (110). That is, the second electrode pattern (154-3) may extend from the first outer side (S1) toward the second outer side (S2) on the first layer of the second insulating layer (122), and thus may electrically connect between the terminal of the first semiconductor element connected to the second bonding portion (162) and the terminal of the second semiconductor element connected to the third bonding portion (163). Through this, the embodiment can improve the rigidity of the build-up structure (110), thereby improving the electrical reliability and / or mechanical reliability of the circuit board and the semiconductor package. Furthermore, even when the semiconductor element (310, 320) is mounted on the circuit board (100), the embodiment can prevent the problem of electrical short-circuiting or opening of the semiconductor element (310, 320) due to warpage of the circuit board (100). In addition, the problem of warpage due to the heat cycle occurring during the operation of the semiconductor package can be prevented, and through this, products such as servers to which the semiconductor package of the embodiment is applied can operate stably, thereby improving the reliability of the overall product.

[0102] At this time, when the 4-1 pad (154-1) and the 4-2 pad (154-2) are connected to each other through the second electrode pattern (154-3), the signal transmission distance between the terminals of the first and second semiconductor elements connected thereto may increase, and signal transmission loss may occur accordingly. Therefore, the embodiment allows the terminals of the first and second semiconductor elements to be connected through the second electrode pattern (154-3) without being affected by the signal transmission distance. For example, the second electrode pattern (154-3) may be a ground pattern, and thus the terminals of the first and second semiconductor elements connected through the 4-1 pad (154-1), the 4-2 pad (154-2), and the second electrode pattern (154-3) may be ground terminals. However, the embodiment is not limited thereto, and the terminals of the first and second semiconductor elements connected through the second electrode pattern (154-3) may include terminals other than the ground terminal.

[0103]

[0104] Meanwhile, referring to FIG. 2d, the second electrode pattern (154-3) can be transformed into various shapes.

[0105] For example, as illustrated in FIG. 2c, the second electrode pattern (154-3) can be connected in a straight line between the 4-1 pad (154-1) and the 4-2 pad (154-2).

[0106] In contrast, as illustrated in (a) of FIG. 2d, the second electrode pattern (154-3) may be provided by being folded multiple times between the 4-1 pad (154-1) and the 4-2 pad (154-2). For example, the length of the second electrode pattern (154-3) may be greater than the straight line length between the 4-1 pad (154-1) and the 4-2 pad (154-2).

[0107] In addition, as illustrated in (b) of FIG. 2d, the second electrode pattern (154-3) may be provided in a spiral shape between the 4-1 pad (154-1) and the 4-2 pad (154-2). In this case, the 4-1 pad (154-1) and the 4-2 pad (154-2) may be pads provided on the same layer, or alternatively, may be pads provided on different layers.

[0108] In addition, as illustrated in (c) of FIG. 2d, the second electrode pattern (154-3) may have a flat plate shape, thereby maximizing the placement area and further enhancing the rigidity improvement effect. In this case, it is preferable that the second electrode pattern (154-3) is a grind pattern. At this time, when the second electrode pattern (154-3) has a shape as illustrated in (c) of FIG. 2d, the second electrode pattern (154-3) may have at least one through hole. For example, the second electrode pattern (154-3) may have a flat plate shape, and may be provided with at least one through hole spaced apart from each other in the horizontal direction. At this time, the through hole provided in the second electrode pattern (154-3) may function as a gas exhaust hole for exhausting gas generated during curing of the substrate. For example, when the second electrode pattern (154-3) has a flat shape, there is no outlet for gas generated during curing of the substrate, so gas discharge may not occur smoothly. Therefore, the embodiment provides at least one through hole in the second electrode pattern (154-3), thereby allowing gas generated from the substrate to discharge smoothly. Therefore, the embodiment can improve the bonding strength of each layer of the build-up structure (110) and / or the bonding strength of the build-up structure (110) and the electrode portion, thereby improving the electrical reliability and / or mechanical reliability of the circuit board and the semiconductor package.

[0109]

[0110] FIG. 3 is a cross-sectional view showing the configuration of a semiconductor package according to the second embodiment, and FIG. 4 is a plan view showing a layer in which the reinforcement part shown in FIG. 3 is arranged.

[0111] Hereinafter, the second embodiment will be described in detail with reference to FIGS. 3 and 4, and components that are identical or corresponding to those of the first embodiment are given the same reference numbers, and redundant descriptions thereof are omitted.

[0112]

[0113] Referring to FIG. 3, the circuit board (1000) includes a reinforcing portion (1700). The reinforcing portion (1700) may be arranged on the same layer as any one of the first to fifth wiring electrodes (151, 152, 153, 154, 155) provided on multiple layers of the build-up structure (110). For example, the reinforcing portion (1700) may be a ground pattern included in any one of the first to fifth wiring electrodes (151, 152, 153, 154, 155).

[0114] The reinforcing member (1700) may be disposed on the first insulating layer (121). For example, the reinforcing member (1700) may be provided on the same layer as the third wiring electrode (153) disposed on the first insulating layer (121). For example, the reinforcing member (1700) may be a part of the third wiring electrode (153).

[0115] The third wiring electrode (153) may include a plurality of pads (153P). The plurality of pads (153P) may not be connected to the reinforcement portion (1700). Preferably, the plurality of pads (153P) may not be in contact with the reinforcement portion (1700). The plurality of pads (153P) may be provided so as to be surrounded by the reinforcement portion (1700). The plurality of pads (153P) may be connected to a via electrode vertically overlapping therewith. For example, at least one of the plurality of pads (153P) may be a via pad connected to a third via electrode (158) provided in a first layer of the second insulating layer (122). For example, at least one of the plurality of pads (153P) may be a via pad connected to a second via electrode (157) provided in a second layer of the first insulating layer (121).

[0116] The reinforcing member (1700) is arranged on the upper surface of the first insulating layer (121). The reinforcing member (1700) may be a flat ground. The reinforcing member (1700) may be provided so as to avoid an area where a plurality of pads (153P) are arranged on the upper surface of the first insulating layer (121).

[0117] For example, the reinforcing member (1700) may have a through hole (1710) penetrating the upper and lower surfaces of the reinforcing member (1700). The through hole (1710) of the reinforcing member (1700) may be provided to correspond to an area on the upper surface of the first insulating layer (121) where a plurality of pads (153P) are to be arranged. For example, the reinforcing member (1700) may have a plurality of through holes (1710) that vertically overlap the plurality of pads (153P) of the third wiring electrode (153). The area of ​​each of the plurality of through holes (1710) may be larger than the area of ​​each of the plurality of pads (153P). Therefore, each of the plurality of pads (153P) may be provided within the plurality of through holes (1710) without coming into contact with the reinforcing member (1700).

[0118] The reinforcing member (1700) may be provided to overlap with the bonding member (160) in the vertical direction. For example, the reinforcing member (1700) may be provided to overlap with the bonding members (160A, 160B) of the first and second groups in the vertical direction. However, the reinforcing member (1700) may be provided with a plurality of through holes (1710), and at least some of the bonding members (160A, 160B) of the first and second groups may be provided to overlap with the plurality of through holes (1710) provided in the reinforcing member (1700) in the vertical direction.

[0119] Through this, the reinforcing member (1700) is provided to overlap vertically with the area where a plurality of semiconductor elements (310, 320) are to be arranged in the build-up structure (110), thereby improving the rigidity of the build-up structure (110). Furthermore, the reinforcing member (1700) can prevent the build-up structure (110) from being greatly bent in a specific direction, thereby enabling the semiconductor elements (310, 320) to be attached more stably.

[0120] The thickness of the reinforcing portion (1700) may be different from the thickness of at least one of the first to fifth wiring electrodes (151, 152, 153, 154, 155). At this time, as described in the first embodiment, the fourth wiring electrode (154) and the fifth wiring electrode (155) are provided on the second insulating layer (122) which is a photosensitive material.

[0121] At this time, the thickness of the wiring electrode corresponding to the reinforcement part in the first embodiment is smaller.

[0122] In contrast, the thickness of the reinforcing portion (1700) in the second embodiment may be smaller than, equal to, or larger than, the thickness of the fourth wiring electrode (154) and the fifth wiring electrode (155). Furthermore, the thickness of the reinforcing portion (1700) may be larger than the thickness of the first wiring electrode (151) and the second wiring electrode (152) provided in different layers of the same insulating material.

[0123] Through this, the embodiment can maximize the effect of improving the rigidity of the build-up structure (110) by the reinforcement (1700) without being affected by the wiring density of the other wiring electrodes by making the thickness of the reinforcement (1700) greater than that of the other wiring electrodes.

[0124] At this time, the thickness of the reinforcing portion (1700) can be increased without increasing the thickness of the build-up structure (110). For example, the reinforcing portion (1700) is disposed within the first layer of the second insulating layer (122) of the build-up structure (110). At this time, the thickness of the first layer of the second insulating layer (122) can correspond to the thickness of the second layer of the second insulating layer (122). For example, the thickness of the first layer of the second insulating layer (122) can be the same as the thickness of the second layer of the second insulating layer (122). Accordingly, the vertical length between the upper surface of the reinforcing portion (1700) and the upper surface of the first layer of the second insulating layer (122) can be different from the vertical length between the upper surface of the fourth wiring electrode (154) and the upper surface of the second insulating layer (122). Preferably, the vertical length between the upper surface of the reinforcing member (1700) and the upper surface of the first layer of the second insulating layer (122) may be smaller than the vertical length between the upper surface of the fourth wiring electrode (154) and the upper surface of the second insulating layer (122). Therefore, the embodiment can further improve the rigidity of the build-up structure (110) while maintaining the thickness of the build-up structure (110) by making the thickness of the reinforcing member (1700) larger than the thickness of the wiring electrode of the other layers without increasing the thickness of the insulating layer.

[0125]

[0126] In addition, although the reinforcement part (1700) in FIG. 3 is illustrated as having a structure that is not connected to the via electrode, it is not limited thereto. For example, a via electrode (not shown) that is vertically overlapped with the reinforcement part (1700) and connected to the reinforcement part (1700) may be further provided within the build-up structure (110). At this time, the via electrode connected to the reinforcement part (1700) may function as a ground function or as a heat dissipation path that discharges heat transmitted through the reinforcement part (1700) (for example, heat generated within the substrate or heat generated in the semiconductor element) to the outside of the build-up structure (110).

[0127]

[0128] FIG. 5 is a cross-sectional view showing the configuration of a semiconductor package according to the third embodiment, and FIG. 6 is a plan view showing a layer in which the reinforcement part shown in FIG. 5 is arranged.

[0129] Hereinafter, the third embodiment will be described in detail with reference to FIGS. 5 and 6, and components that are identical or corresponding to those of the first and second embodiments are given the same reference numbers, and redundant descriptions thereof are omitted.

[0130]

[0131] Referring to FIG. 5, the circuit board (2000) includes a reinforcing portion (2700). The reinforcing portion (2700) may be arranged on the same layer as any one of the first to fifth wiring electrodes (151, 152, 153, 154, 155) provided in multiple layers of the build-up structure (110). For example, the reinforcing portion (2700) may be a ground pattern included in any one of the first to fifth wiring electrodes (151, 152, 153, 154, 155).

[0132] At this time, the reinforcing member (1700) of the second embodiment is provided with a through hole (1710) in which a plurality of pads (153P) are arranged. Therefore, during the manufacturing process of the circuit board, the reinforcing member (1700) and a plurality of pads (153P) are arranged on the upper surface of the first insulating layer (121) before the second insulating layer (122) is laminated. At this time, the reinforcing member (1700) is a flat ground, and thus can have a large area, and through this, in the process of curing after laminating the first insulating layer (121), the gas inside the first insulating layer (121) may not be easily discharged to the outside.

[0133] Accordingly, the reinforcing member (2700) of the third embodiment may be provided with at least one through hole to allow gas generated during curing of the first insulating layer (121) to be easily discharged.

[0134] For example, the reinforcement portion (2700) may be a part of a second wiring electrode (152) provided between the first layer and the second layer of the first insulating layer (121). The second wiring electrode (152) has at least one pad (152P) connected to a second via electrode (157) penetrating the second layer of the first insulating layer (121) and / or a first via electrode (156) penetrating the first layer of the first insulating layer (121).

[0135] The reinforcing member (2700) may have a plurality of through holes. At this time, the through holes of the reinforcing member (2700) may be divided into a plurality of through holes having different configurations or being filled with different configurations.

[0136] Referring to FIG. 6, the reinforcing member (2700) may be provided with a first through hole (2710) that vertically overlaps with the pad (152P) of the second wiring electrode (152). The first through hole (2710) may be provided corresponding to the area where the pad (152P) of the second wiring electrode (152) is to be placed.

[0137] In addition, the reinforcing member (2700) may be provided with a second through hole (2720). At this time, the second through hole (2720) may be provided corresponding to an area where the fifth via electrode (2157) is to be placed. For example, the embodiment may further include a fifth via electrode (2157) that commonly passes through the first layer and the second layer of the first insulating layer (121). The fifth via electrode (2157) may vertically overlap with the second through hole (2720) of the reinforcing member (2700). The second through hole (2720) of the reinforcing member (2700) may provide an area where the fifth via electrode (2157) is to be placed, and may also function as a gas exhaust hole that exhausts gas generated during curing of the first layer of the first insulating layer (121).

[0138] Additionally, the reinforcing member (2700) may further include a third through hole (2730). A part of the electrode member (150), such as the first through hole (2710) and the second through hole (2720), may not be disposed in the third through hole (2730). That is, the third through hole (2730) may be a gas discharge hole for a gas discharge function only, and thus may be filled with an insulating layer built up on top thereof.

[0139] Through this, the embodiment can improve the rigidity of the build-up structure (110) by using the reinforcing member (2700), while allowing the gas generated during the curing of the insulating layer to be easily discharged.

[0140] In addition, the thickness of the reinforcing portion (2700) may be different from the thicknesses of the wiring electrodes provided in other layers. For example, the thickness of the reinforcing portion (2700) may be greater than the thicknesses of each of the first to fifth wiring electrodes (151, 152, 153, 154, 155). Furthermore, the embodiment maximizes the effect of improving the rigidity of the build-up structure (110) by the reinforcing portion (2700) without being affected by the wiring density of the other wiring electrodes by making the thickness of the reinforcing portion (2700) greater than the thicknesses of the other wiring electrodes.

[0141] At this time, the thickness of the reinforcing member (2700) can be increased without increasing the thickness of the build-up structure (110). For example, the reinforcing member (1700) can be placed within a specific insulating layer among the plurality of insulating layers of the build-up structure (110). At this time, the thickness of the insulating layer in which the reinforcing member (2700) is placed can be the same as the thickness of the insulating layer in which other wiring electrodes are placed. For example, the thicknesses of the first layer and the second layer of the first insulating layer (121) can be the same.

[0142] Therefore, the embodiment can further improve the rigidity of the build-up structure (110) while maintaining the thickness of the build-up structure (110) by making the thickness of the reinforcement (2700) greater than the thickness of the wiring electrode of another layer without increasing the thickness of the insulating layer.

[0143] In addition, although the reinforcement part (2700) in FIG. 5 is illustrated as having a structure that is not connected to the via electrode, it is not limited thereto. For example, the build-up structure (110) may further include a via electrode (not shown) that is vertically overlapped with the reinforcement part (1700) and connected to the reinforcement part (2700). At this time, the via electrode connected to the reinforcement part (2700) may function as a ground function or as a heat dissipation path that discharges heat transmitted through the reinforcement part (2700) (for example, heat generated within the substrate or heat generated in the semiconductor element) to the outside of the build-up structure (110).

[0144]

[0145] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor elements from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor elements. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integrity or technical interoperability with each other.

[0146] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor elements controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuits between terminals, or electrical open circuits of terminals supplying semiconductor elements, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

[0147] The features, structures, effects, etc. described in the embodiments above are included in at least one embodiment, and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be interpreted as being included within the scope of the embodiments.

[0148] Although the above has been described focusing on embodiments, these are merely examples and are not intended to limit the embodiments. Those skilled in the art to which the embodiments pertain will appreciate that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, differences related to such modifications and applications should be interpreted as being included within the scope of the embodiments set forth in the appended claims.

Claims

1. Build-up structure; A plurality of bonding portions arranged on the above build-up structure; and Including a reinforcing member arranged within the above build-up structure, The above multiple bonding parts are, It includes a first bonding portion, a second bonding portion closer to the first outer side of the build-up structure than the first bonding portion, and a third bonding portion closer to the second outer side of the build-up structure opposite to the first outer side than the first and second bonding portions, A circuit board, wherein the reinforcing member is arranged within the build-up structure and connects between the second bonding member and the third bonding member.

2. In paragraph 1, A circuit board, wherein the reinforcing portion overlaps vertically with each of the second bonding portion and the third bonding portion.

3. In paragraph 1, The above reinforcement part, A circuit board comprising a first pad vertically overlapping with the second bonding portion, a second pad vertically overlapping with the third bonding portion, and an electrode pattern connecting the first and second pads.

4. In paragraph 3, The above reinforcement part, A circuit board further comprising a first via electrode penetrating at least a portion of the build-up structure and connecting between the second bonding portion and the first pad, and a second via electrode penetrating at least a portion of the build-up structure and connecting between the third bonding portion and the second pad.

5. In paragraph 1, The above build-up structure is, a first insulating layer comprising a first insulating material; and A second insulating layer comprising a second insulating material different from the first insulating material, A circuit board, wherein the reinforcing member is disposed on the second insulating layer.

6. In paragraph 5, A circuit board wherein the second insulating material comprises a photosensitive material.

7. In paragraph 3, A circuit board wherein the length of the electrode pattern is greater than the straight line length between the first pad and the second pad.

8. In paragraph 3, and further comprising a wiring electrode disposed within the above build-up structure and from the above reinforcement member, A circuit board in which the vertical thickness of the above reinforcement portion is greater than the vertical thickness of the above wiring electrode.

9. Build-up structure; A plurality of bonding portions arranged on the above build-up structure; and Including an electrode part arranged within the above build-up structure, A circuit board, wherein the electrode portion is disposed within the build-up structure and includes a reinforcing portion vertically overlapping each of the plurality of bonding portions.

10. In paragraph 9, The above electrode part, A wiring electrode disposed within the above build-up structure and connected to the plurality of bonding portions; and A circuit board comprising a via electrode disposed within the above build-up structure and connected to the wiring electrode.

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