Display panel, display module and terminal device

Abstract

A display panel, a display module and a terminal device. The display panel comprises scanning lines (10, 20) and compensation lines (40, 50). The scanning lines (10, 20) comprise wires (101, 201) located in a profiled display area (3). The same signal is input into a compensation line (40, 50) and a wire (101, 201), which are arranged to overlap each other in a film thickness direction. Providing the compensation lines (40, 50) to perform capacitance compensation on the scanning lines (10, 20) located in the profiled display area (3) reduces the capacitance difference of the scanning lines (10, 20) in the profiled display area (3) and in a normal display area (4), reducing the risk of split-screen display.

Description

Display panels, display modules and terminal equipment Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a display module and a terminal device. Background Art

[0002] Compared with hole-punch and waterdrop-shaped screens, the notch area of ​​the notch-shaped screen has a much lower pixel setting density than the non-notch area. Therefore, the capacitance difference of the scanning lines in the notch area and the non-notch area is relatively large. This difference will lead to differences in the reset and write stages of the pixel circuit, and ultimately the display effects of the two areas are different, resulting in problems with screen display in the notch area. In order to reduce this capacitance difference, it is urgently necessary to provide a display panel to compensate for the capacitance difference of the scanning lines in the notch area and the non-notch area.

[0003] Therefore, the existing display panel has a technical problem that the irregular display area of ​​the display area and the normal display area are displayed separately. SUMMARY OF THE INVENTION

[0004] The embodiments of the present application provide a display panel, a display module, and a terminal device, which can alleviate the technical problem of the existing display panel having a special-shaped display area and a normal display area for split-screen display.

[0005] An embodiment of the present application provides a display panel, comprising a display area and a non-display area, the non-display area comprising a special-shaped winding area, the display area comprising a normal display area and special-shaped display areas located on both sides of the special-shaped winding area, the pixel setting density in the special-shaped display area being lower than the pixel setting density in the normal display area, the display panel comprising a driving unit, a first scan line and a second scan line connected to the driving unit and transmitting different signals, the first scan line comprising a first routing line located in the special-shaped display area of ​​the first region, the second scan line comprising a second routing line located in the special-shaped display area, wherein the display panel further comprises a first compensation line and a second compensation line, the first compensation line and the first routing line being connected to the same signal, the first compensation line and the first routing line being overlapped in the film thickness direction, the second compensation line and the second routing line being connected to the same scan signal, the second compensation line and the second routing line being overlapped in the film thickness direction. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0007] FIG1 is a schematic diagram of the positional relationship of various regions in a display panel provided by the present application;

[0008] FIG2 is a top view schematically illustrating the arrangement position relationship of wiring in a display panel provided by the present application;

[0009] 3 is a top view schematically showing a first compensation trace and a second compensation trace provided in a special-shaped winding area of ​​a display panel provided by the present application;

[0010] 4 is a top view schematically showing a display panel provided in the present application in which a first compensation line and a second compensation line are arranged in an additional compensation area;

[0011] FIG5 is a circuit structure diagram of a connection relationship among Pscan scanning lines, Nscan scanning lines, and EM scanning lines in a display panel provided by the present application;

[0012] FIG6 is a first cross-sectional schematic diagram of a display panel provided by the present application;

[0013] FIG7 is a schematic top view of a display panel provided in the present application;

[0014] FIG8 is a second cross-sectional schematic diagram of a display panel provided by the present application;

[0015] FIG9 is a third cross-sectional schematic diagram of the display panel provided in this application.

[0016] Description of reference numerals:

[0017] Modes for Carrying Out the Invention

[0018] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise specified, the directional words used, such as "upper" and "lower", generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; and "inside" and "outside" refer to the outline of the device.

[0019] Please refer to Figures 1, 2, 3 and 4. The display panel provided in the present application includes a driving unit 30, a first scanning line 10 and a second scanning line 20 connected to the driving unit 30 and transmitting different signals, the first scanning line 10 includes a first routing line 101 located in the special-shaped display area 3, and the second scanning line 20 includes a second routing line 201 located in the special-shaped display area 3. The display panel includes a first compensation line 40 and a second compensation line 50. The first compensation line 40 and the first routing line 101 are connected to the same signal, and the first compensation line 40 and the first routing line 101 are overlapped in the film thickness direction. The second compensation line 50 and the second routing line 201 are connected to the same scanning signal, and the second compensation line 50 and the second routing 201 are overlapped in the film thickness direction.

[0020] Among them, the first scan line 10 also includes a third line 102 located in the normal display area 4, the second scan line 20 also includes a fourth line 202 located in the normal display area 4, the first line 101 and the third line 102 are insulated, and the second line 201 and the fourth line 202 are insulated.

[0021] The non-display area 2 of the display panel includes a GOA area 7 , and the driving unit 30 is disposed in the GOA area 7 .

[0022] The non-display area of ​​the display panel is further provided with a VSS wiring 60 , and the VSS wiring 60 is provided on a side of the special-shaped winding area 4 away from the display area 1 .

[0023] The display panel includes a display area 1 and a non-display area 2. The display area 1 includes an irregular display area 3 and a normal display area 4. The pixel setting density in the irregular display area 3 is less than the pixel setting density in the normal display area 4.

[0024] It can be understood that since the pixel setting density in the special-shaped display area 3 is much smaller than the pixel setting density in the normal display area 4, there will be a large difference in the capacitance of the scanning lines in the special-shaped display area 3 and the normal display area 4. By setting the compensation line to compensate for the capacitance of the scanning lines in the special-shaped display area 3, the capacitance of the same type of scanning lines in the special-shaped display area 3 and the normal display area 4 will tend to be the same.

[0025] It should be noted that the overlapping arrangement in the film thickness direction means that the arrangement can be partially overlapping or overlapped.

[0026] In this embodiment, by setting the first compensation line 40 and the second compensation line 50, the first compensation line 40 and the first wiring 101 are overlapped in the film thickness direction, and the second compensation line 50 and the second wiring 201 are overlapped in the film thickness direction, and the capacitance compensation is performed on the first wiring 101 of the first scanning line 10 and the second wiring 201 of the second scanning line 20 located in the special-shaped display area 3, respectively, to reduce the capacitance difference between the first scanning line 10 and the second scanning line 20 in the special-shaped display area 3 and the normal display area 4, thereby reducing the risk of split screen between the special-shaped display area 3 and the normal display area 4.

[0027] The technical solution of this application is now described in conjunction with specific embodiments.

[0028] The scan lines of the present application include Pscan scan lines, Nscan scan lines, and EM scan lines. The priority of capacitance compensation for the Pscan scan lines, Nscan scan lines, and EM scan lines is Pscan scan lines>Nscan scan lines>EM scan lines. Due to consideration of the space for setting compensation lines in the non-display area 2, the present application gives priority to compensating the first scan line 10 and the second scan line 20, wherein the first scan line 10 can be the Pscan scan line and the second scan line 20 can be the Nscan scan line; in addition, it can be understood that when there is sufficient space in the non-display area 2 for setting compensation lines, a third compensation line can also be set. The third compensation line is used to compensate for the capacitance of the EM scan line in the special-shaped display area 3, so that the capacitance of the EM scan line in the special-shaped display area 3 is close to the capacitance of the EM scan line in the normal display area 4.

[0029] Please refer to Figure 2. The shapes and settings of the first compensation line and the second compensation line in Figure 2 are only for reference. Both ends of the compensation line need to be connected to corresponding compensation signals. For example: the first compensation line compensates the first routing line, and the first compensation line and the first routing line are connected to the same signal, that is, when the first routing line is a Pscan scanning line and is connected to the Pscan scanning line signal, the first compensation line also needs to be connected to the Pscan scanning line signal; similarly, for the second compensation line to compensate the second routing line, the second compensation line and the second routing line are connected to the same signal, that is, when the second routing line is an Nscan scanning line and is connected to the Nscan scanning line signal, the second compensation line also needs to be connected to the Nscan scanning line signal.

[0030] The driving unit 30 includes a Pscan driving unit 30, an Nscan driving unit 30, and an EM driving unit 30. The Pscan scanning line is electrically connected to the Pscan driving unit 30 and transmits a Pscan signal. The Nscan scanning line is electrically connected to the Nscan driving unit 30 and transmits a Pscan signal. The EM scanning line is electrically connected to the EM driving unit 30 and transmits a Pscan signal. Specifically, the difference between the Pscan scanning line, the Nscan scanning line, and the EM scanning line can be seen in FIG5. FIG5 is a 7T2C circuit structure diagram, wherein T1 is a driving transistor, T2 to T7 are switching transistors, and the Pscan signal, Nscan signal, and EM signal are electrically connected to each transistor. The input relationship of the tube is shown in the figure, where Pscan(n) is the Pscan signal of a row of scan lines, Pscan(n-1) is the Pscan signal of the row above Pscan(n), Nscan(T3) is the Nscan signal at the gate of the T3 switching transistor, Nscan(T4) is the Nscan signal at the gate of the T4 switching transistor, VDD is a constant voltage high level, VSS is a constant voltage low level, and Vdata is a data line signal; it should be noted that the circuit diagram shown in Figure 5 is only an example to illustrate the connection relationship and functional difference of the Pscan scan line, Nscan scan line, and EM scan line. This application includes but is not limited to this circuit structure, and other circuit structures should also fall within the scope of protection of this application.

[0031] The present application may be an LTPO display panel. Other display panels with the technical problem of split-screen display of the irregular display area 3 and the normal display area 4 of the display area 1 also fall within the scope of protection of the present application. The following embodiments are explained using the LTPO display panel as an example.

[0032] The special-shaped display area 3 of the present application may be a Notch area, which may also be called a bangs area or a gap area, and the normal display area 4 is the normal display area 1 .

[0033] In one embodiment, referring to FIG. 1 , the first scan line 10 is a Pscan scan line, and the second scan line 20 is an Nscan scan line.

[0034] It can be understood that, according to the compensation priority, the first scan line 10 is the Pscan scan line and the second scan line 20 is the Nscan scan line. After compensation, it is more conducive to reducing the risk of split screen between the special-shaped display area 3 and the normal display area 4.

[0035] In one embodiment, the display panel further includes a third scan line, and the third scan line is an EM scan line.

[0036] The display panel further includes a third compensation line, the EM scanning line includes a fifth line located in the special-shaped display area 3 and a sixth line located in the normal display area 4, and the third compensation line and the fifth line are overlapped in the film thickness direction.

[0037] It can be understood that by overlapping the third compensation line and the fifth line in the film thickness direction, the capacitance value of the fifth line can be compensated, so that the capacitance between the fifth line and the sixth line tends to be the same, further reducing the risk of split screen between the special-shaped display area 3 and the normal display area 4.

[0038] In one embodiment, referring to Figure 6, the display panel is an LTPO display panel, which includes a substrate 110, a plurality of metal layers arranged above the substrate 110, and a plurality of insulating layers, the plurality of metal layers include a first gate layer, a second gate layer, a third gate layer, a first source-drain layer, a second source-drain layer, a third source-drain layer, and an anode layer sequentially arranged above the substrate 110, and the insulating layer is arranged between adjacent metal layers.

[0039] A light shielding layer 120 is provided on the substrate 110, a barrier layer 130 is provided on the side of the light shielding layer 120 away from the substrate 110, an organic buffer layer 140 is provided on the side of the barrier layer 130 away from the substrate 110, a first active layer 150 is provided on the side of the organic buffer layer 140 away from the substrate 110, a first gate insulating layer 160 is provided on the side of the first active layer 150 away from the substrate 110, and a first gate insulating layer 160 is provided on the side of the first gate insulating layer 160 away from the substrate 110. A first gate layer 170 is provided, a second gate insulating layer 180 is provided on the side of the first gate layer 170 away from the substrate 110, a second gate layer 190 is provided on the side of the second gate insulating layer 180 away from the substrate 110, a first interlayer insulating layer 200 is provided on the side of the second gate layer 190 away from the substrate 110, a second active layer 210 is provided on the side of the first interlayer insulating layer 200 away from the substrate 110, and a third active layer 210 is provided on the side of the second active layer 210 away from the substrate 110. A gate insulating layer 220 is provided, and a third gate layer 230 is provided on the side of the third gate insulating layer 220 away from the substrate 110. A second interlayer insulating layer 240 is provided on the side of the third gate layer 230 away from the substrate 110. A first source-drain electrode layer 250 is provided on the side of the second interlayer insulating layer 240 away from the substrate 110. A first planarizing layer 260 is provided on the side of the first planarizing layer 260 away from the substrate 110. Two source and drain layers 270, a second flat layer 280 is provided on the side of the second source and drain layer 270 away from the substrate 110, a third source and drain layer 290 is provided on the side of the second flat layer 280 away from the substrate 110, a third flat layer 300 is provided on the side of the third source and drain layer 290 away from the substrate 110, an anode layer 310 is provided on the side of the third flat layer 300 away from the substrate 110, and a pixel definition layer 320 is provided on the side of the anode layer 310 away from the substrate 110.

[0040] In one embodiment, referring to FIG. 3 , a first wiring 101 and a second wiring 201 are disposed in the special-shaped winding area 5 , and the first compensation line 40 and the second compensation line 50 are disposed in the special-shaped winding area 5 .

[0041] The first line 101 may be a Pscan scanning line, and the second line 201 may be an Nscan scanning line.

[0042] The special-shaped winding area 5 is used for winding various lines, including but not limited to Pscan scanning lines, Nscan scanning lines, and EM scanning lines.

[0043] It is understandable that by using the existing special-shaped winding area 5 to set the first compensation line 40 and the second compensation line 50, there is no need to increase the width of the display panel frame to set the first compensation line 40 and the second compensation line 50, which is conducive to achieving a narrow frame design.

[0044] In this embodiment, by disposing the first compensation line 40 and the second compensation line 50 in the existing special-shaped winding area 5 , the frame width can be reduced to achieve a narrow frame.

[0045] In one embodiment, referring to FIG. 4 , the non-display area further includes an additional compensation area 6 , the non-display area is provided with a VSS trace 60 , the additional compensation area 6 is located between the special-shaped display area 3 and the VSS trace 60 , and the first compensation line 40 and the second compensation line 50 are provided in the additional compensation area 6 .

[0046] The additional compensation area 6 may be an area formed by increasing the width of the frame, or may be an area outside the special-shaped winding area 5 .

[0047] The first line 101 may be a Pscan scanning line, and the second line 201 may be an Nscan scanning line.

[0048] It can be understood that since both the Pscan scan line and the Nscan scan line can be compensated by setting compensation lines in the additional compensation area 6, for the implementation method in which the Pscan scan line performs capacitance compensation in the additional compensation area 6, this implementation method also uses the additional compensation area 6 to compensate the Nscan scan line. The Nscan scan line and the Pscan scan line share the additional compensation area 6 for compensation, and no additional area is required to compensate the Nscan scan line, thereby not increasing the border width, which is conducive to narrow border design.

[0049] It can be understood that since the wiring of the special-shaped winding area 5 is relatively dense and there is a problem of insufficient space at the display panel frame, based on this, an additional compensation area 6 can be added to place the compensation line, and the first line 101, the second line 201, and the third line can all be wound to the additional compensation area 6. The compensation line is overlapped with at least one of the first line 101, the second line 201, and the third line in the additional compensation area 6, which can increase the capacitance of at least one of the first line 101, the second line 201, and the third line, thereby reducing the risk of split screen between the special-shaped display area 3 and the normal display area 4.

[0050] In this embodiment, since the space of the existing non-display area 2 is limited, by increasing the border width to set an additional additional compensation area 6 or forming the additional compensation area 6 on both sides of the special-shaped winding area 5, more first compensation lines 40 can be set, thereby further increasing the overlapping area between the first compensation line 40 and the first routing line 101, and more second compensation lines 50 can be set, thereby further increasing the overlapping area between the second compensation line 50 and the second routing line 201; enough first compensation lines 40 can be set to make the capacitance of the first routing line 101 and the third routing line 102 tend to be the same, and enough second compensation lines 50 can be set to make the capacitance of the second routing line 201 and the fourth routing line 202 tend to be the same.

[0051] In some embodiments, the first scanning line 10 and the second scanning line 20 can be respectively provided in the same layer as any two different metal layers.

[0052] Furthermore, the first compensation line 40 is disposed in a metal layer adjacent to the first scan line 10 , and the second compensation line 50 is disposed in a metal layer adjacent to the second scan line 20 .

[0053] Here, the first scanning line 10 is a Pscan scanning line, and the second scanning line 20 is an Nscan scanning line.

[0054] For the Pscan scanning line, the Pscan scanning line can be set in the same layer as any film layer of the first gate layer, the second gate layer, the third gate layer, the first source and drain layer, the second source and drain layer, the third source and drain layer, and the anode layer.

[0055] For example: the Pscan scanning line can be set in the same layer as the first gate layer, and the first compensation line 40 is set in the same layer as the second gate layer. Since the first compensation line 40 and the first routing line 101 in the Pscan scanning line are located in adjacent metal layers, the capacitance of the first routing line 101 can be increased by overlapping the first compensation line 40 and the first routing line 101.

[0056] For another example, the Pscan scanning line can be provided in the same layer as the second gate layer. In this case, the first compensation line 40 can be provided in the same layer as the first gate layer or the third gate layer.

[0057] Similarly, for the Nscan scanning line, the Nscan scanning line can be set in the same layer as any film layer of the first gate layer, the second gate layer, the third gate layer, the first source and drain layer, the second source and drain layer, the third source and drain layer, and the anode layer, and the Nscan scanning line and the Pscan scanning line are set in different layers.

[0058] For example: the Nscan scanning line can be set in the same layer as the first gate layer, and the second compensation line 50 is set in the same layer as the second gate layer. Since the second compensation line 50 and the second routing line 201 in the Nscan scanning line are located in adjacent metal layers, the capacitance of the second routing line 201 can be increased by overlapping the second compensation line 50 and the second routing line 201.

[0059] For another example, the Nscan scanning line can be provided in the same layer as the second gate layer. In this case, the second compensation line 50 can be provided in the same layer as the first gate layer or the third gate layer.

[0060] For another example, the Nscan scanning line can be provided in the same layer as the third gate layer. In this case, the second compensation line 50 can be provided in the same layer as the first gate layer or the third gate layer.

[0061] In one embodiment, referring to Figures 7 and 8, the first wiring 101 is arranged in the same layer as the third gate layer, the first compensation line 40 is arranged in the same layer as the first source and drain layer, the second wiring 201 is arranged in the same layer as the second source and drain layer, and the second compensation line 50 is arranged in the same layer as the third source and drain layer or the anode layer.

[0062] It can be understood that since the first compensation line 40 is provided on the side of the second wiring 201 close to the substrate 110, the first compensation line 40 can also be arranged to overlap with the second wiring 201. Then, the second wiring 201 can further increase the capacitance of the second wiring 201 of the special-shaped display area 3 through the overlap of the first compensation line 40 and the second compensation line 50, so that the capacitance of the special-shaped display area 3 and the normal display area 4 tend to be the same.

[0063] In one embodiment, referring to FIG. 9 , the second wiring 201 is disposed on the same layer as the third gate layer, and the second compensation line 50 is disposed on the same layer as the first source and drain layer.

[0064] In one embodiment, the first wiring 101 is arranged in the same layer as the second gate layer, the first compensation line 40 is arranged in the same layer as the third gate layer, the second wiring 201 is arranged in the same layer as the first source and drain layer, and the second compensation line 50 is arranged in the second source and drain layer.

[0065] The present application provides a display panel that simultaneously compensates for the Pscan scan lines and the Nscan scan lines. For a display panel having an irregular display area 3 and a normal display area 4 with different pixel setting densities or pixel numbers, wherein the pixel setting density or pixel number of the irregular display area 3 is less than the pixel setting density or pixel number of the normal display area 4, the capacitance of the Pscan scan lines and the Nscan scan lines of the irregular display area 3 can be compensated so that the capacitance of the Pscan scan lines and the Nscan scan lines of the irregular display area 3 and the capacitance of the Pscan scan lines and the Nscan scan lines of the normal display area 4 tend to be the same, thereby reducing the capacitance difference of the Pscan scan lines and the Nscan scan lines in the irregular display area 3 and the normal display area 4, and reducing the risk of split screen between the irregular display area 3 and the normal display area 4 due to the capacitance difference of the Pscan scan lines and the Nscan scan lines.

[0066] Optionally, in some embodiments of the present application, the first scan line is a Pscan scan line, and the second scan line is an Nscan scan line.

[0067] Optionally, in some embodiments of the present application, the display panel includes a substrate, multiple metal layers arranged above the substrate, and multiple insulating layers, the multiple metal layers include a first gate layer, a second gate layer, a third gate layer, a first source-drain layer, a second source-drain layer, a third source-drain layer, and an anode layer arranged in sequence above the substrate, and the insulating layer is arranged between adjacent metal layers.

[0068] Optionally, in some embodiments of the present application, a first routing line and a second routing line are provided in the special-shaped winding area, and the first compensation line and the second compensation line are provided in the special-shaped winding area.

[0069] Optionally, in some embodiments of the present application, the non-display area further includes an additional compensation area, the non-display area is provided with a VSS line, the additional compensation area is located between the special-shaped display area and the VSS line, and the first compensation line and the second compensation line are provided in the additional compensation area.

[0070] Optionally, in some embodiments of the present application, the first routing is set in the same layer as the third gate layer, the first compensation line is set in the same layer as the first source and drain layer, the second routing is set in the same layer as the second source and drain layer, and the second compensation line is set in the same layer as the third source and drain layer or the anode layer.

[0071] Optionally, in some embodiments of the present application, the second wiring is provided in the same layer as the third gate layer, and the second compensation line is provided in the same layer as the first source and drain layer.

[0072] Optionally, in some embodiments of the present application, the first routing line is set on the same layer as the second gate layer, the first compensation line is set on the same layer as the third gate layer, the second routing line is set on the same layer as the first source and drain layer, and the second compensation line is set on the second source and drain layer.

[0073] An embodiment of the present application provides a display module, comprising the display panel described in any of the above embodiments.

[0074] An embodiment of the present application provides a terminal device, comprising the display panel described in any of the above embodiments.

[0075] Beneficial effect: By setting the first compensation line and the second compensation line, the first compensation line and the first routing are connected to the same signal and are overlapped in the film thickness direction, and the second compensation line and the second routing are connected to the same signal and are overlapped in the film thickness direction, thereby realizing capacitance compensation of the first routing of the first scanning line and the second routing of the second scanning line located in the special-shaped display area, reducing the capacitance difference between the first scanning line and the second scanning line in the special-shaped display area and the normal display area, thereby reducing the risk of split screen between the special-shaped display area and the normal display area.

[0076] The present application also proposes a display module and a terminal device. Both the display module and the display device include the above-mentioned display panel, which will not be described in detail here.

[0077] The display panel provided by the embodiment of the present application includes a display area and a non-display area, the non-display area includes a special-shaped winding area, the display area includes a normal display area and special-shaped display areas located on both sides of the special-shaped winding area, the pixel setting density in the special-shaped display area is less than the pixel setting density in the normal display area, the display panel includes a driving unit, a first scan line and a second scan line connected to the driving unit and transmitting different signals, the first scan line includes a first routing line located in the special-shaped display area of ​​the first area, the second scan line includes a second routing line located in the special-shaped display area, wherein the display panel further includes a first compensation line and a second compensation line, the first compensation line and the first routing line are connected to the same The first compensation line and the second compensation line are connected to the same scanning signal, the first compensation line and the first routing are overlapped in the film thickness direction, the second compensation line and the second routing are connected to the same scanning signal, and the second compensation line and the second routing are overlapped in the film thickness direction; by providing the first compensation line and the second compensation line, the first compensation line and the first routing are overlapped in the film thickness direction, and the second compensation line and the second routing are overlapped in the film thickness direction, capacitance compensation is performed on the first routing of the first scanning line and the second routing of the second scanning line located in the special-shaped display area, respectively, to reduce the capacitance difference between the first scanning line and the second scanning line in the special-shaped display area and the normal display area, thereby reducing the risk of split screen between the special-shaped display area and the normal display area.

[0078] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0079] The above is a detailed introduction to the display panel provided in the embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, based on the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A display panel, comprising a display area and a non-display area, wherein the non-display area comprises a special-shaped winding area, the display area comprises a normal display area and special-shaped display areas located on both sides of the special-shaped winding area, the pixel arrangement density in the special-shaped display area is less than the pixel arrangement density in the normal display area, and the display panel comprises a driving unit, a first scanning line and a second scanning line connected to the driving unit and transmitting different signals, the first scanning line comprises a first routing line located in the special-shaped display area of ​​the first area, and the second scanning line comprises a second routing line located in the special-shaped display area, wherein: The display panel also includes a first compensation line and a second compensation line. The first compensation line and the first routing line are connected to the same signal, and the first compensation line and the first routing line are overlapped in the film thickness direction. The second compensation line and the second routing line are connected to the same scanning signal, and the second compensation line and the second routing line are overlapped in the film thickness direction.

2. The display panel according to claim 1, wherein: The first scanning line is a Pscan scanning line, and the second scanning line is a Nscan scanning line.

3. The display panel according to claim 2, wherein: The display panel further includes a third scan line, and the third scan line is an EM scan line.

4. The display panel according to claim 3, wherein: The display panel further includes a third compensation line, the EM scanning line includes a fifth line located in the special-shaped display area and a sixth line located in the normal display area, and the third compensation line and the fifth line are overlapped in a film thickness direction.

5. The display panel according to claim 2, wherein: The display panel includes a substrate, a plurality of metal layers arranged above the substrate, and a plurality of insulating layers. The plurality of metal layers include a first gate layer, a second gate layer, a third gate layer, a first source-drain layer, a second source-drain layer, a third source-drain layer, and an anode layer, which are sequentially arranged above the substrate, and the insulating layer is arranged between adjacent metal layers.

6. The display panel according to claim 2, wherein: A first wiring and a second wiring are arranged in the special-shaped winding area.

7. The display panel according to claim 6, wherein: The first compensation line and the second compensation line are arranged in the special-shaped winding area.

8. The display panel according to claim 2, wherein: The non-display area further includes an additional compensation area, the non-display area is provided with a VSS line, the additional compensation area is located between the special-shaped display area and the VSS line, and the first compensation line and the second compensation line are provided in the additional compensation area.

9. The display panel according to claim 8, wherein: The additional compensation area is an area formed by increasing the frame width.

10. The display panel according to claim 5, wherein: The Pscan scanning line is disposed in the same layer as the first gate layer, and the first compensation line is disposed in the same layer as the second gate layer.

11. The display panel according to claim 5, wherein: The Pscan scanning line is disposed in the same layer as the second gate layer, and the first compensation line is disposed in the same layer as the first gate layer or the third gate layer.

12. The display panel according to claim 5, wherein: The Nscan scanning line is disposed in the same layer as the third gate layer, and the second compensation line is disposed in the same layer as the first gate layer or the second gate layer.

13. The display panel according to claim 8, wherein: The first wiring is arranged in the same layer as the third gate layer, the first compensation line is arranged in the same layer as the first source and drain layer, the second wiring is arranged in the same layer as the second source and drain layer, and the second compensation line is arranged in the same layer as the third source and drain layer or the anode layer.

14. The display panel according to claim 8, wherein: The second wiring is disposed in the same layer as the third gate layer, and the second compensation line is disposed in the same layer as the first source and drain layer.

15. The display panel according to claim 8, wherein: The first wiring is arranged in the same layer as the second gate layer, the first compensation line is arranged in the same layer as the third gate layer, the second wiring is arranged in the same layer as the first source and drain layer, and the second compensation line is arranged in the second source and drain layer.

16. The display panel according to claim 5, wherein: A pixel definition layer is arranged on a side of the anode layer away from the substrate.

17. The display panel according to claim 1, wherein: The first scan line further includes a third wiring located in the normal display area, and the first wiring is insulated from the third wiring.

18. The display panel according to claim 1, wherein: The second scan line further includes a fourth wiring located in the normal display area, and the second wiring is insulated from the fourth wiring.

19. A display module, comprising the display panel according to any one of claims 1.

20. A terminal device, comprising the display panel according to any one of claims 1.

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