Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor capable of improving adhesion force between a laminate and an external electrode.　A multilayer ceramic capacitor according to the present invention comprises: a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers laminated on the dielectric layers, and having a first main surface and a second main surface facing each other in a lamination direction of the plurality of dielectric layers, a first side surface and a second side surface facing each other in a width direction orthogonal to the lamination direction, and a first end surface and a second end surface facing each other in a length direction orthogonal to the lamination direction and the width direction; a first external electrode disposed on the first main surface and the first end surface of the laminate; and a second external electrode disposed on the first main surface and the second end surface of the laminate. The first end surface and the second end surface have an inclined surface that widens at the base thereof from the first main surface toward the second main surface. The inclined surface has a first inclined portion disposed on the first main surface side and a second inclined portion disposed on the second main surface side, and the inclination angle of the first inclined portion with respect to the length direction is different from the inclination angle of the second inclined portion with respect to the length direction.

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] In recent years, electronic devices such as mobile phones and portable music players have become increasingly smaller and thinner. Accordingly, multilayer ceramic electronic components, such as multilayer ceramic capacitors, that are installed in these smaller and thinner electronic devices have also become smaller and thinner. In particular, multilayer ceramic electronic components that are becoming thinner are increasingly being used by being embedded in wiring boards, or even when mounted on the surface of wiring boards, they are being mounted in very narrow gaps. As such, the thinner the multilayer ceramic electronic components become, the lower their mechanical strength becomes, and ensuring their mechanical strength is therefore highly required.

[0003] For example, Patent Document 1 discloses a thin multilayer capacitor. This multilayer capacitor includes a capacitor body having a substantially rectangular parallelepiped shape, a first external electrode continuously covering the front surface, left and right sides, and front portions of the top and bottom faces of the capacitor body, and a second external electrode continuously covering the rear surface, left and right sides, and rear portions of the top and bottom faces of the capacitor body. This multilayer capacitor is thinned to a height H of 0.15 mm.

[0004] Japanese Patent Application Laid-Open No. 2012-222276

[0005] In such a thinned multilayer capacitor, the contact area between the laminate and the external electrodes is reduced, and therefore, when the multilayer capacitor is mounted using the first main surface as the mounting surface, stress caused by solder contraction during mounting acts on the external electrodes, which can easily cause the external electrodes to peel off from the laminate.

[0006] SUMMARY OF THE INVENTION Therefore, a primary object of the present invention is to provide a multilayer ceramic capacitor that can improve the adhesive strength between the laminate and the external electrodes.

[0007] The multilayer ceramic capacitor according to the present invention comprises a laminate including a plurality of laminated dielectric layers and a plurality of internal electrode layers laminated on the dielectric layers, the laminate having first and second main surfaces opposing each other in a stacking direction of the plurality of dielectric layers, first side surfaces opposing each other in a width direction perpendicular to the stacking direction, and first end surfaces opposing each other in a length direction perpendicular to the stacking direction and the width direction; first external electrodes arranged on the first main surface and the first end surfaces of the laminate; and second external electrodes arranged on the first main surface and the second end surfaces of the laminate, the first end surfaces and the second end surfaces having inclined surfaces that widen from the first main surface toward the second main surface, the inclined surfaces having a first inclined portion arranged on the first main surface side and a second inclined portion arranged on the second main surface side, the inclination angle of the first inclined portion with respect to the length direction being different from the inclination angle of the second inclined portion with respect to the length direction.

[0008] In the multilayer ceramic capacitor according to the present invention, the first end face and the second end face have inclined surfaces that widen from the first main surface toward the second main surface, and the inclined surfaces have a first inclined portion located on the first main surface side and a second inclined portion located on the second main surface side, and the inclination angle of the first inclined portion with respect to the longitudinal direction is different from the inclination angle of the second inclined portion with respect to the longitudinal direction. Therefore, when the first main surface is mounted as the mounting surface, stress near the intersection of the second main surface and the first end face, and stress near the intersection of the second main surface and the second end face, which are locations where the first external electrode and the second external electrode are likely to peel off from the laminate, can be dispersed to the vicinity of the second inclined portion, thereby obtaining the effect of suppressing peeling of the first external electrode and the second external electrode from the laminate.

[0009] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can improve the adhesive strength between the laminate and the external electrodes.

[0010] The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.

[0011] 1 is a perspective view showing an example of a multilayer ceramic capacitor according to a first embodiment of the present invention; FIG. 2 is a plan view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention; FIG. 3 is a front view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention; FIG. 4 is a side view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention; FIG. 5 is a schematic cross-sectional view taken along line V-V in FIG. 1; FIG. 6 is a schematic cross-sectional view taken along line VI-VI in FIG. 1; and FIG. 7 is a schematic cross-sectional view taken along line VII-VII in FIG. 1. (A) is an external perspective view of a laminate of the multilayer ceramic capacitor according to the first embodiment of the present invention, and (B) is an external perspective view of the laminate as viewed from a direction different from that of (A). FIG. 6 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a first modified example of the first embodiment of the present invention; FIG. 7 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a second modified example of the first embodiment of the present invention; FIG. 8 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a third modified example of the first embodiment of the present invention; and FIG. 9 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a fourth modified example of the first embodiment of the present invention. 15. A cross-sectional view schematically illustrating an example of a multilayer ceramic capacitor according to a fifth modified example of the first embodiment of the present invention. A cross-sectional view schematically illustrating an example of a multilayer ceramic capacitor according to a sixth modified example of the first embodiment of the present invention. An external perspective view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention. An external perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. A front view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. A side view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. A cross-sectional view schematic diagram taken along line XIX-XIX in FIG. 15. A cross-sectional view schematic diagram taken along line XX-XX in FIG. 15. A cross-sectional view schematic diagram taken along line XXI-XXI in FIG. 15. A cross-sectional view schematic diagram taken along line XXII-XXII in FIG. 15. (A) is an external perspective view of a laminate of a multilayer ceramic capacitor according to the second embodiment of the present invention, and (B) is an external perspective view of the laminate as viewed from a direction different from that of (A).24 is a schematic cross-sectional view taken along line XXV-XXV in FIG. 24 , illustrating the structure of an example of a multilayer ceramic capacitor according to a third embodiment of the present invention. 25 is a schematic cross-sectional view taken along line XXVI-XXVI in FIG. 24 , illustrating the structure of an example of a multilayer ceramic capacitor according to a third embodiment of the present invention.

[0012] As an example of the present invention, a multilayer ceramic capacitor will be described below in this embodiment.

[0013] A. First Embodiment 1. Multilayer Ceramic Capacitor An example of a multilayer ceramic capacitor 10 according to an embodiment of the present invention will be described.

[0014] FIG. 1 is an external perspective view showing an example of a multilayer ceramic capacitor according to a first embodiment of the present invention. FIG. 2 is a plan view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 3 is a front view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 4 is a side view showing an example of a multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 1. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 1. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 1. FIG. 8(A) is an external perspective view of a laminate of a multilayer ceramic capacitor according to the first embodiment of the present invention, and FIG. 8(B) is an external perspective view of the laminate as viewed from a direction different from that of (A).

[0015] The multilayer ceramic capacitor 10 has a laminate 12 and external electrodes 24. The configuration of each will be described below in the order of the laminate 12 and the external electrodes 24.

[0016] (Laminate) The laminate 12 includes a first main surface 12 a and a second main surface 12 b facing in a height direction x, which is the stacking direction of the multiple dielectric layers 14, a first side surface 12 c and a second side surface 12 d facing in a width direction y perpendicular to the height direction x, and a first end face 12 e and a second end face 12 f facing in a length direction z perpendicular to the height direction x and the width direction y.

[0017] The corners and ridges of this laminate 12 are rounded. Note that a corner refers to a portion where three adjacent faces of the laminate 12 intersect, and a ridge refers to a portion where two adjacent faces of the laminate 12 intersect. Furthermore, unevenness may be formed on part or all of the first main surface 12a and the second main surface 12b, the first side surface 12c and the second side surface 12d, and the first end surface 12e and the second end surface 12f.

[0018] It is preferable that the first main surface 12a and / or the second main surface 12b is flat. If the first main surface 12a and / or the second main surface 12b is flat, the stress applied from the nozzle picking up the multilayer ceramic capacitor 10 can be dispersed across the flat surface, thereby improving the strength of the multilayer ceramic capacitor 10 during mounting. In the multilayer ceramic capacitor 10 according to this embodiment, the second main surface 12b is formed flat.

[0019] As shown in Figures 5 and 6, the laminate 12 has, in the height direction x connecting the first main surface 12a and the second main surface 12b, an inner layer portion 15a in which a plurality of internal electrode layers 16 face each other, a first main surface side outer layer portion 15b1 formed from a plurality of dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 located closest to the first main surface 12a, and a second main surface side outer layer portion 15b2 formed from a plurality of dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 located closest to the second main surface 12b.

[0020] The first main surface side outer layer portion 15b1 and the second main surface side outer layer portion 15b2 may be integrated after baking and may not be distinguishable from one another, but are an aggregate of a plurality of outer dielectric layers.

[0021] The first main surface side outer layer portion 15b1 is located on the first main surface 12a side of the laminate 12 and is an aggregate of multiple dielectric layers 14 located between the first main surface 12a and the internal electrode layer 16 closest to the first main surface 12a.

[0022] The second main surface side outer layer portion 15b2 is located on the second main surface 12b side of the laminate 12 and is an aggregate of multiple dielectric layers 14 located between the second main surface 12b and the internal electrode layer 16 closest to the second main surface 12b.

[0023] The dimensions of the laminate 12 are not particularly limited, but it is preferable that the dimension in the length direction z is 0.1 mm or more and 1.6 mm or less, the dimension in the width direction y is 0.1 mm or more and 1.6 mm or less, and the dimension in the height direction x is 0.01 mm or more and 0.1 mm or less.

[0024] The dielectric layer 14 may be formed, for example, from a dielectric material. The dielectric material may have a plurality of crystal grains containing a perovskite-type compound having a basic structure of BaTiO3. Specific examples of the material for the dielectric layer 14 include dielectric ceramics composed mainly of CaTiO3, SrTiO3, or CaZrO3, in addition to BaTiO3. Furthermore, depending on the desired properties of the laminate, a material containing a minor component such as a manganese compound, an iron compound, a chromium compound, a cobalt compound, or a nickel compound in a smaller amount than the major component may be used.

[0025] The outer dielectric layer may have multiple crystal grains containing a perovskite-type compound whose basic structure is, for example, BaTiO3. For example, a dielectric ceramic composed mainly of BaTiO3, CaTiO3, SrTiO3, CaZrO3, or the like may be used. Substitutive components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may also be added to these main components. Furthermore, the dielectric layer 14 and the outer dielectric layer may be made of different materials depending on the desired functions. For example, a soft outer dielectric layer can buffer stress on the laminate, while a hard outer dielectric layer can suppress cracking.

[0026] The thickness of the first outer layer portion 15b1 is preferably 2 μm or more and 15 μm or less, and the thickness of the second outer layer portion 15b2 is preferably 2 μm or more and 15 μm or less.

[0027] The first end face 12e and the second end face 12f have inclined surfaces that are inclined so as to flare out from the first main surface 12a toward the second main surface 12b. The first side face 12c and the second side face 12d also have inclined surfaces that are inclined so as to flare out from the first main surface 12a toward the second main surface 12b. Note that the first side face 12c and the second side face 12d do not necessarily have to be inclined so as to flare out from the first main surface 12a toward the second main surface 12b.

[0028] In other words, the length of the first main surface 12a in the longitudinal direction z of the laminate 12 is shorter than the length of the second main surface 12b in the longitudinal direction z. Therefore, as shown in Fig. 3, the laminate 12 has a substantially trapezoidal shape in side view. Furthermore, it is preferable that the length of the first main surface 12a in the width direction y of the laminate 12 is shorter than the length of the second main surface 12b in the width direction y. In this case, as shown in Fig. 4, the laminate 12 has a substantially trapezoidal shape in end view.

[0029] Therefore, in the laminate 12, when the length in the longitudinal direction z of the first main surface 12a is shorter than the length in the longitudinal direction z of the second main surface 12b and the length in the width direction y of the first main surface 12a is shorter than the length in the width direction y of the second main surface 12b, as shown in Figure 8, when the area of ​​the first main surface 12a is A and the area of ​​the second main surface 12b is B in the stacking direction of the laminate 12, the condition A < B is satisfied.

[0030] The laminate 12 has a first inclined portion 40 and a second inclined portion 42 on an inclined surface that is inclined from the first main surface 12a toward the second main surface 12b.

[0031] The first inclined portion 40 has a first inclined portion 401 formed on the first end face 12e and the second end face 12f toward the first main surface 12a, and a first inclined portion 402 formed on the first side face 12c and the second side face 12d toward the first main surface 12a.

[0032] The second inclined portion 42 has a second inclined portion 421 formed on the second main surface 12b side at the first end face 12e and the second end face 12f, and a second inclined portion 422 formed on the second main surface 12b side at the first side face 12c and the second side face 12d.

[0033] The inclined surfaces of the first side surface 12c and the second side surface 12d may not necessarily have the first inclined portion 402 and the second inclined portion 422.

[0034] The first inclined portion 40 and the second inclined portion 42 are formed continuously. This improves the adhesion between the laminate 12 and the external electrode 24 compared to when the first inclined portion 40 and the second inclined portion 42 are formed discontinuously. In addition, the first inclined portion 40 and the second inclined portion 42 are formed continuously.

[0035] The first inclined portion 40 1 and the second inclined portion 42 1 may be formed discontinuously, and the first inclined portion 40 2 and the second inclined portion 42 2 may be formed discontinuously.

[0036] The first inclined portion 40 and the second inclined portion 42 are observed by polishing in the width direction y to ¼W or ½W of the dimension of the multilayer ceramic capacitor 10 using a scanning electron microscope (SEM, for example, manufactured by JEOL Ltd.) at a magnification of 3000 times and a square of 50 μm. From the observed image of the obtained cross section, the inclined portions formed on the first end face 12 e or the second end face 12 f are designated as the first inclined portion 40 and the second inclined portion 42 .

[0037] Similarly, the first inclined portion 40 and the second inclined portion 42 are obtained by polishing the multilayer ceramic capacitor 10 in the longitudinal direction z to ¼L or ½L of its dimension, and then observing the cross section with a scanning electron microscope (SEM, for example, manufactured by JEOL Ltd.) at a magnification of 3000 times and a square of 50 μm. From the observed image of the cross section obtained, the inclined portions formed on the first end face 12 e or the second end face 12 f are designated as the first inclined portion 40 and the second inclined portion 42.

[0038] 3, the inclination angle θ of the first inclined portion 40 with a straight line l parallel to the longitudinal direction z is different from the inclination angle θ of the second inclined portion 42 with a straight line l parallel to the longitudinal direction z. As a result, when the first main surface 12a is mounted as the mounting surface, the stress near the intersection of the second main surface 12b and the first end face 12e and the stress near the intersection of the second main surface 12b and the second end face 12f, which are locations where the external electrode 24 is likely to peel off from the laminate 12, can be dispersed to the vicinity of the inclined portions, thereby obtaining the effect of suppressing peeling of the external electrode 24.

[0039] The inclination angle θ2 between the second inclined portion 421 and a line l2 parallel to the longitudinal direction z is preferably larger than the inclination angle θ1 between the first inclined portion 401 and a line parallel to the longitudinal direction z.

[0040] Furthermore, the inclination angle θ between the first inclined portion 40 and the straight line l parallel to the longitudinal direction z is preferably 30° or more and 85° or less. If the inclination angle θ is less than 30°, it becomes difficult to create an angle difference between the inclination angle θ of the first inclined portion 40 and the inclination angle θ of the second inclined portion 42. On the other hand, if the inclination angle θ is greater than 85°, it becomes difficult to obtain the effect of suppressing peeling.

[0041] The inclination angle θ between the second inclined portion 42 and the straight line l parallel to the longitudinal direction z is preferably at least 5° larger than the inclination angle θ between the first inclined portion 40 and the straight line l parallel to the longitudinal direction z. By making the second inclined portion 42 larger than the first inclined portion 40, the chip distance in the longitudinal direction z is shortened, and the force acting on the electrode end due to the leverage principle caused by the stress during solder contraction can be weakened. On the other hand, if the difference between the inclination angle θ between the second inclined portion 42 and the straight line parallel to the longitudinal direction z and the inclination angle θ between the first inclined portion 40 and the straight line parallel to the longitudinal direction z is less than 5°, it becomes difficult to achieve the effect of suppressing peeling.

[0042] At the first end face 12 e and the second end face 12 f, the internal electrode layer 16 may be exposed at the first inclined portion 40 1. When the internal electrode layer 16 is exposed at the first inclined portion 40 1, metals of the internal electrode layer 16 and the external electrode 24 are closely adhered to each other, and the adhesive strength between the laminate 12 and the external electrode 24 can be improved.

[0043] At the first end face 12 e and the second end face 12 f, the internal electrode layer 16 may be exposed at the second inclined portion 42 1. When the internal electrode layer 16 is exposed at the second inclined portion 42 1, the metals of the internal electrode layer 16 and the external electrode 24 are closely adhered to each other, and the adhesive strength between the laminate 12 and the external electrode 24 can be improved.

[0044] The number of dielectric layers 14 to be laminated is not particularly limited, but preferably the total number of layers, including inner layer portion 15a, first main surface side outer layer portion 15b1, and second main surface side outer layer portion 15b2, is 3 to 700. Furthermore, it is preferable that the thickness of inner layer portion 15a be 0.4 μm to 2.0 μm, and that the thickness of each of first main surface side outer layer portion 15b1 and second main surface side outer layer portion 15b2 be 2.0 μm to 10.0 μm.

[0045] (Internal Electrode Layers) As shown in Fig. 5 and Fig. 6, the internal electrode layers 16 include first internal electrode layers 16a and second internal electrode layers 16b. The first internal electrode layers 16a and the second internal electrode layers 16b are alternately stacked with the dielectric layers 14 interposed therebetween.

[0046] The first internal electrode layer 16a is disposed on the surface of the dielectric layer 14. The first internal electrode layer 16a has a first opposing electrode portion 18a that faces the second internal electrode layer 16b, and a first lead electrode portion 20a that is located on one end side of the first internal electrode layer 16a and extends from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. An end of the first lead electrode portion 20a is led out to and exposed at the first end face 12e.

[0047] The shape of the first opposing electrode portion 18a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first opposing electrode portion 18a may be tapered in plan view, with a slope increasing in either direction.

[0048] The shape of the first lead electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the first lead electrode portion 20a may be tapered in plan view, with a slope increasing in either direction.

[0049] The width of the first opposing electrode portion 18a of the first internal electrode layer 16a and the width of the first extraction electrode portion 20a of the first internal electrode layer 16a may be formed to be the same width, or one of the widths may be formed to be narrower.

[0050] The second internal electrode layer 16b is arranged on a surface of a dielectric layer 14 different from the dielectric layer 14 on which the first internal electrode layer 16a is arranged. The second internal electrode layer 16b has a second opposing electrode portion 18b facing the first internal electrode layer 16a, and a second extraction electrode portion 20b located on one end side of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to a second end face 12f of the laminate 12. The second extraction electrode portion 20b has an end portion extended to and exposed at the second end face 12f.

[0051] The shape of the second opposing electrode portion 18b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second opposing electrode portion 18b may be tapered in plan view, with a slope increasing in either direction.

[0052] The shape of the second extraction electrode portion 20b of the second internal electrode layer 16b is not particularly limited, but is preferably rectangular in plan view. However, the corners in plan view may be rounded or may be formed obliquely in plan view (tapered). Alternatively, the second extraction electrode portion 20b may be tapered in plan view, with a slope increasing in either direction.

[0053] The width of the second opposing electrode portion 18b of the second internal electrode layer 16b and the width of the second extraction electrode portion 20b of the second internal electrode layer 16b may be formed to be the same width, or one of the widths may be formed to be narrower.

[0054] The first lead electrode portion 20a of the first internal electrode layer 16a and the second lead electrode portion 20b of the second internal electrode layer 16b may have a shape that is curved toward the first main surface 12a or the second main surface 12b. In addition, the longest distance in the height direction x between exposed portions of the first lead electrode portion 20a of the first internal electrode layer 16a that is led out to the second end face 12f and the longest distance in the height direction x between exposed portions of the second lead electrode portion 20b of the second internal electrode layer 16b that is led out to the first end face 12e may be shorter than the longest distance in the height direction x between the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b.

[0055] The number of stacked internal electrode layers 16 is not particularly limited, but is preferably 2 to 700. The thickness of the internal electrode layers 16 is preferably 0.2 μm to 2.0 μm.

[0056] The laminate 12 includes side portions 22a (W gaps) of the laminate 12 located between the internal electrode layers 16 and the first side surface 12c and between the internal electrode layers 16 and the second side surface 12d. Furthermore, the laminate 12 includes end portions 22b (L gaps) of the laminate 12 located between the internal electrode layers 16 and the first end surface 12e and between the internal electrode layers 16 and the second end surface 12f.

[0057] The internal electrode layer 16 can be made of an appropriate conductive material, such as, for example, metals such as Ni, Cu, Ag, Pd, and Au, or alloys containing at least one of these metals, such as Ag-Pd alloys, but is not limited to these.

[0058] Furthermore, by including Sn in the first internal electrode layer 16a and the second internal electrode layer 16b, it is possible to alleviate electric field concentration at the interface between the internal electrode layer 16 and the dielectric layer 14, leading to improvement in high-temperature load reliability. In this case, even if Sn is included in only one of the first internal electrode layer 16a and the second internal electrode layer 16b, it can be sufficiently effective.

[0059] In this embodiment, the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b face each other via the dielectric layer 14, thereby forming capacitance and exhibiting the characteristics of a capacitor.

[0060] In order to increase the capacitance of the capacitor, the area of ​​the internal electrode layers 16 needs to be large, so the LW surface coverage of the internal electrode layers 16 is preferably 90% or more. The LW surface coverage is defined as the ratio of the area inside the edge of the internal electrode layers 16 when viewed from the LW surface of the laminate 12 minus the area of ​​the voids. The higher the LW surface coverage, the higher the capacitance of the capacitor. However, even if the LW surface coverage is low, the dielectric layers 14 are bonded together via voids, so the bonding strength between the layers is high and delamination can be suppressed.

[0061] (External Electrodes) As shown in FIGS. 1 to 7, external electrodes 24 are disposed on the first end face 12e side and the second end face 12f side of the laminate 12.

[0062] The external electrode 24 includes a thin film layer 26 and a plating layer 30 formed to cover the thin film layer 26 .

[0063] The external electrode 24 includes a first external electrode 24a and a second external electrode 24b.

[0064] The first external electrode 24a is disposed on the first end face 12e and part of the first main surface 12a of the laminate 12. In this case, the first external electrode 24a is electrically connected to the first extraction electrode portion 20a of the first internal electrode layer 16a. Note that the first external electrode 24a may extend slightly around part of the first side face 12c and part of the second side face 12d.

[0065] The second external electrode 24b is disposed on the second end face 12f and part of the first main surface 12a of the laminate 12. In this case, the second external electrode 24b is electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b. The second external electrode 24b may extend slightly around part of the first side face 12c and part of the second side face 12d.

[0066] The external electrode 24 is composed of a thin film layer 26 , an upper plating layer 34 covering the thin film layer 26 , and a top plating layer 36 covering the upper plating layer 34 .

[0067] (Thin Film Layer) The thin film layer 26 has a first thin film layer 26a and a second thin film layer 26b.

[0068] The first thin film layer 26a is disposed so as to cover a portion of the first main surface 12a on the side of the first end surface 12e of the laminate 12, but not to cover the first end surface 12e of the laminate 12. The first thin film layer 26a may also extend around to one of the surfaces in contact with the first main surface 12a.

[0069] The second thin film layer 26b is disposed so as to cover a portion of the first main surface 12a on the second end surface 12f side of the laminate 12, but not to cover the second end surface 12f of the laminate 12. Note that the second thin film layer 26b may extend around to one of the surfaces in contact with the first main surface 12a.

[0070] As described above, the first thin film layer 26 a and the second thin film layer 26 b are each an electrode disposed on the first main surface 12 a. The first thin film layer 26 a and the second thin film layer 26 b are preferably formed by depositing metal particles using a method such as sputtering or vapor deposition. This allows the thickness of the first thin film layer 26 a and the second thin film layer 26 b in the direction connecting the first main surface 12 a and the second main surface 12 b of the laminate 12 to be 1 μm or less, which allows the dimension of the multilayer ceramic capacitor 10 in the height direction x to be sufficiently small, thereby enabling a low profile.

[0071] The dimensions of the first thin film layer 26 a and the second thin film layer 26 b in the height direction x can be measured as follows. That is, when the thin film layers are formed by depositing metal particles, a fluorescent X-ray device can be used to convert the thickness from the concentration of a predetermined element using a calibration curve method for the relevant metal species. Alternatively, a cross section of the component can be observed using an FIB with a scanning microscope, and the thickness can be measured from the actual observation image.

[0072] Furthermore, when the first thin film layer 26a and the second thin film layer 26b are formed by a thin film formation method, these thin film layers can be made of a metal such as Cu, Cr, Au, Pt, Ag, Sn, Ti, or Ni.

[0073] The first thin film layer 26a and the second thin film layer 26b can be configured taking into consideration their respective functions. For example, it is preferable that the first thin film layer 26a and the second thin film layer 26b are mainly composed of NiCr or NiCu in consideration of adhesion to the laminate 12. The first thin film layer 26a and the second thin film layer 26b may be multiple layers or may have a two-layer structure of NiCr and NiCu.

[0074] The thin film layer 26 may be formed by screen printing, CVD, ALD, or the like, and contain a dielectric material and a metal component. This allows the thin film layer 26 to adhere to the ceramic of the laminate 12, thereby improving the adhesive strength between the laminate and the external electrodes. In this case, the thin film layer 26 may have a discontinuous shape. "Discontinuous" means that the thin film layer 26 is formed discontinuously when viewed in a direction perpendicular to the longitudinal direction.

[0075] For example, when the thin film layer 26 is formed using a material containing ceramic, one method is to polish the cross section, then take a cross section photograph using a digital microscope (Keyence Corporation: VHX-5000), and use the cross section photograph to calculate the thickness, etc. Another method is to measure the thickness, etc., from the actual observation image of the cross section of the part taken by FIB using a scanning microscope.

[0076] Furthermore, when each of the first thin film layer 26 a and the second thin film layer 26 b contains the same main component as the dielectric layer 14, the adhesion can be further improved by simultaneously firing the laminate 12 and each of the first thin film layer 26 a and the second thin film layer 26 b. In this case, the metal component is preferably Ni, Cu, or the like, but can be changed as appropriate depending on the metal component of the internal electrode layer 16.

[0077] (Plating Layer) The plating layer 30 includes a first plating layer 30a and a second plating layer 30b.

[0078] The first plating layer 30 a is disposed so as to cover the first thin film layer 26 a and the first end face 12 e of the laminate 12 .

[0079] The second plating layer 30 b is disposed so as to cover the second thin film layer 26 b and the second end face 12 f of the laminate 12 .

[0080] The plating layer 30 is formed of multiple layers. That is, the plating layer 30 has an upper plating layer 34 and a surface plating layer 36.

[0081] The upper plating layer 34 includes a first upper plating layer 34a included in the first plating layer 30a and a second upper plating layer 34b included in the second plating layer 30b. The upper plating layer 36 includes a first upper plating layer 36a included in the first plating layer 30a and a second upper plating layer 36b included in the second plating layer 30b.

[0082] The first upper plating layer 34a of the upper plating layer 34 is disposed so as to cover the first direct plating layer 28a and the first thin film layer 26a of the direct plating layer 28.

[0083] The second upper plating layer 34b of the upper plating layer 34 is disposed so as to cover the second direct plating layer 28b and the second thin film layer 26b of the direct plating layer 28.

[0084] The upper plating layer 34 is preferably a Ni plating to prevent solder leaching.

[0085] The first surface plating layer 36 a of the surface plating layer 36 is disposed so as to cover the first upper plating layer 34 a of the upper plating layer 34 .

[0086] The second top plating layer 36b of the top plating layer 36 is disposed so as to cover the second top plating layer 34b of the top plating layer 34.

[0087] The surface plating layer 36 is preferably Sn plating, which has good bonding properties with the solder used when mounting the multilayer ceramic capacitor 10. Alternatively, the surface plating layer 36 may be Cu plating, which can improve bonding properties with vias formed when the multilayer ceramic capacitor 10 is embedded in a mounting substrate.

[0088] The plating layer 30 may be composed only of the surface plating layer 36. In this case, the first surface plating layer 36a of the surface plating layer 36 is disposed so as to cover the first thin film layer 26a, and the second surface plating layer 36b of the surface plating layer 36 is disposed so as to cover the second thin film layer 26b.

[0089] The metal content per unit volume of the plating layer 30 is preferably 99% by volume or more.

[0090] The thickness of each of the plating layers 30 is preferably 1.0 μm or more and 10.0 μm or less.

[0091] The dimension in the length direction z of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrodes 24a, and the second external electrodes 24b is defined as dimension L, the dimension in the height direction x of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrodes 24a, and the second external electrodes 24b is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrodes 24a, and the second external electrodes 24b is defined as dimension W. The dimensions of the multilayer ceramic capacitor 10 are preferably such that the dimension L in the length direction z is 0.1 mm to 1.6 mm, the dimension T in the height direction x is 10 μm to 100 μm, and the dimension W in the width direction y is 0.1 mm to 1.6 mm. In the multilayer ceramic capacitor 10 shown in FIG. 1 , the dimension L is greater than the dimension W.

[0092] In this embodiment, the effects of the present invention can be effectively achieved when the dimension T in the height direction x of the multilayer ceramic capacitor 10 is 100 μm or less, and are even more effective when it is 55 μm or less, or 50 μm or less.

[0093] 1, in the multilayer ceramic capacitor 10 according to the first embodiment shown in Fig. 3, the inclination angle θ of the first inclined portion 40 with respect to a line parallel to the length direction z is different from the inclination angle θ of the second inclined portion 42 with respect to a line parallel to the length direction z. As a result, when the first main surface 12a is mounted as the mounting surface, the stress near the intersection between the second main surface 12b and the first end face 12e and the intersection between the second main surface 12b and the second end face 12f, which are locations where the external electrode 24 is likely to peel off from the laminate 12, can be dispersed to the vicinity of the inclined portions, thereby obtaining an effect of suppressing peeling of the external electrode 24.

[0094] (1) First Modification Next, an example of a multilayer ceramic capacitor 10A according to a first modification of the first embodiment of the present invention will be described. Fig. 9 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to a first modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0095] As shown in FIG. 9, the multilayer ceramic capacitor 10A according to the first modified example has, in the inner layer portion 15a, internal electrode layers 16 exposed at the first end face 12e or the second end face 12f, and dielectric layers 14 laminated alternately with the internal electrode layers 16.

[0096] As shown in FIG. 9, the first inclined portion 40 is formed in the first main surface side outer layer portion 15b1 provided on the first main surface 12a side at the first end face 12e and the second end face 12f, and the second inclined portion 42 is formed in the second main surface side outer layer portion 15b2 at the first end face 12e and the second end face 12f.

[0097] Here, the region on the first end face 12e from the intersection P1 between the inner layer portion 15a and the first main surface side outer layer portion 15b1 to the intersection P2 between the first main surface 12a and the first end face 12e is defined as the first inclined portion 401, and the region on the first end face 12e from the intersection P3 between the inner layer portion 15a and the second main surface side outer layer portion 15b2 to the intersection P4 between the second main surface 12b and the first end face 12e is defined as the second inclined portion 421.

[0098] At this time, as shown in Figure 9, when a straight line l3 is drawn connecting the intersection points P1 and P2, the inner layer portion 15a forms a protruding convex portion 50 having a shape that is approximately perpendicular to the first end face 12e from the straight line. Similarly, the inner layer portion 15a forms a protruding convex portion 50 having a shape that is approximately perpendicular to the second end face 12f. Here, "the inner layer portion 15a protruding" means that both the internal electrode layer 16 and the dielectric layer 14 protrude. In this case, the protruding amount of the internal electrode layer 16 and the protruding amount of the dielectric layer 14 may be different. If the protruding amount of the internal electrode layer 16 is larger, the portion of the dielectric layer 14 is recessed, resulting in an uneven shape.

[0099] Also, the line l connecting the intersection points P1 and P2 t When drawing the line l t The protrusion amount t of the inner layer portion 15a is determined by the distance between the apex T of the protrusion 50a and the straight line l. t The protrusion amount t of the inner layer portion 15 a is preferably 0.3 μm or more and 3.0 μm or less. When the protrusion amount t of the inner layer portion 15 a is within this range, the surface shape does not become too smooth, and the surface area of ​​the inner layer portion 15 a increases, thereby further improving the adhesive strength between the laminate 12 and the external electrode 24.

[0100] In addition, if the portion where the first main surface 12a and the first end face 12e intersect and the portion where the second main surface 12b and the first end face 12e intersect are rounded and the intersection point P2 is unclear, the first inclined portion 401 is defined by a straight line from a point on the first end face 12e that exists when going 2 μm toward the first main surface 12a in the stacking direction from the internal electrode layer 16 that is closest to the first main surface 12a to the intersection point P1 between the inner layer portion 15a and the first main surface side outer layer portion 15b1, and the second inclined portion 421 is defined by a straight line from a point on the first end face 12e that exists when going 2 μm toward the second main surface 12b in the stacking direction from the internal electrode layer 16 that is closest to the second main surface 12b to the intersection point P3 between the inner layer portion 15a and the second main surface side outer layer portion 15b2. The inclination angle of each inclined portion at this time is defined by the angle between the intersection point and a line parallel to the longitudinal direction z.

[0101] The inner layer portion 15a on the first end face 12e may also have an inclined portion, and in that case, the exposed surface of the internal electrode layer 16 may also be inclined. Similarly, the inner layer portion 15a on the second end face 12f may also have an inclined portion, and in that case, the exposed surface of the internal electrode layer 16 may also be inclined.

[0102] 9 according to the first modification of the first embodiment, the multilayer ceramic capacitor 10A has the same effects as the multilayer ceramic capacitor 10 described above, and also has the following effect: Since the inner layer portion 15a is convex or the surface of the inner layer portion 15a has an uneven shape, the surface areas of the metal components and the dielectric components are increased, and the contact area between the metal components in the external electrodes and the metal components of the laminate 12 is increased, thereby further improving the adhesive strength between the laminate 12 and the external electrodes 24.

[0103] (2) Second Modification Next, an example of a multilayer ceramic capacitor 10B according to a first modification of the first embodiment of the present invention will be described. Fig. 10 is a cross-sectional schematic diagram showing an example of a multilayer ceramic capacitor according to a second modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0104] As shown in FIG. 10 , in the multilayer ceramic capacitor 10B according to the second modified example, each of the first thin film layer 26 a and the second thin film layer 26 b is formed so as to extend around to the first end face 12 e and the second end face 12 f of the laminate 12, respectively.

[0105] Specifically, the first thin film layer 26a is formed so as to wrap around from the first main surface 12a to the first end face 12e, and the second thin film layer 26b is formed so as to wrap around from the first main surface 12a to the second end face 12f.

[0106] The first thin film layer 26a is directly and electrically connected to the first lead electrode portion 20a of the first internal electrode layer 16a exposed from the first end face 12e, and the second thin film layer 26b is directly and electrically connected to the second lead electrode portion 20b of the second internal electrode layer 16b exposed from the second end face 12f.

[0107] The first thin film layer 26a may be formed by continuously connecting the thin film layer formed on the first main surface 12a and the thin film layer formed on the first end face 12e, or may be formed discontinuously at the ridge line. The second thin film layer 26b may be formed by continuously connecting the thin film layer formed on the first main surface 12a and the thin film layer formed on the second end face 12f, or may be formed discontinuously at the ridge line.

[0108] 10 , the multilayer ceramic capacitor 10B according to the first embodiment has the same effects as the multilayer ceramic capacitor 10 described above, and also has the following effect: Since the first thin film layer 26a is disposed on the first end face 12e and the second thin film layer 26b is disposed on the second end face 12f, the first inclined portion 40 and the second inclined portion 42 increase the contact area between the metal component in the laminate 12 and the metal component in the thin film layer 26, and also increase the contact area between the dielectric component in the laminate 12 and the dielectric component in the thin film layer 26. As a result, the adhesive strength between the laminate 12 and the external electrode 24 can be further improved.

[0109] (3) Third Modification Next, an example of a multilayer ceramic capacitor 10C according to a third modification of the first embodiment of the present invention will be described. Fig. 11 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to the third modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0110] As shown in FIG. 11, a base electrode layer 27 is disposed on both end faces 12e and 12f of a multilayer ceramic capacitor 10C according to the third modified example of the first embodiment.

[0111] (Underlying Electrode Layer) The underlying electrode layer 27 includes a first underlying electrode layer 27a and a second underlying electrode layer 27b.

[0112] The first base electrode layer 27a is disposed so as to cover the first end face 12e of the laminate 12. The first base electrode layer 27a is electrically connected directly to the first extraction electrode portion 20a of the first internal electrode layer 16a.

[0113] The upper end of the first base electrode layer 27a may be arranged so as to overlap the underside of the first thin film layer 26a on the ridge formed by the first main surface 12a and the first end face 12e of the laminate 12.

[0114] The second base electrode layer 27b is disposed so as to cover the second end face 12f of the laminate 12. The second base electrode layer 27b is directly electrically connected to the second extraction electrode portion 20b of the second internal electrode layer 16b.

[0115] The upper end of the second base electrode layer 27b may be arranged so as to overlap the lower side of the second thin film layer 26b on the ridge formed by the first main surface 12a and the second end face 12f of the laminate 12.

[0116] A portion of the first thin film layer 26a may be arranged so as to wrap around to the first end face 12e, and a portion of the second thin film layer 26b may be arranged so as to wrap around to the second end face 12f.

[0117] The base electrode layer 27 is formed, for example, by a baking layer. In this case, the baking layer contains a metal component and a glass component. The glass component of the baking layer contains at least one selected from B, Si, Ba, Mg, Al, Li, etc. The metal component of the baking layer contains at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The baking layer is formed by applying a conductive paste containing glass and metal to the laminate and baking it. The baking layer is formed by simultaneously baking a laminated chip having the internal electrode layer 16 and the dielectric layer 14 and a conductive paste applied to the laminated chip, but it may also be baked after baking the laminated chip having the internal electrode layer 20 and the dielectric layer 14. The baking layer may be multi-layered.

[0118] The thickness of each of the base electrode layers 27 is preferably 0.1 μm or more and 200 μm or less.

[0119] The upper ends of the first and second underlying electrode layers 27a and 27b may be arranged to be spaced apart from the first and second thin film layers 26a and 26b, respectively.

[0120] 11 , the multilayer ceramic capacitor 10C according to the first embodiment has the same effects as the multilayer ceramic capacitor 10 described above, and also has the following effect: Since the first base electrode layer 27a is disposed on the first end face 12e and the second base electrode layer 27b is disposed on the second end face 12f, the surface areas of the metal components and the dielectric components of the first inclined portion 40 and the second inclined portion 42 are increased, thereby increasing the contact area between the metal components in the laminate 12 and the metal components of the base electrode layer 27, and also increasing the contact area between the dielectric components in the laminate 12 and the glass components in the base electrode layer 27. As a result, the adhesive strength between the laminate 12 and the external electrode 24 can be further improved.

[0121] (4) Fourth Modification Next, an example of a multilayer ceramic capacitor 10D according to a fourth modification of the first embodiment of the present invention will be described. Fig. 12 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to the fourth modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0122] As shown in FIG. 12, a plating layer 28 is disposed directly on both end faces 12e, 12f of a multilayer ceramic capacitor 10D according to the fourth modification of the first embodiment.

[0123] (Direct Plated Layer) The direct plated layer 28 includes a first direct plated layer 28a and a second direct plated layer 28b.

[0124] The first direct plating layer 28a is disposed so as to cover the first end face 12e of the laminate 12. The first direct plating layer 28a is electrically connected directly to the first extraction electrode portion 20a of the first internal electrode layer 16a.

[0125] The upper end of the first direct plating layer 28a is disposed on the ridge formed by the first main surface 12a and the first end face 12e of the laminate 12 so as to overlap the lower side of the first thin film layer 26a.

[0126] The second direct plating layer 28b is disposed so as to cover the second end face 12f of the laminate 12. The second direct plating layer 28b is electrically connected directly to the second extraction electrode portion 20b of the second internal electrode layer 16b.

[0127] The upper end of the second direct plating layer 28b is disposed on the ridge formed by the first main surface 12a and the second end face 12f of the laminate 12 so as to overlap the lower side of the second thin film layer 26b.

[0128] In addition, a portion of the first direct plating layer 28a may be arranged so as to wrap around to the second main surface 12b, or a portion of the second direct plating layer 28b may be arranged so as to wrap around to the second main surface 12b.

[0129] The direct plating layer 28 is not particularly limited as long as it contains, as a main metal component, at least one metal selected from, for example, Cu, Ni, Ag, Pd, an Ag—Pd alloy, Au, etc. For example, when the first internal electrode layer 16 a and the second internal electrode layer 16 b are formed using Ni, it is preferable to adopt Cu plating as the direct plating layer 28, which has good bonding properties with Ni.

[0130] The direct plating layer 28 is formed by plating growing from the internal electrode layer 16, covering the first end face 12e and the second end face 12f.

[0131] The thickness of each direct plating layer 28 is preferably 2.0 μm or more and 10.0 μm or less.

[0132] The upper ends of the first direct plating layer 28a and the second direct plating layer 28b may be arranged to be spaced apart from the first thin film layer 26a and the second thin film layer 26b, respectively.

[0133] This allows the thickness of the external electrodes 24 formed on the first main surface 12a in the stacking direction to be further reduced, making it possible to provide a multilayer ceramic capacitor with an even lower profile without compromising mountability during mounting.

[0134] (5) Fifth Modification Next, an example of a multilayer ceramic capacitor 10E according to a fifth modification of the first embodiment of the present invention will be described. Fig. 13 is a cross-sectional schematic diagram showing an example of a multilayer ceramic capacitor according to a fourth modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0135] 13 , in the multilayer ceramic capacitor 10E according to the fifth modification, the plating layer 30 of the external electrode 24 further includes an under plating layer 32 disposed between the thin film layer 26 and the upper plating layer 34. As a result, the upper plating layer 34 of the plating layer 30 indirectly covers the thin film layer 26 via the under plating layer 32.

[0136] As a result, the lower plating layer 32 can block moisture from entering the multilayer ceramic capacitor 10E from the outside.

[0137] The multilayer ceramic capacitor 10E according to the fifth modification shown in Fig. 13 has the same effects as the multilayer ceramic capacitor 10 shown in Fig. 1. Furthermore, it is possible to prevent moisture from entering from the outside.

[0138] (6) Sixth Modification Next, a multilayer ceramic capacitor 10F according to a sixth modification of the first embodiment of the present invention will be described. Fig. 14 is a schematic cross-sectional view showing an example of a multilayer ceramic capacitor according to the sixth modification of the first embodiment of the present invention. However, the same reference numerals are used to designate the same or corresponding components as those in Figs. 1 to 8, and detailed descriptions thereof will be omitted.

[0139] The external electrodes 24 of the multilayer ceramic capacitor 10E according to the sixth modification do not include a plating layer and are composed of a plurality of thin film layers. In the multilayer ceramic capacitor 10E shown in Fig. 14, the first external electrode 24a does not include a plating layer and is composed of only four thin film layers 26a1 to 26a4, and the second external electrode 24b does not include a plating layer and is composed of only four thin film layers 26b1 to 26b4.

[0140] In the first external electrode 24a, a thin film layer 26a1 is formed from the first main surface 12a to wrap around and cover the first end face 12e. Then, thin film layers 26a2, 26a3, and 26a4 are formed in this order on the surface of thin film layer 26a1. In the second external electrode 24b, a thin film layer 26b1 is formed from the first main surface 12a to wrap around and cover the second end face 12f. Then, thin film layers 26b2, 26b3, and 26b4 are formed in this order on the surface of thin film layer 26b1.

[0141] In the first external electrode 24a, the respective edge portions of the laminate 12 made up of the four thin film layers 26a1 to 26a4 near the center may or may not be formed to cover the corresponding edge portions of the respective lower layers. Similarly, in the second external electrode 24b, the respective edge portions of the laminate 12 made up of the four thin film layers 26b1 to 26b4 near the center may or may not be formed to cover the corresponding edge portions of the respective lower layers.

[0142] 14 according to the first embodiment, the multilayer ceramic capacitor 10F has the same effects as the multilayer ceramic capacitor 10 described above, and also has the following effect: The multilayer ceramic capacitor 10F does not include a plating layer, and the first external electrode 24a is composed of only the thin film layers 26a1 to 26a4, and the second external electrode 24b is composed of only the thin film layers 26b1 to 26b4. This reduces the T dimension in the height direction x and the L dimension in the length direction z, thereby enabling the size of the multilayer ceramic capacitor to be reduced.

[0143] 2. Method for Manufacturing the Multilayer Ceramic Capacitor A method for manufacturing the multilayer ceramic capacitor, which is an example of the multilayer ceramic capacitor according to the first embodiment, will now be described.

[0144] First, a dielectric sheet and a conductive paste for the internal electrodes are prepared. The dielectric sheet and the conductive paste for the internal electrode layers contain a binder (for example, a known organic binder) and an organic solvent (for example, a known organic binder).

[0145] Next, a conductive paste for the internal electrodes is printed in a predetermined pattern on the dielectric sheet by, for example, screen printing or gravure printing to form an internal electrode pattern. Regarding the dielectric sheet, an outer layer dielectric sheet on which no internal electrode pattern is printed is also produced.

[0146] A predetermined number of dielectric sheets for outer layers on which no internal electrode pattern is formed are stacked, and then dielectric sheets on which an internal electrode pattern corresponding to the first internal electrode layer 16a and a dielectric sheet on which an internal electrode pattern corresponding to the second internal electrode layer 16b are formed are alternately stacked on top of these, and then a predetermined number of dielectric sheets for outer layers on which no internal electrode pattern is formed are stacked on top of these to produce a laminated sheet.

[0147] Furthermore, the laminated sheets are pressed in the lamination direction by means of a hydrostatic press or the like to produce a laminated block.

[0148] The laminated block is then cut to a predetermined size to cut out laminated chips, which may then be wet-barreled to round the corners and ridges of the laminated chips.

[0149] A tapered shape is created for the laminated chip. When cutting the laminated block into chip shapes, a dicer cut is performed and a tapered blade is used to create an angled end face shape. The taper angle is, for example, between 10° and 80°, with a blade without a taper being 0°. Since the blade taper and the angle of the end face of the cut chip do not necessarily correspond, the taper angle is fine-tuned to the desired angle. This causes both side surfaces and both end faces to slope downwards from the first main surface toward the second main surface. As a result, the internal electrode patterns exposed from both end faces can be seen from the first main surface.

[0150] Next, the laminated chip is fired to produce the laminate 12. The firing temperature depends on the ceramic and the materials of the internal electrode layers 16, but is preferably 900°C or higher and 1400°C or lower.

[0151] Next, the fired laminated chips are aligned on an adhesive tape so that the first main surface faces upward. For example, when the first main surface faces upward, the chips are sorted by appearance and aligned in direction, taking advantage of the fact that the internal electrode layers 16 can be seen from both end faces.

[0152] The abrasive is applied by sandblasting at an angle perpendicular to the first main surface to polish the end face. During this process, the outer layer portions near the first main surface on both end faces are easily scraped. However, the outer layer portions near the second main surface on both end faces are less susceptible to scraping because the internal electrode layer 16 exposed from the end faces forms an umbrella. Furthermore, scraping debris from the sandblasting tends to accumulate, making the outer layer portions less susceptible to scraping. Therefore, because the ease of scraping differs between the outer layer portions on the first main surface side and the outer layer portions on the second main surface side, first inclined portions 40 and second inclined portions 42 can be formed on both end faces. Furthermore, first inclined portions 40 and second inclined portions 42 can also be formed on both side faces. Examples of abrasives that can be used include alumina oxide abrasives, zirconia-alumina abrasives, and silicon carbide abrasives.

[0153] Next, after sandblasting, cutting waste adhering to the stacked chips is removed, for example, by blowing air onto the chips.

[0154] Next, the stacked chips with the inclined portions formed thereon are removed from the adhesive tape. At this time, for example, if a foam release sheet is used for the adhesive tape, the multiple stacked chips can be removed all at once by applying heat.

[0155] Next, the laminate 12 having the first inclined portion 40 and the second inclined portion 42 formed thereon is aligned on a workbench, and the first thin film layer 26a and the second thin film layer 26b are formed on the first main surface 12a by sputtering or vapor deposition.

[0156] Next, a first upper plating layer 34a is formed to cover the first thin film layer 26a disposed on a portion of the first main surface 12a of the laminate 12, and a first upper plating layer 36a is formed to cover the first upper plating layer 34a. Similarly, a second upper plating layer 34b is formed to cover the second thin film layer 26b disposed on a portion of the first main surface 12a of the laminate 12, and a second upper plating layer 36b is formed to cover the second upper plating layer 34b. Specifically, the upper plating layer 34 is Ni plated and the upper plating layer 36 is Sn plated, and they are formed by electrolytic plating or electroless plating.

[0157] When forming the base electrode layer 27, a conductive paste that will become the prepared base electrode layer is applied to both end surfaces of the laminate, thereby forming the base electrode layer. The conductive paste can be applied to both end surfaces of the laminate by, for example, dipping or screen printing. The baking temperature at this time is preferably 700°C or higher and 900°C or lower.

[0158] Furthermore, when the plating layer 28 is directly formed, it is formed as follows. That is, a first direct plating layer 28a and a second direct plating layer 28b are formed on the first end face 12e and the second end face 12f of the laminate 12, respectively. Then, the laminate 12 on which the direct plating layer 28 is formed is subjected to a heat treatment to remove residual moisture remaining in the plating film and at the interface between the laminate 12 and the direct plating layer 28. Thereafter, the laminate 12 on which the direct plating layer 28 is formed is aligned on a work table, and the thin film layer 26 is formed on the first main surface 12a by sputtering or vapor deposition. When the plating layer 28 is directly formed on the thin film layer 26, the thin film layer 26 is formed by sputtering or vapor deposition, and then the direct plating layer 28 is formed.

[0159] Next, a first upper plating layer 34a is formed to cover the first thin film layer 26a disposed on a portion of the first main surface 12a of the laminate 12 and the first direct plating layer 28a disposed on the first end face 12e of the laminate 12. Similarly, a second upper plating layer 32b is formed to cover the second thin film layer 26b disposed on a portion of the first main surface 12a of the laminate 12 and the second direct plating layer 28b disposed on the second end face 12f of the laminate 12. The upper plating layer 34 is a Ni plating and is formed by electrolytic plating or electroless plating.

[0160] Then, a first top plating layer 36a is formed to cover the first top plating layer 34a. Similarly, a second top plating layer 36b is formed to cover the second top plating layer 34b. The top plating layer 36 is Sn plated and formed by electrolytic plating or electroless plating.

[0161] In this manner, the multilayer ceramic capacitor 10 according to the first embodiment shown in FIG. 1 is manufactured.

[0162] According to the method for manufacturing a multilayer ceramic capacitor according to this embodiment, it is possible to provide a multilayer ceramic capacitor in which the adhesive strength between the laminate 12 and the external electrodes 24 is improved.

[0163] B. Second Embodiment 1. Multilayer Ceramic Capacitor Next, an example of a multilayer ceramic capacitor 510 according to a second embodiment of the present invention will be described.

[0164] FIG. 15 is an external perspective view showing an example of a multilayer ceramic capacitor according to a second embodiment of the present invention. FIG. 16 is an external perspective view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. FIG. 17 is a front view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. FIG. 18 is a side view showing an example of a multilayer ceramic capacitor according to the second embodiment of the present invention. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 15. FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 15. FIG. 21 is a cross-sectional view taken along line XXI-XXI in FIG. 15. FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 15. FIG. 23(A) is an external perspective view of a laminate of a multilayer ceramic capacitor according to the second embodiment of the present invention, and FIG. 23(B) is an external perspective view of the laminate as viewed from a direction different from that of FIG. 23(A).

[0165] The multilayer ceramic capacitor 510 includes a laminate 512 and external electrodes 524 and 525 .

[0166] (Laminate) The laminate 512 includes a plurality of dielectric layers 514 and a plurality of internal electrode layers 516. The laminate 512 has a first main surface 512a and a second main surface 512b that face each other in a height direction x, a first side surface 512c and a second side surface 512d that face each other in a width direction y that is perpendicular to the height direction x, and a third side surface 512e and a fourth side surface 512f that face each other in a length direction z that is perpendicular to the height direction x and the width direction y. The first main surface 512a and the second main surface 512b extend along the width direction y and the length direction z, respectively. The first side surface 512c and the second side surface 512d extend along the height direction x and the length direction z, respectively. The third side surface 512e and the fourth side surface 512f extend along the height direction x and the width direction y, respectively. Therefore, the height direction x is the direction connecting the first main surface 512a and the second main surface 512b, the width direction y is the direction connecting the first side surface 512c and the second side surface 512d, and the length direction z is the direction connecting the third side surface 512e and the fourth side surface 512f.

[0167] Furthermore, it is preferable that the corners and ridges of the laminate 512 are rounded. Here, a corner is a portion where three surfaces of the laminate 512 intersect, and a ridge is a portion where two surfaces of the laminate 512 intersect.

[0168] It is preferable that the first main surface 512a and / or the second main surface 512b is flat. If the first main surface 512a and / or the second main surface 512b is flat, the stress applied by the nozzle picking up the multilayer ceramic capacitor 510 can be dispersed across the flat surface, thereby improving the strength of the multilayer ceramic capacitor 510 during mounting. In the multilayer ceramic capacitor 510 according to this embodiment, the second main surface 512b is formed flat.

[0169] As shown in Figures 18 to 21, the laminate 512 has, in the height direction x connecting the first main surface 512a and the second main surface 512b, an inner layer portion 515a in which multiple internal electrode layers 516 face each other, a first main surface side outer layer portion 515b1 formed from multiple dielectric layers 514 located between the first main surface 512a and the internal electrode layer 516 located closest to the first main surface 512a, and a second main surface side outer layer portion 515b2 formed from multiple dielectric layers 514 located between the second main surface 512b and the internal electrode layer 516 located closest to the second main surface 512b.

[0170] The first main surface side outer layer portion 515b1 and the second main surface side outer layer portion 515b2 may be integrated after baking and may not be distinguishable from one another, but are an aggregate of a plurality of outer dielectric layers.

[0171] The first main surface side outer layer portion 515b1 is located on the first main surface 512a side of the laminate 512, and is a collection of multiple external dielectric layers located between the first main surface 512a and the internal electrode layer 516 closest to the first main surface 512a.

[0172] The second main surface side outer layer portion 515b2 is located on the second main surface 512b side of the laminate 512, and is a collection of multiple external dielectric layers located between the second main surface 512b and the internal electrode layer 516 closest to the second main surface 512b.

[0173] The region sandwiched between the first outer layer portion 515b1 and the second outer layer portion 515b2 is the inner layer portion 515a. The inner layer portion 515a has a first internal electrode layer 516a, a second internal electrode layer 16b, and a dielectric layer 514.

[0174] The dielectric layer 514 may be formed from, for example, a dielectric material. Examples of the dielectric material include dielectric ceramics whose main components are BaTiO3, CaTiO3, SrTiO3, and CaZrO3. Depending on the desired properties of the laminate, a material containing a minor component such as a manganese compound, an iron compound, a chromium compound, a cobalt compound, or a nickel compound in a smaller amount than the main component may be used.

[0175] The outer dielectric layer may have a plurality of crystal grains containing a perovskite-type compound having, for example, BaTiO3 as a basic structure. For example, a dielectric ceramic composed mainly of BaTiO3, CaTiO3, SrTiO3, CaZrO3, or the like may be used. Substitutive components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds may also be added to these main components. Furthermore, the dielectric layer 514 and the outer dielectric layer may be made of different materials depending on the desired functions. For example, a soft outer dielectric layer can buffer stress on the laminate, while a hard outer dielectric layer can suppress the occurrence of cracks.

[0176] The first side surface 512c and the second side surface 512d have inclined surfaces that are inclined so as to widen from the first main surface 512a toward the second main surface 512b. The third side surface 512e and the fourth side surface 512f have inclined surfaces that are inclined so as to widen from the first main surface 512a toward the second main surface 512b. In this way, the laminate 512 has inclined surfaces in which any two of the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f are inclined so as to widen from the first main surface 512a toward the second main surface 512b.

[0177] In other words, the length of the first main surface 512a in the longitudinal direction z of the laminate 512 is shorter than the length of the second main surface 512b in the longitudinal direction z. Therefore, as shown in Fig. 17, the laminate 512 has a substantially trapezoidal shape in side view. Furthermore, the length of the first main surface 512a in the width direction y of the laminate 512 is shorter than the length of the second main surface 512b in the width direction y. Therefore, as shown in Fig. 18, the laminate 512 has a substantially trapezoidal shape in end view.

[0178] Therefore, when the length in the longitudinal direction z of the first main surface 512a of the laminate 512 is shorter than the length in the longitudinal direction z of the second main surface 512b, and when the length in the width direction y of the first main surface 512a of the laminate 512 is shorter than the length in the width direction y of the second main surface 512b, as shown in Figure 23, the condition A < B is satisfied in the stacking direction of the laminate 512, where A is the area of ​​the first main surface 512a and B is the area of ​​the second main surface 512b.

[0179] The laminate 512 has a first inclined portion 540 and a second inclined portion 542 on an inclined surface that is inclined from the first main surface 512a toward the second main surface 512b.

[0180] The first inclined portion 540 has a first inclined portion 5401 formed on the first side surface 512c and the second side surface 512d toward the first main surface 512a, and a first inclined portion 5402 formed on the third side surface 512e and the fourth side surface 512f toward the first main surface 512a.

[0181] The second inclined portion 542 has a second inclined portion 5421 formed on the first side surface 512c and the second side surface 512d toward the second main surface 512b, and a second inclined portion 5422 formed on the third side surface 512e and the fourth side surface 512f toward the second main surface 512b.

[0182] The first inclined portion 540 and the second inclined portion 542 are formed continuously. This improves the adhesion between the laminate 512 and the external electrode 524 and the external electrode 525, compared to when the first inclined portion 540 and the second inclined portion 542 are formed discontinuously. Similarly, the first inclined portion 540 and the second inclined portion 542 are formed continuously.

[0183] The first inclined portion 540 1 and the second inclined portion 542 1 may be formed discontinuously, and the first inclined portion 540 2 and the second inclined portion 542 2 may be formed discontinuously.

[0184] The inclination angle θ of the first inclined portion 5401 with a line l3 parallel to the length direction z is different from the inclination angle θ of the second inclined portion 5421 with a line l4 parallel to the length direction z. As a result, when the first main surface 512a is mounted as the mounting surface, the stress near the intersection of the second main surface 512b and the first side surface 512c and the stress near the intersection of the second main surface 512b and the second side surface 512d, which are locations where the external electrodes 524 and 525 are likely to peel off from the laminate 512, can be dispersed to the vicinity of the inclined portions, thereby obtaining the effect of suppressing peeling of the external electrodes 524, 525.

[0185] The inclination angle θ4 between the second inclined portion 5421 and a straight line l4 parallel to the longitudinal direction z is preferably larger than the inclination angle θ3 between the first inclined portion 5401 and a straight line l3 parallel to the longitudinal direction z.

[0186] The inclination angle θ between the first inclined portion 540 and the straight line l parallel to the longitudinal direction z is preferably 30° or more and 85° or less. If the inclination angle θ is less than 30°, it becomes difficult to create an angle difference between the inclination angle θ of the first inclined portion 540 and the inclination angle θ of the second inclined portion 542. On the other hand, if the angle θ is greater than 85°, it becomes difficult to obtain the effect of suppressing peeling.

[0187] The inclination angle θ between the second inclined portion 542 and the line l parallel to the longitudinal direction z is preferably at least 5° larger than the inclination angle θ between the first inclined portion 540 and the line l parallel to the longitudinal direction z. By making the second inclined portion 542 larger than the first inclined portion 540, the chip distance in the longitudinal direction z is shortened, and the force acting on the electrode end due to the leverage principle caused by the stress during solder contraction can be weakened. If the difference between the inclination angle θ between the second inclined portion 542 and the line parallel to the longitudinal direction z and the inclination angle θ between the first inclined portion 540 and the line parallel to the longitudinal direction z is less than 5°, it becomes difficult to achieve the effect of suppressing peeling.

[0188] The inclination angle θ 5 between the first inclined portion 540 2 and a line l 5 parallel to the longitudinal direction z is different from the inclination angle θ 6 between the second inclined portion 542 2 and a line l 6 parallel to the longitudinal direction z.

[0189] The inclination angle θ6 between the second inclined portion 5422 and a line l6 parallel to the longitudinal direction z is preferably larger than the inclination angle θ5 between the first inclined portion 5402 and a line l5 parallel to the longitudinal direction z.

[0190] The inclination angle θ between the first inclined portion 540 and a straight line l parallel to the longitudinal direction z is preferably 30° or more and 85° or less. If the inclination angle θ is less than 30°, it becomes difficult to create an angle difference between the inclination angle θ of the first inclined portion 540 and the inclination angle θ of the second inclined portion 542. On the other hand, if the inclination angle θ is greater than 85°, the peeling suppression effect cannot be obtained.

[0191] The inclination angle θ between the second inclined portion 542 and the line l parallel to the longitudinal direction z is preferably at least 5° larger than the inclination angle θ between the first inclined portion 540 and the line l parallel to the longitudinal direction z. By making the second inclined portion 542 larger than the first inclined portion 540, the chip distance in the longitudinal direction z is shortened, and the force acting on the electrode end due to the leverage principle caused by the stress during solder contraction can be weakened. If the difference between the inclination angle θ between the second inclined portion 542 and the line parallel to the longitudinal direction z and the inclination angle θ between the first inclined portion 540 and the line parallel to the longitudinal direction z is less than 5°, it becomes difficult to achieve the effect of suppressing peeling.

[0192] The internal electrode layer 516 may be exposed at the first inclined portion 540. When the internal electrode layer 516 is exposed at the first inclined portion 540, metals of the internal electrode layer 516 and the external electrode 524 and external electrode 525 are closely adhered to each other, and the adhesive strength between the laminate 512 and the external electrode 524 and external electrode 525 can be improved.

[0193] The internal electrode layer 516 may be exposed at the second inclined portion 542. When the internal electrode layer 516 is exposed at the second inclined portion 542, metals of the internal electrode layer 516 and the external electrode 524 and external electrode 525 are closely adhered to each other, and the adhesive strength between the laminate 512 and the external electrode 524 and external electrode 525 can be improved.

[0194] The internal electrode layer 516 may be exposed at the first inclined portion 5402. When the internal electrode layer 516 is exposed at the first inclined portion 5402, metals of the internal electrode layer 516 and the external electrode 524 and external electrode 525 are closely adhered to each other, and the adhesive strength between the laminate 512 and the external electrode 524 and external electrode 525 can be improved.

[0195] The internal electrode layer 516 may be exposed at the second inclined portion 542. When the internal electrode layer 516 is exposed at the second inclined portion 542, metals of the internal electrode layer 516 and the external electrode 524 and external electrode 525 are closely adhered to each other, and the adhesive strength between the laminate 512 and the external electrode 524 and external electrode 525 can be improved.

[0196] The number of dielectric layers 514 to be laminated is not particularly limited, but preferably the total number of layers including inner layer portion 515a, first main surface side outer layer portion 515b1, and second main surface side outer layer portion 515b2 is 3 to 700. Furthermore, it is preferable that inner layer portion 515a has a thickness of 0.4 μm to 2.0 μm, and that each of first main surface side outer layer portion 515b1 and second main surface side outer layer portion 515b2 has a thickness of 2.0 μm to 10.0 μm.

[0197] The dielectric layer 514 may be formed, for example, from a dielectric material. The dielectric material may have a plurality of crystal grains containing a perovskite-type compound having a basic structure of BaTiO3. Specific examples of the material for the dielectric layer 514 include dielectric ceramics composed mainly of CaTiO3, SrTiO3, or CaZrO3, in addition to BaTiO3. Depending on the desired properties of the laminate, a material containing a minor component such as a manganese compound, an iron compound, a chromium compound, a cobalt compound, or a nickel compound in a smaller amount than the major component may also be used.

[0198] 18 to 21, the internal electrode layers 516 include a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a and the second internal electrode layers 516b are alternately stacked with the dielectric layers 514 interposed therebetween.

[0199] The first internal electrode layer 516a is disposed on the surface of the dielectric layer 514. The first internal electrode layer 516a faces the first main surface 512a and the second main surface 512b, has a first opposing electrode portion 518a facing the second internal electrode layer 516b, and is laminated in the direction connecting the first main surface 512a and the second main surface 512b.

[0200] The second internal electrode layer 516b is disposed on a surface of a dielectric layer 514 different from the surface of the dielectric layer 514 on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b opposing the first main surface 512a and the second main surface 512b, and is laminated in the direction connecting the first main surface 512a and the second main surface 512b.

[0201] 18 to 21 , the first internal electrode layer 516a is extended by a first extension electrode portion 520a to the first side surface 512c and the third side surface 512e of the laminate 512, and is extended by a second extension electrode portion 520b to the second side surface 512d and the fourth side surface 512f of the laminate 512. Note that the width of the first extension electrode portion 520a extended to the first side surface 512c may be approximately equal to the width of the first extension electrode portion 520a extended to the third side surface 512e, and the width of the second extension electrode portion 520b extended to the second side surface 512d may be approximately equal to the width of the second extension electrode portion 520b extended to the fourth side surface 512f.

[0202] That is, the first extraction electrode portion 520 a is extracted to the third side surface 512 e side of the laminate 512 , and the second extraction electrode portion 520 b is extracted to the fourth side surface 512 f side of the laminate 512 .

[0203] The second internal electrode layer 516b is extended by a third extension electrode portion 521a to the first side surface 512c and the fourth side surface 512f of the laminate 512, and is extended by a fourth extension electrode portion 521b to the second side surface 512d and the third side surface 512e of the laminate 512. The width of the third extension electrode portion 521a extended to the first side surface 512c may be approximately equal to the width of the third extension electrode portion 521a extended to the fourth side surface 512f, and the width of the fourth extension electrode portion 521b extended to the second side surface 512d may be approximately equal to the width of the fourth extension electrode portion 521b extended to the third side surface 512e.

[0204] That is, the third extraction electrode portion 521 a is extracted to the fourth side surface 512 f side of the laminate 512 , and the fourth extraction electrode portion 521 b is extracted to the third side surface 512 e side of the laminate 512 .

[0205] Furthermore, when the multilayer ceramic capacitor 510 is viewed from the stacking direction, it is preferable that a straight line connecting the first extraction electrode portion 520a and the second extraction electrode portion 520b of the first internal electrode layer 516a intersects with a straight line connecting the third extraction electrode portion 521a and the fourth extraction electrode portion 521b of the second internal electrode layer 516b.

[0206] Furthermore, on the first side surface 512c, the second side surface 512d, the third side surface 512e and the fourth side surface 512f of the laminate 512, it is preferable that the first extraction electrode portion 520a of the first internal electrode layer 516a and the fourth extraction electrode portion 521b of the second internal electrode layer 516b are extracted to opposing positions, and that the second extraction electrode portion 520b of the first internal electrode layer 516a and the third extraction electrode portion 521a of the second internal electrode layer 516b are extracted to opposing positions.

[0207] As shown in Figures 18 and 19, the laminate 512 also includes side portions (W gaps) 522a of the laminate 512 formed between one end in the width direction y of the first opposing electrode portion 518a and the first side surface 512c, and between the other end in the width direction y of the second opposing electrode portion 518b and the second side surface 512d.

[0208] Furthermore, as shown in Figures 20 and 21, the laminate 512 includes side portions (L gaps) 522b of the laminate 512 formed between one end in the longitudinal direction z of the first opposing electrode portion 518a and the third side surface 512e, and between the other end in the longitudinal direction z of the second opposing electrode portion 518b and the fourth side surface 512f.

[0209] The internal electrode layer 516 can be made of an appropriate conductive material, such as, for example, metals such as Ni, Cu, Ag, Pd, Au, or alloys containing at least one of these metals, such as Ag-Pd alloys, but is not limited to these.

[0210] Furthermore, by including Sn in the first internal electrode layer 516a and the second internal electrode layer 516b, it is possible to alleviate electric field concentration at the interface between the internal electrode layer 16 and the dielectric layer 14, leading to improvement in high-temperature load reliability. In this case, even if Sn is included in only one of the first internal electrode layer 16a and the second internal electrode layer 16b, it can be sufficiently effective.

[0211] In this embodiment, the first opposing electrode portion 518a of the first internal electrode layer 516a and the second opposing electrode portion 518b of the second internal electrode layer 516b face each other via the dielectric layer 514, thereby forming capacitance and exhibiting the characteristics of a capacitor.

[0212] In order to increase the capacitance of the capacitor, the area of ​​the internal electrode layer 516 needs to be large, so the LW surface coverage of the internal electrode layer 516 is preferably 90% or more. The LW surface coverage is defined as the ratio of the area inside the edge of the internal electrode layer 516 when viewed from the LW surface of the laminate 512 minus the area of ​​the voids. The higher the LW surface coverage, the higher the capacitance of the capacitor. However, even if the LW surface coverage is low, the dielectric layers 514 are bonded to each other via voids, so the bonding strength between the layers is high and delamination can be suppressed.

[0213] (External Electrodes) As shown in FIGS. 14 to 21, external electrodes 524 and 525 are disposed on the laminate 512.

[0214] The external electrode 524 includes a thin film layer 526 and a plating layer 530 formed to cover the thin film layer 526 .

[0215] The external electrode 525 includes a thin film layer 527 and a plating layer 531 formed to cover the thin film layer 527 .

[0216] The external electrode 524 includes a first external electrode 524a and a second external electrode 524b.

[0217] The first external electrode 524a is disposed so as to cover the first lead electrode portion 520a on the first side surface 512c and the third side surface 512e, and is disposed so as to cover a part of the first main surface 512a. The first external electrode 524a is electrically connected to the first lead electrode portion 520a of the first internal electrode layer 516a.

[0218] The second external electrode 524b is disposed so as to cover the second lead electrode portion 520b on the second side surface 512d and the fourth side surface 512f, and is disposed so as to cover a part of the first main surface 512a. The second external electrode 524b is electrically connected to the second lead electrode portion 520b of the first internal electrode layer 516a.

[0219] The external electrode 525 includes a third external electrode 525a and a fourth external electrode 525b.

[0220] The third external electrode 525a is disposed so as to cover the third lead electrode portion 521a on the first side surface 512c and the fourth side surface 512f, and is disposed so as to cover a part of the first main surface 512a. The third external electrode 525a is electrically connected to the third lead electrode portion 521a of the second internal electrode layer 516b.

[0221] The fourth external electrode 525b is disposed so as to cover the fourth lead electrode portion 521b on the second side surface 512d and the third side surface 512e, and is disposed so as to cover a part of the first main surface 512a. The fourth external electrode 525b is electrically connected to the fourth lead electrode portion 521b of the second internal electrode layer 516b.

[0222] In the laminate 512, a capacitance is formed by the first opposing electrode portion 518a of the first internal electrode layer 516a and the second opposing electrode portion 518b of the second internal electrode layer 516b opposing each other via the dielectric layer 514. Therefore, a capacitance can be obtained between the first external electrode 524a and the second external electrode 524b to which the first internal electrode layer 516a is connected and the third external electrode 525a and the fourth external electrode 525b to which the second internal electrode layer 516b is connected, thereby exhibiting the characteristics of a capacitor.

[0223] (Thin Film Layer) The thin film layer 526 has a first thin film layer 526a and a second thin film layer 526b.

[0224] The thin film layer 527 includes a third thin film layer 527a and a fourth thin film layer 527b.

[0225] The first thin film layer 526a is arranged so as to cover a portion of the first main surface 512a of the laminate 512 on the first side surface 512c side and the third side surface 512e side, and not to cover the first side surface 512c and the third side surface 512e of the laminate 12.

[0226] The second thin film layer 526b is arranged so as to cover a portion of the first main surface 512a of the laminate 512 on the second side surface 512d side and the fourth side surface 512f side, but not cover the second side surface 512d and the fourth side surface 512f.

[0227] The third thin film layer 527a is arranged so as to cover a portion of the first main surface 512a of the laminate 512 on the first side surface 512c side and the fourth side surface 512f side, but not to cover the first side surface 512c and the fourth side surface 512f.

[0228] The fourth thin film layer 527b is arranged so as to cover a portion of the first main surface 512a of the laminate 512 on the third side surface 512e side and the second side surface 512d side, but not cover the third side surface 512e and the second side surface 512d.

[0229] Each of the first to fourth thin film layers 526 a to 527 b is preferably formed by depositing metal particles by sputtering, vapor deposition, etc. This allows the thickness of the first to fourth thin film layers 526 a to 527 b in the direction connecting the first main surface 512 a and the second main surface 512 b of the laminate 512 to be 1 μm or less, and the dimension of the multilayer ceramic capacitor 510 in the height direction x can be sufficiently reduced, thereby making it possible to reduce the height of the multilayer ceramic capacitor 510.

[0230] The dimensions of the first to fourth thin film layers 526a to 527b in the height direction x can be measured as follows. That is, when the thin film layers are formed by depositing metal particles, a fluorescent X-ray device can be used to convert the thickness from the concentration of a predetermined element using a calibration curve method for the relevant metal species. Alternatively, a cross section of the component can be observed using an FIB with a scanning microscope, and the thickness can be measured from the actual observation image.

[0231] Furthermore, when the first to fourth thin film layers 526a to 527b are formed by a thin film formation method, these thin film layers can be made of a metal such as Cu, Cr, Au, Pt, Ag, Sn, Ti, or Ni.

[0232] The first to fourth thin film layers 526a to 527b can be configured taking into consideration their respective functions. For example, they can be made of NiCr or the like in consideration of adhesion to the laminate 512. For example, it is preferable that the first to fourth thin film layers 526a to 527b be made of NiCr or NiCu as the main component in consideration of adhesion to the laminate 12. Furthermore, the first to fourth thin film layers 526a to 527b may be multiple layers or may have a two-layer structure of NiCr and NiCu.

[0233] The thin film layers 526, 527 may be formed by screen printing, CVD, ALD, or the like, and contain a dielectric material and a metal component. This allows the thin film layers 26 to bond to the ceramic of the laminate 12, thereby improving the bonding strength between the laminate and the external electrodes. In this case, the thin film layers 526, 527 may have a discontinuous shape. "Discontinuous" means that the thin film layers 526, 527 are formed discontinuously when viewed perpendicular to the longitudinal direction.

[0234] For example, when the thin film layers 526, 527 are formed using a material containing ceramic, one method is to polish the cross section, then take a cross section photograph using a digital microscope (Keyence Corporation: VHX-5000), and use the cross section photograph to calculate the thickness, etc. Another method is to measure the thickness, etc. from the actual observation image of the cross section of the part taken by FIB using a scanning microscope.

[0235] Furthermore, when each of the first to fourth thin film layers 526a to 527b contains the same main component as the dielectric layer 514, the adhesion can be further improved by simultaneously firing the laminate 512 and each of the first to fourth thin film layers. In this case, the metal component is preferably Ni, Cu, or the like, but can be changed as appropriate depending on the metal component of the internal electrode layer 516.

[0236] (Plating Layer) The plating layer 530 includes a first plating layer 530a and a second plating layer 530b.

[0237] The first plating layer 530 a is disposed so as to cover the first thin film layer 526 a and the first and third side surfaces 512 c and 512 e of the laminate 512 .

[0238] The second plating layer 530 b is disposed so as to cover the second thin film layer 526 b and the second and fourth side surfaces 512 d and 512 f of the laminate 512 .

[0239] The plating layer 531 includes a third plating layer 531a and a fourth plating layer 531b.

[0240] The third plating layer 531 a is disposed so as to cover the third thin film layer 527 a and the first and fourth side surfaces 512 c and 512 f of the laminate 512 .

[0241] The fourth plating layer 531 b is disposed so as to cover the fourth thin film layer 527 b and the second and third side surfaces 512 d and 512 e of the laminate 512 .

[0242] Each of the plating layers 530 and 531 is formed of multiple layers. That is, the plating layer 530 has an upper plating layer 534 and a top plating layer 536. The plating layer 531 has an upper plating layer 535 and a top plating layer 537.

[0243] The upper plating layer 534 includes a first upper plating layer 534a included in the first plating layer 530a and a second upper plating layer 534b included in the second plating layer 530b. The upper plating layer 536 includes a first upper plating layer 536a included in the first plating layer 530a and a second upper plating layer 536b included in the second plating layer 530b.

[0244] The upper plating layer 535 includes a third upper plating layer 535a included in the third plating layer 531a and a fourth upper plating layer 535b included in the fourth plating layer 531b. The top plating layer 537 includes a third top plating layer 537a included in the third plating layer 531a and a fourth top plating layer 537b included in the fourth plating layer 531b.

[0245] The first upper plating layer 534a of the upper plating layer 534 is disposed so as to cover the first thin film layer 526a.

[0246] The second upper plating layer 534b of the upper plating layer 534 is disposed so as to cover the second thin film layer 526b.

[0247] The third upper plating layer 535a of the upper plating layer 535 is disposed so as to cover the third thin film layer 527a.

[0248] The fourth upper plating layer 535b of the upper plating layer 535 is disposed so as to cover the fourth thin film layer 527b.

[0249] The upper plated layers 534 and 535 are preferably Ni-plated to prevent solder leaching.

[0250] The first surface plating layer 536 a of the surface plating layer 536 is disposed so as to cover the first upper plating layer 534 a of the upper plating layer 534 .

[0251] The second top plating layer 536 b of the top plating layer 536 is arranged to cover the second top plating layer 534 b 8 of the top plating layer 534 .

[0252] The third top plating layer 537 a of the top plating layer 537 is disposed so as to cover the third top plating layer 535 a of the top plating layer 535 .

[0253] The fourth top plating layer 537 b of the top plating layer 537 is disposed so as to cover the fourth top plating layer 535 b of the top plating layer 535 .

[0254] The front plated layers 536 and 537 are preferably Sn plated, which has good bonding properties with the solder used when mounting the multilayer ceramic capacitor 510. The front plated layers 536 and 537 may also be Cu plated, which can improve bonding properties with vias formed when the multilayer ceramic capacitor 510 is embedded in a mounting substrate.

[0255] The plating layer 530 may be composed of only the surface plating layer 536. In this case, the first surface plating layer 536a of the surface plating layer 536 is disposed so as to cover the first thin film layer 526a, and the second surface plating layer 536b of the surface plating layer 536 is disposed so as to cover the second thin film layer 526b. Similarly, the plating layer 531 may be composed of only the surface plating layer 537. In this case, the third surface plating layer 537a of the surface plating layer 537 is disposed so as to cover the third thin film layer 527a, and the fourth surface plating layer 537b of the surface plating layer 537 is disposed so as to cover the fourth thin film layer 527b.

[0256] The metal content per unit volume of plating layer 530 and plating layer 531 is preferably 99% by volume or more.

[0257] The thickness of each of the plating layers 530 and 531 is preferably 1.0 μm or more and 10.0 μm or less.

[0258] The dimension in the length direction z of the multilayer ceramic capacitor 510 including the laminate 512, the external electrodes 524, and the external electrodes 525 is defined as dimension L, the dimension in the height direction x of the multilayer ceramic capacitor 510 including the laminate 512, the external electrodes 524, and the external electrodes 525 is defined as dimension T, and the dimension in the width direction y of the multilayer ceramic capacitor 510 including the laminate 512, the external electrodes 524, and the external electrodes 525 is defined as dimension W. The dimensions of the multilayer ceramic capacitor 510 are preferably such that the L dimension in the length direction z is 0.1 mm to 1.6 mm, the T dimension in the height direction x is 10 μm to 100 μm, and the W dimension in the width direction y is 0.1 mm to 1.6 mm. The dimensions of the multilayer ceramic capacitor 510 preferably satisfy the relationship 7 / 10≦L / W≦10 / 7. This results in the laminate 512 having a substantially tetragonal shape, thereby improving the flexibility of mounting.

[0259] In this embodiment, the effects of the present invention can be effectively achieved when the dimension T in the height direction x of the multilayer ceramic capacitor 510 is 100 μm or less, and are even more effective when it is 55 μm or less, or 50 μm or less.

[0260] In the multilayer ceramic capacitor 510 shown in FIG. 14 , the external electrode 524 has a first thin film layer 528 a arranged on the first main surface 512 a and the second main surface 512 b of the laminate 512, and a second thin film layer 528 b arranged on the first main surface 512 a and the second main surface 512 b of the laminate 512.

[0261] Furthermore, in the multilayer ceramic capacitor 510, the external electrode 525 has a third thin film layer 529a arranged on the first main surface 512a and the second main surface 512b of the laminate 512, and a fourth thin film layer 529b arranged on the first main surface 512a and the second main surface 512b of the laminate 512.

[0262] Furthermore, in the multilayer ceramic capacitor 510, the electrical connection between the external electrode 524 and the internal electrode layer 516 is made not through each of the first thin film layer 528a to the fourth thin film layer 529b, but through the plating layers 530, 531 arranged on the first side surface 512c to the fourth side surface 512f.

[0263] The shapes of the external electrodes 524, 525 may follow the outer shape of the laminate 512. In other words, when the first convex portion 540a and the second convex portion 540b are formed, the external electrodes 524, 525 may also have irregularities, similar to the shapes of the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f of the laminate 512.

[0264] The multilayer ceramic capacitor 510 according to the second embodiment shown in FIG. 14 has the same effects as the multilayer ceramic capacitor 10 .

[0265] The multilayer ceramic capacitor 510 according to the second embodiment of the present invention may also be combined with all or part of the first to fourth modified examples of the multilayer ceramic capacitor 10 according to the first embodiment, and with other modified examples shown in the respective drawings.

[0266] 2. Method for Manufacturing a Multilayer Ceramic Capacitor A method for manufacturing a multilayer ceramic capacitor, which is an example of a multilayer ceramic capacitor according to the second embodiment, will now be described.

[0267] First, a dielectric sheet and a conductive paste for the internal electrodes are prepared. The dielectric sheet and the conductive paste for the internal electrode layers contain a binder (for example, a known organic binder) and a solvent (for example, a known organic binder).

[0268] Next, a conductive paste for the internal electrodes is printed in a predetermined pattern on the dielectric sheet by, for example, screen printing or gravure printing, to form an internal electrode pattern. Specifically, a conductive paste layer is formed by applying a paste made of a conductive material to the dielectric sheet by a method such as the printing method described above. The conductive paste is, for example, a paste made of a metal powder to which an organic binder and an organic solvent have been added. Regarding the dielectric sheets, outer layer dielectric sheets on which no internal electrode patterns are printed are also produced.

[0269] As a result, a dielectric sheet on which an internal electrode pattern corresponding to the first internal electrode layer 516a is formed and a dielectric sheet on which an internal electrode pattern corresponding to the second internal electrode layer 516b is formed are prepared.

[0270] More specifically, a screen plate for printing the first internal electrode layer 516a and a screen plate for printing the second internal electrode layer 516b are prepared separately, and the internal electrode layers of the present invention can be printed using a printer that can print the two types of screen plates separately.

[0271] A laminate sheet is produced using these dielectric sheets on which internal electrode patterns are formed. That is, a predetermined number of dielectric sheets for outer layers on which no internal electrode patterns are formed are stacked to form a portion that will become the first main surface side outer layer portion 515b1 on the first main surface 512a side. On top of that, dielectric sheets on which internal electrode patterns corresponding to the first internal electrode layer 516a are formed and dielectric sheets on which internal electrode patterns corresponding to the second internal electrode layer 516b are formed are alternately stacked to form a portion that will become the internal layer portion 515a, and further on top of that, a predetermined number of dielectric sheets for outer layers on which no internal electrode patterns are formed are stacked to form a portion that will become the second main surface side outer layer portion 515b2. In this way, the laminate sheet is produced.

[0272] Furthermore, the laminated sheets are pressed in the lamination direction by means of a hydrostatic press or the like to produce a laminated block.

[0273] The laminated block is then cut to a predetermined size to cut out laminated chips, which may then be wet-barreled to round the corners and ridges of the laminated chips.

[0274] A tapered shape is created for the laminated chip. When cutting the laminated block into chip shapes, a dicer cut is performed using a tapered blade to create an angled end face shape. The taper angle is, for example, between 10° and 80°, with a blade without a taper being 0°. Since the blade taper and the angle of the end face of the cut chip do not necessarily correspond, the taper angle is fine-tuned to the desired angle. This causes all side surfaces to slope upward and widen from the first main surface toward the second main surface. As a result, the internal electrode patterns exposed from all side surfaces can be seen from the first main surface.

[0275] Next, the laminated chip is fired to produce laminate 512. The firing temperature depends on the ceramic and internal electrode materials, but is preferably 900° C. or higher and 1400° C. or lower.

[0276] Next, the fired laminated chips are aligned on an adhesive tape so that the first main surface faces upward. For example, when the first main surface faces upward, the internal electrode layers 516 can be seen from all sides, so that the chips are sorted by appearance and aligned in direction.

[0277] The abrasive is sandblasted at an angle perpendicular to the first main surface and polished. During this process, the outer layer portions near the first main surface on all side surfaces are easily scraped. However, the outer layer portions near the second main surface on all side surfaces are less susceptible to scraping because the internal electrode layers 516 exposed from all side surfaces form an umbrella. Furthermore, scraping debris from the sandblasting tends to accumulate, making the outer layer portions less susceptible to scraping. Therefore, the ease of scraping differs between the outer layer portions on the first main surface side and the outer layer portions on the second main surface side, allowing the formation of first and second inclined portions 540 and 542 on all side surfaces. Examples of abrasives that can be used include alumina oxide abrasives, zirconia-alumina abrasives, and silicon carbide enamel.

[0278] After sandblasting, cutting waste adhering to the stacked chips is removed, for example, by blowing air onto the chips.

[0279] Next, the stacked chips with the convex portions formed thereon are removed from the adhesive tape. At this time, for example, if a foam release sheet is used for the adhesive tape, the multiple stacked chips can be removed all at once by applying heat.

[0280] Next, the laminate 512 on which the first convex portion 540a and the second convex portion 540b are formed is aligned on a work table, and the thin film layer 526 and the thin film layer 527 are formed on the first main surface 512a by sputtering.

[0281] Next, upper plating layer 534 and upper plating layer 535, and surface plating layer 536 and surface plating layer 537 are formed in sequence.

[0282] That is, a first upper plating layer 534a of the upper plating layer 534 is formed to cover the first thin film layer 526a arranged on a portion of the first main surface 512a of the laminate 512, and a first upper plating layer 536a of the upper plating layer 536 is formed to cover the first upper plating layer 534a.

[0283] A second upper plating layer 534b of the upper plating layer 534 is formed to cover the second thin film layer 526b arranged on a portion of the first main surface 512a of the laminate 512, and a second upper plating layer 536b of the upper plating layer 536 is formed to cover the second upper plating layer 534b.

[0284] A third upper plating layer 535a of the upper plating layer 535 is formed to cover the third thin film layer 527a arranged on a portion of the first main surface 512a of the laminate 512, and a third upper plating layer 537a of the upper plating layer 537 is formed to cover the third upper plating layer 535a.

[0285] A fourth upper plating layer 535b of the upper plating layer 535 is formed to cover the fourth thin film layer 527b arranged on a portion of the first main surface 512a of the laminate 512, and a fourth upper plating layer 537b of the upper plating layer 537 is formed to cover the fourth upper plating layer 535b.

[0286] Specifically, the upper plating layers 534 and 535 are Ni-plated, and the top plating layers 536 and 537 are Sn-plated, and are formed by electrolytic plating or electroless plating.

[0287] In this manner, the multilayer ceramic capacitor 510 according to the second embodiment shown in FIG. 14 is manufactured.

[0288] According to the method for manufacturing a multilayer ceramic capacitor according to this embodiment, it is possible to reduce the thickness of the dimension T in the height direction x of the external electrodes 524 and 525 formed on the first main surface 512 a and the second main surface 512 b, and therefore it is possible to provide a multilayer ceramic capacitor with a reduced height without impairing mountability during mounting.

[0289] C. Third Embodiment 1. Multilayer Ceramic Capacitor Next, an example of a multilayer ceramic capacitor 610 according to a third embodiment of the present invention will be described.

[0290] Fig. 24 is an external perspective view showing an example of a multilayer ceramic capacitor according to a third embodiment of the present invention. Fig. 25 is a cross-sectional view taken along line XXV-XXV in Fig. 24, illustrating the structure of an example of the multilayer ceramic capacitor according to the third embodiment of the present invention. Fig. 26 is a cross-sectional view taken along line XXVI-XXVI in Fig. 24, illustrating the structure of an example of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0291] The multilayer ceramic capacitor 610 according to the third embodiment of the present invention has a laminate 12 and external electrodes 24 having the same configuration as the multilayer ceramic capacitor 10 according to the first embodiment. However, in the multilayer ceramic capacitor 610, the magnitude relationship between the L dimension and the W dimension is reversed compared to the multilayer ceramic capacitor 10 according to the first embodiment, with the W dimension being larger than the L dimension.

[0292] The multilayer ceramic capacitor 610 shown in FIG. 24 having the above-described configuration exhibits the same effects as the multilayer ceramic capacitor 10 of the first embodiment.

[0293] In the multilayer ceramic capacitor according to the third embodiment of the present invention, the external electrodes 24 of the multilayer ceramic capacitor 610 are preferably all or part of the first to fourth modified examples similar to the external electrodes 24 of the first to fourth modified examples of the multilayer ceramic capacitor 10 according to the first embodiment, or a combination of all or part of them.

[0294] 2. Method for Manufacturing the Multilayer Ceramic Capacitor A method for manufacturing the multilayer ceramic capacitor, which is an example of the multilayer ceramic capacitor according to the third embodiment, will now be described.

[0295] The method for manufacturing the multilayer ceramic capacitor according to the third embodiment is the same as the method for manufacturing the multilayer ceramic capacitor according to the first embodiment, except that the L dimension and the W dimension are interchanged with respect to the multilayer ceramic capacitor 10 according to the first embodiment.

[0296] In this manner, the multilayer ceramic capacitor 610 according to the third embodiment shown in FIG. 24 can be manufactured.

[0297] According to the manufacturing method of the multilayer ceramic capacitor according to the present embodiment described above, it is possible to reduce the thickness of the external electrodes 24 formed on the first main surface 12 a, that is, the dimension T in the height direction x, and therefore it is possible to provide a multilayer ceramic capacitor with a lower height.

[0298] As described above, the embodiment of the present invention has been disclosed in the above description, but the present invention is not limited to this.

[0299] In other words, various modifications can be made to the above-described embodiments and variants in terms of mechanism, shape, material, quantity, position, arrangement, etc., without departing from the scope of the technical idea and purpose of the present invention, and these modifications are included in the present invention.

[0300] <1> A multilayer ceramic capacitor comprising: a laminate including a plurality of dielectric layers stacked one on top of the other; and a plurality of internal electrode layers stacked on the dielectric layers, the laminate having first and second main surfaces opposing each other in a stacking direction of the plurality of dielectric layers, first and second side surfaces opposing each other in a width direction perpendicular to the stacking direction, and first end surfaces opposing each other in a length direction perpendicular to the stacking direction and the width direction; a first external electrode arranged on the first main surface and the first end surface of the laminate; and a second external electrode arranged on the first main surface and the second end surface of the laminate, wherein the first end surface and the second end surface have inclined surfaces that widen from the first main surface toward the second main surface, the inclined surfaces having a first inclined portion arranged on the first main surface side and a second inclined portion arranged on the second main surface side, and an inclination angle of the first inclined portion with respect to the length direction different from an inclination angle of the second inclined portion with respect to the length direction.

[0301] <2> The multilayer ceramic capacitor according to <1>, wherein the inclination angle of the first inclined portion is smaller than the inclination angle of the second inclined portion.

[0302] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the laminate includes an inner layer portion and outer layer portions arranged to sandwich the inner layer portion in the stacking direction, the outer layer portions having a first main surface side outer layer portion arranged on the first main surface side and a second main surface side outer layer portion arranged on the second main surface side, and the first inclined portion is formed in the first main surface side outer layer portion.

[0303] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the laminate includes an inner layer portion and outer layer portions arranged to sandwich the inner layer portion in the stacking direction, the outer layer portions having a first main surface side outer layer portion arranged on the first main surface side and a second main surface side outer layer portion arranged on the second main surface side, and the second inclined portion is formed in the second main surface side outer layer portion.

[0304] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the internal electrode layers are exposed in the first inclined portions.

[0305] <6> The multilayer ceramic capacitor according to any one of <1> to <5>, wherein the internal electrode layers are exposed in the second inclined portions.

[0306] <7> The multilayer ceramic capacitor according to any one of <1> to <6>, wherein the first inclined portion and the second inclined portion are formed continuously.

[0307] <8> The multilayer ceramic capacitor according to any one of <1> to <7>, wherein the first external electrode has a first electrode arranged on the first main surface, and the second external electrode has a second electrode arranged on the first main surface.

[0308] <9> A laminate including a plurality of dielectric layers stacked together, the laminate having a first main surface and a second main surface opposing each other in a stacking direction of the plurality of dielectric layers, a first side surface and a second side surface opposing each other in a width direction perpendicular to the stacking direction, and a third side surface and a fourth side surface opposing each other in a length direction perpendicular to the stacking direction and the width direction; and at least four external electrodes arranged on any two or more of six surfaces of the first main surface and the second main surface, the first side surface and the second side surface, and the third side surface and the fourth side surface of the laminate, wherein any two surfaces of the first side surface, the second side surface, the third side surface, and the fourth side surface have inclined surfaces that widen from the first main surface toward the second main surface, and the inclined surfaces have a first inclined portion arranged on the first main surface side and a second inclined portion arranged on the second main surface side, The multilayer ceramic capacitor according to claim 1, wherein an inclination angle of the first inclined portion with respect to the length direction or the width direction is different from an inclination angle of the second inclined portion with respect to the length direction or the width direction.

[0309] <10> The multilayer ceramic capacitor according to <9>, wherein the first inclined portion and the second inclined portion are formed on the first side surface, the second side surface, the third side surface, and the fourth side surface.

[0310] <11> The multilayer ceramic capacitor according to <9> or <10>, wherein the first inclined portion and the second inclined portion are formed continuously.

[0311] <12> The multilayer ceramic capacitor according to any one of <1> to <8>, wherein the dimension in the width direction is greater than the dimension in the length direction.

[0312] 10, 10A, 10B, 10C, 10D, 10E, 10F, 510, 610 Multilayer ceramic capacitor 12, 512 Laminate 12a, 512a First main surface 12b, 512b Second main surface 12c, 512c First side surface 12d, 512d Second side surface 12e First end surface 12f Second end surface 14, 514 Dielectric layer 15a, 515a Inner layer portion 15b1, 515b1 First main surface side outer layer portion 15b2, 515b2 Second main surface side outer layer portion 16, 516 Internal electrode layer 16a, 516a First internal electrode layer 16b, 516b Second internal electrode layer 18a, 518a First opposing electrode portion 18b, 518b Second opposing electrode portion 20a, 520a First lead electrode portion 20b, 520b Second lead electrode portion 22a, 522a, 522b Side portion 22b End portion 24, 524, 525 External electrode 24a, 524a First external electrode 24b, 524b Second external electrode 26, 526, 527 Thin film layer 26a, 526a First thin film layer 26b, 526b Second thin film layer 28 Base electrode layer 28a First base electrode layer 28b Second base electrode layer 28 Direct plating layer 28a First direct plating layer 28b Second direct plating layer 30, 530, 531 Plating layer 30a, 530a First plating layer 30b, 530b Second plating layer 32 Underplating layer 32a First underplating layer 32b Second underplating layer 34, 534, 535 Overplating layer 34a, 534a First overplating layer 34b, 534b Second overplating layer 36, 536, 537 Overplating layer 36a, 536a First overplating layer 36b, 536b Second overplating layer 512e Third side surface 512f Fourth side surface 521a Third lead electrode portion 521b Fourth lead electrode portion 525a Third external electrode 525b Fourth external electrode 527a Third thin film layer 527b Fourth thin film layer 531a Third plating layer 531b Fourth plating layer 535a Third overplating layer 535b Fourth overplating layer 537a Third overplating layer 537b Fourth surface plating layer

Claims

1. A multilayer ceramic capacitor comprising: a laminate including a plurality of dielectric layers stacked on the dielectric layers, and a plurality of internal electrode layers stacked on the dielectric layers, the laminate having a first main surface and a second main surface facing each other in a stacking direction of the plurality of dielectric layers, a first side surface and a second side surface facing each other in a width direction perpendicular to the stacking direction, and a first end surface and a second end surface facing each other in a length direction perpendicular to the stacking direction and the width direction; a first external electrode arranged on the first main surface and the first end surface of the laminate; and a second external electrode arranged on the first main surface and the second end surface of the laminate, the first end surface and the second end surface having an inclined surface that widens from the first main surface toward the second main surface, the inclined surface having a first inclined portion arranged on the first main surface side and a second inclined portion arranged on the second main surface side, and the inclination angle of the first inclined portion with respect to the length direction is different from the inclination angle of the second inclined portion with respect to the length direction.

2. The multilayer ceramic capacitor according to claim 1, wherein the inclination angle of the first inclined portion is smaller than the inclination angle of the second inclined portion.

3. A multilayer ceramic capacitor as described in claim 1 or claim 2, wherein the laminate includes an inner layer portion and outer layer portions arranged to sandwich the inner layer portion in the stacking direction, the outer layer portions having a first main surface side outer layer portion arranged on the first main surface side and a second main surface side outer layer portion arranged on the second main surface side, and the first inclined portion is formed in the first main surface side outer layer portion.

4. A multilayer ceramic capacitor as described in any one of claims 1 to 3, wherein the laminate includes an inner layer portion and outer layer portions arranged to sandwich the inner layer portion in the stacking direction, the outer layer portion having a first main surface side outer layer portion arranged on the first main surface side and a second main surface side outer layer portion arranged on the second main surface side, and the second inclined portion is formed in the second main surface side outer layer portion.

5. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer is exposed at the first inclined portion.

6. The multilayer ceramic capacitor according to claim 1, wherein the internal electrode layer is exposed at the second inclined portion.

7. The multilayer ceramic capacitor according to claim 1, wherein the first inclined portion and the second inclined portion are formed continuously.

8. A multilayer ceramic capacitor as claimed in any one of claims 1 to 7, wherein the first external electrode has a first electrode disposed on the first main surface, and the second external electrode has a second electrode disposed on the first main surface.

9. A laminate including a plurality of dielectric layers stacked together, the laminate having a first main surface and a second main surface that face each other in a stacking direction of the plurality of dielectric layers, a first side surface and a second side surface that face each other in a width direction perpendicular to the stacking direction, and a third side surface and a fourth side surface that face each other in a length direction perpendicular to the stacking direction and the width direction; and at least four external electrodes arranged on any two or more of six surfaces of the first main surface and the second main surface, the first side surface and the second side surface, and the third side surface and the fourth side surface of the laminate, wherein any two surfaces of the first side surface, the second side surface, the third side surface, and the fourth side surface have an inclined surface that widens from the first main surface toward the second main surface, the inclined surface having a first inclined portion arranged on the first main surface side and a second inclined portion arranged on the second main surface side, The multilayer ceramic capacitor according to claim 1 , wherein an inclination angle of the first inclined portion with respect to the length direction or the width direction is different from an inclination angle of the second inclined portion with respect to the length direction or the width direction.

10. The multilayer ceramic capacitor according to claim 9, wherein the first inclined portion and the second inclined portion are formed on the first side surface, the second side surface, the third side surface and the fourth side surface.

11. The multilayer ceramic capacitor according to claim 9 or 10, wherein the first inclined portion and the second inclined portion are formed continuously.

12. The multilayer ceramic capacitor according to claim 1, wherein the dimension in the width direction is greater than the dimension in the length direction.

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