Semiconductor light-emitting device

Abstract

Provided is a semiconductor light-emitting device which is suitable for miniaturization, can be densely arranged in a matrix shape, has high output, and has high protection performance against overcurrent. The semiconductor light-emitting device is provided with: a support substrate comprising a flat plate-shaped base material comprising a first conductivity-type semiconductor, a light-reflective dielectric multilayer film provided on the first main surface of the base material, at least a pair of placement electrodes provided on the dielectric multilayer film and comprising an anode and a cathode, and at least a pair of mounting electrodes provided on a second main surface opposite the first main surface of the base material and comprising an anode and a cathode; a semiconductor light-emitting element placed on the pair of placement electrodes with a p-electrode and an n-electrode electrically connected to the corresponding ones of the pair of placement electrodes; a pair of conductive vias that electrically connect each of the pair of mounting electrodes and each of the pair of placement electrodes; and a second conductivity-type diffusion region that is provided on an inner wall surface of the base material in contact with the conductive vias, and that is of a conductivity type opposite to the first conductivity type.

Description

Semiconductor light-emitting device

[0001] The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device including a semiconductor light emitting element and a protection element.

[0002] In recent years, semiconductor light-emitting elements such as light-emitting diodes (LEDs) have been arranged in multiple devices to achieve higher output and light distribution control. Furthermore, protective elements have been provided in light-emitting devices to improve their resistance to electrostatic discharge (ESD).

[0003] For example, in the field of automobile headlights, a variable light distribution headlamp (ADB: Adaptive Driving Beam) that arranges multiple semiconductor light emitting elements and controls light distribution is known. Also known are high-power LED packages for lighting and LED packages for information and communication devices in which LEDs are densely arranged.

[0004] Furthermore, Patent Document 1 discloses an optoelectronic semiconductor device in which an ESD protection element is arranged between a carrier and a semiconductor body.

[0005] Patent Document 2 discloses a light-emitting device including a light-emitting element and a mounting substrate having a semiconductor electrostatic discharge protection element section that is provided on the surface opposite to the surface on which the light-emitting element is mounted and is connected to the light-emitting element.

[0006] Patent Document 3 discloses a light-emitting element package including a semiconductor substrate having first and second conductive vias, a diode formed by doping impurities on a second surface of the semiconductor substrate and having a Zener breakdown voltage in both directions, and first and second external electrodes formed on the second surface so as to connect the first and second conductive vias to both ends of a bidirectional Zener diode region, respectively.

[0007] Special table 2018-519669 publication WO2013 / 187318 publication US2013 / 0020598A1 publication

[0008] The present invention has been made in consideration of the above-mentioned points, and aims to provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, has high output, and has high protection performance against overcurrent.

[0009] A semiconductor light emitting device according to one embodiment of the present invention includes a support substrate including a flat substrate made of a semiconductor of a first conductivity type, a light-reflective dielectric multilayer film provided on a first main surface of the substrate, at least one pair of mounting electrodes each consisting of an anode and a cathode provided on the dielectric multilayer film, and at least one pair of mounting electrodes each consisting of an anode and a cathode provided on a second main surface of the substrate opposite the first main surface; a semiconductor light emitting element mounted on the pair of mounting electrodes with a p-electrode and an n-electrode electrically connected to each other corresponding to the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of mounting electrodes; and a diffusion region of a second conductivity type opposite to the first conductivity type provided on an inner wall surface of the substrate in contact with the conductive vias.

[0010] 1 is a diagram schematically showing a top surface of a semiconductor light emitting device according to a first embodiment; a diagram schematically showing a side surface of the semiconductor light emitting device according to the first embodiment; a diagram schematically showing a back surface of the semiconductor light emitting device according to the first embodiment; a cross-sectional view showing a cross section taken along line IV-IV shown in FIG. 1; a diagram corresponding to the cross section of the semiconductor light emitting device shown in FIG. 4, showing bonding of a light emitting element to a support substrate; a diagram schematically showing the back surface (bonding surface) of a light emitting element; a diagram schematically showing the top surface (bonding surface) of a support substrate; an equivalent circuit diagram of a semiconductor light emitting device; a diagram schematically showing voltage-current characteristics of a light emitting element and a pair of Zener diodes ZD1 and ZD2 formed on a support substrate; a cross-sectional view showing step S0 of a method for manufacturing a support substrate; a cross-sectional view showing step S1 of a method for manufacturing a support substrate; a cross-sectional view showing step S2 of a method for manufacturing a support substrate; a cross-sectional view showing step S3 of a method for manufacturing a support substrate; a cross-sectional view showing step S4 of a method for manufacturing a support substrate; a cross-sectional view showing step S5 of a method for manufacturing a support substrate; a cross-sectional view showing step S6 of a method for manufacturing a support substrate; and a cross-sectional view showing step S7 of a method for manufacturing a support substrate. 1A to 1C are cross-sectional views showing step S8 of the method for manufacturing a support substrate; 1B are cross-sectional views showing step S9 of the method for manufacturing a support substrate; 1C are cross-sectional views showing step S10 of the method for manufacturing a support substrate; 1D are cross-sectional views showing a semiconductor light-emitting device according to a first modification of the first embodiment; 1E are cross-sectional views showing a semiconductor light-emitting device according to a second modification; and 1F are cross-sectional views showing a semiconductor light-emitting device according to a third modification.

[0011] In the following, preferred embodiments of the present invention will be described, but these may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0012] 1, 2, and 3 are schematic diagrams showing the top, side, and back surfaces, respectively, of a semiconductor light-emitting device 10 according to a first embodiment of the present invention. Also, FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 1.

[0013] As shown in FIGS. 2 and 4, the semiconductor light emitting device 10 has a structure in which a light emitting element 20, which is an LED, is bonded to a support substrate 30.

[0014] Fig. 5 corresponds to the cross section of the semiconductor light emitting device 10 shown in Fig. 4 and is a diagram showing the bonding of the light emitting element 20 to the support substrate 30. Figs. 6 and 7 show the back surface (bonding surface) of the light emitting element 20 and the top surface (bonding surface) of the support substrate 30, respectively.

[0015] The respective configurations of the light emitting element 20 and the support substrate 30, and the bonding between the light emitting element 20 and the support substrate 30 will be described in detail below with reference to FIGS.

[0016] 5, the light-emitting element 20 has an element substrate 11 and a light-emitting semiconductor structure layer SL formed on the element substrate 11. The light-emitting semiconductor structure layer SL has an n-type semiconductor layer 21, a light-emitting layer 22 formed on the n-type semiconductor layer 21, and a p-type semiconductor layer 23 formed on the light-emitting layer 22.

[0017] In this embodiment, the light emitting element 20 is a so-called flip chip, and has a p-electrode 26 (anode) and an n-electrode 27 (cathode) on one side of the element. The element structure will be described in detail below.

[0018] The element substrate 11 is a sapphire substrate, which is transparent to the light emitted from the light emitting layer 22. A light emitting semiconductor structure layer SL is formed by crystal growth on the element substrate 11. The light emitting semiconductor structure layer SL is, for example, a gallium nitride (GaN)-based LED structure layer that emits blue light, but the crystal system is not limited to this.

[0019] The n-type semiconductor layer 21 is, for example, a GaN or AlGaN layer doped with silicon (Si). The light-emitting layer 22 has, for example, a single quantum well (SQW) or multiple quantum well (MQW) structure. Alternatively, the light-emitting layer 22 may have a so-called bulk structure. The p-type semiconductor layer 23 is, for example, a GaN or AlGaN layer doped with magnesium (Mg).

[0020] Each of the n-type semiconductor layer 21 and the p-type semiconductor layer 23 is composed of at least one semiconductor layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with various semiconductor layers, such as a carrier barrier layer such as an electron blocking layer (EBL), a current diffusion layer, or a contact layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may also be provided with an undoped layer (or i-layer).

[0021] 1 and 5, a p-electrode 24 (p-ohmic electrode) is provided on the light-emitting functional layer 20. In addition, as shown in Fig. 1, in the light-emitting semiconductor structure layer SL, the peripheries and corners of the p-type semiconductor layer 23 and the light-emitting layer 22 are removed to form a recess 23H (one recess in this embodiment) in which the n-type semiconductor layer 21 is exposed.

[0022] In this embodiment, the light emitting element 20 has a rectangular parallelepiped shape, and the recesses 23H are provided at the corners of the light emitting element 20. An n-electrode 25 (n-ohmic electrode) is formed on the exposed surface of the n-type semiconductor layer 21.

[0023] The p-electrode 24 is formed as a light-reflective electrode. The p-electrode 24 is made of, for example, an indium tin oxide (ITO) ohmic electrode that is a translucent conductive film, a nickel (Ni) / silver (Ag) reflective film, and an ITO / Ni / Ag / Pt / Au layer in which platinum (Pt) and gold (Au) are formed in this order on the p-type semiconductor layer 23. Note that, although it is preferable that the p-electrode 24 be provided with a reflective film with high reflectivity such as an Ag film, the reflective film need not be provided.

[0024] 4 , reflected light Lr emitted from the light-emitting layer 22 and reflected by the p-electrode 24 is emitted from the surface 10S of the element substrate 11 together with direct light Ld from the light-emitting layer 22. In other words, the surface 10S of the element substrate 11 is the light-emitting surface of the semiconductor light-emitting device 10.

[0025] Furthermore, light emitted from the light-emitting layer 22 and directed toward the support substrate 30 through the recess 23H is reflected by the dielectric multilayer film 39 and emitted from the surface 10S of the element substrate 11 together with the direct light Ld (reflected light Lr). Note that it is preferable that the surface 10S of the element substrate 11 is roughened in order to improve the light extraction efficiency.

[0026] The n-electrode 25 is made of, for example, a Ti / Al layer in which titanium (Ti) and aluminum (Al) are formed in this order on the n-type semiconductor layer 21 .

[0027] The materials and layer structures of the p-electrode 24 and the n-electrode 25 are not limited to those described above, and may be appropriately selected in consideration of various characteristics such as ohmic characteristics, light extraction efficiency by reflection, and device reliability (lifespan).

[0028] An insulating film (SiO ２ 4, an element protective film 28 made of a material such as a silicon dioxide film is also provided on the wall surface of the light emitting semiconductor structure layer SL exposed in the recess 23H.

[0029] Further, a p-electrode (first element electrode which is an electrode of the light-emitting element 20) 26 electrically connected to the p-electrode 24 and an n-electrode (second element electrode which is an electrode of the light-emitting element 20) 27 electrically connected to the n-electrode 25 are provided. An insulating film (e.g., SiO ２ ) is provided as a protective film 28 for the element.

[0030] As shown in FIG. 1, the n-electrode 25 is formed in a circular region at the corner, and the p-electrode 26 is formed as a substantially rectangular region excluding the corner.

[0031] In this embodiment, the case where one n-element electrode 27 is provided has been described as an example, but there may be provided a plurality of n-element electrodes 27. When a plurality of n-element electrodes 27 are provided, they are preferably provided at positions (e.g., at the four corners) that are rotationally symmetric with respect to the center C ( FIG. 1 ) of the light-emitting element 20, or at positions that are symmetric with respect to a line passing through the center C.

[0032] The p-electrode 26 and the n-electrode 27 are pad electrode layers made of, for example, Ti / Au layers.

[0033] (2) Support Substrate Referring again to FIG. 5 , the support substrate 30 has a base material 31, which has a first main surface MS1 and a second main surface MS2 opposing the first main surface. In this embodiment, a dielectric multilayer film 39 serving as a reflective film is formed on the first main surface MS1 of the base material 31 over the entire main surface MS1. In other words, the dielectric multilayer film 39 is formed so as to include an area overlapping the light-emitting element 20 (i.e., the footprint of the light-emitting element 20) in a top view. By providing the dielectric multilayer film 39 on the first main surface MS1 of the base material 31 in this way, the dielectric multilayer film 39 can be provided flat, thereby achieving excellent reflection characteristics.

[0034] The dielectric multilayer film 39 is made of, for example, a multiplicity of alumina (Al2O3) films and titanium oxide (TiO2) films alternately stacked (n layers) (Al2O3 / TiO2). n For example, n=5 to 30, and the light in the visible light range is reflected with a reflectance of 70% or more. The dielectric multilayer film 39 is made of a large number of layers of Al2O3 and silicon oxide (SiO2) stacked alternately (Al2O3 / SiO2). n The film may be made of

[0035] A p-mounted electrode 36A and an n-mounted electrode 36B (a pair of mounted electrodes) are provided on the dielectric multilayer film 39, and a p-mounted electrode 37A and an n-mounted electrode 37B (a pair of mounted electrodes) are provided on the second main surface MS2 (back surface) side of the base material 31. The support substrate 30 will be described in more detail below.

[0036] The substrate 31 is a conductive n-type silicon substrate made of silicon (Si) doped with phosphorus (P), arsenic (As), etc. Note that a p-type semiconductor substrate may also be used for the substrate 31.

[0037] Metal plating layers 34P and 35P that are electrically isolated from each other are formed on the upper surface side (i.e., the side bonded to the light emitting element 20) of the base material 31. A p-mounted electrode 36A and an n-mounted electrode 36B that are electrically connected to the metal plating layers 34P and 35P, respectively, are formed on the metal plating layers 34P and 35P.

[0038] The metal plating layers 34P and 35P, and the p-mounting electrode 36A and the n-mounting electrode 36B are insulated from the substrate 31 by the dielectric multilayer film 39 and the insulating film 32A (first insulating film), and the p-mounting electrode 36A and the n-mounting electrode 36B have their side surfaces and outer edges on the top surface protected by a protective film 38A (second insulating film), which is an insulating film.

[0039] Furthermore, metal plating layers 34Q and 35Q that are electrically isolated from each other are formed on the back surface side of the base material 31, i.e., on the mounting surface side of the support substrate 30 that is to be mounted on a circuit board (not shown). A p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) that are electrically connected to the metal plating layers 34Q and 35Q, respectively, are formed on the metal plating layers 34Q and 35Q.

[0040] The metal plating layers 34Q and 35Q, and the p-mounted electrode 37A and the n-mounted electrode 37B are insulated from the substrate 31 by an insulating film 32B (third insulating film), and the p-mounted electrode 36A and the n-mounted electrode 36B have their side surfaces and outer edges of the top surface protected by a protective film 38B (fourth insulating film), which is also an insulating film.

[0041] The base material 31 is provided with conductive vias 34 that fill the through holes of the base material 31 and electrically connect the metal plating layers 34P and 34Q. The base material 31 is also provided with conductive vias 35 that fill the through holes of the base material 31 and electrically connect the metal plating layers 35P and 35Q.

[0042] The metal plating layers 34P, 35P, 34Q, and 35Q, and the conductive vias 34 and 35 are made of a nickel / gold (Ni / Au) electroless plating layer and a copper (Cu) electroplating layer formed on the electroless plating layer. The p-mounted electrode 36A, the n-mounted electrode 36B, the p-mounted electrode 37A, and the n-mounted electrode 37B are made of a nickel / gold (Ni / Au) electroplating layer.

[0043] 3, a p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) are exposed on the back surface of the support substrate 30. For convenience during mounting, a cathode mark 37M is also formed.

[0044] (3) Structure of the Protection Element In this embodiment, p-doped regions 33A and 33B are provided on the inner wall surfaces of the through holes in which the conductive vias 34 and 35 are provided. The p-doped regions 33A and 33B are regions that have been made p-type by diffusing p-type impurities such as boron (B) or aluminum (Al), and pn junctions formed between the p-doped regions 33A and 33B and the substrate 31 (n-type silicon) function as Zener diodes ZD1 and ZD2, respectively.

[0045] When a p-type semiconductor substrate is used as the base material 31, the Zener diodes ZD1 and ZD2 can be formed by doping n-type impurities to form n-doped regions.

[0046] Fig. 8 is an equivalent circuit diagram of the semiconductor light-emitting device 10. Fig. 9 is a diagram schematically showing the voltage-current characteristics (VI characteristics) of the light-emitting element 20 and a pair of Zener diodes ZD1 and ZD2 (hereinafter also referred to as double Zener diodes DZD) formed on the support substrate 30.

[0047] As shown in FIG. 8, the cathodes (K) of two Zener diodes ZD1 and ZD2 are connected in series (i.e., connected in opposite directions), and a double Zener diode DZD, both of whose terminals are anodes (A), is connected in parallel to the light-emitting element 20 to form a circuit.

[0048] 9, the VI characteristics of the two Zener diodes ZD1 and ZD2 are combined to form a VI characteristic (ZD1+ZD2) that is a composite of the VI characteristics of both. That is, since one Zener diode ZD1 is connected in the reverse direction with respect to the forward current of the Zener diode ZD2 (the region where V<0 in the figure, shown by the dashed-dotted line), it exhibits a protective function against overcurrents such as surges and ESD in both positive and negative directions.

[0049] Although the case where two Zener diodes ZD1 and ZD2 are formed has been described, at least one Zener diode may be formed by providing a diffusion region on the inner wall surface of at least one of the conductive vias 34 and 35.

[0050] Furthermore, it is preferable that the diffusion regions are formed on the entire inner wall surfaces of the through holes V1 and V2 (see FIGS. 10A to 10E) in which the conductive vias 34 and 35 are provided, because this can improve the Zener characteristics.

[0051] (4) Bonding of Light Emitting Element and Supporting Substrate The positional relationship when bonding the light emitting element 20 and the supporting substrate 30 will be described below.

[0052] 5 to 7 and 4, the p-electrode 26 of the light-emitting element 20 is joined to the p-mounted electrode 36A of the support substrate 30 by a conductive bonding layer 41A. The n-electrode 27 of the light-emitting element 20 is joined to the n-mounted electrode 36B of the support substrate 30 by a conductive bonding layer 41B.

[0053] Therefore, by this bonding, the p-mounting electrode 36A is electrically connected to the p-electrode 24 of the light-emitting element 20 via the p-element electrode 26, and the n-mounting electrode 36B is electrically connected to the n-element electrode 27. In other words, the p-electrode 24 and the n-electrode 25 of the light-emitting element 20 are electrically connected to correspond to the pair of mounting electrodes (p-mounting electrode 36A and n-mounting electrode 36B).

[0054] 2. Manufacturing method of semiconductor light emitting device

[0055] (1) Method for Manufacturing Light-Emitting Element The light-emitting element 20 can be formed by, for example, metal-organic chemical vapor deposition (MOCVD). Specifically, the light-emitting semiconductor structure layer SL can be formed by growing crystals on a transparent substrate such as a sapphire substrate by MOCVD. Note that the crystal growth method is not limited to MOCVD, and molecular beam epitaxy (MBE) and other methods can also be used.

[0056] The light emitting element 20 can be formed by forming electrodes and insulating films by photolithography on the semiconductor structure layer on which crystal growth has been performed.

[0057] (2) Method for Manufacturing Support Substrate The method for manufacturing the support substrate 30 will be described in detail below with reference to the drawings. Figures 10A to 10E are cross-sectional views showing steps S0 to S4 of the manufacturing method, Figures 11A to 11D are cross-sectional views showing steps S5 to S8, and Figures 12A to 12B are cross-sectional views showing steps S9 to S10. Note that, for ease of explanation and understanding, steps S0 to S8 will be described by illustrating a portion of the support substrate wafer corresponding to one semiconductor light-emitting device 10.

[0058] (S0) Preparation of Substrate Insulating films are formed on the front and back surfaces of substrate 31 to form insulating films 32A and 32B, respectively. Substrate 31 can be made of conductive n-type silicon (Si) doped with phosphorus (P) or arsenic (As). Methods that can be used to form the insulating films include thermal oxidation, TEOS (Tetra Ethoxy Silane)-CVD, sputtering, and ALD (Atomic Layer Deposition).

[0059] (S1) Formation of Dielectric Multilayer Film The dielectric multilayer film 39 is formed on the insulating film 32A. The dielectric multilayer film 39 is made of, for example, an (Al2O3 / TiO2)n film in which multiple Al2O3 films and TiO2 films are alternately stacked. Note that the dielectric multilayer film 39 may be formed on the substrate 31 after removing the insulating film 32A. In this case, it is possible to reduce thermal resistance.

[0060] The dielectric material used for the dielectric multilayer film 39 is not limited to these materials, and may be formed by alternately laminating at least two dielectric layers having different refractive indices. For example, SiO2 or the like may be used.

[0061] (S2) Through-hole Forming Step Through-holes V1 and V2 that penetrate the base material 31, insulating film 32A, dielectric multilayer film 39, and insulating film 32B are formed by a RIE (reactive ion etching) process or mechanical drilling using a microdrill or the like.

[0062] (S3) Impurity Diffusion For example, p-type impurities such as boron (B) or aluminum (Al) are diffused from the inner walls of the through holes V1 and V2 into the substrate 31 by thermal diffusion, thereby converting the inner wall portions to p-type. That is, p-diffusion regions (p-Si) 33A and 33B are formed on the inner wall portions of the through holes V1 and V2 of the n-type silicon substrate 31, and Zener diodes ZD1 and ZD2 are formed, respectively.

[0063] (S4) Formation of Conductive Layer Nickel (Ni) and gold (Au) are electrolessly plated to form an electroless plated layer PL1. Subsequently, copper (Cu) is electrolytically plated to form an electrolytic plated layer PL2. This forms the plated layer PL (PL1+PL2). The insides of the through holes V1 and V2 are filled with Cu, and the plated layers PL on the upper and lower surfaces are electrically connected by the conductive vias 34 and 35.

[0064] (S5) Electrode Patterning and Sintering A mask is formed by photolithography, and then Cu, Au, and Ni other than those in the electrode regions are removed by wet etching to form metal plating layers 34P and 35P on the dielectric multilayer film 39 on the top surface, and metal plating layers 34Q and 35Q on the insulating film 32B on the back surface.

[0065] Subsequently, ohmic contact is formed between the Ni / Au on the wall surfaces of the conductive vias 34 and 35 and the p-Si region by thermal sintering.

[0066] (S6) Formation of electrode surface layer By electrolytic plating, a nickel Ni / Au layer is formed on the surface of the metal plating layers 34P and 35P, which are electrodes with exposed copper, and a p-mounted electrode 36A and an n-mounted electrode 36B are formed on the upper surface side, respectively, and a p-mounted electrode 37A and an n-mounted electrode 37B are formed on the back surface side, respectively.

[0067] (S7) Formation of insulating protective film The upper surface is covered with SiO by a method such as TEOS-CVD, sputtering, or ALD. ２ The back surface is covered with a protective film 38A (second insulating film) made of SiO ２ The insulating film 38B is covered with a protective film 38B (fourth insulating film).

[0068] (S8) Formation of Electrodes A mask is formed by photolithography, and then the protective films 38A and 38B are removed by etching with buffered hydrofluoric acid (hydrofluoric acid buffer solution) to expose the p-mounted electrode 36A, the n-mounted electrode 36B, the p-mounted electrode 37A, and the n-mounted electrode 37B.

[0069] (S9) Mounting of Light Emitting Element The light emitting element 20 is mounted on the support substrate 30 via bonding members 41A and 41B made of, for example, a gold-tin alloy (for example, Au-20 wt % Sn). The mounting can be performed by thermocompression bonding or reflow.

[0070] (S10) Slicing Finally, the support substrate wafer is diced using a dicing blade DB to cut it into individual semiconductor light emitting devices 10. In this way, the semiconductor light emitting devices 10 are completed.

[0071] In addition, by making the support substrate 30 larger than the light emitting element 20, it is possible to form street portions that can be diced, and therefore the light emitting element 20 can be mounted on the support substrate 30 before singulation. If the support substrate 30 is to be equal to or smaller in size than the light emitting element 20, the support substrate 30 can be singulated first, and the light emitting element 20 and the support substrate 30 can be mounted individually.

[0072] Here, "equivalent size" refers to the smaller of either the amount of protrusion PR (see FIG. 1) of the support substrate 30 relative to the light emitting element 20 when viewed from above (i.e., in a direction perpendicular to the light emitting element and the support substrate) or the amount of protrusion (-PR) of the light emitting element 20 relative to the support substrate 30 being 10% or less or 10 μm or less. It is more preferable that the amount of protrusion be 5% or less or 5 μm or less, whichever is smaller.

[0073] (3) Protection Circuit and Device Size As described above in detail, the semiconductor light-emitting device 10 of this embodiment can provide a semiconductor light-emitting device 10 that has a support substrate 30 that is the same size as the light-emitting element 20 when viewed from above, and has a protection circuit consisting of two Zener diodes connected in series and connected in parallel to the light-emitting element 20.

[0074] Therefore, it is possible to provide the semiconductor light emitting device 10 with a high protection function against overcurrents such as surges in both the forward and reverse directions and ESD for the light emitting element 20. Furthermore, since the two Zener diodes ZD1, ZD2 are formed and connected to the inner wall surfaces of the base material 31 that contact the wall surfaces of the conductive vias 34 and 35, it is possible to make the support substrate 30 the same size as the light emitting element 20 or smaller, and the semiconductor light emitting devices 10 can be arranged densely, for example, in a matrix.

[0075] Furthermore, since a dielectric multilayer film 39, which is a light-reflecting film, is provided, light leaking from between the element electrodes 26, 27 of the light-emitting element 20 is reflected by the dielectric multilayer film 39 and returned to the light-emitting element 20, and can be emitted from the light-emitting surface 10S, thereby improving the light output.

[0076] Furthermore, by increasing the size (i.e., diameter and length) of the conductive vias 34 and 35, the performance of the two Zener diodes can be further improved, and a semiconductor light-emitting device 10 with high protection function can be provided.

[0077] (4) Modification 1 FIG. 13 is a cross-sectional view schematically showing a semiconductor light-emitting device 50 according to Modification 1 of the first embodiment of the present invention.

[0078] The semiconductor light emitting device 50 of the first modification has a wavelength conversion member 51 that covers the top and side surfaces of the semiconductor light emitting device 10 of the first embodiment. The wavelength conversion member 51 can be made of a phosphor-containing resin in which phosphor particles such as cerium-activated yttrium aluminum garnet (YAG:Ce) are dispersed in a medium such as a translucent silicone resin or epoxy resin.

[0079] In particular, the conversion efficiency of excitation light can be improved when using phosphors with particle sizes of several μm to several tens of μm. By providing a wavelength conversion member 51 in which phosphor particles are dispersed in silicone resin around the semiconductor light-emitting device 10, it is possible to provide a semiconductor light-emitting device 50 that emits white light or a phosphor-emitted color, for example.

[0080] Furthermore, similar to the semiconductor light emitting device 10, the dielectric multilayer film 39 that reflects light emitted toward the support substrate 30 is provided, thereby improving the light output. Furthermore, the wavelength conversion member 51 protects the side surface of the support substrate 30, thereby preventing defects such as short circuits.

[0081] (5) Modification 2 FIG. 14 is a cross-sectional view schematically showing a semiconductor light-emitting device 60 according to Modification 2 of the first embodiment of the present invention.

[0082] The semiconductor light-emitting device 60 of variant example 2 has a wavelength conversion member 61 that covers the entire light emission surface 10S (top surface) and side surfaces of the light-emitting element 20, and a light-shielding layer 62 that covers the wavelength conversion member 61 and the side surfaces of the wavelength conversion member 61 and the supporting substrate 30.

[0083] In the present modified example 2, quantum dots (QD) are used for the wavelength conversion member 61. The converted wavelength of the QD light conversion member is determined by its particle size.

[0084] Because QDs are ultrafine particles with nano-order particle sizes, for example, several nanometers to several tens of nanometers, they can be densely attached to the light-emitting surface 10S and side surfaces of the light-emitting element 20 of the semiconductor light-emitting device 10. This can suppress local color unevenness caused by uneven color mixing of the blue light of the excitation light and the yellow light of the phosphor, thereby enabling the production of uniform mixed light and converted monochromatic light.

[0085] The light-shielding layer 62 is made of silicone resin and TiO ２ Light-reflecting layer with added particles or silicone resin with TiO ２ It is possible to use a light absorbing layer to which particles, carbon black, etc. are added. The resin, reflective particles, absorbent material, etc. used in the light blocking layer 62 can be appropriately selected and applied.

[0086] The provision of the light-shielding layer 62 prevents optical crosstalk even when multiple semiconductor light-emitting devices 60 are arranged so that their sides are in contact with each other or are arranged closely to each other. Therefore, multiple semiconductor light-emitting devices 60 can be arranged adjacent to each other, and many semiconductor light-emitting devices 60 can also be arranged in a matrix.

[0087] Furthermore, the provision of the dielectric multilayer film 39 that reflects light emitted toward the support substrate 30 can improve light output. Furthermore, the side surfaces of the semiconductor light-emitting device 60 are protected by the light-shielding layer 62, preventing problems such as short circuits.

[0088] Furthermore, since the double Zener diode DZD is provided, it is possible to provide the semiconductor light emitting device 60 with a high level of protection against overcurrents in both positive and negative directions.

[0089] (6) Modification 3 FIG. 15 is a cross-sectional view schematically showing a semiconductor light-emitting device 70 according to Modification 3 of the first embodiment of the present invention.

[0090] A semiconductor light-emitting device 70 of the third modification example has a wavelength conversion plate 71 attached with a light-transmitting adhesive 71A to a light emission surface 10S of a light-emitting element 20. The wavelength conversion plate 71 is a phosphor plate, and may be, for example, a ceramic phosphor plate formed by dispersing cerium-activated yttrium aluminum garnet (YAG:Ce) in an alumina base material and sintering the dispersed phosphor plate.

[0091] A phosphor plate can be used as the wavelength conversion member. For example, a ceramic phosphor plate is made by dispersing cerium-activated yttrium aluminum garnet (YAG:Ce) in an alumina base material and sintering it. The phosphor plate has phosphor particles uniformly dispersed, resulting in uniform light emission without localized color variations.

[0092] In addition, a light-shielding layer 72 is provided to cover the side surfaces of the semiconductor light-emitting device 10 and the wavelength conversion plate 71, so that optical crosstalk and the like can be prevented even if multiple semiconductor light-emitting devices 70 are arranged so that their side surfaces are in contact with each other or are arranged close to each other.

[0093] Furthermore, the dielectric multilayer film 39 that reflects light emitted toward the support substrate 30 is provided, thereby improving the optical output. Also, the side surface of the support substrate 30 is protected by the light-shielding layer 72, thereby preventing defects such as short circuits.

[0094] Furthermore, since the double Zener diode DZD is provided, it is possible to provide the semiconductor light emitting device 70 with a high level of protection against overcurrents in both positive and negative directions.

[0095] As described above in detail, the semiconductor light-emitting device of the present invention can provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, has high output, and has high protection performance against overcurrents in both positive and negative directions.

[0096] 10, 50, 60, 70: Semiconductor light-emitting device 20: Light-emitting element 21: n-type semiconductor layer 22: Light-emitting layer 23: p-type semiconductor layer 24: p-electrode (p-ohmic electrode) 25: n-electrode (n-ohmic electrode) 26: p-device electrode (device anode) 27: n-device electrode (device cathode) 28B: Device protective film 30: Support substrate 31: Base material 36A: p-mounted electrode 36B: n-mounted electrode 38A: Insulating protective film 39: Dielectric multilayer film 37A: p-mounted electrode 37B: n-mounted electrode 34, 35: Conductive via 41A, 41B: Bonding layer DZD: Double Zener diode ZD1, ZD2: Zener diode 51, 61: Wavelength conversion member 62, 72: Light-shielding layer 71: Wavelength conversion plate

Claims

1. A semiconductor light emitting device comprising: a support substrate comprising a flat substrate made of a semiconductor of a first conductivity type, a light reflective dielectric multilayer film provided on a first main surface of the substrate, at least a pair of mounting electrodes each consisting of an anode and a cathode provided on the dielectric multilayer film, and at least a pair of mounting electrodes each consisting of an anode and a cathode provided on a second main surface opposite the first main surface of the substrate; a semiconductor light emitting element mounted on the pair of mounting electrodes with a p-electrode and an n-electrode electrically connected to each other corresponding to the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of mounting electrodes; and a diffusion region of a second conductivity type opposite to the first conductivity type provided on an inner wall surface of the substrate in contact with the conductive vias.

2. The semiconductor light emitting device according to claim 1, wherein the dielectric multilayer film is provided between the upper surface of the substrate of the second main surface and the lower surfaces of the pair of mounted electrodes.

3. A semiconductor light-emitting device, wherein the dielectric multilayer film is a multilayer film in which at least two of Al2O3, TiO2, and SiO2 are alternately laminated.

4. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting element has an element anode and an element cathode on one side, the element anode and the element cathode being electrically connected to each of the pair of mounting electrodes of the supporting substrate.

5. The semiconductor light emitting device according to claim 4, wherein said element anode and said element cathode are joined to said pair of mounting electrodes by a conductive joining material, said joining material being a gold-tin alloy.

6. The semiconductor light emitting device according to claim 1, further comprising a wavelength conversion member covering the top and side surfaces of said semiconductor light emitting device.

7. The semiconductor light emitting device according to claim 1, further comprising a wavelength conversion member covering the entire light emitting surface and side surfaces of said light emitting element.

8. The semiconductor light emitting device according to claim 7, wherein the wavelength conversion member includes a quantum dot light conversion member.

9. The semiconductor light emitting device according to claim 1, further comprising a wavelength conversion plate provided on the light emitting surface of said light emitting element.

10. The semiconductor light emitting device according to claim 1, wherein the diffusion region of the second conductivity type is provided in both of the pair of conductive vias.

11. The semiconductor light emitting device according to claim 1, wherein the diffusion region of the second conductivity type is formed on the entire inner wall surface of a through hole in which the conductive via is provided.

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