Charging coil module and related product thereof, and preparation method for charging coil module

Abstract

The present application provides a charging coil module and a related product thereof, and a preparation method for a charging coil module. According to the present application, a substrate of a circuit board and a substrate of a charging coil are arranged on a same layer, a first wiring layer and a first coil are arranged on a same layer, and a second wiring layer and a second coil are arranged on a same layer, such that the charging coil and the circuit board form a structure having relatively high integrity. The first coil and the second coil can be directly electrically connected to a wiring on the circuit board, such as the wiring of the first wiring layer of the circuit board or the wiring of the second wiring layer of the circuit board, such that on the one hand, a charging path between the charging coil and a load can be shortened to reduce the link loss, and on the other hand, a BTB connector can be saved, thereby simplifying the structure of the charging coil module, and reducing the input costs of the charging coil module.

Description

Charging coil module and related products, and preparation method of charging coil module

[0001] This application claims priority to the Chinese patent application with application number 202310970642.3 filed with the State Intellectual Property Office of China on August 2, 2023, and priority to the Chinese patent application with the invention name “Charging coil module and related products, method for preparing charging coil module”, all contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of wireless charging, and in particular to a charging coil module and related products thereof, and a method for preparing the charging coil module. Background Art

[0003] Wireless charging technology is gaining increasing attention from major manufacturers. Traditionally, wireless charging uses a charging coil connected to a small adapter board via a board-to-board (BTB) connection. The adapter board and the BTB are then connected to a charging FPC (flexible printed circuit). Finally, the charging circuit board delivers power to the device or chip requiring it. Traditional wireless charging coils have a long power path, resulting in high power losses and low wireless charging efficiency.

[0004] Summary of the Invention

[0005] The embodiments of the present application provide a charging coil module, related products including the charging coil module, and a preparation method including the charging coil module, aiming to obtain a charging coil module with a shorter power supply path, and related products including the charging coil module.

[0006] In a first aspect, a charging coil module is provided. The charging coil module includes a charging coil and a circuit board;

[0007] The charging coil includes a substrate, a first coil and a second coil, wherein the substrate of the charging coil is located between the first coil and the second coil;

[0008] The circuit board includes a substrate, a first wiring layer and a second wiring layer, wherein the substrate of the circuit board is located between the first wiring layer and the second wiring layer;

[0009] The substrate of the circuit board and the substrate of the charging coil are an integrated structure, the first routing layer is arranged on the same layer as the first coil, and the second routing layer is arranged on the same layer as the second coil. It is understandable that the integrated structure can be two parts of the same board. Compared with the first coil and the second coil being electrically connected to the circuit board through a BTB connector, the first coil and the second coil of this embodiment can be directly electrically connected to the routing on the circuit board (for example, the routing of the first routing layer of the circuit board or the routing of the second routing layer), thereby shortening the charging path between the charging coil and the load, thereby reducing link loss and improving wireless charging efficiency.

[0010] It can be understood that by integrating the circuit board substrate and the charging coil substrate, with the first routing layer and the first coil layer co-located, and the second routing layer and the second coil layer co-located, the charging coil and circuit board form a more cohesive structure, improving the structural strength of the charging coil module. Thus, compared to stacking the charging coil on the circuit board, the charging coil and circuit board in this embodiment overlap in thickness, significantly reducing the thickness of the charging coil module.

[0011] It can be understood that compared with the solution of preparing the charging coil and circuit board separately and then connecting the charging coil to the circuit board through a BTB connector, this embodiment can prepare the circuit board together with the charging coil, or can prepare the charging coil together with the circuit board. On the one hand, this can save a process of preparing the charging coil or the circuit board, thereby reducing the cost investment of the charging coil module; on the other hand, the charging coil and the circuit board are arranged into an integral structure, which can save the assembly steps of the charging coil module and reduce the difficulty of preparing the charging coil module.

[0012] In one possible implementation, the first wiring layer includes a first wiring, and the first wiring and the first coil are integrally formed.

[0013] And / or, the second routing layer includes a second routing, and the second routing and the second coil are an integrally formed structure.

[0014] It is understandable that the first coil can be directly electrically connected to the first trace of the circuit board and / or the second coil can be directly electrically connected to the second trace of the circuit board, thereby greatly shortening the charging path between the charging coil and the load, thereby reducing link loss.

[0015] In one possible implementation, the charging coil includes a first insulating layer, which is disposed on and covers the first coil; the first insulating layer of the charging coil and the first coil are located on the same side of a substrate of the charging coil.

[0016] The circuit board includes a first insulating layer, and the first insulating layer of the circuit board is provided on the first wiring layer and covers the first wiring layer;

[0017] The first insulating layer of the charging coil and the first insulating layer of the circuit board are arranged on the same layer and form an integrally formed structure.

[0018] It can be understood that the first insulating layer of the charging coil is arranged on the same layer as the first insulating layer of the circuit board, so that the first insulating layer of the circuit board can be prepared together with the first insulating layer of the charging coil, or the first insulating layer of the circuit board can be prepared together with the first insulating layer of the charging coil. In this way, on the one hand, a process of preparing the first insulating layer of the charging coil or the first insulating layer of the circuit board can be omitted, thereby reducing the cost investment of the charging coil module.

[0019] In one possible implementation, in the length direction of the circuit board, the circuit board includes a first portion, a second portion, and a third portion connected in sequence; when the first portion and the third portion are folded or unfolded relative to each other, the second portion is bent;

[0020] The circuit board includes a first sub-insulating layer, a second sub-insulating layer, and a third sub-insulating layer, wherein the first sub-insulating layer is arranged on the first wiring layer of the second part, the second sub-insulating layer is arranged on the first wiring layer of the first part, and the third sub-insulating layer is arranged on the first wiring layer of the third part;

[0021] The glass transition temperature of the first sub-insulating layer is greater than the glass transition temperature of the second sub-insulating layer and the glass transition temperature of the third sub-insulating layer.

[0022] It can be understood that by setting the glass transition temperature of the first sub-insulating layer to be greater than the glass transition temperature of the second sub-insulating layer and the glass transition temperature of the third sub-insulating layer, on the one hand, the first sub-insulating layer is not easily glass-transitioned due to high-temperature processing in subsequent processes of the circuit board, thereby avoiding the deviation of the bending stress neutral line of the second part of the circuit board and the loss of protection of the first sub-insulating layer for the first wiring layer of the second part; on the other hand, the first sub-insulating layer is not easily glass-transitioned during the folding or flattening process of the circuit board, thereby avoiding the deviation of the bending stress neutral line of the second part of the circuit board and the loss of protection of the first sub-insulating layer for the first wiring layer of the second part.

[0023] In one possible implementation, the charging coil includes a first insulating layer, and the first insulating layer of the charging coil is disposed on and covers the first coil;

[0024] The first insulating layer of the charging coil and the second sub-insulating layer are an integrally formed structure; or the first insulating layer of the charging coil and the third sub-insulating layer are an integrally formed structure.

[0025] It can be understood that by setting the first insulating layer of the charging coil and the second sub-insulating layer as an integrally formed structure; or, the first insulating layer of the charging coil and the third sub-insulating layer as an integrally formed structure, the second sub-insulating layer or the third sub-insulating layer of the circuit board can be prepared together with the first insulating layer of the charging coil, or the first insulating layer of the charging coil can be prepared together with the second sub-insulating layer or the third sub-insulating layer of the circuit board. In this way, on the one hand, a process of preparing the first insulating layer of the charging coil or the second sub-insulating layer or the third sub-insulating layer of the circuit board can be omitted, thereby reducing the cost investment of the charging coil module.

[0026] In a possible implementation, the glass transition temperature of the first sub-insulating layer is greater than or equal to 90° C., and the glass transition temperatures of the second sub-insulating layer and the third sub-insulating layer are both less than 90° C.

[0027] It can be understood that by setting the glass transition temperature of the first sub-insulating layer to be greater than or equal to 90°C, on the one hand, the first sub-insulating layer is not easily glass-transitioned due to high-temperature processing in subsequent processes of the circuit board, thereby avoiding the bending stress neutral line of the second part of the circuit board being shifted, and the first sub-insulating layer losing protection for the first wiring layer of the second part; on the other hand, the first sub-insulating layer is not easily glass-transitioned during the folding or flattening process of the circuit board, thereby avoiding the bending stress neutral line of the second part of the circuit board being shifted, and the first sub-insulating layer losing protection for the first wiring layer of the second part.

[0028] Furthermore, since the first and third portions of the circuit board do not bend during folding or unfolding, centerline offset issues between the first and third portions of the circuit board are not a concern. In this embodiment, by setting the glass transition temperature of both the second and third sub-insulating layers to less than 90°C, the second and third sub-insulating layers can be disposed on the first trace layer of the first and third portions, respectively, without requiring high temperature treatment. This reduces the difficulty of overlaying the second and third sub-insulating layers.

[0029] In a possible implementation, the thickness of the first routing layer of the first portion and the thickness of the first routing layer of the third portion are both greater than the thickness of the first routing layer of the second portion.

[0030] It can be understood that by setting the thickness of the first routing layer of the second part to be smaller, the stress neutral line of the second part of the circuit board is adjusted so that the stress neutral line of the second part of the circuit board is located on the insulating layer of the second part of the circuit board, that is, avoiding the stress neutral line of the second part of the circuit board being located in the first routing layer of the second part, thereby ensuring that the first sub-insulating layer can protect the first routing layer of the second part, thereby improving the service life of the charging coil module.

[0031] In one possible implementation, the first routing layer of the first portion is composed of three metal layers, and the second routing layer of the second portion is composed of two metal layers;

[0032] The first metal layer of the first wiring layer of the first part and the first metal layer of the first wiring layer of the second part are arranged on the same layer and are an integrally formed structure.

[0033] The second metal layer of the first wiring layer of the first part and the second metal layer of the first wiring layer of the second part are arranged on the same layer and are an integrally formed structure.

[0034] It can be understood that, since the first routing layer of the second portion does not include the third metal layer, the third metal layer of the first routing layer of the first portion protrudes relative to the second metal layer of the first routing layer of the second portion.

[0035] In one possible implementation, the distance d1 between the first sub-insulating layer and the third metal layer of the first trace layer of the first section satisfies the following: 0.2 mm ≤ d1 ≤ 0.5 mm. This ensures that the first and second trace layers of the second section of the circuit board are less likely to break due to excessive stress concentration, thereby ensuring a longer service life for the charging coil module.

[0036] In a possible implementation, a portion of the second sub-insulating layer overlaps the first sub-insulating layer;

[0037] The width L1 of the portion of the second sub-insulating layer disposed on the first sub-insulating layer satisfies the requirement of L1 ≥ 0.05 mm. This prevents separation at the junction of the first and second sub-insulating layers during bending of the second portion of the circuit board. The first wiring layer of the second portion of the circuit board is covered by the first and second sub-insulating layers, making it less susceptible to breakage and ensuring a longer service life for the charging coil module.

[0038] In a possible implementation, the thickness of the first adhesive layer of the first sub-insulating layer is smaller than the thickness of the second adhesive layer of the second sub-insulating layer and the thickness of the third adhesive layer of the third sub-insulating layer.

[0039] It can be understood that by setting the thickness of the first adhesive layer of the first sub-insulating layer to be smaller, the thinner first adhesive layer of the first sub-insulating layer can be used to cover the thinner first wiring layer of the second part, so as to ensure that the thickness of the circuit board will not be greatly increased while the first wiring layer of the second part of the circuit board can be better covered and the first wiring layer of the second part can be better protected.

[0040] In addition, by setting the thickness of the second adhesive layer of the second sub-insulating layer to be thicker, the second adhesive layer of the thicker second sub-insulating layer is used to cover the first wiring layer of the thicker first part, so as to ensure that the second sub-insulating layer can better cover the first wiring layer of the first part of the circuit board, that is, the second sub-insulating layer can well fill the gap between two adjacent wirings in the first wiring layer of the first part.

[0041] In addition, by setting the thickness of the third adhesive layer of the third sub-insulating layer to be thicker, the third adhesive layer of the thicker third sub-insulating layer is used to cover the first routing layer of the thicker third part, so as to ensure that the third sub-insulating layer can better cover the first routing layer of the third part of the circuit board, that is, the third sub-insulating layer can well fill the gap between two adjacent routing lines in the first routing layer of the third part.

[0042] In one possible implementation, the thickness of the first adhesive layer of the first sub-insulating layer is less than 25 microns, and the thickness of the second adhesive layer of the second sub-insulating layer and the third adhesive layer of the third sub-insulating layer is greater than 25 microns.

[0043] In one possible implementation, the charging coil includes a first nanocrystalline layer and a first graphite layer, and the first nanocrystalline layer and the first graphite layer are sequentially stacked on the first insulating layer of the charging coil.

[0044] In a possible implementation, the number of turns of the first coil is greater than or equal to 2, and the distance between two adjacent turns in the first coil is in a range from 40 micrometers to 100 micrometers.

[0045] It is understood that the first coil of the charging coil can be arranged with a narrow pitch. Under the condition of the same size, the charging coil in this embodiment has a higher metal content (such as copper) per unit area compared to charging coils without a narrow pitch, thereby effectively reducing charging losses, helping to extend the time the charging coil maintains a peak power of 50W during charging, and improving charging efficiency.

[0046] Furthermore, compared to charging coil modules that do not implement a narrow pitch configuration, assuming the outer diameter of the charging coils remains the same, the charging coils in this embodiment can achieve a narrow pitch configuration for the first coils without reducing the volume of the wiring within the first coils. This reduces the thickness of the first coils, thereby reducing the overall thickness of the charging coils. In other words, this embodiment achieves a miniaturized charging coil configuration by reducing the distance between adjacent turns within the first coils.

[0047] In one possible implementation, each turn of the first coil includes a first conductive portion and a second conductive portion, the first conductive portion is provided on the substrate of the charging coil, and the second conductive portion is formed on the first conductive portion by electroplating.

[0048] In one possible implementation, the line width of the first coil is greater than or equal to 50 microns. For example, the line width of the first coil is between 50 microns and 100 microns. This helps reduce the charging impedance of the charging coil.

[0049] In one possible implementation, the thickness of the first coil is greater than or equal to 50 microns. For example, the thickness of the first coil is between 50 microns and 100 microns. This helps reduce the charging impedance of the charging coil.

[0050] In one possible implementation, the first conductive portion further includes two layers of metal, wherein the second layer of metal is formed on the first layer of metal by electroplating, and the first layer of metal is disposed on the substrate of the charging coil.

[0051] In a second aspect, an electronic device is provided, comprising a battery and the charging coil module described above, wherein the charging coil module is configured to charge the battery. By applying the charging coil module with high charging efficiency to the electronic device, the electronic device can also achieve high charging efficiency.

[0052] In a third aspect, a charger is provided, comprising the charging coil module described above. By applying the charging coil module with higher charging efficiency to the charger, the charger can also achieve higher charging efficiency.

[0053] In a fourth aspect, a charging system is provided, which includes an electronic device and a charger, at least one of the electronic device and the charger includes the charging coil module as described above, and the charger is used to charge the electronic device.

[0054] In a fifth aspect, a method for preparing a charging coil module is provided, the method comprising:

[0055] Prepare a double-sided board, wherein the double-sided board includes a substrate, a first etching layer and a second etching layer, and the substrate of the double-sided board is located between the first etching layer and the second etching layer;

[0056] Processing the first etching layer of the double-sided board to form the first coil of the charging coil and the first wiring layer of the circuit board;

[0057] The second etching layer of the double-sided board is processed to form the second coil of the charging coil and the second wiring layer of the circuit board.

[0058] It can be understood that the substrate of the circuit board and the substrate of the charging coil are formed using the same process, the first wiring layer and the first coil are formed using the same process, and the second wiring layer and the second coil are formed using the same process, so that the charging coil and the circuit board form a more integrated structure.

[0059] It can be understood that compared with the solution of preparing the charging coil and circuit board separately and then connecting the charging coil to the circuit board through a BTB connector, this embodiment can prepare the circuit board together with the charging coil, or can prepare the charging coil together with the circuit board. On the one hand, this can save a process of preparing the charging coil or the circuit board, thereby reducing the cost investment of the charging coil module; on the other hand, the charging coil and the circuit board are arranged into an integral structure, which can save the assembly steps of the charging coil module and reduce the difficulty of preparing the charging coil module.

[0060] In addition, compared to the first coil and the second coil being electrically connected to the circuit board through a BTB connector, the first coil and the second coil in this embodiment can be directly electrically connected to the traces on the circuit board (for example, the traces on the first trace layer or the second trace layer of the circuit board), thereby saving the BTB connector, simplifying the structure of the charging coil module, and reducing the cost investment of the charging coil module.

[0061] In one possible implementation, the first wiring layer includes a first wiring, and the first wiring and the first coil are integrally formed.

[0062] And / or, the second routing layer includes a second routing, and the second routing and the second coil are an integrally formed structure.

[0063] It is understandable that the first coil can be directly electrically connected to the first trace of the circuit board and / or the second coil can be directly electrically connected to the second trace of the circuit board, thereby greatly shortening the charging path between the charging coil and the load, thereby reducing link loss.

[0064] In one possible implementation, in the step of preparing a double-sided board, the method includes:

[0065] Adhere the first substrate of the first flexible copper clad laminate and the second substrate of the second flexible copper clad laminate to two surfaces of the adhesive sheet;

[0066] Laminating the first flexible copper clad laminate, the adhesive sheet, and the second flexible copper clad laminate;

[0067] Electroplating a third metal layer on the first metal layer of the first flexible copper clad laminate, wherein the first metal layer and the third metal layer constitute a first etching layer;

[0068] A fourth metal layer is formed by electroplating on the second metal layer of the second flexible copper clad laminate, and the second metal layer and the fourth metal layer constitute a second etching layer.

[0069] In one possible implementation, the method further includes:

[0070] A first covering layer is formed on the first coil of the charging coil and the first wiring layer of the circuit board, and a second covering layer is formed on the second coil of the charging coil and the second wiring layer of the circuit board, wherein the first covering layer includes the first insulating layer of the charging coil and the first insulating layer of the circuit board, and the second covering layer includes the second insulating layer of the charging coil and the second insulating layer of the circuit board.

[0071] It can be understood that the first insulating layer of the charging coil and the first insulating layer of the circuit board are formed using the same process, that is, the first insulating layer of the circuit board can be prepared together with the first insulating layer of the charging coil, or the first insulating layer of the circuit board can be prepared together with the first insulating layer of the charging coil. In this way, on the one hand, a process of preparing the first insulating layer of the charging coil or the first insulating layer of the circuit board can be omitted, thereby reducing the cost investment of the charging coil module.

[0072] It can be understood that the second insulating layer of the charging coil and the second insulating layer of the circuit board are formed using the same process, that is, the second insulating layer of the circuit board can be prepared together with the second insulating layer of the charging coil, or the second insulating layer of the circuit board can be prepared together with the second insulating layer of the charging coil. In this way, on the one hand, a process of preparing the second insulating layer of the charging coil or the second insulating layer of the circuit board can be omitted, thereby reducing the cost investment of the charging coil module.

[0073] In one possible implementation, in the length direction of the circuit board, the circuit board includes a first part, a second part, and a third part connected in sequence; when the first part and the third part are folded or unfolded relative to each other, the second part is bent.

[0074] The method further comprises:

[0075] forming a first sub-insulating layer on the first wiring layer of the second portion of the circuit board;

[0076] A second sub-insulating layer is formed on the first wiring layer of the first part of the circuit board, and a portion of the second sub-insulating layer is overlapped on the first sub-insulating layer, wherein the glass transition temperature of the first sub-insulating layer is greater than the glass transition temperature of the second sub-insulating layer.

[0077] A third sub-insulating layer is formed on the first wiring layer of the third part of the circuit board, and a portion of the third sub-insulating layer is overlapped on the first sub-insulating layer, wherein the glass transition temperature of the first sub-insulating layer is greater than the glass transition temperature of the third sub-insulating layer.

[0078] The first sub-insulating layer, the second sub-insulating layer and the third sub-insulating layer are pressed together.

[0079] It can be understood that by setting the glass transition temperature of the first sub-insulating layer to be greater than the glass transition temperature of the second sub-insulating layer and the glass transition temperature of the third sub-insulating layer, on the one hand, the first sub-insulating layer is not easily glass-transitioned due to high-temperature processing in subsequent processes of the circuit board, thereby avoiding the deviation of the bending stress neutral line of the second part of the circuit board and the loss of protection of the first sub-insulating layer for the first wiring layer of the second part; on the other hand, the first sub-insulating layer is not easily glass-transitioned during the folding or flattening process of the circuit board, thereby avoiding the deviation of the bending stress neutral line of the second part of the circuit board and the loss of protection of the first sub-insulating layer for the first wiring layer of the second part.

[0080] In one possible implementation, the pressing is a hot pressing process, the hot pressing temperature of the hot pressing process is in the range of 150° C. to 200° C., and the hot pressing time of the hot pressing process is in the range of 0.5 hour to 3 hours;

[0081] Alternatively, the pressing is a pressure transfer process, the pressure transfer temperature of the pressure transfer process is in the range of 170° C. to 190° C., and the hot pressing time of the pressure transfer process is in the range of 0.5 hour to 3 hours;

[0082] Alternatively, the pressing is a rapid pressing process, the rapid pressing temperature of the rapid pressing process is in the range of 170° C. to 190° C., and the rapid pressing time of the rapid pressing process is in the range of 1 minute to 8 minutes.

[0083] It can be understood that this embodiment adopts a one-time pressing process, which can avoid the first sub-insulating layer from undergoing glass transition under multiple high temperatures, thereby preventing the stress neutral line of the second part of the circuit board from losing protection for the first wiring layer of the second part under movement and folding due to offset. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

[0085] FIG1 is a schematic structural diagram of a wireless charging system provided in an embodiment of the present application;

[0086] FIG2 is a schematic structural diagram of an electronic device of an embodiment of the wireless charging system shown in FIG1 ;

[0087] FIG3 is a schematic structural diagram of an embodiment of the charging coil module shown in FIG2 ;

[0088] FIG4 is a schematic structural diagram of an embodiment of the charging coil shown in FIG3 ;

[0089] FIG5 is a partially exploded view of an embodiment of the charging coil shown in FIG4 ;

[0090] FIG6 is a schematic structural diagram of the substrate, the first coil, and the second coil shown in FIG4 ;

[0091] FIG7 is a schematic structural diagram of an embodiment of the first coil shown in FIG6 ;

[0092] FIG8 is a partial cross-sectional view of an embodiment of the structure shown in FIG6 along line AA;

[0093] FIG9 is a partial cross-sectional view of an embodiment of the charging coil module shown in FIG3 taken along line BB;

[0094] FIG10 is a schematic diagram of a partial structure of an embodiment of the charging coil module shown in FIG3 ;

[0095] FIG11 is a schematic structural diagram of a portion of the charging coil module shown in FIG10 at another angle;

[0096] FIG12 is a flow chart of the preparation of the charging coil module shown in FIG3 ;

[0097] 13 to 23 are schematic structural diagrams 1 to 11 of some steps in the method for preparing a charging coil module shown in FIG. 12 in some embodiments;

[0098] FIG24 is a partial cross-sectional view of another embodiment of the charging coil module shown in this embodiment;

[0099] FIG25 is a schematic structural diagram of an embodiment of an electronic device provided in an embodiment of the present application in an unfolded state;

[0100] FIG26 is a partially exploded view of one embodiment of the electronic device shown in FIG25 ;

[0101] FIG27 is a schematic structural diagram of the charging coil module shown in FIG25 in one embodiment;

[0102] FIG28 is a partial cross-sectional view of an embodiment of the charging coil module shown in FIG27 taken along line GG;

[0103] FIG29 and FIG30 are structural schematic diagrams 1 and 2 of some steps in the method for preparing the charging coil module shown in FIG12 in other embodiments;

[0104] FIG31 is a flowchart of one embodiment of the manufacturing process of the charging coil module shown in FIG28;

[0105] FIG32 is a structural schematic diagram 1 of some steps in the method for preparing a charging coil module shown in FIG31 in some embodiments. DETAILED DESCRIPTION

[0106] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0107] In the description of the embodiments of the present application, it should be noted that, unless otherwise expressly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium. In addition, two components are integrated into an integrated structure through an integral molding process, which means that in the process of forming one of the two components, the component is connected to the other component, and there is no need to connect the two components through further processing (such as bonding, welding, snap connection, screw connection).

[0108] In addition, the directional terms mentioned in the embodiments of the present application, such as "left" and "right", are only used to refer to the directions in the accompanying drawings. Therefore, the directional terms used are for better and clearer description and understanding of the embodiments of the present application, and do not indicate or imply that the devices or components referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, they should not be understood as limiting the embodiments of the present application. "Multiple" means at least two.

[0109] In the embodiments of this application, the terms "first," "second," "third," and "fourth" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature specified as "first," "second," "third," and "fourth" may explicitly or implicitly include one or more of the features.

[0110] In the embodiments of this application, "and / or" is simply a description of the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this document generally indicates that the related objects are in an "or" relationship.

[0111] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in some embodiments" or "in other embodiments" appearing in different places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "having," and their variations all mean "including but not limited to," unless otherwise specifically emphasized.

[0112] It is understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It should also be noted that, for ease of description, only the parts related to the invention are shown in the drawings.

[0113] Fig. 1 is a schematic diagram of the structure of a wireless charging system 1000 provided in an embodiment of the present application. Fig. 2 is a schematic diagram of the structure of an electronic device 100 of the wireless charging system 1000 shown in Fig. 1 in an embodiment.

[0114] As shown in Figures 1 and 2, the wireless charging system 1000 may include an electronic device 100 and a wireless charger 200. When the wireless charger 200 is plugged into a power source, the wireless charger 200 can be used to wirelessly charge the electronic device 100. Figures 1 and 2 illustrate an example in which the electronic device 100 includes a charging coil module 1. The electronic device 100 may be a mobile phone, a tablet computer, a foldable terminal device, or a wearable device, or other devices with wireless charging capabilities. Wearable devices may be smart bracelets, smart watches, smart glasses, and the like. The electronic device 100 of the embodiment shown in Figures 1 and 2 is described using a mobile phone as an example.

[0115] In this embodiment, the electronic device 100 can be a candy bar device (i.e., a non-foldable electronic device) or a foldable device (i.e., a foldable electronic device). The following describes these two types of electronic devices 100 in detail with reference to the accompanying drawings. First, the description will take the case of a candy bar device as an example.

[0116] As shown in Figures 1 and 2, electronic device 100 is a candy bar phone. Electronic device 100 may include a charging coil module 1, a display screen 2, a housing 3, and a load 4. Display screen 2 may be fixed to housing 3. Display screen 2 and housing 3 may enclose an interior space of electronic device 100. Charging coil module 1 and load 4 may both be located within the interior space of electronic device 100. Load 4 may be a battery, chip, speaker, camera, or other device to be charged. Figures 1 and 2 illustrate an example where load 4 is a battery.

[0117] It should be understood that Figures 1 and 2 merely schematically illustrate certain components of electronic device 100, and the actual shapes and sizes of these components are not limited by Figure 1 or the accompanying figures. Furthermore, since charging coil module 1 and load 4 are internal components of electronic device 100, Figures 1 and 2 schematically illustrate charging coil module 1 and load 4 using dashed lines. In other embodiments, when electronic device 100 has other configurations, display screen 2 may not be included.

[0118] As shown in Figures 1 and 2, the charging coil module 1 can be electrically connected to a load 4. When the electronic device 100 is in a charging state, the charging coil module 1 can charge the load 4.

[0119] FIG3 is a schematic structural diagram of an embodiment of the charging coil module 1 shown in FIG2 .

[0120] As shown in Figure 3, the charging coil module 1 may include a charging coil 10 and a circuit board 20. The charging coil 10 and the circuit board 20 are an integral structure. It can be understood that in this embodiment, the circuit board 20 is formed at the same time as the structure of the charging coil 10 is formed. In this way, compared with the solution of forming the charging coil 10 and the circuit board 20 separately and then electrically connecting the charging coil 10 and the circuit board 20 through the BTB, the solution of this embodiment can save the preparation steps of the charging coil module 1, thereby reducing the cost investment. In addition, this embodiment can omit the BTB, which can further save the device cost investment on the one hand, and on the other hand, it can reduce the electrical connection path between the charging coil 10 and the circuit board 20, thereby reducing losses.

[0121] It is understood that the charging coil module 1 may include more structures. For example, the charging coil module 1 may also include a system on chip (SOC) (not shown). The SOC may be integrated on the circuit board 20.

[0122] It should be noted that the circuit board can be a main board in an electronic device or a flexible board in an electronic device.

[0123] Fig. 4 is a schematic structural diagram of an embodiment of the charging coil 10 shown in Fig. 3. Fig. 5 is a partially exploded view of an embodiment of the charging coil 10 shown in Fig. 4.

[0124] As shown in FIG. 4 and FIG. 5 , illustratively, the charging coil 10 includes a substrate 11 , a first coil 12 , a second coil 13 , a first insulating layer 14 , a second insulating layer 15 , a first nanocrystalline layer 16 , and a first graphite layer 17 .

[0125] In one embodiment, the substrate 11 of the charging coil 10 can be made of an insulating material. For example, the substrate 11 of the charging coil 10 comprises a three-layer structure, specifically comprising a first PI layer, an adhesive layer, and a second PI layer stacked in sequence. The adhesive layer is made of a polymer-based insulating adhesive (booding sheet).

[0126] In one embodiment, the first coil 12 and the second coil 13 may both be made of metal. For example, the first coil 12 and the second coil 13 may both be made of copper.

[0127] In one embodiment, the first insulating layer 14 and the second insulating layer 15 of the charging coil 10 may be made of an insulating material. For example, the first insulating layer 14 and the second insulating layer 15 of the charging coil 10 are both two-layer structures, specifically including a PI layer and an adhesive layer.

[0128] As shown in Figures 4 and 5 , the substrate 11 of the charging coil 10 may include a first surface 111 and a second surface 112 disposed in opposite directions. The first coil 12 may be disposed on the first surface 111 of the substrate 11 of the charging coil 10. The second coil 13 may be disposed on the second surface 112 of the substrate 11 of the charging coil 10. In other words, the substrate 11 of the charging coil 10 is disposed between the first coil 12 and the second coil 13.

[0129] Furthermore, the first insulating layer 14 of the charging coil 10 may be provided on and cover the first coil 12. The first nanocrystalline layer 16 may be provided on a side of the first insulating layer 14 away from the first coil 12. The first graphite layer 17 may connect to the surface of the first nanocrystalline layer 16 away from the first insulating layer 14. Furthermore, the second insulating layer 15 may be provided on and cover the second coil 13. The first insulating layer 14 of the charging coil 10 and the first coil 12 are located on the same side of the substrate 11 of the charging coil 10. The second insulating layer 15 of the charging coil 10 and the second coil 13 are located on the same side of the substrate 11 of the charging coil 10.

[0130] It is understood that the first insulating layer 14 of the charging coil 10 can be used to protect the first coil 12 , and the second insulating layer 15 of the charging coil 10 can be used to protect the second coil 13 .

[0131] It is understood that the charging coil 10 may include more or fewer structures. For example, the charging coil 10 may include more structures. The charging coil 10 may also include a second nanocrystalline layer and a second graphite layer. The second nanocrystalline layer and the second graphite layer are sequentially stacked on the second insulating layer 15. For another example, the charging coil 10 may include fewer structures. The charging coil 10 may also not include the first nanocrystalline layer 16 and / or the first graphite layer 17.

[0132] Figure 6 is a schematic diagram of the structure of the substrate 11, first coil 12, and second coil 13 shown in Figure 4. Figure 7 is a schematic diagram of the structure of an embodiment of the first coil 12 shown in Figure 6. Figure 8 is a partial cross-sectional view of an embodiment of the structure shown in Figure 6 along line AA.

[0133] As shown in Figures 6 to 8 , the first coil 12 may include a first lead portion 121 and a first main body portion 122. The first lead portion 121 is connected to the output end of the first main body portion 122. It will be appreciated that in Figure 6 , since the first coil 12 is located at the bottom of the second coil 13 and the second coil 13 partially obscures the first coil 12, the first coil 12 is not shown in Figure 6 .

[0134] Exemplarily, the first main body 122 includes a plurality of first sub-coils 1221 spaced apart and electrically connected to each other. It is understood that one first sub-coil 1221 can constitute one turn of the first coil 12. The number of turns of the first coil 12 is greater than or equal to 2.

[0135] For example, one end of the first lead portion 121 may be electrically connected to the outermost first sub-coil 1221 among the plurality of first sub-coils 1221 .

[0136] Exemplarily, the spacing D1 between two adjacent first sub-coils 1221, that is, the distance between two adjacent turns in the first coil 12, can be in the range of 40 microns to 100 microns. For example, the spacing between two adjacent first sub-coils 1221 can be 40 microns, 50 microns, 60 microns, 80 microns, or 100 microns. In this case, the line spacing of the first coil 12 is relatively narrow. The first coil 12 can achieve a narrow spacing setting. It is understood that a first gap 124 can be formed between two adjacent first sub-coils 1221. The spacing between two adjacent first sub-coils 1221 can be the minimum width of the first gap 124.

[0137] The structure of an embodiment of the first sub-coil 1221 is described in detail below with reference to the relevant drawings.

[0138] As shown in Figures 6 to 8, the first sub-coil 1221 may include a first conductive portion 1222 and a second conductive portion 1223. The first conductive portion 1222 is disposed on the first surface 111 of the substrate 11. The second conductive portion 1223 wraps around the outer surface of the first conductive portion 1222. For example, the second conductive portion 1223 may be formed on the first conductive portion 1222 through an electroplating process.

[0139] In some embodiments, the second conductive portion 1223 is formed on the first conductive portion 1222 of the first coil 12 by wire plating.

[0140] It is understandable that the distance D1 between two adjacent first sub-coils 1221 is the distance between the second conductive portions 1223 of two adjacent first sub-coils 1221. The space between the second conductive portions 1223 of two adjacent first sub-coils 1221 is the first gap 124.

[0141] In some embodiments, the first conductive portion 1222 of the first sub-coil 1221 further includes two layers of metal, wherein the second layer of metal is formed on the first layer of metal by electroplating, and the first layer of metal is disposed on the substrate 11 of the charging coil 10 .

[0142] 6 and 8 , the second coil 13 may include a second lead portion 131 and a second body portion 132 . The second lead portion 131 is connected to an output end of the second body portion 132 .

[0143] Exemplarily, the second main body 132 includes a plurality of second sub-coils 1321 spaced apart and electrically connected to each other. It is understood that one second sub-coil 1321 can constitute one turn of the second coil 13. The number of turns of the second coil 13 is greater than or equal to 2.

[0144] For example, one end of the second lead portion 131 may be electrically connected to the outermost second sub-coil 1321 among the plurality of second sub-coils 1321 .

[0145] Exemplarily, the spacing D2 between two adjacent second sub-coils 1321, that is, the distance between two adjacent turns in the second coil 13, can be in the range of 40 microns to 100 microns. For example, the spacing between two adjacent second sub-coils 1321 can be 40 microns, 50 microns, 60 microns, 80 microns, or 100 microns. In this case, the line spacing of the second coil 13 is relatively narrow. The second coil 13 can be configured to have a narrow spacing. It is understood that a second gap 134 can be formed between two adjacent second sub-coils 1321. The spacing between two adjacent second sub-coils 1321 can be the minimum width of the second gap 134.

[0146] The structure of an embodiment of the second sub-coil 1321 is described in detail below with reference to the relevant drawings.

[0147] As shown in Figures 6 to 8, the second sub-coil 1321 may include a first conductive portion 1322 and a second conductive portion 1323. The first conductive portion 1322 is disposed on the second surface 112 of the substrate 11. The second conductive portion 1323 wraps around the outer surface of the first conductive portion 1322. For example, the second conductive portion 1323 may be formed on the first conductive portion 1322 through an electroplating process.

[0148] In some embodiments, the second conductive portion 1323 is formed on the first conductive portion 1322 of the second coil 13 by wire plating.

[0149] It is understandable that the distance D2 between two adjacent second sub-coils 1321 is the distance between the second conductive portions 1323 of two adjacent second sub-coils 1321. The space between the second conductive portions 1323 of two adjacent second sub-coils 1321 is the second gap 134.

[0150] In some embodiments, the first conductive portion 1322 of the second sub-coil 1321 further includes two layers of metal, wherein the second layer of metal is formed on the first layer of metal by electroplating, and the first layer of metal is disposed on the substrate 11 of the charging coil 10 .

[0151] It is understandable that the second coil 13 and the first coil 12 can be of the same or similar structure, symmetrical or partially symmetrical structure, or different structure. In this embodiment, the second coil 13 and the first coil 12 are symmetrical structures. The basic design of the component structure of the second coil 13, the connection relationship design between the components, and the connection relationship design between the components and other structures outside the assembly can all refer to the relevant scheme of the first coil 12. At the same time, the second coil 13 and the first coil 12 are allowed to have some differences in the detailed structure or position arrangement of the components. For example,

[0152] For example, the charging coil 10 may further include multiple vias (not shown). Each of the multiple vias may penetrate the first side 111 and the second side 112 of the substrate 11 of the charging coil 10. The multiple first sub-coils 1221 in the first coil 12 may be electrically connected to the multiple second sub-coils 1321 in the second coil 13 through the multiple vias 14, thereby achieving electrical connection between the internal wiring of the entire charging coil 10.

[0153] It is understood that the first coil 12 and the second coil 13 of the charging coil 10 can both be arranged with a narrow spacing. Given the same dimensions, the charging coil 10 in this embodiment has a higher metal (e.g., copper) content per unit area than a charging coil without a narrow spacing, effectively reducing charging losses and helping to extend the time the charging coil 10 maintains a peak power of 50W during charging, thereby improving charging efficiency.

[0154] Furthermore, compared to charging coil modules that do not implement a narrow pitch arrangement, assuming the outer diameter of the charging coil 10 remains the same, the charging coil 10 in this embodiment can achieve a narrow pitch arrangement for both the first coil 12 and the second coil 13 without reducing the volume of the wiring in the first coil 12 and the second coil 13. This reduces the thickness of the first coil 12 and / or the second coil 13, thereby reducing the overall thickness of the charging coil 10. In other words, the charging coil 10 in this embodiment can achieve a miniaturized configuration by reducing the distance between adjacent turns in the first coil 12 and the second coil 13.

[0155] FIG9 is a partial cross-sectional view of the charging coil module 1 shown in FIG3 taken along line BB according to an embodiment.

[0156] As shown in FIG9 , the circuit board 20 includes a substrate 21, a first routing layer 22, a second routing layer 23, a first insulating layer 24, and a second insulating layer 25. It is understood that the circuit board 20 may include more or fewer structures. For example, the circuit board 20 may include more structures. The circuit board 20 may also include multiple insulating layers and multiple routing layers. The multiple insulating layers and multiple routing layers may be alternately stacked on the first routing layer 22 and / or the second routing layer 23. For another example, the circuit board 20 may include fewer structures. The circuit board 20 may also not include the first insulating layer 24 and / or the second insulating layer 25.

[0157] In one embodiment, the substrate 21 of the circuit board 20 can be made of an insulating material. For example, the substrate 21 of the circuit board 20 comprises a three-layer structure, specifically comprising a first PI layer, an adhesive layer, and a second PI layer stacked in sequence. The adhesive layer is made of a polymer-based insulating adhesive (booding sheet).

[0158] In one embodiment, the first wiring layer 22 and the second wiring layer 23 may both be made of metal. For example, the first wiring layer 22 and the second wiring layer 23 may both be made of copper.

[0159] In one embodiment, the first insulating layer 24 and the second insulating layer 25 of the circuit board 20 can be made of insulating materials. For example, the first insulating layer 24 and the second insulating layer 25 of the circuit board 20 are both two-layer structures, specifically including a PI layer and an adhesive layer.

[0160] As shown in FIG9 , the substrate 21 of the circuit board 20 may include a first surface 211 and a second surface 212 disposed in opposite directions. The first trace layer 22 may be disposed on the first surface 211 of the substrate 21 of the circuit board 20. The second trace layer 23 may be disposed on the second surface 212 of the substrate 21 of the circuit board 20. In other words, the substrate 21 of the circuit board 20 is located between the first trace layer 22 and the second trace layer 23.

[0161] Furthermore, the first insulating layer 24 of the circuit board 20 can be disposed on and cover the first wiring layer 22. The second insulating layer 25 of the circuit board 20 can be disposed on and cover the second wiring layer 23. The first insulating layer 24 of the circuit board 20 can be used to protect the first wiring layer 22. The second insulating layer 25 of the circuit board 20 can be used to protect the second wiring layer 23.

[0162] It is understood that the first trace layer 22 of the circuit board 20 can be composed of multiple traces, wherein adjacent traces are arranged with a gap between them. Thus, when the first insulating layer 24 of the circuit board 20 is disposed on and covers the first trace layer 22, the first insulating layer 24 of the circuit board 20 can fill the gap between the two adjacent traces. Similarly, the arrangement of the second trace layer 23 of the circuit board 20 can refer to the arrangement of the first trace layer 22 of the circuit board 20.

[0163] Fig. 10 is a schematic diagram of a portion of the structure of an embodiment of the charging coil module 1 shown in Fig. 3. Fig. 11 is a schematic diagram of the structure of a portion of the charging coil module 1 shown in Fig. 10 from another angle.

[0164] As shown in Figures 10 and 11, the first routing layer 22 includes a first routing line 221. The second routing layer 23 includes a second routing line 231. The first routing line 221 of the first routing layer 22 is integrally formed with the first lead portion 121 of the first coil 12. The second routing line 231 of the second routing layer 23 is integrally formed with the second lead portion 131 of the second coil 13. Thus, one end of the first routing line 221 is electrically connected to the first lead portion 121 of the first coil 12, and the other end is electrically connected to the BTB connector 61. The second routing line 231 has one end electrically connected to the second lead portion 131 of the second coil 13, and the other end is electrically connected to the BTB connector 61. In this case, the BTB connector 61 can be electrically connected to the load 4 via another circuit board. It is understood that the first coil 12 and the second coil 13 can be directly electrically connected to the first routing line 221 and the second routing line 231 of the circuit board 20, thereby significantly shortening the charging path between the charging coil 10 and the load 4, thereby reducing link loss.

[0165] It is understood that the location of the BTB connector 61 is not limited to the locations shown in Figures 10 and 11. The BTB connector 61 can be located anywhere on the circuit board 20. The specific location can be flexibly adjusted based on actual needs. Furthermore, the load 4 can also be located directly on the circuit board 20. In this case, the circuit board 20 can be the mainboard of the electronic device 100.

[0166] In other embodiments, the first coil 12 may not be electrically connected to the BTB connector 61 via the first trace 221. For example, when the circuit board 20 includes more trace layers, the first coil 12 may be electrically connected to the BTB connector 61 via traces on other trace layers and vias on the circuit board 20. Similarly, the second coil 13 may not be electrically connected to the BTB connector 61 via the second trace 231. For example, when the circuit board 20 includes more trace layers, the second coil 13 may be electrically connected to the BTB connector 61 via traces on other trace layers and vias on the circuit board 20.

[0167] In one embodiment, the first routing layer 22 may further include a third routing line 222. For example, the third routing line 222 may be electrically connected between two electronic devices to transmit electrical signals between the two electronic devices. For example, the third routing line 222 may also be used to provide a wired power supply path for the load 4.

[0168] In one embodiment, the line width of the third trace 222 may be greater than or equal to 40 micrometers. For example, the line width of the third trace 222 is equal to 40 micrometers.

[0169] In other embodiments, the first routing layer 22 may not include the third routing line 222 .

[0170] In one embodiment, the second routing layer 23 includes a fourth routing line 232. The fourth routing line 232 and the third routing line 222 may have similar or identical configurations, and details thereof will not be repeated herein.

[0171] As shown in Figures 8 and 9, the substrate 21 of the circuit board 20 is arranged on the same layer as the substrate 11 of the charging coil 10, and is an integrally molded structure. The substrate 21 of the circuit board 20 and the substrate 11 of the charging coil 10 can be formed by the same step. For example, the first PI layer of the substrate 11 of the charging coil 10 is arranged on the same layer as the first PI layer of the substrate 21 of the circuit board 20, and is an integrally molded structure. The adhesive layer of the substrate 11 of the charging coil 10 is arranged on the same layer as the adhesive layer of the substrate 21 of the circuit board 20, and is an integrally molded structure. The second PI layer of the substrate 11 of the charging coil 10 is arranged on the same layer as the second PI layer of the substrate 21 of the circuit board 20, and is an integrally molded structure.

[0172] As shown in Figures 8 and 9 , the first trace layer 22 of the circuit board 20 and the first coil 12 of the charging coil 10 can be provided on the same layer. In this case, the first trace layer 22 of the circuit board 20 and the first coil 12 of the charging coil 10 can be formed in the same process step. Specifically, the first trace 221 of the first trace layer 22 and the first lead portion 121 of the first coil 12 of the charging coil 10 are integrally formed.

[0173] As shown in Figures 8 and 9, the second trace layer 23 of the circuit board 20 and the second coil 13 of the charging coil 10 can be provided on the same layer. In this case, the second trace layer 23 of the circuit board 20 and the second coil 13 of the charging coil 10 can be formed in the same process step. The second trace 231 of the second trace layer 23 and the second lead portion 131 of the second coil 13 are integrally formed.

[0174] As shown in Figures 9 and 4 , the first insulating layer 24 of the circuit board 20 and the first insulating layer 14 of the charging coil 10 can be provided on the same layer. The first insulating layer 24 of the circuit board 20 and the first insulating layer 14 of the charging coil 10 are integrally formed. In this case, the first insulating layer 24 of the circuit board 20 and the first insulating layer 14 of the charging coil 10 can be formed using the same process steps.

[0175] As shown in Figures 9 and 4 , the second insulating layer 25 of the circuit board 20 and the second insulating layer 15 of the charging coil 10 can be provided on the same layer. The second insulating layer 25 of the circuit board 20 and the second insulating layer 15 of the charging coil 10 are integrally formed. In this case, the second insulating layer 25 of the circuit board 20 and the second insulating layer 15 of the charging coil 10 can be formed using the same process steps.

[0176] It can be understood that by placing the substrate 21 of the circuit board 20 on the same layer as the substrate 11 of the charging coil 10, the first routing layer 22 on the same layer as the first coil 12, and the second routing layer 23 on the same layer as the second coil 13, the charging coil 10 and the circuit board 20 form a more cohesive structure, thus improving the structural strength of the charging coil module 1. Thus, compared to the solution of stacking the charging coil 10 on the circuit board 20, the charging coil 10 and the circuit board 20 in this embodiment have an overlapping area in the thickness direction, which can significantly reduce the thickness of the charging coil module 1.

[0177] It can be understood that, compared with the solution of preparing the charging coil 10 and the circuit board 20 separately and then connecting the charging coil 10 to the circuit board 20 through a BTB connector, in this embodiment, the circuit board 20 can be prepared together with the charging coil 10, or the charging coil 10 can be prepared together with the circuit board 20. On the one hand, this can save a process of preparing the charging coil 10 or the circuit board 20, thereby reducing the cost investment of the charging coil module 1; on the other hand, the charging coil 10 and the circuit board 20 are arranged into an integral structure, which can save the assembly steps of the charging coil module 1 and reduce the difficulty of preparing the charging coil module 1.

[0178] In addition, compared to the first coil 12 and the second coil 13 being electrically connected to the circuit board 20 through a BTB connector, the first coil 12 and the second coil 13 in this embodiment can be directly electrically connected to the wiring on the circuit board 20 (for example, the wiring of the first wiring layer 22 or the wiring of the second wiring layer 23 of the circuit board 20). On the one hand, this can shorten the charging path between the charging coil 10 and the load 4, thereby reducing the link loss. On the other hand, it can save the BTB connector, simplify the structure of the charging coil module 1, and reduce the cost investment of the charging coil module 1.

[0179] It can be understood that the first insulating layer 14 of the charging coil 10 is arranged on the same layer as the first insulating layer 24 of the circuit board 20. In this way, the first insulating layer 24 of the circuit board 20 can be prepared together with the first insulating layer 14 of the charging coil 10, or the first insulating layer 14 of the circuit board 20 can be prepared together with the first insulating layer 14 of the charging coil 10. In this way, on the one hand, a process of preparing the first insulating layer 14 of the charging coil 10 or the first insulating layer 24 of the circuit board 20 can be omitted, thereby reducing the cost investment of the charging coil module 1.

[0180] It is understood that while the charging coil module 1 achieves higher wireless charging efficiency by reducing link loss, the first coil 12 and second coil 13 of the charging coil 10 can be arranged with a narrow spacing. Given the same dimensions, the charging coil 10 in this embodiment has a higher metal content (e.g., copper) per unit area compared to a charging coil 10 without a narrow spacing, effectively reducing charging losses, extending the time the charging coil 10 maintains a peak power of 50W during charging, and improving charging efficiency.

[0181] It is understandable that while the charging coil module 1 achieves higher wireless charging efficiency by reducing link loss, the first coil 12 and the second coil 13 in the charging coil 10 can achieve a high thickness (for example, a thickness greater than 40 microns) and a high line width (for example, a line width greater than 40 microns) while achieving a narrow spacing setting. This is conducive to reducing the impedance of the charging path. For example, compared to the charging impedance of a traditional charging coil module (for example, 45.2 omh), the charging coil module 1 of this embodiment can be reduced to 25.6 omh, which is a reduction of nearly 43%. In addition, the heat dissipation capacity of the charging coil module 1 can also be improved.

[0182] The above specifically introduces the specific structure of the charging coil module 1 of the present application. The following will specifically introduce the preparation process of the charging coil module 1 with reference to the accompanying drawings.

[0183] Figure 12 is a flow chart for preparing the charging coil module 1 shown in Figure 3. Figures 13 to 23 are schematic diagrams of structures (1 to 11) of some steps in the method for preparing the charging coil module 1 shown in Figure 12 in some embodiments. Figure 15 is a partial cross-sectional view of an embodiment of the double-sided board 30 shown in Figure 14 at line CC. Figure 19 is a partial cross-sectional view of an embodiment of the structural member shown in Figure 18 at line CC. Figure 20 is a partial cross-sectional view of a second conductive portion 1223 formed on the first conductive portion 1222 shown in Figure 19. Figure 23 is a partial cross-sectional view of a first nanocrystalline layer 16 and a first graphite layer 17 formed on the first insulating layer 14 shown in Figure 21.

[0184] The preparation process of the charging coil module 1 is not limited to steps S110-S160 as shown in FIG12 :

[0185] S110: Prepare a double-sided board 30. As shown in Figures 13 to 15, the double-sided board 30 includes a substrate 31, a first etching layer 32, and a second etching layer 33. The first etching layer 32 and the second etching layer 33 are respectively disposed on the first side 311 and the second side 312 of the substrate 31. The first side 311 and the second side 312 of the double-sided board 30 are disposed opposite each other. The substrate 31 of the double-sided board 30 is formed into the substrate 11 of the charging coil 10 (see Figure 8) and the substrate 21 of the circuit board 20 (see Figure 9).

[0186] Exemplarily, in the step of preparing the double-sided board 30, step S110 further includes:

[0187] The first substrate 341 of the first flexible copper-clad laminate 34 (FCCL) and the second substrate 351 of the second flexible copper-clad laminate 35 are bonded to both surfaces of the adhesive sheet 36. The first flexible copper-clad laminate 34 includes a first substrate 341 and a first metal layer 342. The first metal layer 342 is disposed on a first surface 3411 of the first substrate 341. The second flexible copper-clad laminate 35 includes a second substrate 351 and a second metal layer 352. The second metal layer 352 is disposed on a first surface 3511 of the second substrate 351. The second surface 3412 of the first substrate 341 and the second surface 3512 of the second substrate 351 are bonded to both surfaces of the adhesive sheet 36.

[0188] For example, the first substrate 341 and the second substrate 351 may be made of insulating materials such as polyester film or polyimide (PI), etc. The first metal layer 342 and the second metal layer 352 may be made of copper.

[0189] For example, the weight of the first metal layer 342 of the first flexible copper clad laminate 34 may be one-third of an ounce (oz). The weight of the second metal layer 352 of the second flexible copper clad laminate 35 may be one-third of an ounce (oz).

[0190] For example, in the Z-axis direction, the thickness of the first substrate 341 of the first flexible copper clad laminate 34 is less than or equal to 12.5 micrometers. The thickness of the second substrate 351 of the second flexible copper clad laminate 35 is less than or equal to 12.5 micrometers.

[0191] For example, the adhesive sheet 36 may be made of a polymer material having adhesiveness.

[0192] Exemplarily, in the Z-axis direction, the thickness of the adhesive sheet is less than or equal to 15 microns.

[0193] The first flexible copper clad laminate 34 , the adhesive sheet 36 and the second flexible copper clad laminate 35 are laminated to form a double-sided board 30 .

[0194] In one embodiment, the first flexible copper clad laminate 34 , the adhesive sheet 36 and the second flexible copper clad laminate 35 may be pressed into a whole by heat pressing, transfer pressing, rapid pressing or vacuum pressing, thereby forming a double-sided board 30 with a strong and stable structure.

[0195] It can be understood that the first base 341 of the first flexible copper clad laminate 34 , the adhesive sheet 36 and the second base 351 of the second flexible copper clad laminate 35 constitute the substrate 31 of the double-sided board 30 , that is, the substrate 11 of the charging coil 10 and the substrate 21 of the circuit board 20 .

[0196] For example, the first base 341 of the first flexible copper-clad laminate 34 can constitute the first PI layer of the substrate 11 of the charging coil 10 and the first PI layer of the substrate 21 of the circuit board 20. The adhesive sheet 36 can constitute the adhesive layer of the substrate 11 of the charging coil 10 and the adhesive layer of the substrate 21 of the circuit board 20. The second base 351 of the second flexible copper-clad laminate 35 can constitute the second PI layer of the substrate 11 of the charging coil 10 and the second PI layer of the substrate 21 of the circuit board 20.

[0197] It is understood that the first metal layer 342 of the first flexible copper clad laminate 34 constitutes the first etching layer 32 of the double-sided board 30 , and the second metal layer 352 of the second flexible copper clad laminate 35 constitutes the second etching layer 33 of the double-sided board 30 .

[0198] For example, in the step of preparing the double-sided board 30, step S110 further includes drilling holes in the double-sided board 30 to form a plurality of vias. Each via can extend from the first metal layer 342 of the first flexible copper-clad laminate 34 to the second metal layer 352 of the second flexible copper-clad laminate 35. The vias can be used to electrically connect the first metal layer 342 of the first flexible copper-clad laminate 34 to the second metal layer 352 of the second flexible copper-clad laminate 35.

[0199] For example, during the steps of preparing the double-sided board 30, step S110 further includes performing pre-treatment, micro-etching, and other operations on the double-sided board 30 to facilitate subsequent preparation. For example, the pre-treatment may include using a brush to remove contaminants from the first metal layer 342 and the second metal layer 352, thereby increasing the surface roughness of the first metal layer 342 and the second metal layer 352. The micro-etching may include using chemical etching to increase the surface roughness of the first metal layer 342 and the second metal layer 352.

[0200] As shown in Figures 14 and 15, exemplarily, in the steps of preparing the double-sided board 30, step S110 also includes: electroplating to form a third metal layer 343 on the first metal layer 342 of the first flexible copper clad board 34, and the first metal layer 342 and the third metal layer 343 constitute a first etching layer 32; and / or, electroplating to form a fourth metal layer 353 on the second metal layer 352 of the second flexible copper clad board 35, and the second metal layer 352 and the fourth metal layer 353 constitute a second etching layer 33.

[0201] It is understandable that the third metal layer 343 is formed on the first metal layer 342 of the first flexible copper clad laminate 34 by electroplating through the electroplating process, thereby increasing the thickness of the first metal layer 342 to meet the thickness required by etching, thereby facilitating the operation of subsequent processes.

[0202] It is understandable that the fourth metal layer 353 is formed on the second metal layer 352 of the second flexible copper clad laminate 35 by electroplating through the electroplating process, thereby increasing the thickness of the second metal layer 352 to meet the thickness required by etching, thereby facilitating the operation of subsequent processes.

[0203] For example, in the Z-axis direction, the thickness of the first etching layer 32 may be in the range of 10 micrometers to 60 micrometers. For example, the thickness of the first etching layer 32 may be 10 micrometers, 20 micrometers, 25 micrometers, 30 micrometers, 42 micrometers, or 60 micrometers.

[0204] For example, in the Z-axis direction, the thickness of the second etching layer 33 is in the range of 10 micrometers to 60 micrometers. For example, the thickness of the second etching layer 33 can be 10 micrometers, 20 micrometers, 25 micrometers, 30 micrometers, 42 micrometers, or 60 micrometers.

[0205] S120: Processing the first etched layer 32 of the double-sided board 30 forms the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. As shown in FIG10 , the first coil 12 includes a first lead portion 121. The first trace layer 22 includes a first trace 221. The first lead portion 121 and the first trace 221 are integrally formed.

[0206] As shown in Figures 16 to 19 , in the process of processing the first etching layer 32 of the double-sided board 30, step S120 includes processes such as lamination, exposure, development, etching, and stripping. For example, the lamination process may involve laminating a first photoresist layer 51 onto the first etching layer 32 of the double-sided board 30. The exposure process may involve exposing the first etching layer 32 to light using a light source 52 through a mask 53. This forms a first pattern 511 and a second pattern 512 on the first photoresist layer 51. The first pattern 511 is exposed to light, while the second pattern 512 is not exposed to light. Furthermore, the first pattern 511 is a pattern comprising the first coil 12 and the first trace layer 22. The development process may involve using a developer to remove either the first pattern 511 or the second pattern 512. It will be appreciated that whether the developer removes the first pattern 511 or the second pattern 512 depends on the material and structure of the first photoresist layer 51. The choice can be made based on specific needs. This embodiment uses the example of removing the second pattern 512 with a developer. The etching process can be a plasma etching process. Specifically, by etching the portion of the first etching layer 32 exposed relative to the first photoresist layer 51, that is, etching the portion of the first etching layer 32 opposite to the second pattern 512, so that after etching, the portion of the first etching layer 32 opposite to the first pattern 511 remains. The film stripping process can be to remove the first pattern 511 of the first etching layer 32 to expose the portion of the first etching layer 32 opposite to the first pattern 511. For example, the first pattern 511 of the first photoresist layer 51 can be removed by a stripping liquid to expose the portion of the first etching layer 32 opposite to the first pattern 511. It can be understood that the remaining portion of the first etching layer 32 can form the first coil 12 of the charging coil 10 and the first wiring layer 22 of the circuit board 20. In this embodiment, since an electroplating process is performed after the film is stripped, after the processes of film lamination, exposure, development, etching, and film stripping, the remaining portion of the first etched layer 32 can form the first conductive portion 1222 of the first coil 12 of the charging coil 10 and a portion of the first routing layer 22 of the circuit board 20.

[0207] As shown in FIG19 , the space between the first conductive portions 1222 of two adjacent first coils 12 forms a third gap 125. The distance D3 between the first conductive portions 1222 of two adjacent first coils 12 can be the minimum width of the third gap 125. For example, the distance D3 between the first conductive portions 1222 of two adjacent first coils 12 can be between 60 microns and 100 microns. In one embodiment, the distance D3 between the first conductive portions 1222 of two adjacent first coils 12 can be 80 microns.

[0208] It is understood that when the first etching layer 32 of the double-sided board 30 is etched through processes such as lamination, exposure, development, etching, and film stripping, the thicker the metal thickness required to be etched, the greater the side etching produced during the etching process, and the wider the gap (i.e., the first gap) ultimately formed. In this embodiment, by etching the thinner first etching layer 32, the occurrence of side etching is effectively reduced, the width of the gap formed is narrowed, and it is beneficial to control the etching quality of the first coil 12. At the same time, the thinner the etched metal thickness, the shorter the etching time can be, which is beneficial to improving production efficiency.

[0209] In other embodiments, the first etching layer 32 having a relatively thick thickness may also be etched. The width of the third gap 125 formed after etching may be in the range of 100 micrometers to 130 micrometers. In one embodiment, the width of the third gap 125 may be 120 micrometers.

[0210] As shown in FIG. 20 , in the step of processing the first etched layer 32 of the double-sided board 30, step S120 also includes an electroplating process. For example, the electroplating process may include electroplating on the first conductive portion 1222 of the first coil 12 of the charging coil 10 to form the second conductive portion 1223 of the first coil 12. For example, the electroplating process may be lead plating.

[0211] It is understood that the space between the second conductive portions 1223 of two adjacent first coils 12 forms a first gap 124 . The distance D1 between the second conductive portions 1223 of two adjacent first coils 12 may be the minimum width of the first gap 124 .

[0212] For example, the spacing D1 between the second conductive portions 1223 of two adjacent first coils 12 can be between 40 and 60 microns. In this case, the width of the first gap 124 formed between the first coils 12 is relatively narrow. In one embodiment, the spacing D1 between the second conductive portions 1223 of two adjacent first coils 12 can be 55 microns.

[0213] It can be understood that by electroplating the first conductive portion 1222 of the first coil 12 of the charging coil 10 to form the second conductive portion 1223 of the first coil 12, the width of the third gap D3 is reduced, thereby forming a smaller first gap D1. Thus, compared to a charging coil 10 with circuitry directly etched, the first coil 12 of the charging coil 10 of this embodiment can significantly reduce the spacing between adjacent first conductive portions 1222 after electroplating, resulting in a narrowly spaced first coil 12 of the charging coil 10.

[0214] It is understandable that, under the condition that the outer diameter of the first coil 12 of the charging coil 10 is the same, compared with the charging coil that does not implement a narrow spacing setting, the first coil 12 of the charging coil 10 in this embodiment can reduce the thickness of the first coil 12 by reducing the width of the third gap D3 of the first coil 12 without reducing the volume of the circuit of the first coil 12, thereby reducing the overall thickness of the charging coil 10, which is conducive to achieving a thin setting of the charging coil 10.

[0215] In addition, under the condition that the size of the charging coil 10 is the same, compared with the charging coil that does not implement a narrow spacing setting, the metal (such as copper) content per unit area of ​​the charging coil 10 in this embodiment is higher, and the volume of the wiring in the charging coil 10 can be larger, thereby reducing charging losses, which is beneficial to extending the time that the charging coil 10 maintains a 50W peak during the charging process and improving charging efficiency.

[0216] As shown in Figures 14 to 20, in this embodiment, in step S110, a third metal layer 343 is formed on the first metal layer 342 of the first flexible copper-clad laminate 34 through an electroplating process, thereby increasing the thickness of the first metal layer 342. Specifically, the thickness of the first etched layer 32 formed by the first metal layer 342 and the third metal layer 343 is relatively thick. Thus, after the first etched layer 32 is processed to form the first conductive portion 1222 of the first coil 12, the thickness of the first conductive portion 1222 of the first coil 12 remains unchanged during the processing, and the thickness of the first conductive portion 1222 of the first coil 12 also remains unchanged. Thus, the thickness of the first conductive portion 1222 of the first coil 12 is also relatively thick. At this point, when the second conductive portion 1223 of the first coil 12 of the charging coil 10 is formed by electroplating on the first conductive portion 1222, the thickness of the second conductive portion 1223 of the first coil 12 does not need to be too thick. It is understood that when electroplating the second conductive portion 1223 of the first coil 12, the thickness tolerance generated during the preparation process is approximately ±8 microns for every 20 microns of metal thickness. This embodiment reduces the thickness tolerance generated during the second electroplating process by directly electroplating the thicker first conductive portion 1222 of the first coil 12, thereby making the thickness of the second conductive portion 1223 of the first coil 12 more uniform.

[0217] It is understandable that although the above electroplating process is for electroplating the first coil 12 of the charging coil 10, in other embodiments, the first wiring layer 22 of the circuit board 20 can also be electroplated to make the metal (such as copper) content per unit area of ​​the first wiring layer 22 of the circuit board 20 higher, and the volume of the wiring in the first wiring layer 22 of the circuit board 20 can be larger, thereby reducing charging loss.

[0218] In other embodiments, during the process of processing the first etched layer 32 of the double-sided board 30, step S120 may not include the electroplating process. In this case, after the first etched layer 32 of the double-sided board 30 undergoes processes such as lamination, exposure, development, etching, and stripping, the remaining portion of the first etched layer 32 directly forms the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. The details are not further described here.

[0219] S130: Processing the second etched layer 33 of the double-sided board 30 forms the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. As shown in FIG11 , the second coil 13 includes a second lead portion 131. The second trace layer 23 includes a second trace 231. The second lead portion 131 and the second trace 231 are integrally formed.

[0220] For example, in the step of processing the second etched layer 33 of the double-sided board 30, step S130 includes film application, exposure, development, etching, and film stripping. The processes of film application, exposure, development, etching, and film stripping can be referred to as film application, exposure, development, etching, and film stripping in S120. The details are not repeated here.

[0221] For example, in the step of processing the second etching layer 33 of the double-sided board 30, step S130 may also include an electroplating process. For details about the electroplating process, please refer to the electroplating process in S120. The details will not be repeated here.

[0222] It is understandable that the electroplating process in step S130 can be performed simultaneously with the electroplating process in step S120 .

[0223] S140: A first covering layer 41 is formed on the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20, and a second covering layer 42 is formed on the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. As shown in Figures 21 and 22, the first covering layer 41 covers the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. The second covering layer 42 covers the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. It will be understood that the first covering layer 41 forms the first insulating layer 14 of the charging coil 10 and the first insulating layer 24 of the circuit board 20. The second covering layer 42 forms the second insulating layer 15 of the charging coil 10 and the second insulating layer 25 of the circuit board 20.

[0224] It can be understood that since the first coil 12 of the charging coil 10 and the first wiring layer 22 of the circuit board 20 are covered by the first covering layer 41, and the second coil 13 of the charging coil 10 and the second wiring layer 23 of the circuit board 20 are covered by the second covering layer 42, Figure 21 schematically shows the first coil 12 of the charging coil 10, the first wiring layer 22 of the circuit board 20, the second coil 13 of the charging coil 10 and the second wiring layer 23 of the circuit board 20 through dotted lines.

[0225] For example, the first cover layer 41 is made of an insulating material. The first cover layer 41 has a two-layer structure. The first layer of the first cover layer 41 may be PI. The second layer of the first cover layer 41 may be an adhesive (AD). The second layer of the first cover layer 41 is bonded to the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. The first cover layer 41 is used to protect the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20.

[0226] Exemplarily, the second cover layer 42 is made of an insulating material. The second cover layer 42 has a two-layer structure. The first layer of the second cover layer 42 may be PI. The second layer of the second cover layer 42 may be an adhesive (AD). The second layer of the second cover layer 42 is bonded to the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. The second cover layer 42 is used to protect the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20.

[0227] For example, the color of the first covering layer 41 and / or the second covering layer 42 may be black.

[0228] Exemplarily, after the steps of forming the first covering layer 41 on the first coil 12 of the charging coil 10 and the first wiring layer 22 of the circuit board 20, and forming the second covering layer 42 on the second coil 13 of the charging coil 10 and the second wiring layer 23 of the circuit board 20, the first covering layer 41 and / or the second covering layer 42 are pressed together.

[0229] In one embodiment, the first covering layer 41 and / or the second covering layer 42 may be pressed together using processes such as hot pressing, transfer pressing, rapid pressing, or vacuum pressing, thereby forming a charging coil module 1 with a firm and stable structure.

[0230] S150 : forming a first nanocrystalline layer 16 on the first insulating layer 14 of the charging coil 10 .

[0231] For example, the first nanocrystalline layer 16 can be bonded to the first insulating layer 14 of the charging coil 10 by an adhesive layer. The adhesive layer can be a double-sided adhesive.

[0232] S160 : forming a first graphite layer 17 on the first nanocrystalline layer 16 .

[0233] For example, the first graphite layer 17 may be connected to the surface of the first nanocrystalline layer 16 away from the first insulating layer 14 by adhesive bonding and pressing.

[0234] It is understandable that before preparing the charging coil module 1 using the preparation method of this embodiment, the target parameters such as the structure and materials of the charging coil module 1 can be input into the electrical simulation software, and an electromagnetic field can be added to perform a single-body simulation to obtain the simulated DC impedance of the charging coil module 1. Then, according to the obtained simulation values, the parameters such as the line spacing of the first coil 12, the line spacing of the second coil 1313, the thickness of the first nanocrystalline layer 16, and the thickness of the first graphite layer 17 in the charging coil module 1 are adjusted so that the charging coil module 1 obtained after the adjustment can meet the design requirements. For example, the simulated DC impedance of the charging coil module 1 can be 98.7mΩ. The DC impedance of the charging coil module 1 that meets the design requirements of 3.49uH inductance and 50W power is less than or equal to 100mΩ. In other words, the charging coil module 1 prepared by the preparation method of this application can meet general design requirements.

[0235] It is understood that the first coil 12 and the second coil 13 of the charging coil module 1 of the present application can both be arranged with a narrow pitch. Under the condition that the outer diameter of the charging coil module 1 is the same, compared to conventional charging coil modules that do not achieve a narrow pitch arrangement, the DC resistance (Remote Differential Compression, RDC) of the charging coil module 1 of the present application can be the same as that of conventional charging coil modules, and the power level can be the same, but the overall thickness can be thinner. In other words, the charging coil module 1 of the present application can meet the power requirements of conventional charging coil modules while reducing the overall thickness of the charging coil module 1, thereby achieving a miniaturized charging coil module 1. Specifically, the thickness of the charging coil module 1 can be reduced by approximately 20 to 70 microns. Thus, when the charging coil module 1 of the present application is used in electronic devices 100 with relatively limited internal space, such as mobile phones, the overall thickness of the charging coil module 1 can be reduced, thereby better meeting the thinning requirements of the electronic device 100.

[0236] Furthermore, compared to conventional charging coil modules 1 without narrow spacing, the impedance of this embodiment's charging coil module 1 is reduced by approximately 17%. Given the same power (e.g., 50W) as a conventional charging coil module, this embodiment's charging coil module 1 exhibits lower charging losses and maintains a peak power of 50W for a longer period of time during charging.

[0237] In some embodiments, automated optical inspection (AOI) may be performed in both step S120 and step S130 to reduce product defects and thus improve product yield.

[0238] In some embodiments, in step S140, the charging coil module 1 provided with the first insulating layer 14 and the second insulating layer 15 may be further processed. For example, the charging coil module 1 provided with the first insulating layer 14 and the second insulating layer 15 may be subjected to operations such as pressing, desmearing, sandblasting, gold plating, hot water washing, screen printing, screen printing baking, electrical testing, cutting, and warehouse inspection.

[0239] In some embodiments, during the preparation of the charging coil module 1, copper foil (not shown) may be provided around the first conductive portion 1222 of the first coil 12. The copper foil may be spaced apart from the first conductive portion 1222 of the first coil 12. In this way, the current can be uniformly distributed through the copper foil in subsequent electroplating. Compared to the charging coil module 1 in which no copper foil is provided around the first conductive portion 1222 of the first coil 12, the charging coil module 1 in this embodiment can increase the area to be electroplated by providing copper foil, thereby uniformizing the current and reducing the current density for forming the first coil 12 and the second coil 13, making the electroplating more uniform, which is beneficial to improving the product yield. It is understandable that the copper foil can be removed after the preparation of the charging coil module 1 is completed, that is, the prepared charging coil module 1 may not include copper foil.

[0240] In some embodiments, the electroplating parameters in steps S120 and S130 can also be adjusted to change the electroplating speed and optimize the electroplating leads. The electroplating parameters can be current density or electroplating time. For example, the current density of the first conductive portion 1222 of the first coil 12 and the current density of the first conductive portion 1322 of the second coil 13 can be differentiated. For example, the electroplating density of the first conductive portion 1222 of the first coil 12 can be 2.3ADS, and the electroplating density of the first conductive portion 1321 of the second coil 13 can be 2.5ADS. Wherein, ADS is the unit of current density, i.e., amperes per square decimeter. At this time, the current density of the first conductive portion 1222 of the first coil 12 is lower than the current density of the first conductive portion 1322 of the second coil 13. In this way, by reducing the current density of the first conductive portion 1222 of the first coil 12, the thickness of the first coil 12 obtained after electroplating is made more uniform, which is conducive to improving product yield.

[0241] In some embodiments, in step S150, other electrical components may be installed in the charging coil module 1 using surface mount technology (SMT). Prior to the reflow soldering step using SMT, the substrate 11 of the charging coil 10 may be mounted using a magnetic clamp to distribute the heat. This reduces the risk of blistering during the formation of the first and second insulating layers 14, 15, and improves product yield.

[0242] In some embodiments, during step S140, when the charging coil module 1, covered with the first insulating layer 14 and the second insulating layer 15, is washed, either end of the substrate 11 of the charging coil 10 can be placed on a guide plate for washing. This, by providing a guide plate to support and guide the substrate 11 of the charging coil 10, effectively reduces the risk of wrinkles or creases during the washing process, thereby improving product yield.

[0243] The above describes the structure of a charging coil 10 and its manufacturing method in conjunction with the relevant drawings. The following describes the structure of a charging coil 10 and its manufacturing method in conjunction with the relevant drawings.

[0244] FIG24 is a partial cross-sectional view of another embodiment of the charging coil module 1 shown in this embodiment. For example, FIG24 is a partial cross-sectional view of a second nanocrystalline layer 18 and a second graphite layer 19 formed on the second insulating layer 15 shown in FIG22 .

[0245] In this embodiment, the charging coil module 11 has a substantially identical structure to the charging coil module 1 shown in FIG23 , and the common technical details are not further described here. As shown in FIG24 , the charging coil 10 may further include a second nanocrystalline layer 18 and a second graphite layer 19 . The second nanocrystalline layer 18 and the second graphite layer 19 are sequentially stacked on the second insulating layer 15 . The materials of the second nanocrystalline layer 18 and the second graphite layer 19 can be similar to those described for the first nanocrystalline layer and the second graphite layer 19 . The details are not further described here.

[0246] For example, the second nanocrystal layer 18 can be bonded to the surface of the second insulating layer 15 of the charging coil 10 that is away from the second coil 13 via an adhesive layer. The second graphite layer 19 can be bonded to the surface of the second nanocrystal layer 18 that is away from the second insulating layer 15 via adhesive bonding and lamination. Thus, by providing the second nanocrystal layer 18 and the second graphite layer 19, the volume of the nanocrystals and graphite in the charging coil module 1 is increased, effectively improving the charging power of the charging coil module 1.

[0247] It can be understood that in this embodiment, the preparation method of the charging coil module 1 is substantially the same as that of the charging coil module 1 shown in FIG23 , and the same technical contents are not repeated here.

[0248] In step S150 above, after forming the first nanocrystalline layer 16, the second nanocrystalline layer 18 can be formed on the second insulating layer 15 of the charging coil 10. For example, the second nanocrystalline layer 18 can be bonded to the second insulating layer 15 of the charging coil 10 using an adhesive layer. Of course, the second nanocrystalline layer 18 can also be formed on the second insulating layer 15 of the charging coil 10 simultaneously with the formation of the first nanocrystalline layer 16.

[0249] In S160 above, after forming the first graphite layer 17, the second graphite layer 19 can be formed on the second nanocrystalline layer 18. For example, the second graphite layer 19 can be connected to the surface of the second nanocrystalline layer 18 away from the second insulating layer 15 by adhesive bonding or pressing. Of course, the second graphite layer 19 can also be formed on the second nanocrystalline layer 18 while the first graphite layer 17 is being formed.

[0250] The above, combined with the relevant drawings, details the structure and manufacturing method of a charging coil module 1. This charging coil module 1 can be used in a candy bar phone, that is, a non-folding electronic device. The following, combined with the relevant drawings, details the structure and manufacturing method of another charging coil module 1. This charging coil module 1 can be used in a folding phone, that is, a foldable electronic device. The technical content that is the same as above will not be repeated here.

[0251] Figure 25 is a structural diagram of an embodiment of the electronic device 100 provided in the embodiment of the present application in an unfolded state. As shown in Figure 25, the electronic device 100 provided in the present application is a foldable electronic device 100. The foldable electronic device 100 can be a foldable device such as a mobile phone, a tablet computer, a personal computer, a laptop computer, a vehicle-mounted device or a wearable device. The foldable electronic device 100 of the embodiment shown in Figures 25 and 26 is explained using a mobile phone as an example. It can be understood that the number of times the electronic device 100 is folded is not limited to 1 time as shown in Figures 25 and 26, that is, the electronic device 100 is not limited to the two-fold electronic device 100 shown in Figure 25. In other embodiments, the number of times the electronic device 100 is folded can be greater than 1 time, that is, the electronic device 100 can be an electronic device 100 that is folded more than twice.

[0252] For ease of description, by way of example, the thickness direction of the electronic device 100 is defined as the Z-axis direction, and the extension direction of the rotation axis of the electronic device 100 is defined as the Y-axis direction, that is, the width direction of the electronic device 100 is defined as the Y-axis direction. The direction perpendicular to the Y-axis direction and the Z-axis direction is defined as the X-axis direction, that is, the length direction of the electronic device 100 is defined as the X-axis. It will be understood that the coordinate system of the electronic device 100 can also be flexibly set according to specific needs. By way of example, the X-axis direction is defined as the first direction, and the Y-axis direction is defined as the second direction. In other embodiments, the first direction and the second direction can also be flexibly set according to needs, as long as the first direction and the second direction are different. It will be understood that in this embodiment, when the direction of the rotation axis of the electronic device 100 is the Y-axis direction, the electronic device 100 can be relatively unfolded or folded along the Y-axis direction. In this way, when the electronic device 100 is in a closed state, the size of the electronic device 100 in the X-axis direction becomes smaller.

[0253] FIG. 26 is a partially exploded view of one embodiment of the electronic device 100 shown in FIG. 25 .

[0254] As shown in Figures 25 and 26, the electronic device 100 includes a charging coil module 1, a display screen 2, a first housing 37, a second housing 38, a folding mechanism 39, and a load 4. The first housing 37, the second housing 38, and the folding mechanism 39 may constitute a housing device of the electronic device 100.

[0255] In addition, a folding mechanism 39 connects the first shell 37 and the second shell 38. The folding mechanism 39 is used to expand or fold the first shell 37 and the second shell 38 relative to each other. It can be understood that in the present application, the folding mechanism 39 can be an internal folding mechanism or an external folding mechanism. The internal folding mechanism refers to a folding mechanism that can fold at least part of the display screen 2 between the two shells. The external folding mechanism refers to a folding mechanism that can fold at least part of the display screen 2 to the outside of the shell. The present application does not limit the specific structure of the folding mechanism 39. In this embodiment, the folding mechanism 39 is described as an internal folding mechanism.

[0256] As shown in Figures 25 and 26, when the first housing 37, the second housing 38, and the folding mechanism 39 are relatively unfolded to the unfolded state, the electronic device 100 is in the unfolded state. For example, when the electronic device 100 is in the unfolded state, the first housing 37, the second housing 38, and the folding mechanism 39 can be arranged along the X-axis and can be approximately 180° (slight deviations are allowed, such as 165°, 177°, or 185°).

[0257] As shown in Figures 25 and 26, when the first shell 37, the second shell 38, and the folding mechanism 39 are folded relative to each other to a folded state, the electronic device 100 is in a folded state. For example, when the electronic device 100 is in the folded state, the first shell 37 and the second shell 38 can be close to each other, and the first shell 37 and the second shell 38 are stacked in the thickness direction of the electronic device 100 (i.e., the Z-axis direction). When the first shell 37 and the second shell 38 are converted from the unfolded state to the folded state, the folding mechanism 39 can enclose an accommodating space 331. It is understandable that folding mechanisms 39 with different structures have accommodating spaces 331 of different shapes.

[0258] As shown in Figures 25 and 26, the display screen 2 can be a flexible screen. For example, the display screen 2 can be an organic light-emitting diode (OLED) display panel, an active-matrix organic light-emitting diode (AMOLED) display panel, a mini organic light-emitting diode (MID) display panel, a micro organic light-emitting diode (MID) display panel, or a quantum dot light-emitting diode (QLED) display panel.

[0259] As shown in Figures 25 and 26, the display screen 2 includes a first screen area 21, a second screen area 22, and a third screen area 23, which are connected in sequence. The second screen area 22 is connected between the first screen area 21 and the third screen area 23. For example, Figures 25 and 26 illustrate the arrangement of the first screen area 21, the second screen area 22, and the third screen area 23 along the X-axis, and use dotted lines to schematically distinguish the first screen area 21, the second screen area 22, and the third screen area 23.

[0260] The first screen area 21 of the display screen 2 can be fixed to the first housing 37. The third screen area 23 can be fixed to the second housing 38. It is understood that when the folding mechanism 39 causes the first housing 37 and the second housing 38 to expand or fold relative to each other, the first housing 37 can cause the first screen area 21 of the display screen 2 to expand or fold relative to the third screen area 23, and the second housing 38 can cause the third screen area 23 of the display screen 2 to expand or fold relative to the first screen area 21. At this time, the second screen area 22 of the display screen 2 can bend.

[0261] In one embodiment, the first screen area 21 of the display screen 2 can be fixedly connected to the first housing 37 via a first adhesive layer (not shown). The third screen area 23 can be fixed to the second housing 38 via a second adhesive layer (not shown). It is understood that the shape, position, and size of the first and second adhesive layers are not specifically limited.

[0262] As shown in Figures 25 and 26, when the electronic device 100 is in the unfolded state, the display screen 2 can be in the unfolded state. For example, the first screen area 21, the second screen area 22, and the third screen area 23 of the display screen 2 can be approximately 180° (slight deviations are allowed, such as 165°, 177°, or 185°). In this case, the display screen 2 has a continuous large display area, that is, the display screen 2 can achieve large-screen display, and the user experience is better.

[0263] For example, when the electronic device 100 is in the unfolded state, at least a portion of the folding mechanism 39 can be used to support the second screen area 22. In this way, when the second screen area 22 of the display screen 2 is subjected to pressing force, squeezing force, or impact force, the folding mechanism 39 can be used to improve the pressure resistance and impact resistance of the second screen area 22, that is, to ensure that the second screen area 22 is not prone to problems such as dents.

[0264] As shown in Figures 25 and 26 , when the electronic device 100 is in the folded state, the display screen 2 can be in a folded state. For example, the first screen area 21 and the third screen area 23 of the display screen 2 are arranged close to each other. In this case, the first screen area 21 and the third screen area 23 of the display screen 2 can be arranged along the Z-axis. Furthermore, the second screen area 22 of the display screen 2 is bent.

[0265] Illustratively, when the electronic device 100 is in the folded state, the first screen area 21, the second screen area 22, and the third screen area 23 of the display screen 2 are all located between the first shell 37 and the second shell 38, and the second screen area 22 is located within the accommodation space of the folding mechanism 39. Specifically, when the electronic device 100 is in the folded state, since the first screen area 21, the second screen area 22, and the third screen area 23 of the display screen 2 are all located between the first shell 37 and the second shell 38, the display surface of the first screen area 21 faces the display surface of the third screen area 23, the second screen area 22 is bent and arranged between the first screen area 21 and the third screen area 23, and the second screen area 22 is located within the accommodation space of the folding mechanism 39, the first screen area 21, the second screen area 22, and the third screen area 23 of the display screen 2 can be referred to as the inner screen of the display screen 2. When the first shell 37 and the second shell 38 are folded, the first screen area 21, the second screen area 22 and the third screen area 23 are folded into the space formed by the first shell 37, the second shell 38 and the folding mechanism 39. Therefore, the first screen area 21, the second screen area 22 and the third screen area 23 can also be called the inner screen of the display screen 2.

[0266] As shown in Figures 25 and 26, when the display screen 2 is installed in the first shell 37 and the second shell 38, the display screen 2, the first shell 37, the second shell 38, and the folding mechanism 39 enclose the internal space of the electronic device 100. The charging coil module 1 and the load 4 can both be located in the internal space of the electronic device 100. The charging coil module 1 is electrically connected to the load 4. When the electronic device 100 is in the charging state, the charging coil module 1 can charge the load 4. The load 4 can be a battery, a chip, a speaker, a camera, or other device waiting to be charged. Figures 25 and 26 illustrate the example of a battery as the load 4.

[0267] It can be understood that since the charging coil module 1 and the load 4 can both be located in the internal space of the electronic device 100 , FIG25 schematically illustrates the charging coil module 1 and the load 4 through dotted lines.

[0268] FIG27 is a schematic structural diagram of the charging coil module 1 shown in FIG25 in one embodiment.

[0269] As shown in Figure 27, the charging coil module 1 includes a charging coil 10 and a circuit board 20. The charging coil 10 and the circuit board 20 can be an integral structure. The structure of the charging coil 10 can refer to the structure of the charging coil 10 in the first embodiment. The details are not repeated here.

[0270] As shown in Figure 27 , along the X-axis, the circuit board 20 includes a first portion 201, a second portion 202, and a third portion 203, which are sequentially connected. In other words, the second portion 202 is connected between the first portion 201 and the third portion 203. The second portion 202 is bendable. It will be appreciated that Figure 27 schematically distinguishes the first portion 201, the second portion 202, and the third portion 203 using dashed lines.

[0271] In addition, the second portion 202 of the circuit board 20 includes a first side surface 204 and a second side surface 205 disposed opposite to each other. The circuit board 20 is provided with a through hole 206. The through hole 206 forms an opening at the first side surface 204 and the second side surface 205.

[0272] Referring to Figure 27 , in conjunction with Figures 25 and 26 , the first portion 201 of the circuit board 20 can be disposed on the first housing 37. The third portion 203 can be disposed on the second housing 38. Furthermore, the folding mechanism 39 passes through the through-hole 206 of the circuit board 20. In other words, a portion of the folding mechanism 39 is located on the side of the first side 204 of the second portion 202. A portion of the folding mechanism 39 is located within the through-hole 206 of the second portion 202. A portion of the folding mechanism 39 is located on the side of the second side 205 of the second portion 202.

[0273] For example, in the X-axis direction, the width of the through hole 206 is greater than the width of the folding mechanism 39. In this way, the folding mechanism 39 can pass through the through hole 206 more easily.

[0274] It can be understood that by setting the first part 201 of the circuit board 20 on the first shell 37 and the third part 203 on the second shell 38, the circuit board 20 can be used to provide a power supply path to the loads on the first shell 37 and the second shell 38, and the circuit board 20 can also be used to provide a signal transmission path to the electronic devices on the first shell 37 and the second shell 38.

[0275] It will be appreciated that when the folding mechanism 39 causes the first housing 37 and the second housing 38 to expand or fold relative to each other, the first housing 37 can cause the first portion 201 of the circuit board 20 to expand or fold relative to the third portion 203, and the second housing 38 can cause the third portion 203 of the circuit board 20 to expand or fold relative to the first portion 201. At this point, the second portion 202 of the circuit board 20 can bend. In one embodiment, the first portion 201 of the circuit board 20 can be fixed to the first housing 37. The third portion 203 of the circuit board 20 can be fixed to the second housing 38.

[0276] Referring to FIG. 27 , in conjunction with FIG. 25 and FIG. 26 , when the electronic device 100 is in the unfolded state, the circuit board 20 may be in the unfolded state. For example, the first portion 201, the second portion 202, and the third portion 203 of the circuit board 20 may be approximately 180° (slight deviations are permitted, such as 165°, 177°, or 185°). The circuit board 20 may be in the form of a flat plate.

[0277] Referring to Figure 27 , in conjunction with Figures 25 and 26 , when the electronic device 100 is in the folded state, the circuit board 20 can be in a folded state. For example, the first portion 201 and the third portion 203 of the circuit board 20 can be positioned close together. The second portion 202 can be bent. The circuit board 20 can be generally U-shaped.

[0278] Referring to Figure 27 , in conjunction with Figures 25 and 26 , the charging coil 10 can be located in either the first portion 201 or the third portion 203 . It will be appreciated that when the folding mechanism 39 allows the first housing 37 and the second housing 38 to be relatively unfolded or folded, the first portion 201 and the third portion 203 of the circuit board 20 remain intact. This allows the charging coil 10 to be located in either the first portion 201 or the third portion 203 , preventing it from bending when the first housing 37 and the second housing 38 are relatively unfolded or folded, thereby preventing damage to the charging coil 10 and improving its reliability. In other embodiments, the charging coil 10 can also be located in the second portion 202 of the circuit board 20 .

[0279] FIG28 is a partial cross-sectional view of an embodiment of the charging coil module 1 shown in FIG27 taken along line GG.

[0280] As shown in FIG28 , in the Z-axis direction, the circuit board 20 includes a substrate 21, a first wiring layer 22, a second wiring layer 23, a first insulating layer 24, and a second insulating layer 25. It is understood that the circuit board 20 may include more or fewer structures. For example, the circuit board 20 may include more structures. The circuit board 20 may also include multiple insulating layers and multiple wiring layers. The multiple wiring layers and the multiple insulating layers may be alternately stacked on the first insulating layer 24 and / or the second insulating layer 25. For another example, the circuit board 20 may include fewer structures. The circuit board 20 may also not include the first insulating layer 24 and / or the second insulating layer 25.

[0281] In one embodiment, the substrate 21 of the circuit board 20 can be made of an insulating material. For example, the substrate 21 of the circuit board 20 comprises a three-layer structure, specifically comprising a first PI layer 21b, an adhesive layer 21a, and a second PI layer 21c stacked in sequence. The adhesive layer 21a is made of a polymer-based insulating adhesive (booding sheet).

[0282] In one embodiment, the first wiring layer 22 and the second wiring layer 23 may both be made of metal. For example, the first wiring layer 22 and the second wiring layer 23 may both be made of copper.

[0283] In one embodiment, the first insulating layer 24 and the second insulating layer 25 of the circuit board 20 can be made of insulating materials. For example, the first insulating layer 24 and the second insulating layer 25 of the circuit board 20 are both two-layer structures, specifically including a PI layer and an adhesive layer.

[0284] As shown in FIG28 , the substrate 21 of the circuit board 20 may include a first surface 211 and a second surface 212 disposed in opposite directions. The first surface 211 of the substrate 21 of the circuit board 20 is the surface of the first PI layer 21b that is away from the adhesive layer 21a. The second surface 212 of the substrate 21 of the circuit board 20 is the surface of the second PI layer 21c that is away from the adhesive layer 21a. The first trace layer 22 may be disposed on the first surface 211 of the substrate 21 of the circuit board 20. The second trace layer 23 may be disposed on the second surface 212 of the substrate 21 of the circuit board 20. In other words, the substrate 21 of the circuit board 20 is located between the first trace layer 22 and the second trace layer 23.

[0285] As shown in FIG28 , the through-hole 206 of the circuit board 20 is located on the substrate 21 of the circuit board 20, and the through-hole 206 of the circuit board 20 forms an opening on both sides of the substrate 21 of the circuit board 20. Thus, when the folding mechanism 39 passes through the through-hole 206 of the circuit board 20, the folding mechanism 39 is unlikely to affect the first trace layer 22 and the second trace layer 23 of the circuit board 20. For example, when the substrate 21 of the circuit board 20 includes a first PI layer 21b, an adhesive layer 21a, and a second PI layer 21c stacked in sequence, the through-hole 206 of the circuit board 20 is provided on the adhesive layer 21a of the substrate 21 of the circuit board 20.

[0286] It will be appreciated that, along the X-axis, the circuit board 20 is divided into three portions: a first portion 201, a second portion 202, and a third portion 203. Correspondingly, along the X-axis, the first trace layer 22 is divided into three portions: a first trace layer 223 of the first portion 201, a first trace layer 224 of the second portion 202, and a first trace layer 225 of the third portion 203. It will be appreciated that FIG. 28 schematically distinguishes the first portion 201, the second portion 202, and the third portion 203 using dashed boxes of varying linear scales.

[0287] In this embodiment, along the Z-axis, the thickness of the first routing layer 224 of the second portion 202 is less than the thickness of the first routing layer 223 of the first portion 201 and the thickness of the first routing layer 225 of the third portion 203. The first routing layer 223 of the first portion 201 and the first routing layer 225 of the third portion 203 employ the same or similar configuration. The following description uses the first routing layer 223 of the first portion 201 as an example.

[0288] In one embodiment, in the Z-axis direction, the thickness of the first wiring layer 223 of the first portion 201 is between 5 micrometers and 100 micrometers. For example, the thickness of the first wiring layer 223 of the first portion 201 is equal to 85 micrometers.

[0289] In one embodiment, in the Z-axis direction, the thickness of the first routing layer 224 of the second portion 202 is in a range of 10 micrometers to 80 micrometers. For example, the thickness of the first routing layer 223 of the first portion 201 is equal to 40 micrometers.

[0290] In one embodiment, in the Z-axis direction, the thickness of the first routing layer 225 of the third portion 203 is between 5 micrometers and 100 micrometers. For example, the thickness of the first routing layer 225 of the third portion 203 is equal to 85 micrometers.

[0291] Exemplarily, the first routing layer 223 of the first portion 201 is composed of three metal layers. The second routing layer of the second portion 202 is composed of two metal layers. Specifically, the first metal layer 223a of the first routing layer 223 of the first portion 201, the first metal layer 224a of the first routing layer 224 of the second portion 202, and the first metal layer 225a of the first routing layer 225 of the third portion 203 are arranged on the same layer and form an integrated structure. Furthermore, the second metal layer 223b of the first routing layer 223 of the first portion 201, the second metal layer 224b of the first routing layer 224 of the second portion 202, and the second metal layer 225b of the first routing layer 225 of the third portion 203 are also arranged on the same layer and form an integrated structure. The third metal layer 223c of the first routing layer 223 of the first portion 201 and the third metal layer 225c of the first routing layer 225 of the third portion 203 are spaced apart but arranged on the same layer. That is, the third metal layer 223c of the first routing layer 223 of the first portion 201 and the third metal layer 225c of the first routing layer 225 of the third portion 203 can be formed using the same process. It will be understood that the third metal layer 223c of the first routing layer 223 of the first portion 201 and the third metal layer 225c of the first routing layer 225 of the third portion 203 both protrude relative to the second metal layer 224b of the first routing layer 224 of the second portion 202.

[0292] For example, the second metal layer 223b of the first routing layer 223 of the first portion 201, the second metal layer 224b of the first routing layer 224 of the second portion 202, and the second metal layer 225b of the first routing layer 225 of the third portion 203 can be formed on the first metal layer 223a of the first routing layer 223 of the first portion 201, the first metal layer 224a of the first routing layer 224 of the second portion 202, and the first metal layer 225a of the first routing layer 225 of the third portion 203, respectively, through an electroplating process. The third metal layer 223c of the first routing layer 223 of the first portion 201 can be formed on the second metal layer 223b of the first routing layer 223 of the first portion 201 through an electroplating process. The third metal layer 225c of the first routing layer 225 of the third portion 203 can be formed on the second metal layer 225b of the first routing layer 225 of the third portion 203 through an electroplating process.

[0293] 28 , the first insulating layer 24 of the circuit board 20 may be disposed on the first wiring layer 22 and cover the first wiring layer 22. The first insulating layer 24 of the circuit board 20 may be used to protect the first wiring layer 22.

[0294] In this embodiment, the first insulating layer 24 includes a first sub-insulating layer 241, a second sub-insulating layer 242, and a third sub-insulating layer 243. The glass transition temperature (Tg) of the first sub-insulating layer 241 is greater than the glass transition temperature (Tg) of the second sub-insulating layer 242 and the glass transition temperature (Tg) of the third sub-insulating layer 243. Thus, on the one hand, the first sub-insulating layer 241 is less likely to undergo a glass transition due to high-temperature processing during subsequent steps of the circuit board 20, thereby preventing the bending stress neutral line of the second portion 202 of the circuit board 20 from shifting and the first sub-insulating layer 241 from losing its protection for the first trace layer 224 of the second portion 202. On the other hand, the first sub-insulating layer 241 is less likely to undergo a glass transition during the folding or flattening process of the circuit board 20, thereby preventing the bending stress neutral line of the second portion 202 of the circuit board 20 from shifting and the first sub-insulating layer 241 from losing its protection for the first trace layer 224 of the second portion 202.

[0295] Exemplarily, the glass transition temperature of the first sub-insulating layer 241 is greater than or equal to 90° C. For example, the glass transition temperature of the first sub-insulating layer 241 is in the range of 90° C. to 150° C.

[0296] Illustratively, the glass transition temperature of the second sub-insulating layer 242 is less than 90° C. For example, the glass transition temperature of the second sub-insulating layer 242 is in the range of 60° C. to 70° C.

[0297] Illustratively, the glass transition temperature of the third sub-insulating layer 243 is less than 90° C. For example, the glass transition temperature of the third sub-insulating layer 243 is in the range of 60° C. to 70° C.

[0298] In this embodiment, the first sub-insulating layer 241 is disposed on the first routing layer 224 of the second portion 202 and covers a portion of the first routing layer 224 of the second portion 202. The first sub-insulating layer 241 is spaced apart from the third metal layer 223c of the first routing layer 223 of the first portion 201. The first sub-insulating layer 241 is also spaced apart from the third metal layer 225c of the first routing layer 225 of the third portion 203. This ensures that during the bending process of the second portion 202 of the circuit board 20, the routing of the first routing layer 22 and / or the routing of the second routing layer 23 are not easily broken due to stress concentration.

[0299] Exemplarily, in the X-axis direction, the distance d1 between the first sub-insulating layer 241 and the third metal layer 223c of the first wiring layer 223 of the first portion 201 satisfies: d1 ≥ 0 mm. Exemplarily, 0.2 mm ≤ d1 ≤ 0.5 mm.

[0300] Exemplarily, in the X-axis direction, a distance d2 between the first sub-insulating layer 241 and the third metal layer 225c of the first wiring layer 225 of the third portion 203 satisfies: d2 ≥ 0 mm. Exemplarily, 0.2 mm ≤ d2 ≤ 0.5 mm.

[0301] In this embodiment, a portion of the second sub-insulating layer 242 is disposed on the first routing layer 223 of the first portion 201, and a portion is disposed on the first sub-insulating layer 241. That is, a portion of the second sub-insulating layer 242 overlaps the first sub-insulating layer 241. In this case, the second sub-insulating layer 242 can cover the first routing layer 223 of the first portion 201, the space between the first routing layer 223 of the first portion 201 and the first sub-insulating layer 241, and a portion of the first sub-insulating layer 241. In this way, during the bending process of the second portion 202 of the circuit board 20, the first sub-insulating layer 241 and the second sub-insulating layer 242 can always cover the first routing layer 224 of the first portion 201 and the second portion 202.

[0302] In one embodiment, in the X-axis direction, the width L1 of the portion of the second sub-insulating layer 242 disposed on the first sub-insulating layer 241 satisfies: L1 ≥ 0.05 mm. For example, 0.2 mm ≤ L1 ≤ 0.5 mm.

[0303] In this embodiment, a portion of the third sub-insulating layer 243 is disposed on the first routing layer 225 of the third portion 203, and a portion is disposed on the first sub-insulating layer 241. That is, a portion of the third sub-insulating layer 243 overlaps the first sub-insulating layer 241. In this manner, the third sub-insulating layer 243 can cover the first routing layer 225 of the third portion 203, the space between the first routing layer 225 of the third portion 203 and the first sub-insulating layer 241, and a portion of the first sub-insulating layer 241. Thus, during the bending process of the second portion 202 of the circuit board 20, the first sub-insulating layer 241 and the second sub-insulating layer 242 can always cover the first routing layer 224 of the third portion 203 and the second portion 202.

[0304] In one embodiment, in the X-axis direction, a width L2 of the portion of the third sub-insulating layer 243 disposed on the first sub-insulating layer 241 satisfies: L2 ≥ 0.2 mm. For example, 0.2 mm ≤ L2 ≤ 0.5 mm.

[0305] In one embodiment, in the Z-axis direction, the first sub-insulating layer 241 includes a first PI layer 241a (i.e., a first polyimide layer) and a first AD layer 241b (a first adhesive layer). The first AD layer 241b is bonded to the first routing layer 224 of the second portion 202. Furthermore, in the Z-axis direction, the second sub-insulating layer 242 includes a second PI layer 242a and a second AD layer 242b. The second AD layer 242b is bonded to the first routing layer 223 of the first portion 201. Furthermore, the third sub-insulating layer 243 includes a third PI layer 243a and a third AD layer 243b. The third AD layer 243b is bonded to the first routing layer 225 of the third portion 203.

[0306] In this embodiment, the thickness of the second AD layer 242b and the third AD layer 243b in the Z-axis direction is greater than the thickness of the first AD layer 241b. Thus, the thicker second AD layer 242b can better cover the first routing layer 223 of the first portion 201, and two adjacent routing lines in the first routing layer 223 of the first portion 201 can be better separated by the second AD layer 242b. Furthermore, the thicker third AD layer 243b can better cover the first routing layer 225 of the third portion 201, and two adjacent routing lines in the first routing layer 223 of the third portion 201 can be better separated by the third AD layer 243b. Furthermore, because the first routing layer 224 of the second portion 202 is thinner, the thinner first AD layer 241b can better cover the first routing layer 224 of the second portion 202, and two adjacent routing lines in the first routing layer 224 of the second portion 202 can be better separated by the first AD layer 241b.

[0307] For example, in the Z-axis direction, the ratio of the thickness of the first AD layer 241b to the thickness of the first routing layer 224 of the second portion 202 is between 0.6 and 0.9. For example, in the Z-axis direction, the ratio of the thickness of the first AD layer 241b to the thickness of the first routing layer 224 of the second portion 202 can be 0.6, 0.7, 0.8, or 0.9. This ensures that the first AD layer 241b can effectively cover the first routing layer 224 of the second portion 202.

[0308] For example, in the Z-axis direction, the ratio of the thickness of the second AD layer 242b to the thickness of the first routing layer 223 of the first portion 201 is between 0.6 and 0.9. For example, in the Z-axis direction, the ratio of the thickness of the second AD layer 242b to the thickness of the first routing layer 223 of the first portion 201 can be 0.6, 0.7, 0.8, or 0.9. This ensures that the second AD layer 242b can effectively cover the first routing layer 223 of the first portion 201.

[0309] It is understood that the thickness of the third AD layer 243b can refer to the thickness setting method of the second AD layer 242b, and the details are not repeated here.

[0310] For example, in the Z-axis direction, the thickness of the first AD layer 241 b is less than 25 micrometers. For example, the thickness of the first AD layer 241 b is 12 micrometers.

[0311] For example, in the Z-axis direction, the thickness of the second AD layer 242b is greater than 25 micrometers. For example, the thickness of the first AD layer 241b is 32 micrometers.

[0312] For example, in the Z-axis direction, the thickness of the third AD layer 243 b is greater than 25 micrometers, for example, the thickness of the third AD layer 243 b is 32 micrometers.

[0313] In one embodiment, in the Z-axis direction, the thickness of the first AD layer 241 b is between 5 micrometers and 40 micrometers.

[0314] In one embodiment, in the Z-axis direction, the thickness of the second AD layer 242 b is between 5 microns and 40 microns.

[0315] In one embodiment, in the Z-axis direction, the thickness of the third AD layer 243 b is between 5 micrometers and 40 micrometers.

[0316] It is understood that the second routing layer 23 and the first routing layer 22 can have the same or similar structures, symmetrical or partially symmetrical structures, or different structures. In this embodiment, the second routing layer 23 and the first routing layer 22 have symmetrical structures. The basic design of the component structure of the second routing layer 23, the connection relationship design between components, and the connection relationship design between components and other structures outside the assembly can all refer to the relevant solutions of the first routing layer 22. At the same time, the second routing layer 23 and the first routing layer 22 can have slight differences in the detailed structure or position arrangement of the components.

[0317] Furthermore, the second insulating layer 25 and the first insulating layer 24 may have the same or similar structures, symmetrical or partially symmetrical structures, or different structures. In this embodiment, the second insulating layer 25 and the first insulating layer 24 are symmetrical structures. The basic design of the component structure of the second insulating layer 25, the connection relationship design between the components, and the connection relationship design between the components and other structures outside the assembly can all refer to the relevant solutions of the first insulating layer 24. At the same time, the second insulating layer 25 and the first insulating layer 24 can have slight differences in the detailed structure or position arrangement of the components.

[0318] It is understandable that the configuration of the second wiring layer 23 and the second insulating layer 25 will not be described in detail here.

[0319] In this embodiment, by setting the thickness of the first routing layer 224 of the second part 202 to be smaller than the thickness of the first routing layer 223 of the first part 201 and the thickness of the first routing layer 225 of the third part 203, that is, setting the thickness of the first routing layer 224 of the second part 202 to be smaller, the stress neutral line of the second part 202 of the circuit board 20 is adjusted so that the stress neutral line of the second part 202 of the circuit board 20 is located on the insulating layer of the second part 202 of the circuit board 20, that is, avoiding the stress neutral line of the second part 202 of the circuit board 20 being located on the first routing layer 224 of the second part 202, thereby ensuring that the first sub-insulating layer 241 can protect the first routing layer 224 of the second part 202, thereby improving the service life of the charging coil module 1.

[0320] In addition, a through hole 206 is provided on the substrate of the second part 202 of the circuit board 20, which can be used to allow the folding mechanism 39 to pass through on the one hand, and on the other hand, the stress neutral line of the second part 202 of the circuit board 20 can be adjusted so that the stress neutral line of the second part 202 of the circuit board 20 is located on the insulating layer of the second part 202 of the circuit board 20, that is, to avoid the stress neutral line of the second part 202 of the circuit board 20 being located on the first wiring layer 224 of the second part 202, thereby ensuring that the first sub-insulating layer 241 can protect the first wiring layer 224 of the second part 202, thereby improving the service life of the charging coil module 1.

[0321] It can be understood that by providing the first sub-insulating layer 241 on the first wiring layer 224 of the second part 202, providing the second sub-insulating layer 242 on the first wiring layer 223 of the first part 201, and providing the third sub-insulating layer 243 on the first wiring layer 225 of the third part 203, and the glass transition temperature of the first sub-insulating layer 241 is greater than the glass transition temperature of the second sub-insulating layer 242 and the glass transition temperature of the third sub-insulating layer 243, on the one hand, the first sub-insulating layer 241 is not easy to be formed on the back of the circuit board. In the subsequent process, glass transition occurs due to high-temperature processing, thereby avoiding the deviation of the bending stress neutral line of the second part 202 and the loss of protection of the first sub-insulating layer 241 for the first wiring layer 224 of the second part 202; on the other hand, the first sub-insulating layer 241 is not easy to undergo glass transition during the folding or flattening process of the circuit board 20, thereby avoiding the deviation of the bending stress neutral line of the first wiring layer 224 of the second part 202 and the loss of protection of the first sub-insulating layer 241 for the first wiring layer 224 of the second part 202.

[0322] Furthermore, since the first portion 201 and the third portion 203 of the circuit board 20 do not need to bend during the folding or unfolding of the circuit board 20, there is no need to consider the issue of centerline offset between the first portion 201 and the third portion 203 of the circuit board 20. In this embodiment, by setting the glass transition temperature of the second sub-insulating layer 242 and the third sub-insulating layer 243 to be relatively low, the second sub-insulating layer 242 and the third sub-insulating layer 243 do not need to be subjected to high temperature treatment before being disposed on the first trace layer 223 of the first portion 201 and the first trace layer 225 of the third portion 203, respectively. This reduces the difficulty of covering the second sub-insulating layer 242 and the third sub-insulating layer 243.

[0323] It is understood that by setting the thickness of the first trace layer 223 of the first portion 201 and the thickness of the first trace layer 225 of the third portion 203 to be greater than the thickness of the first trace layer 224 of the second portion 202, the stress neutral line of the second portion 202 of the circuit board 20 can be adjusted by setting the thickness of the first trace layer 224 of the second portion 202 to be smaller, so that the stress neutral line of the second portion 202 of the circuit board 20 is located on the insulation layer of the second portion 202 of the circuit board 20. In other words, the stress neutral line of the second portion 202 of the circuit board 20 is prevented from being located on the first trace layer 224 of the second portion 202, thereby ensuring that the first sub-insulating layer 241 can protect the first trace layer 224 of the second portion 202, thereby improving the service life of the charging coil module 1.

[0324] It is understood that by partially overlapping the second sub-insulating layer 242 on the first sub-insulating layer 241, and ensuring that the distance d1 between the first sub-insulating layer 241 and the third metal layer of the first trace layer of the first portion satisfies the following conditions: 0.2 mm ≤ d1 ≤ 0.5 mm, the first trace layer 224 of the second portion 202 is less susceptible to breakage due to excessive stress concentration, thereby ensuring a longer service life for the charging coil module 1.

[0325] It can be understood that by setting the width L1 of the portion of the second sub-insulating layer 242 set on the first sub-insulating layer 241 to meet the following requirements: L1 ≥ 0.05 mm, the connection between the first sub-insulating layer 241 and the second sub-insulating layer 242 is not easily separated during the bending of the second portion 202 of the circuit board 20, the first wiring layer 224 of the second portion 202 can be covered by the first sub-insulating layer 241 and the second sub-insulating layer 242, and the first wiring layer 224 of the second portion 202 is not easily broken, thereby ensuring that the charging coil module 1 has a better service life.

[0326] It is understood that while the charging coil module 1 achieves higher wireless charging efficiency by reducing link loss, the first coil 12 and second coil 13 of the charging coil 10 can be arranged with a narrow spacing. Given the same dimensions, the charging coil 10 in this embodiment has a higher metal content (e.g., copper) per unit area compared to a charging coil 10 without a narrow spacing, effectively reducing charging losses, extending the time the charging coil 10 maintains a peak power of 50W during charging, and improving charging efficiency.

[0327] It is understandable that while the charging coil module 1 achieves higher wireless charging efficiency by reducing link loss, the first coil 12 and the second coil 13 in the charging coil 10 can achieve a high thickness (for example, a thickness greater than 40 microns) and a high line width (for example, a line width greater than 40 microns) while achieving a narrow spacing setting. This is conducive to reducing the impedance of the charging path. For example, compared to the charging impedance of a traditional charging coil module (for example, 45.2 omh), the charging coil module 1 of this embodiment can be reduced to 25.6 omh, which is a reduction of nearly 43%. In addition, the heat dissipation capacity of the charging coil module 1 can also be improved.

[0328] The above describes the specific structure of the charging coil module 1 of this application. The following describes the preparation process of the charging coil module 1 in detail with reference to the accompanying drawings. The preparation method of the charging coil module 1 in this embodiment is substantially the same as that in the above embodiment (Figures 12 to 24), and the common technical details are not repeated here.

[0329] Prepare a double-sided board 30. Among them, the technical content of this step that is the same as step S110 of the above embodiment will not be repeated. The difference is that Figures 29 and 30 are structural schematic diagrams one to two of some steps in the method for preparing the charging coil module 1 shown in Figure 12 in other embodiments. As shown in Figures 29 and 30, this embodiment uses two adhesive sheets 36. The two adhesive sheets 36 are located at intervals between the first flexible copper clad board 34 and the second flexible copper clad board 35. In this way, after the first flexible copper clad board 34, the two adhesive sheets 36 and the second flexible copper clad board 35 are pressed together to form the double-sided board 30, the first flexible copper clad board 34, the second flexible copper clad board 35, and the two adhesive sheets 36 surround the through hole 206 of the circuit board 20.

[0330] The first etched layer 32 of the double-sided board 30 is processed to form the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. It is understood that this step, which shares the same technical content as step S120 in the above embodiment, will not be described in detail here. For details, please refer to the preparation method shown in Figures 16 to 20 above. The details will not be repeated here.

[0331] Unlike step S120 described above, it is understood that in step S120, after the first etched layer 32 of the double-sided board 30 is etched through processes such as lamination, exposure, development, etching, and stripping, electroplating can also be performed on the first conductive portion 1222 of the first coil 12 of the charging coil 10 to form the second conductive portion 1223 of the first coil 12. In this embodiment, the first conductive portion of the first trace layer 22 of the first portion 201 and the third portion 203 can also be electroplated to form the second conductive portion, thereby significantly increasing the thickness of the first trace layer 22 of the first portion 201 and the third portion 203. The first trace layer 22 of the second portion 202 of the circuit board 20 is not electroplated. For example, during the electroplating process, the first trace layer 22 of the second portion 202 of the circuit board 20 is masked with a dry film, allowing electroplating to be performed on the first trace layer 22 of the first portion 201 and the third portion 203.

[0332] It is understood that the first trace layer 22 of the first portion 201 and the third portion 203 has a higher metal (e.g., copper) content per unit area, allowing the traces in the first trace layer 22 of the circuit board 20 to be larger, thereby reducing charging losses. Furthermore, while achieving the same functional traces, the number of stacked layers of the circuit board 20 can be reduced.

[0333] The second etched layer 33 of the double-sided board 30 is processed to form the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. It is understood that this step is the same or similar to the process of processing the first etched layer 32 of the double-sided board 30. The details are not repeated here.

[0334] A first covering layer 41 is formed on the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20, and a second covering layer 42 is formed on the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20. The first covering layer 41 covers the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20. The second covering layer 42 covers the second coil 13 of the charging coil 10 and the second trace layer 23 of the circuit board 20.

[0335] It is understood that the formation method and structure of the first covering layer 41 are similar to or identical to the formation method and structure of the second covering layer 42. The following description uses the formation method and structure of the first covering layer 41 as an example. Figure 31 is a flow chart for preparing one embodiment of the charging coil module 1 shown in Figure 28. Figure 32 is a schematic diagram of the structure of some steps in the method for preparing the charging coil module 1 shown in Figure 31 in some embodiments.

[0336] Referring to FIG. 31 and FIG. 32 , in one embodiment, the step of forming the first covering layer 41 on the first coil 12 of the charging coil 10 and the first trace layer 22 of the circuit board 20 includes:

[0337] S141: Form a first sub-insulating layer 241 on the first trace layer 224 of the second portion 202 of the circuit board 20. The first sub-insulating layer 241 covers at least a portion of the first trace layer 224 of the second portion 202 of the circuit board 20. It is understood that the configuration of the first sub-insulating layer 241 can refer to the configuration of the first sub-insulating layer 241 of the charging coil module 1 described above. The details are not further described here.

[0338] S142: Form a second sub-insulating layer 242 on the first wiring layer 223 of the first portion 201 of the circuit board 20, with a portion of the second sub-insulating layer 242 overlapping the first sub-insulating layer 241. The second sub-insulating layer 242 may cover the first wiring layer 223 of the first portion 201, the space between the first wiring layer 223 of the first portion 201 and the first sub-insulating layer 241, and a portion of the first sub-insulating layer 241.

[0339] It is understood that the configuration of the second sub-insulating layer 242 can refer to the configuration of the second sub-insulating layer 242 of the charging coil module 1 above, and will not be described in detail here.

[0340] S143: Form a third sub-insulating layer 243 on the first wiring layer 225 of the third portion 203 of the circuit board 20, with a portion of the third sub-insulating layer 243 overlapping the first sub-insulating layer 241. It is understood that this step may refer to step S242. The details are not repeated here.

[0341] S144 : Pressing the first sub-insulating layer 241 , the second sub-insulating layer 242 and the third sub-insulating layer 243 together.

[0342] In one embodiment, a hot pressing process is used, wherein the hot pressing temperature may be in the range of 150° C. to 200° C., and the hot pressing time may be in the range of 0.5 hours (unit: h) to 3 hours (h).

[0343] In one embodiment, a pressure transfer process is used. The pressure transfer temperature can be in the range of 170°C to 190°C, and the pressure transfer time can be in the range of 0.5 hours (unit: h) to 3 hours (h). For example, the pressure transfer time can be 2 hours. The pressure can be 350N / cm 2 Up to 450N / cm 2 within the range.

[0344] In one embodiment, a fast pressing process is used. The fast pressing temperature can be in the range of 170°C to 190°C, and the fast pressing time can be in the range of 1 minute (unit: min) to 8 minutes (unit: min). For example, the fast pressing time can be in the range of 2 minutes to 3 minutes. In addition, the pressure can be 100N / cm 2 Up to 150N / cm 2 The baking temperature may be in the range of 160° C. to 180° C., and the baking time may be in the range of 1 hour (unit: h) to 3 hours (h). For example, the baking time may be 2 hours.

[0345] In other embodiments, a vacuum lamination process may also be used to laminarize the first sub-insulating layer 241 , the second sub-insulating layer 242 , and the third sub-insulating layer 243 , which will not be described in detail herein.

[0346] In one embodiment, after the step of forming the first sub-insulating layer 241 on the first wiring layer 224 of the second part 202 of the circuit board 20, the first sub-insulating layer 241 is first pressed by a first pressing process. After the step of forming the second sub-insulating layer 242 on the first wiring layer 223 of the first part 201 of the circuit board 20, and the step of forming the third sub-insulating layer 243 on the first wiring layer 225 of the third part 203 of the circuit board 20, the second sub-insulating layer 242 and the third sub-insulating layer 243 are pressed by a second pressing process. For example, the temperature of the two pressing processes can be in the range of 175°C to 190°C, and the hot pressing time can be in the range of 0.5 hours (unit: h) to 3 hours (h). It can be understood that in this embodiment, two pressing processes are adopted. As mentioned above, the risk of mass production delamination of the first sub-insulating layer 241, the second sub-insulating layer 242 and the third sub-insulating layer 243 by hot pressing twice can be reduced. In addition, it can prevent the first sub-insulating layer 241, the second sub-insulating layer 242 and the third sub-insulating layer 243 from shifting their neutral lines due to glass transition at multiple high temperatures, thereby preventing the first wiring layer 22 from losing protection during the folding process.

[0347] A first nanocrystalline layer 16 is formed on the first insulating layer 14 of the charging coil 10 .

[0348] It is understood that this step is the same as or similar to step S150 in the above embodiment. Detailed description is omitted here. A first graphite layer 17 is formed on the first nanocrystalline layer 16.

[0349] It is understandable that this step is the same as or similar to step S160 in the above embodiment, and will not be described in detail here.

[0350] It is understood that the charging coil 10 of this embodiment may also include a second nanocrystalline layer and a second graphite layer. The configuration and formation of the second nanocrystalline layer and the second graphite layer can be found in the configuration and formation of the second nanocrystalline layer 18 and the second graphite layer 19 described above. The details are not further described here.

[0351] It should be noted that, in the absence of conflict, the features in the embodiments and implementations of this application can be combined with each other, and any combination of features in different implementations is also within the scope of protection of this application. That is to say, the multiple embodiments described above can also be arbitrarily combined according to actual needs.

[0352] It should be noted that all the above drawings are for illustrative purposes only and do not represent the actual size of the product. Furthermore, the dimensional ratios between the components in the drawings are not intended to limit the actual product of the present application.

[0353] The above are only some of the embodiments and implementations of this application. The scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A charging coil module (1), characterized in that: It comprises a charging coil (10) and a circuit board (20); The charging coil (10) comprises a substrate (11), a first coil (12) and a second coil (13), wherein the substrate (11) of the charging coil (10) is located between the first coil (12) and the second coil (13); The circuit board (20) comprises a substrate (21), a first wiring layer (22) and a second wiring layer (23), wherein the substrate (21) of the circuit board (20) is located between the first wiring layer (22) and the second wiring layer (23); The substrate (21) of the circuit board (20) and the substrate (11) of the charging coil (10) are an integrated structure; the first wiring layer (22) and the first coil (12) are arranged on the same layer; and the second wiring layer (23) and the second coil (13) are arranged on the same layer.

2. The charging coil module (1) according to claim 1, characterized in that: The first wiring layer (22) comprises a first wiring (221), and the first wiring (221) and the first coil (12) are an integrally formed structure; And / or, the second wiring layer (23) comprises a second wiring (231), and the second wiring (231) and the second coil (13) are an integrally formed structure.

3. The charging coil module (1) according to claim 1 or 2, characterized in that: The charging coil (10) comprises a first insulating layer (14), and the first insulating layer (14) of the charging coil (10) is arranged on the first coil (12) and covers the first coil (12); The circuit board (20) comprises a first insulating layer (24), and the first insulating layer (24) of the circuit board (20) is arranged on the first wiring layer (22) and covers the first wiring layer (22); The first insulating layer (14) of the charging coil (10) and the first insulating layer (24) of the circuit board (20) are arranged on the same layer and are an integrally formed structure.

4. The charging coil module (1) according to claim 1 or 2, characterized in that: In the length direction of the circuit board (20), the circuit board (20) comprises a first part (201), a second part (202) and a third part (203) which are connected in sequence; when the first part (201) and the third part (203) are folded or unfolded relative to each other, the second part (202) is bent; The circuit board (20) comprises a first sub-insulating layer (241), a second sub-insulating layer (242), and a third sub-insulating layer (243), wherein the first sub-insulating layer (241) is arranged on the first wiring layer (224) of the second part (202), the second sub-insulating layer (242) is arranged on the first wiring layer (223) of the first part (201), and the third sub-insulating layer (243) is arranged on the first wiring layer (225) of the third part (203); The glass transition temperature of the first sub-insulating layer (241) is greater than the glass transition temperature of the second sub-insulating layer (242) and the glass transition temperature of the third sub-insulating layer (243).

5. The charging coil module (1) according to claim 4, characterized in that: The charging coil (10) comprises a first insulating layer (14), and the first insulating layer (14) of the charging coil (10) is arranged on the first coil (12) and covers the first coil (12); The first insulating layer (14) of the charging coil (10) and the second sub-insulating layer (242) are an integrally formed structure; or the first insulating layer (14) of the charging coil (10) and the third sub-insulating layer (243) are an integrally formed structure.

6. The charging coil module (1) according to claim 4 or 5, characterized in that: The glass transition temperature of the first sub-insulating layer (241) is greater than or equal to 90°C, and the glass transition temperatures of the second sub-insulating layer (242) and the third sub-insulating layer (243) are both less than 90°C.

7. The charging coil module (1) according to any one of claims 4 to 6, characterized in that: The thickness of the first adhesive layer (241b) of the first sub-insulating layer (241) is smaller than the thickness of the second adhesive layer (242b) of the second sub-insulating layer (242) and the thickness of the third adhesive layer (243b) of the third sub-insulating layer (243).

8. The charging coil module (1) according to claim 7, characterized in that: The thickness of the first adhesive layer (241b) of the first sub-insulating layer (241) is less than 25 microns, and the thickness of the second adhesive layer (242b) of the second sub-insulating layer (242) and the third adhesive layer (243b) of the third sub-insulating layer (243) are greater than 25 microns.

9. The charging coil module (1) according to any one of claims 5 to 8, characterized in that: The thickness of the first routing layer (224) of the second part (202) is smaller than the thickness of the first routing layer (223) of the first part (201) and the thickness of the first routing layer (225) of the third part (203).

10. The charging coil module (1) according to claim 9, characterized in that: The first routing layer (223) of the first part (201) is composed of three metal layers, and the second routing layer of the second part (202) is composed of two metal layers; The first metal layer (223a) of the first wiring layer (223) of the first part (201) and the first metal layer (224a) of the first wiring layer (224) of the second part (202) are arranged on the same layer and are an integrally formed structure. The second metal layer (223b) of the first wiring layer (223) of the first part (201) and the second metal layer (224b) of the first wiring layer (224) of the second part (202) are arranged in the same layer and are an integrally formed structure.

11. The charging coil module (1) according to claim 9, characterized in that: A distance d1 between the first sub-insulating layer (241) and the third metal layer (223c) of the first wiring layer (223) of the first portion (201) satisfies: 0.2 mm≤d1≤0.5 mm.

12. The charging coil module (1) according to any one of claims 9 to 11, characterized in that: A portion of the second sub-insulating layer (242) overlaps the first sub-insulating layer (241); The width L1 of the portion of the second sub-insulating layer (242) disposed on the first sub-insulating layer (241) satisfies: L1 ≥ 0.05 mm.

13. The charging coil module (1) according to any one of claims 4 to 12, characterized in that: The charging coil (10) comprises a first nanocrystalline layer (16) and a first graphite layer (17), wherein the first nanocrystalline layer (16) and the first graphite layer (17) are sequentially stacked on a first insulating layer (14) of the charging coil (10).

14. The charging coil module (1) according to any one of claims 1 to 13, characterized in that: The number of turns of the first coil (12) is greater than or equal to 2, and the distance between two adjacent turns in the first coil (12) is in the range of 40 micrometers to 100 micrometers.

15. The charging coil module (1) according to any one of claims 1 to 14, characterized in that: Each turn of the first coil (12) includes a first conductive portion (1222) and a second conductive portion (1223), wherein the first conductive portion (1222) is arranged on the substrate (11) of the charging coil (10), and the second conductive portion (1223) is formed on the first conductive portion (1222) by electroplating.

16. An electronic device (100), characterized in that: It comprises a load (4) and a charging coil module (1) according to any one of claims 1 to 15, wherein the charging coil module (1) is electrically connected to the load (4).

17. A charger (200), characterized in that: It comprises a charging coil module (1) as claimed in any one of claims 1 to 15.

18. A charging system (1000), characterized in that: The invention comprises an electronic device (100) and a charger (200), wherein at least one of the electronic device (100) and the charger (200) comprises a charging coil module (1) as described in any one of claims 1 to 15, and the charger (200) is used for charging the electronic device (100).

19. A method for preparing a charging coil module (1), characterized in that: include: Preparing a double-sided board (30), wherein the double-sided board (30) comprises a substrate (31), a first etching layer (32) and a second etching layer (33), and the substrate (31) of the double-sided board (30) is located between the first etching layer (32) and the second etching layer (33); Processing a first etching layer (32) of a double-sided board (30) to form a first coil (12) of a charging coil (10) and a first wiring layer (22) of a circuit board (20); The second etching layer (33) of the double-sided board (30) is processed to form a second coil (13) of the charging coil (10) and a second wiring layer (23) of the circuit board (20).

20. The method for preparing the charging coil module (1) according to claim 19, characterized in that: The first wiring layer (22) comprises a first wiring (221), and the first wiring (221) and the first coil (12) are an integrally formed structure; And / or, the second wiring layer (23) includes a second wiring (231), and the second wiring (231) and the second coil (13) are One-piece construction.

21. The method for preparing the charging coil module (1) according to claim 19 or 20, characterized in that: The method further comprises: A first covering layer (41) is formed on a first coil (12) of a charging coil (10) and a first wiring layer (22) of a circuit board (20), and a second covering layer (42) is formed on a second coil (13) of the charging coil (10) and a second wiring layer (23) of the circuit board (20), wherein the first covering layer (41) includes a first insulating layer (14) of the charging coil (10) and a first insulating layer (24) of the circuit board (20), and the second covering layer (42) includes a second insulating layer (15) of the charging coil (10) and a second insulating layer (25) of the circuit board (20).

22. The method for preparing the charging coil module (1) according to claim 19 or 20, characterized in that: In the length direction of the circuit board (20), the circuit board (20) comprises a first part (201), a second part (202) and a third part (203) which are connected in sequence; when the first part (201) and the third part (203) are folded or unfolded relative to each other, the second part (202) is bent; The method further comprises: Forming a first sub-insulating layer (241) on the first wiring layer (224) of the second part (202) of the circuit board (20); A second sub-insulating layer (242) is formed on a first wiring layer (223) of a first part (201) of a circuit board (20), and a portion of the second sub-insulating layer (242) is overlapped on the first sub-insulating layer (241), wherein a glass transition temperature of the first sub-insulating layer (241) is greater than a glass transition temperature of the second sub-insulating layer (242); A third sub-insulating layer (243) is formed on the first wiring layer (225) of the third part (203) of the circuit board (20), and a portion of the third sub-insulating layer (243) is overlapped on the first sub-insulating layer (241), wherein the glass transition temperature of the first sub-insulating layer (241) is greater than the glass transition temperature of the third sub-insulating layer (243); The first sub-insulating layer (241), the second sub-insulating layer (242), and the third sub-insulating layer (243) are pressed together.

23. The method for preparing the charging coil module (1) according to claim 22, characterized in that: The pressing is a hot pressing process, the hot pressing temperature of the hot pressing process is in the range of 150° C. to 200° C., and the hot pressing time of the hot pressing process is in the range of 0.5 hour to 3 hours; Alternatively, the pressing is a pressure transfer process, the pressure transfer temperature of the pressure transfer process is in the range of 170° C. to 190° C., and the hot pressing time of the pressure transfer process is in the range of 0.5 hour to 3 hours; Alternatively, the pressing is a rapid pressing process, the rapid pressing temperature of the rapid pressing process is in the range of 170° C. to 190° C., and the rapid pressing time of the rapid pressing process is in the range of 1 minute to 8 minutes.

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