Method for manufacturing semiconductor device

Abstract

A method for manufacturing a semiconductor device according to an embodiment includes a mark forming step, a first affixing step, a grinding step, and a processing step. The mark forming step is a step for forming a recess in a device surface on which there is formed a circuit pattern of a base material composed of a semiconductor material. The first affixing step is a step for affixing the device surface to a support substrate. The grinding step is a step for forming a ground surface by grinding the surface of the base material on the opposite side from the device surface in a state of being supported by the support substrate. The processing step is a step for processing the base material from the ground-surface side in a state of being supported by the support substrate. In the method for manufacturing a semiconductor device according to an embodiment, in the grinding step, the recess is exposed to the ground surface to form a mark, and in the processing step, the processing is performed with reference to the mark.

Description

Semiconductor device manufacturing method

[0001] This application claims priority to Japanese Patent Application No. 2023-125147, filed on July 31, 2023, the contents of which are incorporated herein by reference.

[0002] Semiconductor devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used for applications such as power conversion. These semiconductor devices are manufactured by forming a circuit pattern on a substrate and then singulating the substrate into individual chips. Each process involved in the manufacture of a semiconductor device is performed by aligning the substrate with reference to alignment lines formed on the device surface. However, in some cases, it may be preferable to perform a process after forming the circuit pattern (e.g., a singulation process) from the opposite side of the device surface in terms of product quality. In this case, the alignment lines on the device surface cannot be directly confirmed, making it difficult to align the substrate.

[0003] JP 2016-096265 A

[0004] The problem to be solved by the present invention is to provide a method for manufacturing a semiconductor device that allows easy alignment of a substrate in the process.

[0005] The method for manufacturing a semiconductor device according to the embodiment includes a mark forming step, a first attaching step, a grinding step, and a processing step. The mark forming step is a step of forming a recess on a device surface of a substrate made of a semiconductor material on which a circuit pattern is formed. The first attaching step is a step of attaching the device surface to a support substrate. The grinding step is a step of grinding the surface of the substrate opposite the device surface while the substrate is supported on the support substrate to form a ground surface. The processing step is a step of processing the substrate from the ground surface while the substrate is supported on the support substrate. In the method for manufacturing a semiconductor device according to the embodiment, the grinding step exposes the recess on the grinding surface to serve as a mark, and the processing step uses the mark as a reference.

[0006] 1 is a schematic diagram of a semiconductor device according to a first embodiment; a flowchart illustrating a manufacturing method of a semiconductor device according to the first embodiment; a schematic diagram illustrating a device surface forming step according to the first embodiment; a schematic diagram illustrating a mark forming step according to the first embodiment; a schematic diagram illustrating a device surface in the mark forming step according to the first embodiment; a schematic diagram illustrating a first bonding step according to the first embodiment; a schematic diagram illustrating a grinding step according to the first embodiment; a schematic diagram illustrating a film forming step according to the first embodiment; an example of an enlarged view of a film portion near a groove portion according to the first embodiment; an example of an enlarged view of a film portion near a groove portion according to the first embodiment; a schematic diagram illustrating a photoresist coating step according to the first embodiment; a schematic diagram illustrating an exposure step according to the first embodiment; a schematic diagram of a photomask according to the first embodiment; a schematic diagram illustrating a development step according to the first embodiment; a schematic diagram illustrating an etching step according to the first embodiment; a schematic diagram illustrating a photoresist removal step according to the first embodiment; a schematic diagram illustrating a singulation step according to the first embodiment; a schematic diagram illustrating a second bonding step according to the first embodiment. 1 is a schematic diagram showing a support substrate detachment step of the first embodiment; a schematic diagram showing a pick-up step of the first embodiment; a schematic diagram showing a device surface in a mark formation step of a modified example; a flowchart showing a method for manufacturing a semiconductor device of a second embodiment; a schematic diagram showing a second bonding step of the second embodiment; a schematic diagram showing a support substrate detachment step of the second embodiment; a schematic diagram showing a singulation step of the second embodiment.

[0007] Hereinafter, a method for manufacturing a semiconductor device and a semiconductor device according to an embodiment will be described with reference to the drawings.

[0008] In this specification, in order to indicate the positional relationship of parts, etc., the upward direction of the drawing will be described as "up" and the downward direction of the drawing will be described as "down." In this specification, the concepts of "up" and "down" do not necessarily refer to the direction of gravity.

[0009] 1 is a schematic diagram of a semiconductor device 1 according to a first embodiment. The semiconductor device 1 according to this embodiment is, for example, a MOSFET or an IGBT (Insulated Gate Bipolar Transistor). The semiconductor device 1 according to this embodiment includes a rectangular plate-shaped semiconductor chip 10T and an electrode 20T provided on one surface of the semiconductor chip 10T.

[0010] The semiconductor chip 10T is made of a semiconductor material, such as, but not limited to, silicon (Si), silicon carbide (SiC), GaAs (gallium arsenide), or GaN (gallium nitride).

[0011] The semiconductor chip 10T has a device surface 10a, a back surface 10b located opposite the device surface 10a, and four side surfaces 10c connecting the device surface 10a and the back surface 10b. The area of ​​each side surface 10c is sufficiently small compared to the areas of the device surface 10a and the back surface 10b. A circuit pattern is formed on the device surface 10a. For example, a MOSFET device or an IGBT device is formed on the device surface 10a. In the following description, the distance between the device surface 10a and the back surface 10b is referred to as the thickness H of the semiconductor chip 10T.

[0012] The electrode 20T is provided on the back surface 10b of the semiconductor chip 10T. The electrode 20T contacts the back surface 10b of the semiconductor chip 10T. For example, if the semiconductor chip 10T is a MOSFET chip, the electrode 20T is a drain electrode of the MOSFET. The electrode 20T includes an electrically conductive material. Here, the electrically conductive material may be, for example, Cu (copper), Al (aluminum), Ni (nickel), Ag (silver), or Au (gold), but is not limited to these.

[0013] In the semiconductor chip 10T of this embodiment, the area of ​​the device surface 10a is larger than the area of ​​the back surface 10b. Furthermore, all of the side surfaces 10c of the semiconductor chip 10T are inclined with respect to the normal to the device surface 10a. All of the side surfaces 10c are inclined in a direction approaching the side surface 10c located opposite the side surface 10c as they move from the device surface 10a side to the back surface 10b side. It is sufficient that at least one pair of the side surfaces 10c facing opposite to each other are inclined in a direction approaching each other as they move from the device surface 10a side to the back surface 10b side.

[0014] 2 is a flowchart showing a method for manufacturing the semiconductor device 1 of this embodiment. The method for manufacturing the semiconductor device 1 of this embodiment includes a device surface forming step S10, a mark forming step S20, a first bonding step S30, a grinding step S40, a film forming step S50, a photolithography step (processing step) S60, a singulation step (processing step) S70, a second bonding step S80, a support substrate removing step S90, and a pick-up step S100.

[0015] 3 is a schematic diagram showing the device surface forming step S10 of this embodiment. The device surface forming step S10 is a step of forming a circuit pattern of, for example, a MOSFET device or an IGBT device on one surface of a disk-shaped substrate 10 (semiconductor wafer) made of a semiconductor material, and this surface is called the device surface 10a. In the following description, the surface opposite the device surface 10a before the grinding step S40 described below is referred to as the initial back surface 10f. Although not shown, the device surface forming step S10 and the subsequent mark forming step S20 are performed with the substrate 10 supported on the initial back surface 10f.

[0016] 4 is a schematic diagram showing the mark forming step S20 of this embodiment. The mark forming step S20 of this embodiment is a step of processing the device surface 10a of the substrate 10 to form a plurality of grooves (recesses, marks) 11 each having a depth D and a plurality of holes (recesses, marks) 12 each having a depth D on the device surface 10a.

[0017] In this embodiment, the grooves 11 function as markers in the subsequent singulation step S70. On the other hand, the holes 12 function as markers in the subsequent photolithography step S60. Note that the steps in this embodiment in which the grooves 11 and the holes 12 are used are merely examples and can be interchanged or replaced with each other. Therefore, the holes 12 may be used as markers in the singulation step S70, and the grooves 11 may be used as markers in the photolithography step S60.

[0018] The depth D of the groove 11 and the hole 12 is greater than the thickness H (see FIG. 1) of the semiconductor chip 10T manufactured by the manufacturing method of this embodiment. In this embodiment, the depths D of the groove 11 and the hole 12 are the same. However, the depths D of the groove 11 and the hole 12 do not have to be the same as each other as long as they are greater than the thickness H. Furthermore, the shapes of the groove 11 and the hole 12 that function as markers in this embodiment are merely examples, and the markers are not limited to the shapes of this embodiment as long as they are recesses machined in the depth direction from the device surface 10a. Note that, in this specification, the term "recess" refers to a shape machined in the depth direction relative to a predetermined surface (the device surface 10a in this embodiment), and also includes a penetrating portion that penetrates in the depth direction. Therefore, the recess formed in the marker formation process S20 may penetrate the substrate 10 in the thickness direction. Furthermore, the shape of the bottom of the "recess" does not need to be flat; it may be circular like the groove 11, or any other shape.

[0019] In the mark forming step S20 of this embodiment, the grooves 11 are formed by a dicing device M used in the singulation process (see the subsequent singulation step S70). The grooves 11 are formed by a rotating disk-shaped blade 9 provided in the dicing device M. Alternatively, a laser may be used to form the grooves 11.

[0020] In the mark forming step S20 of this embodiment, the hole 12 is formed using, for example, a laser. Alternatively, a cutting tool such as a drill may be used to form the hole 12. Note that although the hole 12 of this embodiment is a circular hole in a plan view, the shape of the hole 12 is not limited.

[0021] FIG. 5 is a schematic diagram showing the device surface 10a after the mark forming step S20. In FIG. 5, the grooves 11 are indicated by thick lines. As shown in FIG. 5, a plurality of alignment lines L11 and L12 are formed in advance on the device surface 10a. The alignment lines L11 and L12 are used as reference positions for forming a circuit pattern in the device surface forming step S10. The alignment lines L11 and L12 include a plurality of first alignment lines L11 and a plurality of second alignment lines L12. The first alignment lines L11 and the second alignment lines L12 extend in directions perpendicular to each other. The alignment lines L11 and L12 divide the device surface 10a into a plurality of vertical and horizontal sections.

[0022] The sections arranged between the alignment lines L11 and L12 are classified into rectangular effective sections S1 used as the semiconductor device 1 and removal sections S2 arranged along the outer edge of the device surface 10a. A circuit pattern of one semiconductor device 1 is formed in each effective section S1. On the other hand, no circuit pattern is formed in the removal section S2. The removal section S2 is arranged to surround the central region where the effective sections S1 are concentrated.

[0023] In this embodiment, the grooves 11 and holes 12 are formed using the alignment lines L11 and L12 as references. At least one groove 11 is required to detect the relative position of the device surface 10a when used as a marker, and two or more grooves are preferably provided to improve detection accuracy. The grooves 11 of this embodiment are formed so as to overlap the portions of the alignment lines L11 and L12 that separate adjacent removal sections S2. That is, the grooves 11 of this embodiment are formed so as to overlap the ends of some of the alignment lines L11 and L12. The grooves 11 of this embodiment are formed on all of the alignment lines L11 and L12 that separate the removal sections S2. However, it is sufficient that the grooves 11 are formed on the alignment lines L11 and L12 that separate at least some of the removal sections S2.

[0024] In this embodiment, three holes 12 are provided on the device surface 10a. At least two holes 12 are required to detect the relative position of the device surface 10a when used as a marker, and three or more holes are preferably provided to improve detection accuracy. Furthermore, the multiple holes 12 are preferably spaced apart within the device surface 10a to improve detection accuracy. In this embodiment, three holes 12 are provided on the device surface 10a, and are located in different removal sections S2 near the outer edge of the device surface 10a.

[0025] 6 is a schematic diagram showing the first attachment step S30 of this embodiment. In the process of transitioning from the mark formation step S20 to the first attachment step S30, the substrate 10 is turned upside down. The first attachment step S30 is a step of attaching the device surface 10a, which faces downward, to the support substrate 40 using an adhesive 30. By going through the first attachment step S30, the substrate 10 is fixed to the support substrate 40.

[0026] In the first attachment step S30, the device surface 10a is first coated with an uncured adhesive 30. Next, the device surface 10a is placed opposite the support surface of the support substrate 40 and attached to it. The adhesive 30 is then cured. For example, an acrylic adhesive, an epoxy adhesive, or a silicone adhesive can be preferably used as the adhesive 30. The support substrate 40 is a plate-shaped member made of, for example, glass or silicon (Si).

[0027] 6 illustrates a case where the grooves 11 and holes 12 are completely filled with adhesive 30, but the state of filling with adhesive 30 is not limited to the state shown in FIG. 6. That is, adhesive 30 may be filled partway into grooves 11 and holes 12, with voids being provided near the bottoms of grooves 11 and holes 12. Also, adhesive 30 may not be filled into grooves 11 and holes 12 at all.

[0028] FIG. 7 is a schematic diagram showing the grinding step S40 of this embodiment. The grinding step S40 is a step of grinding the initial back surface 10f to form a back surface (ground surface) 10b. The grinding step S40 of this embodiment is performed while the substrate 10 is supported on a support substrate 40. The grinding step S40 reduces the thickness of the substrate 10 to H. As a result, the grooves 11 and holes 12 formed on the device surface 10a connect to the back surface 10b, and the grooves 11 and holes 12 penetrate the substrate 10. That is, in the manufacturing method of the semiconductor device 1 of this embodiment, the grinding step S40 exposes the grooves 11 and holes 12 on the back surface 10b, serving as markers that can be confirmed from the back surface 10b. As described above, the grooves 11 and holes 12 of this embodiment are filled with adhesive 30. Therefore, when the grooves 11 penetrate the substrate 10, the adhesive 30 is exposed from the back surface 10b.

[0029] FIG. 8 is a schematic diagram showing the film forming step S50 of this embodiment. The film forming step S50 is a step of forming a film portion 20 on the rear surface 10b of the base material 10. The film forming step S50 of this embodiment is performed while the base material 10 is supported on a support substrate 40. The film portion 20 of this embodiment is a metal film made of a metal material. However, the material of the film portion 20 is not limited. The film forming step S50 of this embodiment is performed by, for example, CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), electrolytic plating, electroless plating, or the like. The thickness h of the film portion 20 of this embodiment is, for example, approximately 40 μm. However, the thickness h of the film portion 20 is not limited to that of this embodiment.

[0030] As described above, the adhesive 30 in the grooves 11 and holes 12 is exposed on the back surface 10b. Therefore, a portion of the film portion 20 is formed on the adhesive 30. FIG. 9 is an enlarged view of the film portion 20 near the grooves 11 (or holes 12). When the material of the surface on which the film portion 20 is formed is different, the film portion 20 in that portion will be in a different state from the other portions. For example, the region 20b of the film portion 20 formed on the adhesive 30 will have observable differences, such as localized irregularities, a higher surface roughness, or a smaller or larger film thickness, compared to the region 20a formed on the substrate 10. Therefore, even after the film portion 20 is formed on the back surface 10b, the positions of the grooves 11 and holes 12 can be determined by observing the film portion 20. Note that FIG. 9 illustrates a case in which the adhesive 30 is completely filled in the grooves 11 and holes 12. However, the adhesive 30 in the grooves 11 and holes 12 may not fill the grooves 11 and holes 12 at all, as shown in Fig. 10, or may fill only a portion of the grooves 11 and holes 12, as shown in Fig. 11. In these cases, a recess 20c is formed on the surface of the film portion 20, so the positions of the grooves 11 and holes 12 can be easily ascertained by observing the film portion 20.

[0031] 12 to 17 are schematic diagrams showing the photolithography step S60 of this embodiment. The photolithography step S60 is a step of etching the film portion 20 formed in the film formation step S50 into a desired pattern. The photolithography step S60 includes a photoresist application step, an exposure step, a development step, an etching step, and a photoresist removal step.

[0032] 12 is a schematic diagram showing the photoresist coating step of this embodiment. In the photoresist coating step, a photoresist 60 is applied to the surface of the film portion 20 by means of spin coating or the like, and is hardened through a pre-baking process.

[0033] FIG. 13 is a schematic diagram showing the exposure process of this embodiment. In the exposure process, light from a light source LS is irradiated onto the photoresist 60 through a photomask 70. In the exposure process, a portion of the light that has passed through the photomask 70 strikes the photoresist 60. The portions of the photoresist 60 that are struck by the light become photosensitive portions 61, and their solubility changes. In this embodiment, the photosensitive portions 61 are formed in lines so as to overlap the alignment lines L11 and L12 (see FIG. 5). The positions of the photosensitive portions 61 need to be positioned relative to the substrate 10. Therefore, the photomask 70 needs to be aligned so that the light-transmitting portions 72 are positioned at desired positions relative to the substrate 10.

[0034] 14 is a schematic diagram of a photomask 70 of this embodiment. The photomask 70 is provided with a plurality of mask portions 71 that limit the transmission of light, and light-transmitting portions 72 that are located in areas other than the mask portions 71 and transmit light. The light-transmitting portions 72 are formed in lines so as to expose areas that overlap with the alignment lines L11 and L12.

[0035] The photomask 70 is provided with three alignment marks 73 for aligning the photomask 70 with respect to the substrate 10. In the exposure step, the three alignment marks 73 are respectively placed over the hole portions 12 exposed on the rear surface 10b of the substrate 10, thereby enabling the photomask 70 to be aligned with the substrate 10. That is, in the exposure step, the photomask 70 is aligned using the hole portions 12 as a reference. Note that the method for aligning the photomask 70 with the substrate 10 described here is just one example, and other methods may be used as long as they can be performed using the hole portions 12 as a reference.

[0036] The photolithography process S60 of this embodiment is performed from the rear surface 10b side of the substrate 10. For this reason, it is difficult to align the photomask 70 using the alignment lines L11 and L12 provided on the device surface 10a. In this embodiment, the hole portions 12 provided on the device surface 10a penetrate to the rear surface 10b side. For this reason, in the photolithography process S60, the positions of the hole portions 12 can be grasped from the rear surface 10b side via the film portion 20. The photomask 70 is aligned by observing the film portion 20 to grasp the positions of the hole portions 12 and aligning them with the alignment marks 73 of the photomask 70. That is, the photolithography process S60 of this embodiment is performed using the hole portions 12 that penetrate to the rear surface 10b side as a reference.

[0037] In this embodiment, the case where the photomask 70 is aligned using the holes 12 has been described, but the photomask 70 can also be aligned using the grooves 11. In this case, alignment marks 73 are provided on the photomask 70 to align it with the grooves 11. In this case, the holes 12 in the substrate 10 are omitted.

[0038] 15 is a schematic diagram showing the development step of this embodiment. The development step is a step of dissolving and removing the exposed portion 61 of the photoresist 60 using a developer, followed by post-baking. By removing the exposed portion 61, an opening 62 is formed in the photoresist 60. Furthermore, a portion of the film portion 20 is exposed through the opening 62. Note that, although the photolithography step S60 using a positive photoresist 60 is described in this embodiment, the photolithography step may also be performed using a negative photoresist. When a negative photoresist is used, portions other than the exposed portion are dissolved to form an opening.

[0039] 16 is a schematic diagram showing the etching step of this embodiment. The etching step is a step of removing the film portion 20 exposed from the opening 62 of the photoresist 60 by etching. As described above, the light-transmitting portion 72 (FIG. 14) of the photomask 70 of this embodiment is formed in a line shape so as to overlap the alignment lines L11 and L12. Therefore, by undergoing the etching step, grooves 22 overlapping the alignment lines L11 and L12 are formed in the film portion 20. The grooves 22 penetrate the film portion 20 in the thickness direction. Therefore, the back surface 10b of the substrate 10 is exposed at the bottom of the grooves 22.

[0040] 17 is a schematic diagram of the photoresist removal step of this embodiment. In the photoresist removal step, the photoresist 60 is removed, and the surface of the film portion 20 is exposed.

[0041] 18 is a schematic diagram showing the singulation step S70 of the present embodiment. The singulation step S70 is a step of cutting the base material 10 to singulate the base material 10 and extracting the semiconductor chips 10T. The singulation step S70 of the present embodiment is performed in a state where the base material 10 is supported on the support substrate 40.

[0042] In the singulation step S70 of this embodiment, the base material 10 is cut by a dicing device M using a blade 9. Alternatively, the base material 10 may be cut by a laser dicing device.

[0043] The singulation process S70 of this embodiment is performed from the rear surface 10b side of the substrate 10. Therefore, in the singulation process S70, it is difficult to observe the alignment lines L11 and L12 (see FIG. 5 ) provided on the device surface 10a from the processing side. Furthermore, the film portion 20 of this embodiment is provided with grooves 22 extending along the alignment lines L11 and L12. Therefore, it is possible to cut the substrate 10 along the grooves 22 to singulate the substrate 10. However, the grooves 22 are formed sufficiently wide relative to the alignment lines L11 and L12 to prevent the inner surfaces of the grooves 22 from coming into contact with the blade 9 when cutting the substrate 10. Furthermore, since the grooves 22 are formed by etching, their positional accuracy is low. Therefore, when the singulation process S70 is performed based on the grooves 22, it is difficult to improve the positional accuracy of the cut surfaces in the singulation process S70.

[0044] In this embodiment, the grooves 11 provided on the device surface 10a penetrate to the back surface 10b. Therefore, in the singulation step S70, the positions of the grooves 11 can be grasped from the back surface 10b side. The dicing device M has an imaging device C that observes the grooves 11 from above. The dicing device M grasps the positions of the grooves 11 using the imaging device C, and cuts the substrate 10 using the grooves 11 as a reference. That is, the singulation step S70 of this embodiment is performed using the grooves 11 that penetrate to the back surface 10b side as a reference.

[0045] 5, all alignment lines L11, L12 in this embodiment are positioned on extensions of the grooves 11. Therefore, the dicing device M separates the substrate 10 by cutting the substrate 10 linearly along the grooves 11 grasped by the imaging device C. By cutting the substrate 10, semiconductor devices 1 are formed in which electrodes 20T are provided on the back surface 10b side of the semiconductor chips 10T.

[0046] As shown in FIG. 18 , in the singulation step S70, a blade 9 forms dicing grooves 10G in the substrate 10. Even if the blade 9 has a constant thickness, the width of the dicing grooves 10G gradually increases from the bottom toward the opening. This is because the cut surfaces on the opening side of the dicing grooves 10G are polished by the side of the blade 9. Therefore, the cut surfaces of the substrate 10 that face each other across the dicing grooves 10G gradually move apart toward the opening. As a result, the pair of side surfaces 10c of the semiconductor chip 10T formed between the cut surfaces are inclined toward each other from the device surface 10a toward the back surface 10b.

[0047] 19 is a schematic diagram showing the second attaching step S80 of this embodiment. In the process of transitioning from the singulation step S70 to the second attaching step S80, the substrate 10 is turned upside down. The second attaching step S80 is performed in a state where the substrate 10 is supported by the support substrate 40. The second attaching step S80 is a step of attaching the substrate 10 to the dicing tape 50 on the side opposite the support substrate 40. In this embodiment, the film portion 20 is provided on the back surface 10b side of the substrate 10, and therefore the substrate 10 is attached to the dicing tape 50 via the film portion 20.

[0048] 20 is a schematic diagram showing the support substrate detaching step S90 of this embodiment. The support substrate detaching step S90 is a step of detaching the support substrate 40 from the base material 10. In the support substrate detaching step S90 of this embodiment, the adhesive 30 may be dissolved with a solvent, or the adhesive force may be weakened by irradiating the adhesive with a laser through the light-transmitting support substrate 40. Furthermore, the support substrate detaching step S90 may be a step of detaching the support substrate 40 from the base material 10 by mechanical peeling, in which a sharp tool is inserted between the base material 10 and the support substrate 40 and the adhesive 30 is peeled off.

[0049] FIG. 21 is a schematic diagram showing the pick-up step S100 of this embodiment. The pick-up step S100 is a step of individually removing the individual semiconductor devices 1 on the dicing tape 50 from the dicing tape 50. In the pick-up step S100, first, a process is performed to weaken the adhesive strength of the adhesive layer on the surface of the dicing tape 50. The process for weakening the adhesive strength of the adhesive layer of the dicing tape 50 includes, for example, irradiating the adhesive layer with ultraviolet light or heating the adhesive layer. Furthermore, in the pick-up step S100, a pin is used to push one semiconductor device 1 upward from below the dicing tape 50, and negative pressure is applied to the device surface 10a of the semiconductor device 1 to adsorb it, thereby picking up the semiconductor device 1. The semiconductor device 1 can be manufactured through the above steps.

[0050] Next, the effects of the first embodiment will be described. As shown in FIG. 2 , the manufacturing method of the semiconductor device 1 of this embodiment includes a mark forming step S20, a first attaching step S30, a grinding step S40, and a processing step (photolithography step S60 or singulation step S70). As shown in FIG. 4 , the mark forming step S20 is a step of forming recesses (grooves 11 and holes 12) on the device surface 10a of the substrate 10 made of a semiconductor material, on which a circuit pattern is formed. As shown in FIG. 6 , the first attaching step S30 is a step of attaching the device surface 10a to a support substrate 40. As shown in FIG. 7 , the grinding step S40 is a step of grinding the surface (initial back surface 10f) of the substrate 10 opposite the device surface 10a while supported by the support substrate 40 to form a back surface (ground surface) 10b. 12 to 18, the processing step (photolithography step S60 or singulation step S70) is a step of processing the base material 10 from the rear surface 10b side while it is supported on the support substrate 40. In the manufacturing method for the semiconductor device 1 of this embodiment, in the grinding step S40, the recesses (groove portions 11 and hole portions 12) are exposed on the rear surface 10b to serve as marks. In the manufacturing method for the semiconductor device 1 of this embodiment, in the processing step (photolithography step S60 or singulation step S70), processing is performed using the marks (groove portions 11 and hole portions 12) as references.

[0051] According to this configuration, in the mark formation step S20, recesses (grooves 11 and holes 12) can be formed from the device surface 10a using alignment lines L11, L12, etc., on the device surface 10a as references. Furthermore, the formed recesses (grooves 11 and holes 12) can be exposed from the back surface 10b by the grinding step S40. As a result, when a processing step (photolithography step S60 or singulation step S70) is performed from the back surface 10b, alignment can be performed from the back surface 10b using the recesses (grooves 11 and holes 12) as references. According to this configuration, alignment of the substrate 10 during processing is facilitated for processing steps (photolithography steps) that must be performed from the back surface 10b. Furthermore, when performing processing steps that require alignment of the substrate 10, there is no need to face the device surface 10a upward for alignment, simplifying the manufacturing process.

[0052] As shown in Figure 18, in the manufacturing method of the semiconductor device 1 of this embodiment, the processing step is a singulation step S70 in which the substrate 10 is cut using the mark (groove portion 11) as a reference while supported on the support substrate 40, and the substrate 10 is singulated.

[0053] According to this configuration, the processing step involves performing the singulation step S70 from the rear surface 10b side while the substrate is supported on the support substrate 40. In conventional semiconductor device manufacturing methods, the process of cutting and singulating the substrate to form the semiconductor device 1 has been performed while the substrate is mounted on a dicing tape. Because the dicing tape 50 is elastic, cutting the substrate on the dicing tape poses a problem of the substrate being unstable during cutting, making the cut surface prone to damage. In contrast, according to the above configuration, the substrate 10 is singulated while supported on the support substrate 40. Therefore, compared to when the substrate 10 is singulated on the dicing tape 50, the substrate 10 can be cut while being stably supported. As a result, damage is less likely to remain on the cut surface after the singulation step S70, making it possible to provide a semiconductor device 1 with improved quality.

[0054] Furthermore, according to the above-described configuration, the singulation step S70 is performed with the device surface 10a attached to the support substrate 40. Generally, in the singulation step S70, particles are likely to be generated during cutting, and these particles may scatter into the processing space and contaminate the device surface 10a. In particular, when the singulation step S70 is performed on a dicing tape 50, there is a risk that a portion of the dicing tape 50 will be scraped off by the blade 9 performing the singulation step S70, adhere to the device surface 10a, and become difficult to remove. According to the above-described configuration, since the device surface 10a is covered by the support substrate 40 via the adhesive 30, particles generated in the singulation step S70 can be prevented from adhering to the device surface 10a, making it possible to provide a semiconductor device 1 with improved quality.

[0055] Furthermore, according to the above-described configuration, after the singulation step S70 is completed, the singulated base material 10 (semiconductor chips 10T) is mounted on the support substrate 40. Therefore, when processing the semiconductor chips 10T (e.g., etching the side surfaces 10c) after the singulation step S70, it is possible to process multiple semiconductor chips 10T on the support substrate 40 at once. In contrast, when the singulation step S70 is performed on a dicing tape 50 as in the conventional method, etching and other processes cannot be performed on the dicing tape 50 due to concerns about damage to the dicing tape 50. Therefore, in conventional manufacturing methods, the singulated semiconductor chips 10T must be moved from the dicing tape 50 to a support table before processing. According to the above-described configuration, when etching and other processes are performed on the singulated semiconductor chips 10T, the process of remounting the semiconductor chips 10T on the support table can be omitted, simplifying the manufacturing process.

[0056] 5, in the manufacturing method of the semiconductor device 1 of this embodiment, alignment lines L11 and L12 that partition the substrate 10 are provided on the device surface 10a. The recesses are grooves 11 that at least partially overlap the alignment lines L11 and L12 when viewed in the thickness direction of the substrate 10.

[0057] According to this configuration, by using the recesses as markers as grooves 11, providing at least one groove 11 makes it possible to align the substrate 10. Furthermore, by arranging the grooves 11 so as to overlap the alignment lines L11 and L12 when viewed from the thickness direction of the substrate 10, it becomes possible to perform the singulation step S70 by cutting along the grooves 11. That is, it becomes easier to align the cutting lines in the singulation step S70, and it becomes possible to manufacture semiconductor devices 1 with improved positional accuracy of the cutting lines.

[0058] In the method for manufacturing the semiconductor device 1 of this embodiment, the substrate 10 is partitioned by alignment lines L11 and L12 into a plurality of rectangular effective sections S1 and a plurality of removal sections S2 arranged along the outer edge. The grooves 11 overlap with the portions of the alignment lines L11 and L12 that partition the removal sections S2.

[0059] This configuration prevents the cut surface of the groove 11 formed in the mark forming step S20 from constituting the outer side surface of the final semiconductor device 1. Therefore, in the mark forming step S20, the means for forming the groove 11 and various conditions for formation can be set with priority given to processing speed rather than the state of the cut surface, thereby shortening the time required for the mark forming step S20. As a result, the manufacturing time of the semiconductor device 1 can be shortened while maintaining the surface precision of the side surface 10c of the semiconductor device 1 to be manufactured.

[0060] 2, the manufacturing method of the semiconductor device 1 of this embodiment includes a film-forming step S50 that is performed after the grinding step S40. The film-forming step S50 is a step of forming a film portion 20 on the back surface 10b. As shown in FIGS. 12 to 17, the processing step is a photolithography step S60 in which a part of the film portion 20 is etched and removed using the mark (hole 12) as a reference.

[0061] According to this configuration, a photolithography step S60 can be performed as a processing step, in which a portion of the film portion 20 is etched. That is, the alignment of the photomask 70 in the photolithography step S60 can be performed from the rear surface 10b side. This improves the accuracy of the alignment of the photomask 70, and allows the formation of grooves 22 in the film portion 20 with high positional accuracy.

[0062] 14 , in the manufacturing method of the semiconductor device 1 of this embodiment, alignment lines L11 and L12 that partition the base material 10 are provided on the device surface 10a. In the photolithography step S60, the region (groove 22) where the film portion 20 is etched overlaps the alignment lines L11 and L12 when viewed from the thickness direction of the base material 10.

[0063] According to this configuration, the film portion 20 can be singulated into individual pieces to the size of the electrodes 20T of the semiconductor device 1 by the photolithography process S60. This eliminates the need to cut the film portion 20 in the separate singulation process S70. If the film portion 20 is sufficiently thick (40 μm or thicker), attempting to simultaneously cut the film portion 20 and the substrate 10 places a heavy burden on the substrate 10, potentially damaging it. In particular, since the substrate 10 is made of a brittle material such as silicon (Si) or silicon carbide (SiC), there is a risk of cracking the substrate 10 when simultaneously connecting the film portion 20 and the substrate 10 below the film portion 20, which is made of a sufficiently thick, ductile material. By singulating the film portion 20 in the photolithography process S60, damage to the substrate 10 during cutting can be reduced.

[0064] 2, the method for manufacturing the semiconductor device 1 of this embodiment includes a singulation step S70 that is performed after the photolithography step S60. The singulation step S70 is a step of cutting the base material 10 to separate the base material 10 into individual pieces.

[0065] When the film portion 20 is mechanically cut with a blade 9 or the like, burrs may be generated from the film portion 20. Burrs generated from the film portion 20 may affect subsequent processes, so a separate process is required to deal with them. According to the above-described configuration, the film portion 20 is singulated in advance in the photolithography process S60, and burrs are not generated from the film portion 20 in the singulation process S70. Therefore, the singulation process S70 can be carried out smoothly.

[0066] As shown in FIG. 1, the semiconductor device 1 of this embodiment includes a plate-shaped semiconductor chip 10T made of a semiconductor material. The semiconductor chip 10T has a device surface 10a, a back surface 10b, and four side surfaces 10c. A circuit pattern is formed on the device surface 10a. The back surface 10b is located on the opposite side of the device surface 10a. The four side surfaces 10c connect the device surface 10a and the back surface 10b. Of the four side surfaces 10c, at least one pair of side surfaces 10c facing opposite to each other are inclined toward each other from the device surface 10a side toward the back surface 10b side.

[0067] By performing the singulation step S70 using the blade 9 from the back surface 10b side of the base material 10, the side surfaces 10c are inclined toward each other from the device surface 10a side toward the back surface 10b side. In other words, by having such side surfaces 10c, the above-mentioned manufacturing method can be adopted, and a semiconductor device 1 with improved quality can be provided.

[0068] A modified example that can be adopted in this embodiment will be described. In this embodiment, a case has been described in which a film portion 20 is formed on the rear surface 10b of the substrate 10 in the film formation step S50, and a portion of the film portion 20 is etched in the photolithography step S60. However, the semiconductor device 1 does not need to have the electrode 20T. In this case, the film formation step S50 and the photolithography step S60 are omitted in the manufacturing method of the semiconductor device 1.

[0069] In this embodiment, as shown in FIG. 5 , the grooves 11 are arranged only between the removal sections S2, not between the effective sections S1. Therefore, in this embodiment, the cut surfaces of the grooves 11 serving as markers do not appear as the side surfaces 10c of the semiconductor device 1, which is the final product. However, as shown in a modified example in FIG. 22 , the grooves 11A may be arranged on the alignment lines L11 and L12 between the effective sections S1 and the removal sections S2. That is, the grooves 11A may overlap the portions of the alignment lines L11 and L12 that define the effective section S1. According to this modified example, the cut surfaces of the grooves 11A formed in the marker formation step S20 can be used as the outer surfaces of the semiconductor device 1, which is the final product. This makes it possible to omit some cutting steps in the singulation step S70, thereby shortening the time required for the singulation step S70. The grooves 11A may also be arranged between the effective sections S1.

[0070] Next, the singulation process S70 for forming the groove portion 11A of the modified example will be described with reference to Fig. 22. The singulation process S70 includes a first cutting process for cutting the substrate 10 in a direction along the first alignment line L11, and a second cutting process for cutting the substrate 10 in a direction along the second alignment line L12.

[0071] In the first cutting step, first, the substrate 10 is cut along one groove portion 11A that overlaps the first alignment line L11, and then the blade 9 is offset a predetermined distance in a direction perpendicular to the first alignment line L11 to cut the substrate 10. Furthermore, by repeating the procedure of cutting the substrate 10 after offsetting the blade 9 by the predetermined distance, the substrate 10 can be cut along all of the first alignment lines L11.

[0072] In the second cutting step, the substrate 10 is cut along the second alignment lines L12 using the same procedure as in the first cutting step. That is, first, the substrate 10 is cut along one groove 11A that overlaps the second alignment line L12, and then the blade 9 is offset a predetermined distance in a direction perpendicular to the second alignment line L12 to cut the substrate 10. Furthermore, by repeating the procedure of cutting the substrate 10 after offsetting the blade 9 a predetermined distance, the substrate 10 can be cut along all of the second alignment lines L12. By going through the above steps, the substrate 10 is cut along all of the alignment lines L11 and L12, and all of the semiconductor chips 10T are extracted from the substrate 10.

[0073] 23 is a flowchart showing a method for manufacturing a semiconductor device 1 according to a second embodiment. In the following description of the embodiments, the same components as those in the previously described embodiments are denoted by the same reference numerals, and the description thereof will be omitted.

[0074] The manufacturing method of the semiconductor device 1 of this embodiment includes a device surface forming step S10, a mark forming step S20, a first bonding step S30, a grinding step S40, a film forming step S50, a photolithography step S60, a second bonding step S170, a support substrate removing step S180, a singulation step S190, and a pick-up step S100. The manufacturing method of the semiconductor device 1 of the second embodiment differs from the first embodiment in the order of the second bonding step S170, the support substrate removing step S180, and the singulation step S190. In the second embodiment, a description of each step performed before the second bonding step S170 will be omitted.

[0075] 24 is a schematic diagram showing the second attaching step S170 of this embodiment. The second attaching step S170 is performed in a state where the substrate 10 is supported by the support substrate 40. The second attaching step S170 is a step of attaching the surface on the film portion 20 side to the dicing tape 50. In this embodiment, the second attaching step S170 is performed immediately after the photolithography step S60 and before the singulation step S190. Therefore, at the stage of the second attaching step S170, the film portion 20 has been singulated into a plurality of electrodes 20T, and the substrate 10 has not been singulated.

[0076] 25 is a schematic diagram showing the support substrate detaching step S180 of this embodiment. The support substrate detaching step S180 is a step of detaching the support substrate 40 from the base material 10. The support substrate detaching step S180 of this embodiment is performed in the same procedure as in the first embodiment.

[0077] 26 is a schematic diagram showing the singulation step S190 of this embodiment. The singulation step S190 of this embodiment is performed with the surface on the film portion 20 side attached to the dicing tape 50. The substrate 10 is cut by a dicing device M using a blade 9. The singulation step S190 of this embodiment is performed from the device surface 10a side of the substrate 10. Therefore, the dicing device M cuts the substrate 10 along the alignment lines L11 and L12 using the imaging device C. In the singulation step S190 of this embodiment, the film portion 20 has been singulated in advance, so the blade 9 cuts only the substrate 10.

[0078] Next, the effects of the second embodiment will be described. The manufacturing method of the semiconductor device 1 of this embodiment includes the same photolithography step S60 as in the first embodiment. That is, the photomask 70 can be aligned from the rear surface 10b side using the marks (holes 12) as references.

[0079] The manufacturing method of the semiconductor device 1 of this embodiment includes a second attaching step S170 performed after the photolithography step S60, and a support substrate detaching step S180 performed after the second attaching step S170 and before the singulation step S190. The second attaching step S170 is a step of attaching the surface on the film portion 20 side to a dicing tape 50 while the support substrate 40 is supported. The support substrate detaching step S180 is a step of detaching the support substrate 40 from the base material 10. The singulation step S190 is performed with the surface on the film portion 20 side attached to the dicing tape 50.

[0080] Conventionally, a singulation process has been performed in which the film portion and the substrate are simultaneously cut on a dicing tape. In conventional methods, when the film portion is a metal film, burrs tend to form from the cut portion toward the dicing tape due to the ductility of the metal. Furthermore, the burrs on the film portion may dig into the dicing tape, making it difficult to pick up the semiconductor device. In contrast, with the above-described configuration, although the singulation process S190 is performed on the dicing tape 50, the film portion 20 is singulated in advance, so no burrs are generated from the film portion 20, and the above-described problem does not occur. As a result, the semiconductor device 1 can be manufactured stably. Furthermore, with this configuration, the singulation process S190 can be performed on the dicing tape 50, eliminating concerns about the adhesive 30 damaging the blade 9 compared to when the singulation process is performed on the support substrate 40.

[0081] According to at least one of the embodiments described above, by exposing the recesses (groove portion 11 and hole portion 12) on the back surface 10b side to serve as markers, it becomes possible to align the substrate 10 from the back surface 10b side, and a manufacturing method for a semiconductor device 1 can be provided that makes it easy to align the substrate 10 during the process.

[0082] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention described in the claims and their equivalents.

[0083] 1...semiconductor device, 10...substrate, 10a...device surface, 10b...back surface (grinding surface), 11, 11A...groove portion (recess, mark), 12...hole portion (recess, mark) 20...film portion, 40...support substrate, 50...dicing tape, h, H...thickness, L11...alignment line, S1...effective section, S2...removal section, S20...mark forming step, S30...first bonding step, S40...grinding step, S50...film forming step, S60...photolithography step (processing step), S70...singulation step (processing step), S80, S170...second bonding step, S90, S180...support substrate removal step, S190...singulation step

Claims

1. A method for manufacturing a semiconductor device, comprising: a mark forming step of forming a recess in a device surface on which a circuit pattern of a substrate made of a semiconductor material is formed; a first attachment step of attaching the device surface to a support substrate; a grinding step of grinding a surface of the substrate opposite the device surface while the substrate is supported by the support substrate to form a ground surface; and a processing step of processing the substrate from the ground surface side while the substrate is supported by the support substrate, wherein in the grinding step, the recess is exposed on the grinding surface to serve as a mark, and in the processing step, the processing is performed using the mark as a reference.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the processing step is a singulation step of cutting the base material using the marks as references to singulate the base material while it is supported on the support substrate.

3. The method for manufacturing a semiconductor device according to claim 2, wherein the device surface is provided with alignment lines that partition the substrate, and the recess is a groove portion at least partially overlapping the alignment lines when viewed in the thickness direction of the substrate.

4. A method for manufacturing a semiconductor device as described in claim 3, wherein the substrate is partitioned by the alignment lines into a plurality of effective sections defined in a rectangular shape and a plurality of removal sections arranged along the outer edge, and the groove portion overlaps with a portion of the alignment line which partitions the removal sections from each other.

5. A method for manufacturing a semiconductor device as described in claim 3, wherein the substrate is partitioned by the alignment lines into a plurality of effective sections defined in a rectangular shape and a plurality of removal sections arranged along the outer edge, and the groove portion overlaps with a portion of the alignment lines which partitions the effective sections.

6. A method for manufacturing a semiconductor device as described in claim 1, further comprising a film formation process for forming a film portion on the ground surface, which is performed after the grinding process, and the processing process is a photolithography process for etching and removing a portion of the film portion using the mark as a reference.

7. The method for manufacturing a semiconductor device according to claim 6, wherein alignment lines that partition the substrate are provided on the device surface, and the region where the film portion is etched in the photolithography process overlaps with the alignment lines when viewed in the thickness direction of the substrate.

8. The method for manufacturing a semiconductor device according to claim 7, further comprising a step of cutting the base material to individual pieces, the step being carried out after the photolithography step.

9. A method for manufacturing a semiconductor device as described in claim 8, comprising: a second attachment process, performed after the photolithography process, of attaching the surface on the film portion side to a dicing tape while supported by the support substrate; and a support substrate detachment process, performed after the second attachment process and before the singulation process, of detaching the support substrate from the base material, wherein the singulation process is performed with the surface on the film portion side attached to the dicing tape.

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