Display panel and display apparatus

Abstract

A display panel (100, 200, 300, 400) and a display apparatus. A compensation module (40) in the display panel (100, 200, 300, 400) is used for inputting a first compensation voltage into a sub-pixel (10) in a blank period (t02) of a first display picture and inputting a second compensation voltage into the sub-pixel (10) in a blank period (t02) of a second display picture, wherein the polarity of the first compensation voltage is the same as the polarity of a first data voltage, the polarity of the second compensation voltage is the same as the polarity of a second data voltage, the first compensation voltage is not zero, and the second compensation voltage is not zero. In the display panel (100, 200, 300, 400) and the display apparatus, the voltage difference between a source electrode and drain electrode of a sub-pixel (10) in a blank period can be reduced, and therefore the potential of the sub-pixel (10) remains stable, thereby ameliorating the problem of flickering in the display panel (100, 200, 300, 400), and improving the display effect.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In existing display panels, the polarity of the data voltages input to subpixels in two consecutive frames is opposite. Due to leakage in the source and drain of the switching transistor, the brightness of the subpixels gradually decreases after the first frame is scanned. After entering the second frame, the data voltage of opposite polarity input to the subpixels increases the voltage difference between the source and drain of the switching transistor, accelerating the leakage rate of the source and drain, and the brightness of the subpixels continues to decrease until the next scan, when the pixel brightness significantly increases. As a result, the brightness of the display panel varies significantly between two consecutive frames, causing the display panel to flicker. SUMMARY OF THE INVENTION

[0003] The present application provides a display panel and a display device, which can solve the problem that the brightness of the display panel varies greatly between two consecutive display frames, causing the display panel to flicker.

[0004] On the one hand, an embodiment of the present application provides a display panel, wherein the screen displayed by the display panel includes a first display screen and a second display screen that are displayed continuously, and the display panel includes: a plurality of sub-pixels, a plurality of scan lines, a plurality of data lines, and a compensation module, wherein the plurality of scan lines are arranged along a first direction, and the plurality of scan lines are electrically connected to the plurality of sub-pixels respectively; a plurality of data lines are arranged along a second direction, the first direction intersecting the second direction, and the plurality of data lines are electrically connected to the plurality of sub-pixels respectively, and the data lines input a first data voltage to the sub-pixels during a display period of the first display screen. The polarity is opposite to the polarity of the second data voltage input to the sub-pixel by the data line during the display period of the second display screen; the compensation module is electrically connected to one end of the plurality of data lines, and the compensation module is used to input the first compensation voltage to the sub-pixel during the blank period of the first display screen and to input the second compensation voltage to the sub-pixel during the blank period of the second display screen, the polarity of the first compensation voltage is the same as the polarity of the first data voltage, the polarity of the second compensation voltage is the same as the polarity of the second data voltage, and the first compensation voltage is not zero, and the second compensation voltage is not zero.

[0005] On the other hand, an embodiment of the present application further provides a display device, which includes a frame and a display panel, wherein the picture displayed by the display panel includes a first display picture and a second display picture displayed continuously, and the display panel includes: a plurality of sub-pixels, a plurality of scan lines, a plurality of data lines, and a compensation module, wherein the plurality of scan lines are arranged along a first direction, and the plurality of scan lines are electrically connected to the plurality of sub-pixels respectively; the plurality of data lines are arranged along a second direction, the first direction intersects the second direction, and the plurality of data lines are electrically connected to the plurality of sub-pixels respectively, and the data lines are electrically connected to the sub-pixels during the display period of the first display picture. The polarity of the input first data voltage is opposite to the polarity of the second data voltage input to the sub-pixel by the data line during the display period of the second display screen; the compensation module is electrically connected to one end of the plurality of data lines, and the compensation module is used to input the first compensation voltage to the sub-pixel during the blank period of the first display screen and to input the second compensation voltage to the sub-pixel during the blank period of the second display screen, the polarity of the first compensation voltage is the same as the polarity of the first data voltage, the polarity of the second compensation voltage is the same as the polarity of the second data voltage, and the first compensation voltage is not zero, and the second compensation voltage is not zero. Beneficial effects

[0006] The display panel and display device provided in the present application are electrically connected to one end of multiple data lines by setting a compensation module, and input a first compensation voltage to the sub-pixel during the blank period of the first display picture in the continuously displayed first display picture and the second compensation voltage to the sub-pixel during the blank period of the second display picture, thereby reducing the voltage difference between the source and drain corresponding to the sub-pixel during the blank period, so that the potential of the sub-pixel remains stable, slowing down leakage, and alleviating the problem that the brightness of the sub-pixel is significantly reduced due to severe leakage between the end of the scan and the next scan, and the brightness is significantly increased after the next scan of the sub-pixel, causing the display panel to have a large brightness change in the two continuously displayed frames of display pictures, resulting in flickering of the display panel, so as to improve the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] FIG1 is a schematic diagram of a display panel provided in a first embodiment of the present application;

[0008] FIG2 is a first driving timing diagram of a display panel provided in an embodiment of the present application;

[0009] FIG3 is a second driving timing diagram of a display panel provided in an embodiment of the present application;

[0010] FIG4 is a schematic diagram of a display panel provided in a second embodiment of the present application;

[0011] FIG5 is a third driving timing diagram of a display panel provided in an embodiment of the present application;

[0012] FIG6 is a fourth driving timing diagram of a display panel provided in an embodiment of the present application;

[0013] FIG7 is a fifth driving timing diagram of a display panel provided in an embodiment of the present application;

[0014] FIG8 is a schematic diagram of a display panel provided in a third embodiment of the present application;

[0015] FIG9 is a sixth driving timing diagram of a display panel provided in an embodiment of the present application;

[0016] FIG10 is a seventh driving timing diagram of a display panel provided in an embodiment of the present application;

[0017] FIG11 is a schematic diagram of a display panel provided in a fourth embodiment of the present application. Modes for Carrying Out the Invention

[0018] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The described technical solutions are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0019] The various embodiments provided in this application are similar, and features in different embodiments are combined with each other.

[0020] As shown in FIG1 , an embodiment of the present application provides a display panel 100, wherein the images displayed by the display panel 100 include a first display image and a second display image that are displayed continuously. The display panel 100 includes: a plurality of sub-pixels 10, a plurality of scan lines 20, a plurality of data lines 30, and a compensation module 40. The plurality of scan lines 20 are arranged along a first direction Y and are electrically connected to the plurality of sub-pixels 10, respectively. The plurality of data lines 30 are arranged along a second direction X, intersecting the first direction Y and the second direction X, and are electrically connected to the plurality of sub-pixels 10, respectively. The polarity of the first data voltage input by the data lines 30 to the sub-pixels 10 during a display period of the first display image is opposite to the polarity of the second data voltage input by the data lines 30 to the sub-pixels 10 during a display period of the second display image.

[0021] The compensation module 40 is electrically connected to one end of the plurality of data lines 30. The compensation module 40 is used to input a first compensation voltage to the sub-pixel 10 during a blank period of the first display screen and to input a second compensation voltage to the sub-pixel 10 during a blank period of the second display screen. The polarity of the first compensation voltage is the same as that of the first data voltage, the polarity of the second compensation voltage is the same as that of the second data voltage, and the first compensation voltage is not zero and the second compensation voltage is not zero.

[0022] The display panel 100 is electrically connected to one end of a plurality of data lines 30 by providing a compensation module 40, and inputs a first compensation voltage to the sub-pixel 10 during the blank period of the first display picture in the first and second display pictures displayed continuously, and inputs a second compensation voltage to the sub-pixel 10 during the blank period of the second display picture, so that the potential of the sub-pixel 10 remains stable, thereby improving the problem that the brightness of the sub-pixel 10 is significantly reduced due to severe leakage between the end of a scan and the next scan, and then significantly increases after the next scan of the sub-pixel 10, causing the brightness of the display panel to vary greatly in two frames of continuously displayed display pictures, resulting in flickering of the display panel.

[0023] In an embodiment of the present application, the compensation module 40 includes a compensation voltage output terminal V0, which is electrically connected to one end of the plurality of data lines 30. The compensation voltage output terminal V0 is configured to output a first compensation voltage and a second compensation voltage. The absolute value of the first compensation voltage is less than or equal to the absolute value of the first data voltage, and the absolute value of the second compensation voltage is greater than or equal to the absolute value of the second data voltage.

[0024] Specifically, when the first data voltage is a positive polarity data voltage, for example, the first data voltage is 2 volts, the first compensation voltage is greater than 0 volts and less than or equal to 2 volts, for example, the first compensation voltage is 1.5 volts. When the first data voltage is a negative polarity data voltage, for example, the first data voltage is -2 volts, the first compensation voltage is less than 0 volts and greater than or equal to -2 volts, for example, the first compensation voltage is -1.5 volts.

[0025] The absolute value of the first compensation voltage is equal to the absolute value of the second compensation voltage.

[0026] In an embodiment of the present application, the compensation module 40 includes a plurality of switching transistors T0, the gates of which are electrically connected to the global control signal terminal GAS0. One of the source and drain of the switching transistors T0 is electrically connected to the compensation voltage output terminal V0, and the other of the source and drain of the switching transistors T0 is electrically connected to one end of the data line 30.

[0027] In an embodiment of the present application, the display panel further includes a gate driver circuit 50 and a source driver circuit 60. The gate driver circuit 50 is electrically connected to the plurality of scan lines 20 and is configured to provide scan signals to the sub-pixels 10. The source driver circuit 60 is electrically connected to the other ends of the plurality of data lines 30 and is configured to provide data voltages to the sub-pixels 10.

[0028] In an embodiment of the present application, during the blank period, the on-time of the switch transistor T0 is greater than or equal to the off-time.

[0029] As shown in Figures 1 and 2, during the display period t01, the global control signal terminal GAS0 inputs a low-level global control signal gas0. During the blank period t02, the global control signal terminal GAS0 inputs a high-level global control signal gas0. The switching transistor T0 is continuously turned on during the blank period t02.

[0030] As shown in Figures 1 and 3, during display period t01, a low-level global control signal gas0 is input to global control signal terminal GAS0. During a portion of blank period t02, a high-level global control signal gas0 is input to global control signal terminal GAS0. Switching transistor T0 is turned on by the high-level global control signal gas0. The portion of blank period t02 includes any period within blank period t02.

[0031] As shown in FIG4 , an embodiment of the present application provides a display panel 200. The display panel 200 differs from the display panel 100 in that the plurality of data lines 30 include a plurality of first data lines 31 and a plurality of second data lines 32. The compensation module 40 includes a first compensation voltage output terminal V1, a second compensation voltage output terminal V2, a plurality of first switching transistors T1, and a plurality of second switching transistors T2. The first compensation voltage output terminal V1 is electrically connected to the first switching transistors T1 and the first data lines 31, and the second compensation voltage output terminal V2 is electrically connected to the second switching transistors T2 and the second data lines 32.

[0032] Specifically, the display panel 200 displays a first display image and a second display image that are displayed consecutively. The display panel 200 includes a plurality of sub-pixels 10, a plurality of scan lines 20, a plurality of data lines 30, and a compensation module 40. The plurality of scan lines 20 are arranged along a first direction Y and are electrically connected to the plurality of sub-pixels 10, respectively. The plurality of data lines 30 are arranged along a second direction X, intersecting the first direction Y and the second direction X. The plurality of scan lines 20 are electrically connected to the plurality of sub-pixels 10, respectively. The polarity of the first data voltage input by the data lines 30 to the sub-pixels 10 during a display period of the first display image is opposite to the polarity of the second data voltage input by the data lines 30 to the sub-pixels 10 during a display period of the second display image.

[0033] The plurality of data lines 30 include a plurality of first data lines 31 and a plurality of second data lines 32. The plurality of first data lines 31 and the plurality of second data lines 32 are alternately arranged along the second direction X. The first data voltage includes a first positive polarity data voltage and a first negative polarity data voltage. During a display period of a first display frame, the data voltage input to the sub-pixel 10 by the first data line 31 is the first positive polarity data voltage, and the data voltage input to the sub-pixel 10 by the second data line 32 is the first negative polarity data voltage. The second data voltage includes a second positive polarity data voltage and a second negative polarity data voltage. During a display period of a second display frame, the data voltage input to the sub-pixel 10 by the first data line 31 is the second negative polarity data voltage, and the data voltage input to the sub-pixel 10 by the second data line 32 is the second positive polarity data voltage.

[0034] In an embodiment of the present application, the compensation module 40 includes a first compensation voltage output terminal V1 and a second compensation voltage output terminal V2. The first compensation voltage output terminal V1 is electrically connected to the first data line 31. The first compensation voltage includes a first positive compensation voltage and a first negative compensation voltage. The first positive compensation voltage is less than or equal to the first positive data voltage, and the first negative compensation voltage is greater than or equal to the first negative data voltage. For example, if the first positive data voltage is 2 volts, the first positive compensation voltage is greater than 0 volts and less than or equal to 2 volts, for example, the first positive compensation voltage is 1.5 volts. If the first negative data voltage is -2 volts, the first negative compensation voltage is less than 0 volts and greater than or equal to -2 volts, for example, the first negative compensation voltage is -1.5 volts.

[0035] The second compensation voltage output terminal V2 is electrically connected to the second data line 32. The second compensation voltage includes a second positive compensation voltage and a second negative compensation voltage. The second positive compensation voltage is less than or equal to the second positive data voltage, and the second negative compensation voltage is greater than or equal to the second negative data voltage.

[0036] For example, if the second positive polarity data voltage is 2 volts, the second positive polarity compensation voltage is greater than 0 volts and less than or equal to 2 volts, for example, the second positive polarity compensation voltage is 1 volt. If the second negative polarity data voltage is -2 volts, the second negative polarity compensation voltage is less than 0 volts and greater than or equal to -2 volts, for example, the second negative polarity compensation voltage is -1 volt.

[0037] In an embodiment of the present application, the compensation module 40 includes a plurality of first switching transistors T1 and a plurality of second switching transistors T2. The gates of the plurality of first switching transistors T1 and the gates of the plurality of second switching transistors T2 are electrically connected to the global control signal terminal GAS0. One of the source and drain of the first switching transistor T1 is electrically connected to the first compensation voltage output terminal V1, and the other of the source and drain of the first switching transistor T1 is electrically connected to one end of the first data line 31. One of the source and drain of the second switching transistor T2 is electrically connected to the second compensation voltage output terminal V2, and the other of the source and drain of the second switching transistor T2 is electrically connected to one end of the second data line 32.

[0038] In the embodiment of the present application, the first switch transistor T1 and the second switch transistor T2 are turned off during the display period, and the first switch transistor T1 and the second switch transistor T2 are turned on during the blank period.

[0039] As shown in Figure 5, the global control signal terminal GAS0 receives a low-level global control signal gas0 during display period t01, turning off the first and second switching transistors T1 and T2. The blank period t02 includes a first blank sub-period t001 and a second blank sub-period t002. The first blank sub-period t001 is adjacent to the second blank sub-period t002, and the duration of the first blank sub-period t001 is equal to the duration of the second blank sub-period t002. The global control signal terminal GAS0 receives a high-level global control signal gas0 during the first blank sub-period t001, turning on the first and second switching transistors T1 and T2. The global control signal terminal GAS0 receives a low-level global control signal gas0 during the second blank sub-period t002, turning off the first and second switching transistors T1 and T2.

[0040] As shown in Figure 6, the global control signal terminal GAS0 inputs a low-level global control signal gas0 during the display period t01, turning off the first and second switching transistors T1 and T2. The blank period t02 includes a first blank sub-period t001 and a second blank sub-period t002. The first blank sub-period t001 is adjacent to the second blank sub-period t002, and the duration of the first blank sub-period t001 is equal to the duration of the second blank sub-period t002. The global control signal terminal GAS0 inputs a low-level global control signal gas0 during the first blank sub-period t001, turning off the first and second switching transistors T1 and T2. The global control signal terminal GAS0 inputs a high-level global control signal gas0 during the second blank sub-period t002, turning on the first and second switching transistors T1 and T2.

[0041] As shown in FIG7 , during the blank period t02 , the on-time of the first switching transistor T1 and the second switching transistor T2 is greater than the off-time. This ensures that the sub-pixel on the data line electrically connected to the first switching transistor T1 receives the compensation voltage for a sufficient period of time, thereby improving the stability of the sub-pixel potential. Also, the sub-pixel on the data line electrically connected to the second switching transistor T2 receives the compensation voltage for a sufficient period of time, thereby improving the stability of the sub-pixel potential.

[0042] Specifically, the blank period t02 includes a first blank sub-period t001 and a second blank sub-period t002, the first blank sub-period t001 and the second blank sub-period t002 are adjacent to each other, and the duration of the first blank sub-period t001 is greater than the duration of the second blank sub-period t002.

[0043] In an embodiment of the present application, a low-voltage global control signal gas0 is input to the global control signal terminal GAS0 during the display period t01, turning off the first and second switch transistors T1 and T2. The blank period includes a first blank sub-period t001 and a second blank sub-period t002, with the first blank sub-period t001 adjacent to the second blank sub-period t002. A high-voltage global control signal gas0 is input to the global control signal terminal GAS0 during the first blank sub-period t001, turning on the first and second switch transistors T1 and T2. A low-voltage global control signal gas0 is input to the global control signal terminal GAS0 during the second blank sub-period t002, turning off the first and second switch transistors T1 and T2.

[0044] Alternatively, if the duration of the second blank sub-period t002 is greater than the duration of the first blank sub-period t001 , both the first switch transistor T1 and the second switch transistor T2 are turned on in the second blank sub-period t002 and turned off in the first blank sub-period t001 .

[0045] As shown in Figure 8, an embodiment of the present application provides a display panel 300. The difference between the display panel 300 and the display panel 200 is that the gates of multiple first switching transistors T1 are electrically connected to the first control signal terminal GAS1, and the gates of multiple second switching transistors T2 are electrically connected to the second control signal terminal GAS2.

[0046] Specifically, the compensation module 40 includes a plurality of first switching transistors T1 and a plurality of second switching transistors T2. The gates of the plurality of first switching transistors T1 are electrically connected to the first control signal terminal GAS1, and the gates of the plurality of second switching transistors T2 are electrically connected to the second control signal terminal GAS2. One of the source and drain of the first switching transistor T1 is electrically connected to the first compensation voltage output terminal V1, and the other of the source and drain of the first switching transistor T1 is electrically connected to one end of the first data line 31. One of the source and drain of the second switching transistor T2 is electrically connected to the second compensation voltage output terminal V2, and the other of the source and drain of the second switching transistor T2 is electrically connected to one end of the second data line 32.

[0047] The other structures of the display panel 300 are the same as those of the display panel 200 .

[0048] As shown in FIG8 , the first switch transistor T1 and the second switch transistor T2 are of the same type, and the first switch transistor T1 is an N-type transistor.

[0049] As shown in Figure 9, the blank period includes multiple first blank sub-periods t001 and multiple second blank sub-periods t002, the first blank sub-periods t001 and the second blank sub-periods t002 alternate, the first switching transistor T1 is turned on in multiple first blank sub-periods t001, and the second switching transistor T2 is turned on in multiple second blank sub-periods t002.

[0050] Specifically, the first control signal terminal GAS1 receives a low-voltage first control signal gas1 during the display period, turning off the first switching transistor T1. The second control signal terminal GAS2 receives a low-voltage second control signal gas2 during the display period, turning off the second switching transistor T2. The first control signal terminal GAS1 receives a high-voltage first control signal gas1 during multiple first blanking sub-periods t001, turning on the first switching transistor T1 during multiple first blanking sub-periods t001. The first control signal terminal GAS1 receives a low-voltage first control signal gas1 during multiple second blanking sub-periods t002, turning off the first switching transistor T1 during multiple second blanking sub-periods t002. The second control signal terminal GAS2 receives a high-voltage second control signal gas2 during multiple second blanking sub-periods t002, turning on the second switching transistor T2 during multiple second blanking sub-periods t002. The second control signal terminal GAS2 receives a low-voltage second control signal gas2 during multiple first blanking sub-periods t001, turning off the second switching transistor T2 during multiple first blanking sub-periods t001.

[0051] As shown in FIG10 , the blank period includes a first blank sub-period t001, a second blank sub-period t002, and a third blank sub-period t003, wherein the second blank sub-period t002 is located between the first blank sub-period t001 and the third blank sub-period t003. The first switching transistor T1 is turned on during the first blank sub-period t001 and the second blank sub-period t002, and the second switching transistor T2 is turned on during the second blank sub-period t002 and the third blank sub-period t003.

[0052] Specifically, the first control signal terminal GAS1 receives a low-voltage first control signal gas1 during the display period, and the second control signal terminal GAS2 receives a low-voltage second control signal gas2 during the display period, turning off the first switching transistor T1 and the second switching transistor T2. The first control signal terminal GAS1 receives a high-voltage first control signal gas1 during the first blanking sub-period t001 and the second blanking sub-period t002, turning on the first switching transistor T1. The first control signal terminal GAS1 receives a low-voltage first control signal gas1 during the third blanking sub-period t003, turning off the first switching transistor T1. The second control signal terminal GAS2 receives a low-voltage second control signal gas2 during the first blanking sub-period t001, turning off the second switching transistor T2. The second control signal terminal GAS2 receives a high-voltage second control signal gas2 during the second blanking sub-period t002 and the third blanking sub-period t003, turning on the second switching transistor T2.

[0053] As shown in FIG11 , an embodiment of the present application provides a display panel 400. Display panel 400 differs from display panel 300 in that one of the first switch transistor T1 and the second switch transistor T2 is an N-type transistor, and the other is a P-type transistor. This allows for diverse circuit configurations within compensation module 40. For example, the first switch transistor T1 and the second switch transistor T2 can be electrically connected to the first control signal terminal GAS1 and the second control signal terminal GAS2, respectively, or can be electrically connected to the same control signal terminal. This reduces the space occupied by compensation module 40 and the number of signal lines.

[0054] The rest of the structure of the display panel 400 is the same as that of the display panel 300 .

[0055] An embodiment of the present application further provides a display device, which includes a display panel and a frame, wherein the display panel is disposed in the frame.

[0056] The above is a detailed introduction to a display panel and a display device provided by the embodiments of the present application. The description of the above embodiments is only used to help understand the core idea of ​​the present application, and the above description should not be understood as limiting the scope of protection of the present application.

Claims

1. A display panel, wherein: The picture displayed by the display panel includes a first display picture and a second display picture displayed continuously, and the display panel includes: Multiple sub-pixels; A plurality of scan lines, the plurality of scan lines are arranged along a first direction, and the plurality of scan lines are electrically connected to the plurality of sub-pixels respectively; a plurality of data lines, the plurality of data lines are arranged along a second direction, the first direction intersects the second direction, the plurality of data lines are electrically connected to the plurality of sub-pixels respectively, and the polarity of a first data voltage input to the sub-pixel by the data line during a display period of the first display picture is opposite to the polarity of a second data voltage input to the sub-pixel by the data line during a display period of the second display picture; a compensation module, the compensation module being electrically connected to one end of the plurality of data lines, the compensation module being used to input a first compensation voltage to the sub-pixel during a blank period of the first display screen and to input a second compensation voltage to the sub-pixel during a blank period of the second display screen, wherein the polarity of the first compensation voltage is the same as the polarity of the first data voltage, and the polarity of the second compensation voltage is the same as the polarity of the second data voltage; The first compensation voltage is not zero, and the second compensation voltage is not zero.

2. The display panel according to claim 1, wherein: The compensation module comprises a compensation voltage output terminal, the compensation voltage output terminal is electrically connected to one end of the plurality of data lines, and the compensation voltage output terminal is used to output the first compensation voltage and the second compensation voltage; An absolute value of the first compensation voltage is less than or equal to an absolute value of the first data voltage, and an absolute value of the second compensation voltage is greater than or equal to an absolute value of the second data voltage.

3. The display panel according to claim 2, wherein: The compensation module comprises a plurality of switch transistors, and the gates of the plurality of switch transistors are electrically connected to the global control signal terminal; One of the source and the drain of the switch transistor is electrically connected to the compensation voltage output terminal, and the other of the source and the drain of the switch transistor is electrically connected to one end of the data line.

4. The display panel according to claim 3, wherein: During the blank period, the on time of the switch transistor is greater than or equal to the off time.

5. The display panel according to claim 1, wherein: The plurality of data lines include a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines and the plurality of second data lines are alternately arranged along the second direction; The first data voltage includes a first positive polarity data voltage and a first negative polarity data voltage. During the display period of the first display image, the data voltage input to the sub-pixel by the first data line is the first positive polarity data voltage, and the data voltage input to the sub-pixel by the second data line is the first negative polarity data voltage. The second data voltage includes a second positive polarity data voltage and a second negative polarity data voltage. During the display period of the second display image, the first data line inputs the second negative polarity data voltage to the sub-pixel, and the second data line inputs the second positive polarity data voltage to the sub-pixel.

6. The display panel according to claim 5, wherein: The compensation module includes a first compensation voltage output terminal and a second compensation voltage output terminal, the first compensation voltage output terminal is electrically connected to the first data line, the first compensation voltage includes a first positive polarity compensation voltage and a first negative polarity compensation voltage, the first positive polarity compensation voltage is less than or equal to the first positive polarity data voltage, and the first negative polarity compensation voltage is greater than or equal to the first negative polarity data voltage; The second compensation voltage output terminal is electrically connected to the second data line, the second compensation voltage includes a second positive polarity compensation voltage and a second negative polarity compensation voltage, the second positive polarity compensation voltage is less than or equal to the second positive polarity data voltage, and the second negative polarity compensation voltage is greater than or equal to the second negative polarity data voltage.

7. The display panel according to claim 6, wherein: The compensation module includes a plurality of first switch transistors and a plurality of second switch transistors, and the gates of the plurality of first switch transistors and the gates of the plurality of second switch transistors are electrically connected to the global control signal terminal; One of the source and the drain of the first switch transistor is electrically connected to the first compensation voltage output terminal, and the other of the source and the drain of the first switch transistor is electrically connected to one end of the first data line; One of the source and the drain of the second switch transistor is electrically connected to the second compensation voltage output terminal, and the other of the source and the drain of the second switch transistor is electrically connected to one end of the second data line.

8. The display panel according to claim 7, wherein: The first switch transistor and the second switch transistor are turned off during the display period, and the first switch transistor and the second switch transistor are turned on during the blank period.

9. The display panel according to claim 8, wherein: The blank period includes a first blank sub-period and a second blank sub-period, and the first blank sub-period is adjacent to the second blank sub-period; The first switch transistor and the second switch transistor are turned on in the first blank sub-period, and the first switch transistor and the second switch transistor are turned off in the second blank sub-period; or, The first switch transistor and the second switch transistor are turned on in the second blank sub-period, and the first switch transistor and the second switch transistor are turned off in the first blank sub-period.

10. The display panel according to claim 6, wherein: The compensation module includes a plurality of first switch transistors and a plurality of second switch transistors, the gates of the plurality of first switch transistors are electrically connected to the first control signal terminal, and the gates of the plurality of second switch transistors are electrically connected to the second control signal terminal; One of the source and the drain of the first switch transistor is electrically connected to the first compensation voltage output terminal, and the other of the source and the drain of the first switch transistor is electrically connected to one end of the first data line; One of the source and the drain of the second switch transistor is electrically connected to the second compensation voltage output terminal, and the other of the source and the drain of the second switch transistor is electrically connected to one end of the second data line.

11. The display panel according to claim 10, wherein: The blank period includes a first blank sub-period, a second blank sub-period and a third blank sub-period, and the second blank sub-period is located between the first blank sub-period and the third blank sub-period; The first switch transistor is turned on in the first blank sub-period and the second blank sub-period, the first switch transistor is turned off in the third blank sub-period, the second switch transistor is turned on in the second blank sub-period and the third blank sub-period, and the second switch transistor is turned off in the first blank sub-period.

12. The display panel according to claim 10, wherein: The blank period includes a plurality of first blank sub-periods and a plurality of second blank sub-periods, and the first blank sub-periods are alternately arranged with the second blank sub-periods; The first switch transistor is turned on in multiple first blank sub-periods, the first switch transistor is turned off in multiple second blank sub-periods, the second switch transistor is turned on in multiple second blank sub-periods, and the second switch transistor is turned off in multiple first blank sub-periods.

13. The display panel according to claim 9, wherein: In the blank period, the on time of the first switch transistor and the second switch transistor is greater than the off time.

14. A display device, wherein: The display device comprises a frame and a display panel, the screen displayed by the display panel comprises a first display screen and a second display screen displayed continuously, and the display panel comprises: Multiple sub-pixels; A plurality of scan lines, the plurality of scan lines are arranged along a first direction, and the plurality of scan lines are electrically connected to the plurality of sub-pixels respectively; a plurality of data lines, the plurality of data lines are arranged along a second direction, the first direction intersects the second direction, the plurality of data lines are electrically connected to the plurality of sub-pixels respectively, and the polarity of a first data voltage input to the sub-pixel by the data line during a display period of the first display picture is opposite to the polarity of a second data voltage input to the sub-pixel by the data line during a display period of the second display picture; a compensation module, the compensation module being electrically connected to one end of the plurality of data lines, the compensation module being used to input a first compensation voltage to the sub-pixel during a blank period of the first display screen and to input a second compensation voltage to the sub-pixel during a blank period of the second display screen, wherein the polarity of the first compensation voltage is the same as the polarity of the first data voltage, and the polarity of the second compensation voltage is the same as the polarity of the second data voltage; The first compensation voltage is not zero, and the second compensation voltage is not zero.

15. The display device according to claim 14, wherein: The compensation module comprises a compensation voltage output terminal, the compensation voltage output terminal is electrically connected to one end of the plurality of data lines, and the compensation voltage output terminal is used to output the first compensation voltage and the second compensation voltage; An absolute value of the first compensation voltage is less than or equal to an absolute value of the first data voltage, and an absolute value of the second compensation voltage is greater than or equal to an absolute value of the second data voltage.

16. The display device according to claim 15, wherein: The compensation module comprises a plurality of switch transistors, and the gates of the plurality of switch transistors are electrically connected to the global control signal terminal; One of the source and the drain of the switch transistor is electrically connected to the compensation voltage output terminal, and the other of the source and the drain of the switch transistor is electrically connected to one end of the data line.

17. The display device according to claim 16, wherein: During the blank period, the on time of the switch transistor is greater than or equal to the off time.

18. The display device according to claim 14, wherein: The plurality of data lines include a plurality of first data lines and a plurality of second data lines, and the plurality of first data lines and the plurality of second data lines are alternately arranged along the second direction; The first data voltage includes a first positive polarity data voltage and a first negative polarity data voltage. During the display period of the first display image, the data voltage input to the sub-pixel by the first data line is the first positive polarity data voltage, and the data voltage input to the sub-pixel by the second data line is the first negative polarity data voltage. The second data voltage includes a second positive polarity data voltage and a second negative polarity data voltage. During the display period of the second display image, the first data line inputs the second negative polarity data voltage to the sub-pixel, and the second data line inputs the second positive polarity data voltage to the sub-pixel.

19. The display device according to claim 18, wherein: The compensation module includes a first compensation voltage output terminal and a second compensation voltage output terminal, the first compensation voltage output terminal is electrically connected to the first data line, the first compensation voltage includes a first positive polarity compensation voltage and a first negative polarity compensation voltage, the first positive polarity compensation voltage is less than or equal to the first positive polarity data voltage, and the first negative polarity compensation voltage is greater than or equal to the first negative polarity data voltage; The second compensation voltage output terminal is electrically connected to the second data line, the second compensation voltage includes a second positive polarity compensation voltage and a second negative polarity compensation voltage, the second positive polarity compensation voltage is less than or equal to the second positive polarity data voltage, and the second negative polarity compensation voltage is greater than or equal to the second negative polarity data voltage.

20. The display device according to claim 19, wherein: The compensation module includes a plurality of first switch transistors and a plurality of second switch transistors, and the gates of the plurality of first switch transistors and the gates of the plurality of second switch transistors are electrically connected to the global control signal terminal; One of the source and the drain of the first switch transistor is electrically connected to the first compensation voltage output terminal, and the other of the source and the drain of the first switch transistor is electrically connected to one end of the first data line; One of the source and the drain of the second switch transistor is electrically connected to the second compensation voltage output terminal, and the other of the source and the drain of the second switch transistor is electrically connected to one end of the second data line.

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