Analog-to-digital conversion method, circuit, chip, and electronic device

Abstract

The present application relates to the technical field of electronics, and provides an analog-to-digital conversion method, a circuit, a chip, and an electronic device. The method comprises: determining a target gain multiple on the basis of an input voltage, wherein the target gain multiple is used for amplifying or reducing the input voltage to a voltage to be measured within a target range; performing first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after conversion; performing second conversion on the residual voltage to obtain a corresponding second conversion result; and on the basis of the first conversion result and the second conversion result, determining a target digital code value corresponding to the input voltage. The present application can improve the analog-to-digital conversion precision.

Description

Analog-to-digital conversion method, circuit, chip and electronic device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on August 28, 2023, with application number 202311087831.2 and invention name “A method, circuit, chip and electronic device for analog-to-digital conversion”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to an analog-to-digital conversion method, circuit, chip, and electronic device. Background Art

[0003] In the intelligent era, intelligent sensing and the interconnection of all things are coming together. The first input layer of the AIoT (Artificial Intelligence & Internet of Things) is the perception layer: primarily composed of various sensors and sensor gateways, the perception layer acquires information through sensors and receives control commands through gateways.

[0004] As the base of the "pyramid," sensors will be the most demanded and fundamental link in the entire supply chain. Sensors underpin IoT technology, applications, and the future ubiquitous network. They perceive information about objects. Key to the perception layer lies in more accurate and comprehensive sensing capabilities, low power consumption, and miniaturization.

[0005] Currently, various sensors in the IoT's perception layer (such as pressure sensors, temperature sensors, current sensors, voltage sensors, photoelectric sensors, and heart rate sensors) perform signal processing, with the core focus being the measurement and acquisition of extremely small and weak signals. Improving the accuracy of signal measurement has become a key technical challenge for the AIoT's perception layer. Technical issues

[0006] The embodiments of the present application provide an analog-to-digital conversion method, circuit, chip, and electronic device to solve the related technical problem of how to improve the accuracy of signal measurement in the AIoT intelligent Internet of Things perception layer. Technical Solutions

[0007] The technical solution of this application is as follows:

[0008] According to one aspect of the present application, there is provided an analog-to-digital conversion method, the method comprising:

[0009] Determining a target gain multiple based on the input voltage, wherein the target gain multiple is used to amplify or reduce the input voltage to a voltage to be measured that meets a target range;

[0010] Performing a first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after conversion;

[0011] performing a second conversion on the residual voltage to obtain a corresponding second conversion result;

[0012] A target digital code value corresponding to the input voltage is determined based on the first conversion result and the second conversion result.

[0013] According to another aspect of the present application, an analog-to-digital conversion circuit is provided, the circuit comprising:

[0014] A gain determination module is used to determine a target gain multiple based on the input voltage, wherein the target gain multiple is used to amplify or reduce the input voltage to a voltage to be measured that meets a target range;

[0015] A first conversion module is used to perform a first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after conversion;

[0016] a second conversion module, configured to perform a second conversion on the residual voltage to obtain a corresponding second conversion result;

[0017] An output module is used to determine a target digital code value corresponding to the input voltage based on the first conversion result and the second conversion result.

[0018] According to another aspect of the present application, a chip is provided, comprising a circuit for implementing the above analog-to-digital conversion method.

[0019] According to another aspect of the present application, an electronic device is provided, comprising a circuit for implementing the above analog-to-digital conversion method. Beneficial effects

[0020] In this application, the input voltage is pre-measured to determine a target gain factor. A first conversion (coarse conversion) and a second conversion (fine conversion) are then performed on the measured voltage after gain. Based on the first and second conversion results, a target digital code value corresponding to the input voltage is determined. This allows for adaptive gain tailored to the input voltage, improving the adaptability of analog-to-digital conversion. Furthermore, the combination of the first and second conversions improves the accuracy of the analog-to-digital conversion while ensuring a high conversion speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0022] FIG1 shows a flow chart of an analog-to-digital conversion method according to an exemplary embodiment of the present application;

[0023] FIG2 shows a schematic diagram of an analog-to-digital conversion circuit according to an exemplary embodiment of the present application;

[0024] FIG3 shows a schematic diagram of another analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application;

[0025] FIG4 shows a schematic block diagram of an analog-to-digital conversion circuit provided according to an exemplary embodiment of the present application.

[0026] Implementation Methods of the Application

[0027] The following describes embodiments of the present application in more detail with reference to the accompanying drawings. Although certain embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be construed as limited to the embodiments described herein. Instead, these embodiments are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and embodiments of the present application are for illustrative purposes only and are not intended to limit the scope of protection of the present application.

[0028] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc. mentioned in this application are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0029] It should be noted that the modifications of "one" and "multiple" mentioned in this application are illustrative rather than restrictive. Those skilled in the art should understand that unless otherwise clearly indicated in the context, they should be understood as "one or more".

[0030] The names of the messages or information exchanged between multiple devices in the embodiments of the present application are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0031] An embodiment of the present application provides an analog-to-digital conversion method, which can be applied in a chip or set in an electronic device.

[0032] Referring to the flowchart of the analog-to-digital conversion method shown in FIG1 , the method may include the following steps 101 - 104 .

[0033] Step 101: Determine a target gain multiple based on an input voltage.

[0034] The target gain factor can be used to amplify or reduce the input voltage to a voltage to be measured that meets the target range.

[0035] In one possible implementation, whenever an input voltage is received, if the corresponding target gain factor is not determined, the input voltage can be pre-measured, and the absolute value of the input voltage can be estimated based on the pre-measurement result. Thus, based on the absolute value of the input voltage, an adaptive target gain factor is selected to amplify or reduce the input voltage to within the target range of the analog-to-digital conversion circuit, thereby avoiding exceeding the range of the ADC (Analog-to-Digital Converter) during measurement. On this basis, adaptive gain can be achieved for the input voltage, improving the adaptability of the analog-to-digital conversion.

[0036] Optionally, any analog-to-digital converter can be used to predict the input voltage, and the target gain multiple can be selected based on the conversion result of the analog-to-digital converter. Accordingly, the above process of determining the target gain multiple based on the input voltage can be as follows:

[0037] performing a third conversion on the input voltage for a third number of cycles to obtain a third number of third digital code values;

[0038] performing weighted summation on a third number of third digital code values ​​to obtain a first cumulative value, where the first cumulative value is used to estimate a voltage range of the input voltage;

[0039] Determining a target threshold interval in which the first cumulative value is located among a plurality of preset threshold intervals;

[0040] According to a preset correspondence between the threshold interval and the gain multiple, a target gain multiple corresponding to the target threshold interval is determined.

[0041] The third number may be an integer greater than 1 and may be pre-configured according to specific circumstances. The third conversion may refer to an analog-to-digital conversion process in the pre-measurement.

[0042] In one possible implementation, the input voltage can be connected to an analog-to-digital converter for pre-measurement, and the analog-to-digital converter can perform multiple conversions (i.e., a third number of times) to obtain corresponding multiple third digital code values. Furthermore, a weighted summation can be performed on the multiple third digital code values, where the weights can be pre-set based on the specific analog-to-digital converter, application scenario, etc., and this embodiment does not limit this.

[0043] The first accumulated value after weighted summation can be converted into a corresponding voltage value, or has a corresponding relationship with the corresponding voltage value, and can therefore be used to estimate the voltage range of the input voltage. Gains corresponding to different voltage ranges can be pre-designed. For example, an input voltage of ±6V can correspond to a gain of 1 / 2, an input voltage of ±3V can correspond to a gain of 1, an input voltage of ±1.5V can correspond to a gain of 2, and an input voltage of ±0.75V can correspond to a gain of 4.

[0044] Different input voltages can correspond to different threshold ranges of the first cumulative value, thus establishing a correspondence between the threshold ranges of the first cumulative value and the gain factor. In an application, the target threshold range of the calculated first cumulative value is determined, thereby obtaining the target gain factor corresponding to the target threshold range for subsequent use in adjusting the PGA (Programmable Gain Amplifier) ​​gear.

[0045] Optionally, among multiple threshold intervals, the first threshold interval corresponds to a first gain multiplier, and the second threshold interval corresponds to a second gain multiplier. If the first threshold interval is greater than the second threshold interval, the first gain multiplier is less than the second gain multiplier. In other words, the correspondence between the threshold intervals and the gain multipliers can satisfy the following conditions: when the absolute value of the input voltage is large, a smaller PGA gear can be selected to prevent exceeding the ADC range during measurement; when the absolute value of the input voltage is small, a larger PGA gear can be selected to provide higher accuracy.

[0046] Optionally, the above-mentioned third conversion is implemented by a second cyclic analog-to-digital converter (Cyclic ADC). Since the conversion speed of the cyclic analog-to-digital converter is higher than that of the incremental analog-to-digital converter, the signal range can be quickly determined during the pre-measurement process, thereby further improving the efficiency of the analog-to-digital conversion.

[0047] As an example, binary weighted summation may be performed on the conversion result of the second cyclic analog-to-digital converter to obtain the following first cumulative value:

[0048] Wherein, Sum1 represents the first cumulative value, m represents the third number of cycles, and D i Represents the third digital code value of each cycle, Represents binary weight, i∈0,1,…,m-1. If there is a feedback coefficient, it can also be multiplied by the corresponding feedback coefficient.

[0049] Step 102 : performing a first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after conversion.

[0050] In one possible implementation, after determining the target gain multiple in step 101, the PGA can be configured accordingly to adjust its gain multiple to the target gain multiple. Thus, the input voltage is input to the PGA, and after corresponding amplification or reduction, the measured voltage is output.

[0051] To achieve high-precision conversion, this embodiment divides the conversion process of the measured voltage into a coarse conversion process and a fine conversion process. The first conversion described above corresponds to the coarse conversion process. After the coarse conversion is completed, a coarse conversion result (i.e., the first conversion result) can be obtained. Furthermore, after the coarse conversion is completed, a residual voltage may be left, which can be converted in subsequent processes to improve conversion accuracy.

[0052] Optionally, referring to the analog-to-digital conversion circuit schematic shown in FIG2 , the first conversion may be implemented by an incremental analog-to-digital converter (Incremental ADC), which includes a discrete integrator and may have a corresponding digital filter, a comparator, a feedback module, etc. The incremental analog-to-digital converter may be a first-order or multi-order incremental analog-to-digital converter, which is not limited in this embodiment.

[0053] Accordingly, the processing of step 102 above may be as follows:

[0054] Performing a first conversion of a first number of cycles on the voltage to be measured by an incremental analog-to-digital converter to obtain a first number of first digital code values ​​respectively;

[0055] transmitting a first number of first digital code values ​​to a digital filter for processing to determine a corresponding first conversion result;

[0056] After the first conversion of the first number of cycles is completed, the current output voltage of the discrete integrator is used as the residual voltage after conversion. The first number can be the OSR (Oversampling Ratio) of the incremental analog-to-digital converter, which is an integer greater than 1.

[0057] In one possible implementation, a voltage to be measured is input into an incremental analog-to-digital converter, and in a first cycle, the voltage to be measured is connected to a discrete integrator, and then compared with a first reference voltage in a comparator, and a corresponding comparison result (i.e., a first digital code value) is output and stored in a digital filter; and in a second cycle, the comparison result of the previous cycle is multiplied by a feedback coefficient to obtain a feedback value, and the voltage to be measured is subtracted from the feedback value and input into a discrete integrator, and then compared with the first reference voltage in the comparator, and a corresponding comparison result is output and stored in a digital filter, and so on.

[0058] In the digital filter, the stored multiple first digital code values ​​can be calculated to obtain a second cumulative value, which can be used as the first conversion result. As an example, in the case of a first-order COI (Cascaded Of Integer) type digital filter, the following second cumulative value can be obtained:

[0059] Wherein, Sum2 represents the second accumulated value, OSR represents the first number of cycles, and D k Represents the first digital code value of each cycle, k∈1,2,…,OSR. If there is a feedback coefficient, it can also be multiplied by the corresponding feedback coefficient.

[0060] Step 103: Perform a second conversion on the remaining voltage to obtain a corresponding second conversion result.

[0061] In one possible implementation, after the coarse conversion is completed in step 102, a second conversion, i.e., a fine conversion process, may be further performed on the remaining voltage. After the fine conversion is completed, a corresponding conversion result may be obtained. The conversion accuracy of the second conversion may be higher than that of the first conversion. On this basis, the accuracy of the analog-to-digital conversion can be improved. At the same time, the combination of the first and second conversions can also ensure a higher conversion speed.

[0062] Optionally, the second conversion may be implemented by a first cyclic analog-to-digital converter.

[0063] Accordingly, the processing of step 103 above may be as follows:

[0064] performing a second conversion of a second number of cycles on the residual voltage by the first cyclic analog-to-digital converter to obtain a second number of second digital code values;

[0065] A weighted sum is performed on a second number of second digital code values ​​to determine a corresponding second conversion result.

[0066] The second number may be an integer greater than 1.

[0067] In one possible implementation, the residual voltage in the incremental analog-to-digital converter can be connected to a first cyclic analog-to-digital converter. In the first cycle, the residual voltage is compared with the second reference voltage in the comparator, and the corresponding comparison result (i.e., the second digital code value) is output; and in the second cycle, the comparison result of the previous cycle is multiplied by the feedback coefficient to obtain a feedback value. At this time, the input of the first cyclic analog-to-digital converter is 0, and 0 minus the feedback value to obtain a new residual voltage. Thereafter, the new residual voltage is compared with the second reference voltage in the comparator, and the corresponding comparison result is output, and so on.

[0068] After completing the conversion of the second number of cycles, the corresponding second digital code values ​​are weighted and summed to obtain a third cumulative value, which can be used as the first conversion result. As an example, the calculation of the third cumulative value can be as follows:

[0069] Wherein, Sum3 represents the third cumulative value, n represents the second number of cycles, and D j Represents the second digital code value of each cycle, Represents the binary weight, j∈1,…,n. If there is a feedback coefficient, it can also be multiplied by the corresponding feedback coefficient.

[0070] Optionally, the second cyclic analog-to-digital converter and the first cyclic analog-to-digital converter used for implementing the second conversion reuse the same cyclic analog-to-digital converter.

[0071] In one possible implementation, after pre-measurement is performed using a cyclic ADC and a target gain multiple is determined, the cyclic ADC can be reset and then used in the second conversion process. This reduces circuit power consumption and area.

[0072] Step 104 : Determine a target digital code value corresponding to the input voltage based on the first conversion result and the second conversion result.

[0073] In a possible implementation, the first conversion result of the coarse conversion and the second conversion result of the fine conversion may be combined to jointly determine the target digital code value that is ultimately output.

[0074] The specific processing can be as follows:

[0075] determining a constant required to output a target digital code value based on the first number;

[0076] The first conversion result and the second conversion result are summed and divided by the constant to determine a target digital code value corresponding to the input voltage.

[0077] In one possible implementation, the constant may be related to the oversampling rate (OSR) of the incremental analog-to-digital converter. For example, the constant may be a digital filter decimation factor, i.e., M = OSR·gain_error, or the product of the digital filter decimation factor and a gain calibration factor, i.e., M = OSR·gain_error·gain_PGA.

[0078] If the first conversion result is Sum2 above, and the second conversion result is Sum3 above, the output target digital code value can be as follows:

[0079] Wherein, Dout is the target digital code value.

[0080] The embodiments of the present application can achieve the following beneficial effects:

[0081] (1) The input voltage is pre-measured to determine the target gain multiple, and then a first conversion (coarse conversion) and a second conversion (fine conversion) are performed on the voltage to be measured after the gain is obtained. Based on the first conversion result and the second conversion result, a target digital code value corresponding to the input voltage is determined. This can achieve adaptive gain for the input voltage and improve the adaptability of analog-to-digital conversion. In addition, the combination of the first conversion and the second conversion improves the accuracy of the analog-to-digital conversion and ensures a high conversion speed.

[0082] (2) When the absolute value of the input voltage is large, a smaller PGA gear can be selected to prevent the ADC range from being exceeded during measurement. When the absolute value of the input voltage is small, a larger PGA gear can be selected to provide higher accuracy.

[0083] (3) The pre-measurement process and the fine conversion process can reuse the same cyclic analog-to-digital converter, reducing circuit power consumption and area.

[0084] Based on the same inventive concept, an embodiment of the present application also provides an analog-to-digital conversion circuit, which can be used to implement the above-mentioned analog-to-digital conversion method.

[0085] 4 , the analog-to-digital conversion circuit 400 may include a gain determination module 401, a first conversion module 402, a second conversion module 403, and an output module 404.

[0086] A gain determination module 401 is configured to determine a target gain factor based on an input voltage, wherein the target gain factor is used to amplify or reduce the input voltage to a voltage to be measured that meets a target range;

[0087] A first conversion module 402 is configured to perform a first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after conversion;

[0088] A second conversion module 403 is configured to perform a second conversion on the residual voltage to obtain a corresponding second conversion result;

[0089] The output module 404 is configured to determine a target digital code value corresponding to the input voltage based on the first conversion result and the second conversion result.

[0090] Optionally, the first conversion module 402 includes an incremental analog-to-digital converter, the incremental analog-to-digital converter includes a discrete integrator, and the incremental analog-to-digital converter has a corresponding digital filter;

[0091] The first conversion module 402 is configured to:

[0092] Performing a first conversion of a first number of cycles on the voltage to be measured by the incremental analog-to-digital converter to obtain a first number of first digital code values ​​respectively;

[0093] transmitting the first number of first digital code values ​​to the digital filter for processing to determine a corresponding first conversion result;

[0094] After the first conversion of the first number of cycles is completed, the current output terminal voltage of the discrete integrator is used as the residual voltage after conversion.

[0095] Optionally, the output module 404 is configured to:

[0096] determining a constant required to output a target digital code value based on the first number;

[0097] The first conversion result and the second conversion result are summed and divided by the constant to determine a target digital code value corresponding to the input voltage.

[0098] Optionally, the second conversion module 403 includes a first cyclic analog-to-digital converter;

[0099] The second conversion module 403 is configured to:

[0100] performing a second conversion of a second number of cycles on the residual voltage by the first cyclic analog-to-digital converter to obtain a second number of second digital code values;

[0101] A weighted sum is performed on the second number of second digital code values ​​to determine a corresponding second conversion result.

[0102] Optionally, the gain determination module 401 is configured to:

[0103] performing a third conversion on the input voltage for a third number of cycles to obtain a third number of third digital code values;

[0104] performing a weighted summation on the third number of third digital code values ​​to obtain a first cumulative value, wherein the first cumulative value is used to estimate a voltage range of the input voltage;

[0105] Determining a target threshold interval in which the first cumulative value is located among a plurality of preset threshold intervals;

[0106] According to a preset correspondence between the threshold interval and the gain multiple, a target gain multiple corresponding to the target threshold interval is determined.

[0107] Optionally, among the multiple threshold intervals, the first threshold interval corresponds to a first gain multiple, and the second threshold interval corresponds to a second gain multiple. If the first threshold interval is larger than the second threshold interval, the first gain multiple is smaller than the second gain multiple.

[0108] Optionally, the gain determination module 401 includes a second cyclic analog-to-digital converter.

[0109] Optionally, the second cyclic analog-to-digital converter and the first cyclic analog-to-digital converter used to implement the second conversion multiplex the same cyclic analog-to-digital converter.

[0110] The embodiments of the present application can achieve the following beneficial effects:

[0111] (1) The input voltage is pre-measured to determine the target gain multiple, and then a first conversion (coarse conversion) and a second conversion (fine conversion) are performed on the voltage to be measured after the gain is obtained. Based on the first conversion result and the second conversion result, a target digital code value corresponding to the input voltage is determined. This can achieve adaptive gain for the input voltage and improve the adaptability of analog-to-digital conversion. In addition, the combination of the first conversion and the second conversion improves the accuracy of the analog-to-digital conversion and ensures a high conversion speed.

[0112] (2) When the absolute value of the input voltage is large, a smaller PGA gear can be selected to prevent the ADC range from being exceeded during measurement. When the absolute value of the input voltage is small, a larger PGA gear can be selected to provide higher accuracy.

[0113] (3) The pre-measurement process and the fine conversion process can reuse the same cyclic analog-to-digital converter, reducing circuit power consumption and area.

[0114] The present invention also provides a chip including circuitry for implementing the analog-to-digital conversion method provided in the present invention. The chip may be, but is not limited to, a SOC (System on Chip) chip or a SIP (System in Package) chip. By configuring the analog-to-digital conversion method, the chip can improve the accuracy of analog-to-digital conversion.

[0115] An embodiment of the present application also provides an electronic device, which includes a device body and a chip as described above that is provided in the device body. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal) machines. Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights. The electronic device can improve the accuracy of analog-to-digital conversion by configuring the above-mentioned analog-to-digital conversion method.

[0116] The above is only a preferred embodiment of the present application and does not constitute any form of limitation to the present application. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to equivalent embodiments using the technical contents disclosed above without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. An analog-to-digital conversion method, characterized in that: The method comprises: Determine a target gain multiple based on the input voltage, wherein the target gain multiple is used to amplify or reduce the input voltage to a voltage to be measured that meets a target range; Performing a first conversion on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after the conversion; Performing a second conversion on the residual voltage to obtain a corresponding second conversion result; Based on the first conversion result and the second conversion result, a target digital code value corresponding to the input voltage is determined.

2. The analog-to-digital conversion method according to claim 1, characterized in that: The first conversion is implemented by an incremental analog-to-digital converter, the incremental analog-to-digital converter includes a discrete integrator, and the incremental analog-to-digital converter has a corresponding digital filter; The first conversion is performed on the voltage to be measured to obtain a corresponding first conversion result and a residual voltage after the conversion, including: Performing a first conversion of a first number of cycles on the voltage to be measured by the incremental analog-to-digital converter to obtain a first number of first digital code values ​​respectively; transmitting the first number of first digital code values ​​to the digital filter for processing to determine a corresponding first conversion result; After the first conversion of the first number of cycles is completed, the current output terminal voltage of the discrete integrator is used as the residual voltage after conversion.

3. The analog-to-digital conversion method according to claim 2, characterized in that: The determining, based on the first conversion result and the second conversion result, a target digital code value corresponding to the input voltage includes: Based on the first number, determining a constant required to output a target digital code value; The first conversion result and the second conversion result are summed and divided by the constant to determine a target digital code value corresponding to the input voltage.

4. The analog-to-digital conversion method according to claim 1, characterized in that: The second conversion is performed by a first cyclic analog-to-digital converter; The performing a second conversion on the residual voltage to obtain a corresponding second conversion result includes: Performing a second conversion of a second number of cycles on the residual voltage by the first cyclic analog-to-digital converter to obtain a second number of second digital code values ​​respectively; A weighted sum is performed on the second number of second digital code values ​​to determine a corresponding second conversion result.

5. The analog-to-digital conversion method according to claim 1, characterized in that: The step of determining the target gain multiple based on the input voltage comprises: Performing a third conversion of a third number of cycles on the input voltage to obtain a third number of third digital code values ​​respectively; Performing weighted summation on the third number of third digital code values ​​to obtain a first cumulative value, wherein the first cumulative value is used to estimate a voltage range of the input voltage; Determine, among a plurality of preset threshold intervals, a target threshold interval in which the first cumulative value is located; According to a preset corresponding relationship between the threshold interval and the gain multiple, a target gain multiple corresponding to the target threshold interval is determined.

6. The analog-to-digital conversion method according to claim 5, characterized in that: In the multiple threshold intervals, the first threshold interval corresponds to a first gain multiple, and the second threshold interval corresponds to a second gain multiple. If the first threshold interval is greater than the second threshold interval, the first gain multiple is less than the second gain multiple.

7. The analog-to-digital conversion method according to any one of claims 1 to 6, characterized in that: The third conversion is implemented by a second cyclic analog-to-digital converter.

8. The analog-to-digital conversion method according to claim 7, characterized in that: The second cyclic analog-to-digital converter and the first cyclic analog-to-digital converter used to implement the second conversion reuse the same cyclic analog-to-digital converter.

9. An analog-to-digital conversion circuit, characterized in that: The circuit comprises: A gain determination module, used to determine a target gain multiple based on an input voltage, wherein the target gain multiple is used to amplify or reduce the input voltage to a voltage to be measured that meets a target range; The first conversion module is used to perform a first conversion on the voltage to be measured to obtain a corresponding first conversion The result and the converted residual voltage; A second conversion module, used for performing a second conversion on the residual voltage to obtain a corresponding second conversion result; An output module is used to determine a target digital code value corresponding to the input voltage based on the first conversion result and the second conversion result.

10. A chip, characterized in that: The invention comprises a circuit for implementing the analog-to-digital conversion method according to any one of claims 1 to 8.

11. An electronic device, characterized in that: The invention comprises a circuit for implementing the analog-to-digital conversion method according to any one of claims 1 to 8.

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