Light detection device

Abstract

[Problem] To provide a light detection device capable of suitably arranging constituent elements of pixels when arranging structural elements of pixels in a plurality of levels. [Solution] A light detection device of the present disclosure comprises: a first substrate; a first insulating film provided on the first substrate; a second substrate provided on the first insulating film; a second insulating film provided on the second substrate or between the first insulating film and the second substrate under the second substrate; a photoelectric conversion part provided in the first substrate; a floating diffusion part provided in the first substrate; and a first transistor provided in the first insulating film on the first substrate and electrically connected to the floating diffusion part to switch conversion efficiency of photoelectric conversion by the photoelectric conversion part.

Description

Photodetector

[0001] The present disclosure relates to a light detection device.

[0002] Photodetectors such as solid-state imaging devices are sometimes manufactured by bonding two or more substrates together. For example, when an upper substrate is disposed above a lower substrate, the portion including the lower substrate and the lower interlayer insulating film formed on the lower substrate is called the first floor of the photodetector, and the portion including the upper substrate and the upper interlayer insulating film formed on the upper substrate is called the second floor of the photodetector.

[0003] JP 2022-092536 A International Patent Application Publication No. WO2020 / 105713

[0004] When manufacturing a photodetector device by bonding two or more substrates, the question arises as to which floor of the photodetector device each pixel's components should be placed on. For example, the question arises as to whether the pixel transistor of each pixel should be placed on the first floor or the second floor. The question also arises as to whether the capacitor of each pixel should be placed on the first floor or the second floor.

[0005] Therefore, the present disclosure provides a photodetector device that allows pixel components to be suitably arranged when pixel structural elements are arranged on multiple floors.

[0006] A photodetector according to a first aspect of the present disclosure includes a first substrate, a first multilayer wiring layer disposed on the first substrate, a second substrate disposed on the first multilayer wiring layer, a second multilayer wiring layer disposed on the second substrate or between the first multilayer wiring layer and the second substrate below the second substrate, a photoelectric conversion unit disposed within the first substrate, a floating diffusion unit disposed within the first substrate, and a first transistor including a gate electrode disposed within the first multilayer wiring layer, electrically connected to the floating diffusion unit, and configured to switch the conversion efficiency of photoelectric conversion by the photoelectric conversion unit. By arranging the first transistor on the first floor, pixel components can be optimally arranged. For example, by arranging the first transistor on the first floor, the wiring between the first transistor and the floating diffusion unit can be shortened.

[0007] In this first aspect, the first multilayer wiring layer may include a first wiring electrically connected to the first transistor and serving as a first electrode of a capacitor, thereby making it possible to electrically connect a capacitor to the first transistor, for example.

[0008] In this first aspect, the first wiring may be electrically connected to a diffusion region provided in the first substrate, thereby making it possible to electrically connect a capacitance to the diffusion region that is, for example, a source region or a drain region of the first transistor.

[0009] In this first aspect, the first multilayer wiring layer may further include a wiring that serves as a second electrode of the capacitor. This allows the wiring on the first floor to form a capacitor. For example, by forming a capacitor with the wiring on the first floor, it is possible to easily lengthen the wiring, thereby increasing the capacitance.

[0010] In this first aspect, the wiring that serves as the second electrode may be electrically connected to a diffusion region provided in the first substrate, thereby making it possible to further increase capacitance, for example.

[0011] The photodetector of the first aspect may further include a second transistor including a gate electrode provided in the first multilayer wiring layer, electrically connected to the first wiring, and configured to switch the conversion efficiency of photoelectric conversion by the photoelectric conversion unit, thereby enabling, for example, the conversion efficiency of photoelectric conversion to be switched between three or more stages.

[0012] In this first aspect, the first multilayer wiring layer may further include a second wiring electrically connected to the second transistor and serving as the first electrode of the capacitor together with the first wiring, thereby making it possible to electrically connect a capacitor to the first and second transistors, for example.

[0013] In this first aspect, the first multilayer wiring layer may further include a wiring that serves as a second electrode of the capacitor. This allows the wiring in the first wiring layer on the first floor to form a capacitor. For example, by forming a capacitor using the wiring on the first floor, it is possible to easily lengthen the wiring, thereby increasing the capacitance.

[0014] The photodetector device of the first aspect may further include a first wiring layer provided in the first multilayer wiring layer, and a second wiring layer provided in the first multilayer wiring layer, the second substrate, or the second multilayer wiring layer, wherein the first wiring layer includes the first wiring, and the second wiring layer includes a wiring that serves as a second electrode of the capacitor. This makes it possible to easily lengthen the wiring by forming a capacitor using wiring in two wiring layers, for example, and thereby increase the capacitance.

[0015] In this first aspect, the wiring that serves as the second electrode may be electrically connected to a diffusion region provided in the second substrate, thereby making it possible to further increase capacitance, for example.

[0016] A photodetector device according to a second aspect of the present disclosure includes a first substrate, a first multilayer wiring layer disposed on the first substrate, a second substrate disposed on the first multilayer wiring layer, a second multilayer wiring layer disposed on the second substrate or between the first multilayer wiring layer and the second substrate below the second substrate, a photoelectric conversion unit disposed within the first substrate, a floating diffusion region disposed within the first substrate, a first transistor electrically connected to the floating diffusion region and configured to switch the conversion efficiency of photoelectric conversion by the photoelectric conversion unit, and a capacitor including a first electrode electrically connected to the first transistor, the first electrode being a first diffusion region disposed within the first substrate, a first conductive layer disposed within the first multilayer wiring layer, or a second conductive layer disposed within the first substrate. By arranging the first electrode of the capacitor on the first floor, pixel components can be optimally arranged. For example, by arranging the capacitor on the first floor, a large capacitance can be achieved without the need for capacitance borrowing and lending between pixels, thereby preventing defects from spreading between pixels.

[0017] In this second aspect, the capacitor may include a second diffusion region provided in the first substrate as a second electrode, which allows the capacitor to be formed on the first floor, for example.

[0018] The photodetector according to the second aspect may further include a second transistor electrically connected to the first transistor and configured to switch the conversion efficiency of the photoelectric conversion by the photoelectric conversion unit, thereby enabling the conversion efficiency of the photoelectric conversion to be switched between three or more stages, for example.

[0019] In the second aspect, the charge from the photoelectric conversion unit may overflow to the first electrode, thereby making it possible to accumulate the signal charge in the first electrode without losing it, for example.

[0020] The photodetector of the second aspect may further include a first insulating film provided within the first substrate so as to surround the first diffusion region in a plan view, thereby making it possible to, for example, reduce an electric field applied from the first diffusion region to the outside.

[0021] The photodetector according to the second aspect may further include a second insulating film provided between the first substrate and the first conductive layer and serving as a dielectric film for the capacitance, thereby enabling, for example, an increase in capacitance by the dielectric film.

[0022] In the second aspect, the first conductive layer and the second insulating film may have a planar or trench structure, which makes it possible to easily form a capacitance by using the planar structure or to increase the capacitance by using the trench structure, for example.

[0023] In the second aspect, the second diffusion region may be provided on a side surface of the second conductive layer, thereby enabling, for example, a capacitance to be realized by a side contact layer.

[0024] In the second aspect, the charge from the photoelectric conversion unit may further overflow between electrodes of the plurality of capacitors, thereby making it possible to form an overflow path between the plurality of capacitors, for example.

[0025] In this second aspect, the plurality of capacitances may be included in different pixels, thereby making it possible to form an overflow path by a plurality of capacitances in different pixels, for example.

[0026] 1 is a block diagram showing the configuration of a photodetector of a first embodiment; FIG. 2 is a cross-sectional view showing the structure of a photodetector of the first embodiment; FIG. 3 is a circuit diagram showing the structure of a photodetector of the first embodiment; FIG. 4 is a plan view showing the structure of a photodetector of the first embodiment; FIG. 5 is a cross-sectional view showing the structure of a photodetector of a comparative example of the first embodiment; FIG. 6 is a plan view showing the structure of photodetector devices of first and second modified examples of the first embodiment; FIG. 7 is a cross-sectional view showing the structure of a photodetector device of a third modified example of the first embodiment; FIG. 8 is a circuit diagram showing the structure of a photodetector device of a third modified example of the first embodiment; FIG. 9 is a cross-sectional view showing the structure of a photodetector device of a fourth and fifth modified example of the first embodiment; FIG. 10 is a circuit diagram showing the structure of photodetector devices of a sixth and seventh modified example of the first embodiment; FIG. 11 is a cross-sectional view showing the structure of a photodetector device of a ninth modified example of the first embodiment; FIG. 12 is a cross-sectional view, a plan view, and a circuit diagram showing the structure of a photodetector device of a second embodiment; and FIG. 13 is a circuit diagram showing the structure of photodetector devices of first and second modified examples of the second embodiment. FIG. 1 is a cross-sectional view and a circuit diagram showing the structure of a photodetector according to a third modified example of the second embodiment. FIG. 2 is a cross-sectional view and a circuit diagram showing the structure of a photodetector according to a fourth modified example of the second embodiment. FIG. 3 is a cross-sectional view and a plan view showing the structure of a photodetector according to a fifth modified example of the second embodiment. FIG. 4 is a cross-sectional view and a plan view showing the structure of a photodetector according to a sixth and seventh modified examples of the second embodiment. FIG. 5 is a cross-sectional view and a plan view showing the structure of a photodetector according to an eighth modified example of the second embodiment. FIG. 6 is a cross-sectional view and a plan view showing the structure of a photodetector according to a ninth modified example of the second embodiment. FIG. 7 is a plan view showing the structure of a photodetector according to a tenth modified example of the second embodiment. FIG. 8 is a circuit diagram showing the structure of a photodetector according to a tenth modified example of the second embodiment. FIG. 9 is a cross-sectional view and a plan view showing the structure of a photodetector according to an eleventh modified example of the second embodiment. FIG. 10 is a plan view showing the structure of photodetector according to twelfth and thirteenth modified examples of the second embodiment. FIG. 11 is a cross-sectional view and a plan view showing the structure of a photodetector according to the third embodiment. FIG. 12 is a plan view showing the structures of photodetector according to the first, second, and third modified examples of the third embodiment. FIG. 13 is a circuit diagram showing the structure of a photodetector according to a fourth modified example of the third embodiment.Fig. 33 is a block diagram showing an example of the configuration of an electronic device. Fig. 34 is a block diagram showing an example of the configuration of a mobile object control system. Fig. 35 is a plan view showing a specific example of the setting position of the imaging unit in Fig. 32. Fig. 36 is a diagram showing an example of the schematic configuration of an endoscopic surgery system. Fig. 37 is a block diagram showing an example of the functional configuration of a camera head and a CCU.

[0027] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0028] First Embodiment FIG. 1 is a block diagram showing the configuration of a photodetector according to a first embodiment.

[0029] The photodetector shown in Fig. 1 is a solid-state imaging device such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor (CIS), and includes a pixel array 2 including a plurality of pixels 1, a control circuit 3, a vertical drive circuit 4, a plurality of column signal processing circuits 5, a horizontal drive circuit 6, an output circuit 7, a plurality of vertical signal lines (VSL) 8, and a horizontal signal line (HSL) 9.

[0030] Each pixel 1 includes a photodiode that functions as a photoelectric conversion unit and a MOS transistor that functions as a pixel transistor. The pixel transistor may be, for example, a transfer transistor, a reset transistor, an amplification transistor, a selection transistor, a conversion efficiency switching transistor, a switch transistor, etc. These pixel transistors may be shared by several pixels 1.

[0031] The pixel array 2 includes a plurality of pixels 1 arranged in a two-dimensional array. The pixel array 2 also includes an effective pixel region that receives light, performs photoelectric conversion, and outputs signal charges generated by the photoelectric conversion, and a black reference pixel region that outputs optical black, which serves as a reference for the black level. In general, the black reference pixel region is arranged on the periphery of the effective pixel region.

[0032] The control circuit 3 generates various signals that serve as references for the operation of the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, etc., based on a vertical synchronization signal, a horizontal synchronization signal, a master clock, etc. The signals generated by the control circuit 3 are, for example, clock signals and control signals, and are input to the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6, etc.

[0033] The vertical drive circuit 4 includes, for example, a shift register, and vertically scans each pixel 1 in the pixel array 2 row by row. The vertical drive circuit 4 further supplies a pixel signal based on the signal charge generated by each pixel 1 to a column signal processing circuit 5 through a vertical signal line 8.

[0034] The column signal processing circuit 5 is arranged, for example, for each column of pixels 1 in the pixel array 2, and performs signal processing for each column of signals output from one row of pixels 1 based on signals from the black reference pixel region. Examples of this signal processing include noise removal and signal amplification.

[0035] The horizontal drive circuit 6 includes, for example, a shift register, and supplies pixel signals from each column signal processing circuit 5 to a horizontal signal line 9 .

[0036] The output circuit 7 processes the signals supplied from each column signal processing circuit 5 through the horizontal signal line 9, and outputs the processed signals.

[0037] 2 is a cross-sectional view showing the structure of the photodetector of the first embodiment, showing a cross section of one pixel 1 in the photodetector of this embodiment.

[0038] 2 shows X-axis, Y-axis, and Z-axis, which are perpendicular to each other. The X-axis and Y-axis correspond to the lateral direction (horizontal direction), and the Z-axis corresponds to the longitudinal direction (vertical direction). The +Z-axis corresponds to the upward direction, and the -Z-axis corresponds to the downward direction. Note that the -Z-axis may or may not strictly coincide with the direction of gravity.

[0039] As shown in FIG. 2 , the photodetector of this embodiment has a layered structure including a first floor portion F1 and a second floor portion F2. The photodetector of this embodiment includes, within the first floor portion F1, a substrate 11, a pixel transistor 12, a pixel transistor 13, an interlayer insulating film 14, a plurality of contact plugs 15, and a wiring layer 16. The photodetector of this embodiment further includes, within the second floor portion F2, a substrate 21, a pixel transistor 22, an interlayer insulating film 23, a contact plug 24, and a wiring layer 25. The photodetector of this embodiment further includes a plurality of through plugs 31 spanning the first floor portion F1 and the second floor portion F2. The substrate 11, the pixel transistor 13, the wiring layer 16, and the substrate 21 are examples of the first substrate, the first transistor, the first wiring layer, and the second substrate, respectively, of the present disclosure.

[0040] [Substrate 11] The substrate 11 is, for example, a semiconductor substrate such as a Si (silicon) substrate. In Fig. 2, the X direction and the Y direction are parallel to the upper surface of the substrate 11, and the Z direction is perpendicular to the upper surface of the substrate 11. In Fig. 2, the upper surface of the substrate 11 is the front surface of the substrate 11, and the lower surface of the substrate 11 is the back surface of the substrate 11.

[0041] The substrate 11 includes a well region 11a and diffusion regions 11b to 11f. FIG. 2 further shows a photodiode PD (photoelectric conversion unit) and a floating diffusion region FD formed within the substrate 11. The photodiode PD is formed by a PN junction between the well region 11a and the diffusion region 11b. The floating diffusion region FD is formed by the diffusion region 11c. The diffusion regions 11d and 11e function as source / drain regions of the pixel transistor 12. The well region 11a is, for example, a P-type region. The diffusion regions 11b to 11e are, for example, N-type regions. The diffusion region 11f is, for example, a P-type region (P-well). In this embodiment, the diffusion region 11f is electrically connected to ground potential (GND).

[0042] [Pixel Transistor 12] The pixel transistor 12 includes a gate insulating film 12a and a gate electrode 12b formed in this order on the substrate 11, and sidewall insulating films 12c formed on both sides of the gate electrode 12b. The gate electrode 12b is disposed between the diffusion regions 11b and 11c. The pixel transistor 12 is, for example, a transfer transistor TG. The transfer transistor TG transfers charges generated by photoelectric conversion in the photodiode PD to the floating diffusion region FD.

[0043] [Pixel Transistor 13] The pixel transistor 13 includes a gate insulating film 13a and a gate electrode 13b formed in this order on the substrate 11, and sidewall insulating films 13c formed on both side surfaces of the gate electrode 13b. The gate electrode 13b is disposed between diffusion regions 11d and 11e, which function as source / drain regions of the pixel transistor 13. The pixel transistor 13 is, for example, a conversion efficiency switching transistor FDG. The conversion efficiency switching transistor FDG functions as a switch that switches the conversion efficiency of photoelectric conversion by the photodiode PD. The photoelectric conversion efficiency can be switched between, for example, a high conversion efficiency (HCG) and a low conversion efficiency (LCG).

[0044] [Interlayer insulating film 14] The interlayer insulating film 14 is formed on the substrate 11. The pixel transistors 12 and 13 are formed in the interlayer insulating film 14 on the substrate 11. The interlayer insulating film 14 is made of, for example, SiO ２ It is a laminated insulating film including a (silicon oxide) film and other insulating films.

[0045] [Contact Plugs 15] The contact plugs 15 are formed in the interlayer insulating film 14 and disposed on the substrate 11. FIG. 2 shows plugs 15a to 15d as examples of the contact plugs 15. The plug 15a is disposed on the diffusion region 11c. The plug 15b is disposed on the diffusion region 11d. The plug 15c is disposed on the diffusion region 11e. The plug 15d is disposed on the diffusion region 11f.

[0046] [Wiring Layer 16] The wiring layer 16 is formed in the interlayer insulating film 14 and disposed on the contact plugs 15. In FIG. 2, the wiring layer 16 includes wirings 16a to 16c that are separated from each other. The wiring 16a is disposed on the plugs 15a and 15b and electrically connects the floating diffusion FD (diffusion region 11c) and the pixel transistor 13 (diffusion region 11d). The wiring 16a is also referred to as an FD wiring. The wiring 16b is disposed on the plug 15c and electrically connected to the pixel transistor 13 (diffusion region 11e). The wiring 16b is an example of a first wiring of the present disclosure. The wiring 16c is disposed on the plug 14d and electrically connected to the diffusion region 11f.

[0047] 2, the photodetector of this embodiment includes a capacitor C having a wiring 16b as one electrode and a wiring 16c as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. The capacitor C is electrically connected to the pixel transistor 13 (diffusion region 11e) via the wiring 16b and the plug 15c.

[0048] In FIG. 2, the portion including the wiring 16b, the plug 15c, and the diffusion region 11e is designated by the symbol SubFD. Hereinafter, this portion will also be referred to as the "SubFD portion." According to this embodiment, the capacitance C can be increased by lengthening the length of the wiring 16b in the SubFD portion. Furthermore, according to this embodiment, the SubFD portion can be used for charge storage in the same manner as the floating diffusion region FD. Furthermore, according to this embodiment, the diffusion regions 11e and 11f are electrically connected to the wiring 16b and 16c, respectively, thereby further increasing the capacitance C. Further details of the capacitance C and the diffusion region 11e will be described later.

[0049] The gate electrode 12b, the gate electrode 13b, the contact plug 15, and the wiring layer 16 of this embodiment are an example of the first multilayer wiring layer of the present disclosure.

[0050] [Substrate 21] The substrate 21 is disposed on the interlayer insulating film 14. The photodetector of this embodiment is formed by substrates 11 and 21 bonded to each other. The substrate 21 is bonded to the substrate 11 via the interlayer insulating film 14. The substrate 21 is, for example, a semiconductor substrate such as a Si substrate. In FIG. 2 , the X direction and the Y direction are parallel to the upper surface of the substrate 21, and the Z direction is perpendicular to the upper surface of the substrate 21. In FIG. 2 , the upper surface of the substrate 21 is the front surface of the substrate 21, and the lower surface of the substrate 21 is the back surface of the substrate 21.

[0051] The substrate 21 includes a well region 21a and diffusion regions 21b and 21c. The diffusion regions 21b and 21c function as source / drain regions of the pixel transistor 22. The well region 21a is, for example, a P-type region. The diffusion regions 21b and 21c are, for example, N-type regions.

[0052] [Pixel Transistor 22] The pixel transistor 22 includes a gate insulating film 22a and a gate electrode 22b formed in this order on the substrate 21, and sidewall insulating films 22c formed on both side surfaces of the gate electrode 22b. The gate electrode 22b is disposed between diffusion regions 22b and 22c that function as source / drain regions of the pixel transistor 22. The pixel transistor 22 is, for example, an amplifier transistor AMP. The amplifier transistor AMP converts the charge accumulated in the floating diffusion region FD into a voltage signal.

[0053] [Interlayer insulating film 23] The interlayer insulating film 23 is formed on the substrate 21. The pixel transistor 22 is formed in the interlayer insulating film 23 on the substrate 21. The interlayer insulating film 23 is made of, for example, SiO ２ It is a laminated insulating film including a film and other insulating films.

[0054] [Contact Plug 24] The contact plug 24 is formed in the interlayer insulating film 23 and disposed above the substrate 21. Fig. 2 shows a plug 24a as an example of the contact plug 24. The plug 24a is disposed on the gate electrode 22a.

[0055] [Wiring Layer 25] The wiring layer 25 is formed in the interlayer insulating film 23 and is arranged on the contact plug 24 and the through plug 31. In FIG. 2, the wiring layer 25 includes wirings 25a and 25b that are separated from each other. The wiring 25a is arranged on the plug 24a and on a plug 31a (described later), and electrically connects the floating diffusion FD (diffusion region 11c), the pixel transistor 13 (diffusion region 11d), and the pixel transistor 22 (gate electrode 22b). The wiring 25b is arranged on a plug 31b (described later).

[0056] The gate electrode 22b, the contact plug 24, and the wiring layer 25 of this embodiment are an example of the second multilayer wiring layer of the present disclosure.

[0057] [Through Plug 31] The through plug 31 is formed in the interlayer insulating film 14, the substrate 21, and the interlayer insulating film 23, and penetrates the substrate 21. The through plug 31 is electrically insulated from the substrate 21 by an insulating film (not shown). Figure 2 shows plugs 31a and 31b as examples of the through plug 31. The plug 31a is disposed above the interconnect 16a and below the interconnect 25a. The plug 31b is disposed above the interconnect 16c and below the interconnect 25b.

[0058] Fig. 3 is a circuit diagram showing the structure of the photodetector device of the first embodiment. Fig. 3 shows an example of the circuit configuration of the pixel 1 shown in Fig. 2. Fig. 3 shows a boundary P between the first floor portion F1 and the second floor portion F2 of this embodiment, and a boundary P' between the first floor portion F1 and the second floor portion F2 of a comparative example described later.

[0059] The pixel 1 of this embodiment includes a photodiode PD, a floating diffusion region FD, a transfer transistor TG, a conversion efficiency switching transistor FDG, a reset transistor RST, and a SubFD region in the first floor F1, and further includes an amplifier transistor AMP and a selection transistor SEL in the second floor F2.

[0060] The photodiode PD performs photoelectric conversion of light incident on the pixel 1. The anode of the photodiode PD is electrically connected to the ground voltage (GND), and the cathode of the photodiode PD is electrically connected to the transfer transistor TG.

[0061] The transfer transistor TG transfers the charges generated by the photoelectric conversion to the floating diffusion FD. One of the source and drain of the transfer transistor TG is electrically connected to the photodiode PD, and the other of the source and drain of the transfer transistor TG is electrically connected to the floating diffusion FD.

[0062] The floating diffusion FD accumulates the charges transferred by the transfer transistor TG, and is electrically connected to the transfer transistor TG, the conversion efficiency switching transistor FDG, and the amplification transistor AMP.

[0063] The conversion efficiency switching transistor FDG functions as a switch for switching the conversion efficiency of photoelectric conversion by the photodiode PD. One of the source and drain of the conversion efficiency switching transistor FDG is electrically connected to the floating diffusion region FD, and the other of the source and drain of the conversion efficiency switching transistor FDG is electrically connected to the reset transistor RST.

[0064] The reset transistor RST drains electric charges from the floating diffusion region FD and resets the potential of the floating diffusion region FD to the power supply voltage (VDD). One of the source and drain of the reset transistor RST is electrically connected to the conversion efficiency switching transistor FDG, and the other of the source and drain of the reset transistor RST is electrically connected to the power supply voltage.

[0065] The SubFD section is provided between the conversion efficiency switching transistor FDG and the reset transistor RST. The SubFD section forms one electrode of the above-mentioned capacitance C, and this electrode is electrically connected to the conversion efficiency switching transistor FDG and the reset transistor RST.

[0066] The amplifier transistor AMP receives the charge transferred to the floating diffusion region FD at its gate and outputs it to the select transistor SEL via a source follower. The gate of the amplifier transistor AMP is electrically connected to the floating diffusion region FD. One of the source and drain of the amplifier transistor AMP is electrically connected to a power supply voltage, and the other of the source and drain of the amplifier transistor AMP is electrically connected to the select transistor SEL. The amplifier transistor AMP converts the charge accumulated in the floating diffusion region FD into a voltage signal and outputs it to the select transistor SEL.

[0067] The selection transistor SEL can electrically connect the amplification transistor AMP and the vertical signal line (VSL) 8. When the selection transistor SEL is turned on, the amplification transistor AMP and the vertical signal line 8 are electrically connected. When the selection transistor SEL is turned off, the amplification transistor AMP and the vertical signal line 8 are electrically isolated. One of the source and drain of the selection transistor SEL is electrically connected to the amplification transistor AMP, and the other of the source and drain of the selection transistor SEL is electrically connected to the vertical signal line 8.

[0068] FIG. 4 is a plan view showing the structure of the photodetector according to the first embodiment.

[0069] 4A and 4B show examples of the planar structure of two pixels 1 in the photodetector device of this embodiment, showing the structures of a first floor F1 and a second floor F2 of these pixels 1, respectively.

[0070] 4A shows two photodiodes PD, two floating diffusion regions FD, two transfer transistors TG, one conversion efficiency switching transistor FDG, one reset transistor RST, one SubFD region, and the like in the first floor region F1 of these pixels 1. In FIG. 4A, the transfer transistor TG of the left pixel 1 is indicated by the symbol "TG-L," and the transfer transistor TG of the right pixel 1 is indicated by the symbol "TG-R." These pixels 1 share the conversion efficiency switching transistor FDG, the reset transistor RST, and the SubFD region. In FIG. 4A, the pixel transistor corresponding to the reset transistor RST is indicated by the symbol "12'," and its gate electrode is indicated by the symbol "12b'."

[0071] 4B shows the amplifier transistor AMP, the select transistor SEL, and the like in the second floor F1 of these pixels 1. These pixels 1 share the amplifier transistor AMP and the select transistor SEL. In FIG. 4B, the pixel transistor corresponding to the select transistor SEL is indicated by the reference numeral "22'", and its gate electrode is indicated by the reference numeral "22b'".

[0072] 4A shows a wiring 16b included in the SubFD section and a wiring 16c that forms the capacitance C together with the wiring 16b. In FIG. 4A, the length of the wiring 16b is set long by extending the wiring 16b in a curved shape around the wiring 16c. According to this embodiment, by increasing the length of the wiring 16b, it is possible to increase the capacitance C.

[0073] 2, for ease of understanding, some components in the photodetector of this embodiment that are not on the same XZ cross section as those in FIGS. 4A and 4B are shown on the same XZ cross section, as in the cross-sectional views and plan views described below.

[0074] FIG. 5 is a cross-sectional view showing the structure of a photodetector as a comparative example of the first embodiment.

[0075] The photodetector of this comparative example ( FIG. 5 ) has a structure similar to that of the photodetector of the first embodiment ( FIG. 2 ). However, the conversion efficiency switching transistor FDG of this comparative example is a pixel transistor 26 in the second floor section F2, rather than the pixel transistor 13 in the first floor section F1. The pixel transistor 26 includes a gate insulating film 26 a and a gate electrode 26 b formed in this order on the substrate 21, and sidewall insulating films 26 c formed on both side surfaces of the gate electrode 26 b. The gate electrode 26 b is disposed between diffusion regions 21 d and 21 e, which function as source / drain regions of the pixel transistor 26. The diffusion regions 21 d and 21 e are formed in the substrate 21.

[0076] The photodetector of this comparative example includes a plurality of contact plugs 24. Fig. 5 shows plugs 24a, 24b, and 24c as examples of the contact plugs 24. Plug 24b is disposed on diffusion region 21d. Plug 24c is disposed on diffusion region 21e.

[0077] 5, the wiring layer 25 includes wiring 25a, wiring 25c, and wiring 25d that are separated from each other. In this comparative example, wiring 25a is disposed on plugs 24a, 24b, and 31a. Wiring 25c is disposed on plug 25c, forming SubFD. As shown in FIG. 5, the photodetector of this comparative example includes a capacitance C in which wiring 25c serves as one electrode and wiring 25d serves as the other electrode.

[0078] Next, the photodetector of the first embodiment will be compared with the photodetector of the comparative example with reference to FIGS.

[0079] The second floor 2F of the comparative example includes various pixel transistors, specifically, a conversion efficiency switching transistor FDG, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL (see boundary P' in FIG. 3). Therefore, in the comparative example, when each pixel 1 is miniaturized, a problem occurs in that there is insufficient space in the second floor F2 of each pixel 1.

[0080] Furthermore, in the conversion efficiency switching transistor FDG of the comparative example, the high conversion efficiency (HCG) is formed by the wiring 25a, and the low conversion efficiency (LCG) is formed by the wiring 25a and 25c. If there is insufficient space in the second floor section F2, it becomes difficult to increase the length of the wiring 25c, and it becomes difficult to increase the capacitance C. If the capacitance C is small, it becomes impossible to increase the difference in conversion efficiency between the HCG and LCG, and it becomes impossible to widen the dynamic range of the photodetector.

[0081] Therefore, the photodetector device of this embodiment includes the conversion efficiency switching transistor FDG in the first floor F1. This alleviates the problem of insufficient space in the second floor F2. Furthermore, since the conversion efficiency switching transistor FDG is electrically connected to the floating diffusion region FD in the first floor F1, arranging the conversion efficiency switching transistor FDG in the first floor F1 makes it possible to shorten the length of the wiring (path) between the conversion efficiency switching transistor FDG and the floating diffusion region FD. For example, the conversion efficiency switching transistor FDG and the floating diffusion region FD in FIG. 5 are electrically connected by wiring 16a, 25a and plugs 15a, 24b, and 31a, whereas the conversion efficiency switching transistor FDG and the floating diffusion region FD in FIG. 2 are electrically connected only by wiring 16a and plugs 15a and 15b. This also alleviates the problem of insufficient space in each pixel 1. Furthermore, arranging the reset transistor RST in the first floor F1 also alleviates this problem.

[0082] Furthermore, in the conversion efficiency switching transistor FDG of this embodiment, the high conversion efficiency (HCG) is formed by the wiring 16a, and the low conversion efficiency (LCG) is formed by the wirings 16a and 16b. Therefore, the difference in conversion efficiency between the HCG and LCG in this embodiment is realized by the wiring 16b in the first floor section F1, which is easy to lengthen, rather than the wiring 25c in the second floor section F2, which is difficult to lengthen. Therefore, according to this embodiment, by lengthening the length of the wiring 16b, it is possible to increase the capacitance C, thereby expanding the dynamic range of the photodetector. Note that the structure in which the SubFD section that forms the capacitance C is located within the first floor section F1 will also be described in the second and third embodiments described below.

[0083] In this embodiment, the capacitance C is formed by the wirings 16b and 16c in the wiring layer 16. The wiring layer 16 is, for example, a semiconductor layer such as a polysilicon layer. Alternatively, the capacitance C may be formed by wirings in the wiring layer that is a metal layer. Examples of such wirings will be described later.

[0084] Various modified examples of the photodetector of the first embodiment will be described below.

[0085] [First and Second Modifications] FIG. 6 is a plan view showing the structure of a photodetector according to first and second modifications of the first embodiment.

[0086] 6A shows the structure of the first floor F1 of eight pixels 1 in a photodetector device according to a first modification. The structure shown in Fig. 6A is similar to the structure shown in Fig. 4A. However, in this modification, four pixels 1 share the conversion efficiency switching transistor FDG, the reset transistor RST, and the SubFD section.

[0087] 6B shows the structure of the first floor F1 of four pixels 1 in the photodetector device of the second modified example. The structure shown in FIG. 6B is similar to the structure shown in FIG. 4A. In this modified example, the four pixels 1 also share the conversion efficiency switching transistor FDG, the reset transistor RST, and the SubFD section. However, while each pixel 1 in the first modified example has a rectangular planar shape, each pixel 1 in this modified example has a square planar shape.

[0088] As described above, the conversion efficiency switching transistor FDG and the SubFD section of this embodiment can be applied to pixels 1 having various structures, and can be applied to the pixels 1 of the first and second modified examples, for example.

[0089] [Third Modification] FIG. 7 is a cross-sectional view showing the structure of a photodetector according to a third modification of the first embodiment.

[0090] In addition to the components shown in FIG. 2 , the photodetector of this modified example includes a pixel transistor 17 in the first floor F1. The pixel transistor 17 includes a gate insulating film 17a and a gate electrode 17b formed in this order on the substrate 11, and sidewall insulating films 17c formed on both side surfaces of the gate electrode 17b. The gate electrode 17b is disposed between diffusion regions 11g and 11h that function as source / drain regions of the pixel transistor 17. The diffusion regions 11g and 11h are formed in the substrate 11. The diffusion regions 11g and 11h are, for example, N-type regions. The pixel transistor 17 is formed in the interlayer insulating film 14 on the substrate 11.

[0091] The photodetector device of this modified example includes two pixel transistors 13 and 17 in the first floor unit F1 as conversion efficiency switching transistors that switch the conversion efficiency of photoelectric conversion by the photodiode PD. Therefore, while FIG. 2 refers to the pixel transistor 13 as a conversion efficiency switching transistor FDG, FIG. 7 refers to the pixel transistor 13 as a conversion efficiency switching transistor FDG1 and the pixel transistor 17 as a conversion efficiency switching transistor FDG2 for the sake of distinction. As described above, the pixel transistor 13 is an example of the first transistor of the present disclosure. The pixel transistor 17 is an example of the second transistor of the present disclosure.

[0092] 7 shows the above-mentioned plugs 15a to 15d, a plug 15e, and a plug 15f as examples of contact plugs 15. Plug 15e is disposed on diffusion region 11g. Plug 15f is disposed on diffusion region 11h.

[0093] 7, the wiring layer 16 includes the above-described wirings 16a to 16c and wiring 16d. These wirings 16a to 16d are separated from one another. Wiring 16b in this modification is disposed on plugs 15c and 15e, and electrically connects pixel transistor 13 (diffusion region 11e) and pixel transistor 17 (diffusion region 11g). As described above, wiring 16b is an example of the first wiring of the present disclosure. Furthermore, wiring 16d is disposed on plug 15f, and is electrically connected to pixel transistor 17 (diffusion region 11h). Wiring 16d is an example of the second wiring of the present disclosure.

[0094] 7, the photodetector of this modified example includes a capacitance C having wirings 16b and 16d as one electrode (first electrode) and wiring 16c as the other electrode (second electrode). The former electrode of this modified example includes not only wiring 16b but also wiring 16d.

[0095] In FIG. 7, the portion including the wiring 16b, plugs 15c and 15e, and diffusion regions 11e and 11g is designated by the symbol SubFD1, and the portion including the wiring 16d, plug 15f, and diffusion region 11h is designated by the symbol SubFD2. Hereinafter, these portions are also referred to as the "SubFD1 portion" and the "SubFD2 portion." According to this modification, the capacitance C can be increased by increasing the length of the wiring 16b in the SubFD1 portion and the length of the wiring 16d in the SubFD2 portion. Furthermore, according to this modification, the SubFD1 portion and the SubFD2 portion can be used for charge storage, similar to the floating diffusion region FD. Furthermore, according to this modification, the diffusion regions 11e to 11h are electrically connected to the wirings 16b to 16d, thereby further increasing the capacitance C.

[0096] In the conversion efficiency switching transistors FDG1 and FDG2 of this modification, the high conversion efficiency (HCG) is formed by the wiring 16a, the medium conversion efficiency (MCG) is formed by the wirings 16a and 16b, and the low conversion efficiency (LCG) is formed by the wirings 16a, 16b, and 16d. Therefore, according to this modification, the conversion efficiency of the photoelectric conversion by the photodiode PD can be switched between three stages. Furthermore, according to this modification, by increasing the lengths of the wirings 16b and 16d, it is possible to adjust the difference in conversion efficiency between the HCG and MCG and the difference in conversion efficiency between the MCG and LCG.

[0097] The photodetector of this modified example may include three or more conversion efficiency switching transistors, which allows the conversion efficiency of photoelectric conversion by the photodiode PD to be switched between four or more stages.

[0098] Fig. 8 is a circuit diagram showing the structure of a photodetector according to a third modified example of the first embodiment. Fig. 8 shows an example of the circuit configuration of pixel 1 shown in Fig. 7. Fig. 8 shows a boundary P between the first floor F1 and the second floor F2 of this modified example, and a boundary P' between the first floor F1 and the second floor F2 when the structure of this modified example is applied to the aforementioned comparative example.

[0099] Pixel 1 of this modified example has the same components as those shown in Fig. 3. However, pixel 1 of this modified example has a structure in which the conversion efficiency switching transistor FDG and the SubFD section shown in Fig. 3 are replaced with conversion efficiency switching transistors FDG1 and FDG2, a SubFD1 section, and a SubFD2 section.

[0100] The conversion efficiency switching transistor FDG1 functions as a switch for switching the conversion efficiency of photoelectric conversion by the photodiode PD. One of the source and drain of the conversion efficiency switching transistor FDG1 is electrically connected to the floating diffusion region FD, and the other of the source and drain of the conversion efficiency switching transistor FDG1 is electrically connected to the conversion efficiency switching transistor FDG2.

[0101] The conversion efficiency switching transistor FDG2 also functions as a switch that switches the conversion efficiency of photoelectric conversion by the photodiode PD. One of the source and drain of the conversion efficiency switching transistor FDG2 is electrically connected to the conversion efficiency switching transistor FDG1, and the other of the source and drain of the conversion efficiency switching transistor FDG2 is electrically connected to the reset transistor RST.

[0102] The SubFD1 section is provided between the conversion efficiency switching transistor FDG1 and the conversion efficiency switching transistor FDG2. The SubFD2 section is provided between the conversion efficiency switching transistor FDG2 and the reset transistor RST. The SubFD1 section and the SubFD2 section together form one electrode of the capacitance C described above.

[0103] As described above, the photodetector of this embodiment may include a plurality of conversion efficiency switching transistors.

[0104] [Fourth and Fifth Modifications] FIG. 9 is a cross-sectional view showing the structure of a photodetector according to a fourth and fifth modification of the first embodiment.

[0105] FIG. 9A shows a cross section of one pixel 1 in a photodetector device of a fourth modified example. In addition to the components shown in FIG. 2, the photodetector device of this modified example includes a pixel isolation insulating film 41 provided at the boundary between pixels 1. The pixel isolation insulating film 41 is formed by forming a backside trench on the back surface side of the substrate 11 that does not penetrate the substrate 11 and embedding the pixel isolation insulating film 41 in the backside trench. This type of pixel isolation insulating film 41 is called RDTI. In this case, it is possible to arrange a diffusion region in the substrate 11 above the pixel isolation insulating film 41. In FIG. 9A, diffusion regions 11c to 11e are arranged in the substrate 11 above the pixel isolation insulating film 41. The pixel isolation insulating film 41 is formed by sequentially embedding insulating films 41a and 41b in the backside trench.

[0106] 9B shows a cross section of one pixel 1 in a photodetector according to a fifth modified example. In addition to the components shown in FIG. 9A, the photodetector according to this modified example includes a pixel isolation insulating film 42 provided at the boundary between pixels 1. The pixel isolation insulating film 42 is formed by forming a surface trench on the surface side of the substrate 11 that reaches the pixel isolation insulating film 41 and embedding the pixel isolation insulating film 42 in the surface trench. A structure including the pixel isolation insulating film 41 and the pixel isolation insulating film 42 is called an FFTI. The pixel isolation insulating film 42 is formed by embedding insulating films 42a and 42b in the surface trench in that order.

[0107] As described above, the photodetector of this embodiment may include a pixel isolation insulating film provided at the boundary between the pixels 1 .

[0108] [Sixth and Seventh Modifications] FIG. 10 is a circuit diagram showing the structure of a photodetector according to sixth and seventh modifications of the first embodiment.

[0109] 10A shows an example of the circuit configuration of pixel 1 in a photodetector device according to a sixth modified example. Pixel 1 according to this modified example has the same components as pixel 1 shown in Fig. 3. However, the reset transistor RST according to this modified example is disposed in the second floor F2 instead of the first floor F1.

[0110] 10B shows an example of the circuit configuration of pixel 1 in a photodetector device according to a seventh modification. Pixel 1 according to this modification has the same components as pixel 1 shown in FIG. 3. However, the reset transistor RST according to this modification is not connected in series with the conversion efficiency switching transistor FDG, but is connected in parallel with the conversion efficiency switching transistor FDG. Note that when the boundary between the first floor section F1 and the second floor section F2 is at P1, the reset transistor RST according to this modification is disposed in the second floor section F2, and when the boundary between the first floor section F1 and the second floor section F2 is at P2, the reset transistor RST according to this modification is disposed in the first floor section F1.

[0111] As described above, the reset transistor RST of this embodiment can be arranged in various ways. For example, by arranging the reset transistor RST in the second floor F2, it is possible to secure a large space on the first floor F1.

[0112] Eighth Modification FIG. 11 is a cross-sectional view showing the structure of a photodetector according to an eighth modification of the first embodiment.

[0113] 11 shows a cross section of one pixel 1 in the photodetector of this modified example. In addition to the components shown in FIG. 2 , the photodetector of this modified example includes a wiring layer 43 arranged near the boundary between the interlayer insulating film 16 and the substrate 21. Although the wiring layer 43 is arranged in the substrate 21 in FIG. 11 , it may instead be arranged in the interlayer insulating film 16. The wiring layer 43 is an example of the second wiring layer of the present disclosure.

[0114] The wiring layer 43 includes a wiring 43a disposed above the wiring 16b. Thus, the photodetector of this modification includes a capacitance C' in which the wiring 16b serves as one electrode and the wiring 43a serves as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. Thus, the photodetector of this modification includes a capacitance C' in addition to the capacitance C. Like the capacitance C, the capacitance C' is electrically connected to the pixel transistor 13 (diffusion region 11e) via the wiring 16b and the plug 15c. The wiring 43a of this modification may be electrically connected to ground potential.

[0115] The wiring layer 16 may not include the wiring 16c, and the wiring layer 43a may be electrically connected to the plug 31b. In this case, the photodetector of this modified example does not include the capacitance C, but includes the capacitance C'. In this case, the capacitance C' is electrically connected to the diffusion region 11f. This makes it possible to increase the capacitance C' by using the diffusion region 11f.

[0116] [Ninth Modification] FIG. 12 is a cross-sectional view showing the structure of a photodetector according to a ninth modification of the first embodiment.

[0117] 12 shows a cross section of one pixel 1 in the photodetector of this modified example. The photodetector of this modified example includes plug 31c, wiring 25e, plug 24d, and diffusion region 21f in addition to the components shown in FIG. 11. On the other hand, the photodetector of this modified example does not include plug 31b, wiring 16c, plug 15d, or diffusion region 11f.

[0118] The plug 31c is one of the plurality of through plugs 31. The plug 31c is disposed on the wiring 43a. The diffusion region 21f is formed in the substrate 21. The diffusion region 21f is, for example, a P-type region (P-well). The diffusion region 21f in this modification is electrically connected to the ground potential.

[0119] Plug 24d is one of the plurality of contact plugs 24. Plug 24d is disposed on diffusion region 21f. Wiring 25e is included in wiring layer 25 and is separated from wiring 25a. Wiring 25e is disposed on plugs 24d and 31c. This makes it possible to increase capacitance C' by using diffusion region 21f.

[0120] [Tenth Modification] FIG. 13 is a cross-sectional view showing the structure of a photodetector according to a tenth modification of the first embodiment.

[0121] FIG. 13 shows a cross section of one pixel 1 in a photodetector of this modified example. The structure of the photodetector of this modified example is similar to the structure shown in FIG. 2 . However, in this modified example, the interlayer insulating film 23 is formed on the lower surface of the substrate 21 rather than on the upper surface thereof, and is disposed between the interlayer insulating film 14 and the substrate 21. The photodetector of this modified example is manufactured by forming the interlayer insulating film 14 on the substrate 11, forming the interlayer insulating film 23 on the substrate 21, and bonding the substrates 11 and 21 together so that the interlayer insulating films 14 and 23 are sandwiched between them. In FIG. 13 , the lower surface of the substrate 21 is the front surface of the substrate 21, and the upper surface of the substrate 21 is the back surface of the substrate 21. The structure shown in FIG. 2 is called "F to B," and the structure shown in FIG. 13 is called "F to F."

[0122] In addition to the components shown in FIG. 2 , the photodetector of this modification includes a plurality of via plugs 18 and a wiring layer 19 in the first floor portion F1, and a via plug 27 and a wiring layer 28 in the second floor portion F2. The wiring layers 19 and 28 are examples of the second wiring layer of the present disclosure. The photodetector of this modification further includes a plug 24e disposed below the diffusion region 21c and a wiring 25f disposed below the plug 24e. The plug 24e is one of the plurality of contact plugs 24. The wiring 25f is included in the wiring layer 25 and is separated from the wiring 25a. On the other hand, the photodetector of this modification does not include the plug 31b and the wiring 25b.

[0123] The via plugs 18 are formed in the interlayer insulating film 14 and disposed on the wiring layer 16. Fig. 13 shows plugs 18a and 18b as examples of the via plugs 18. The plug 18a is disposed on the wiring 16a. The plug 18b is disposed on the wiring 16c.

[0124] The wiring layer 19 is formed in the interlayer insulating film 14 and disposed on the via plug 18. In FIG. 13, the wiring layer 19 includes wirings 19a and 19b that are separated from each other. The wiring 19a is disposed on the plug 18a. The wiring 19b is disposed on the plug 18b. These wirings 19a and 19b are used as metal pads for bonding the first floor portion F1 and the second floor portion F2 together. The wiring layer 19 is, for example, a metal layer including a Cu (copper) layer.

[0125] The via plug 27 is formed in the interlayer insulating film 23 and is disposed below the wiring layer 25. Fig. 13 shows a plug 27a as an example of the via plug 27. The plug 27a is disposed below the wiring 25a.

[0126] The wiring layer 28 is formed in the interlayer insulating film 23 and is disposed below the via plug 27. In FIG. 13, the wiring layer 28 includes wirings 28a and 28b that are separated from each other. The wiring 28a is disposed below the plug 28a and on the wiring 19a. The wiring 28b is disposed on the wiring 19b. These wirings 28a and 28b are used as metal pads for bonding the first floor portion F1 and the second floor portion F2 together. The wiring layer 28 is, for example, a metal layer including a Cu layer.

[0127] The wirings 19b and 28b are disposed above the wiring 16b. Thus, the photodetector of this modified example includes a capacitance C' in which the wiring 16b serves as one electrode and the wirings 19b and 28b serve as the other electrodes. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. In this way, the photodetector of this modified example includes a capacitance C' in addition to the capacitance C. Like the capacitance C, the capacitance C' is electrically connected to the pixel transistor 13 (diffusion region 11e) via the wiring 16b and the plug 15c, and is also electrically connected to the diffusion region 11f via the wirings 16c, 19b, and 28b and the plugs 15d and 18b.

[0128] As described above, the structure of the photodetector of this embodiment may be either "F to B" or "F to F."

[0129] [Eleventh Modification] FIG. 14 is a cross-sectional view showing the structure of a photodetector according to an eleventh modification of the first embodiment.

[0130] Fig. 14 shows a cross section of one pixel 1 in the photodetector of this modified example. The photodetector of this modified example includes plug 27b, wiring 25e, plug 24d, and diffusion region 21f in addition to the components shown in Fig. 13. On the other hand, the photodetector of this modified example does not include plug 18b, wiring 16c, plug 15d, or diffusion region 11f.

[0131] The properties of the diffusion region 21f, plug 24d, and interconnect 25e of this modification are similar to those of the diffusion region 21f, plug 24d, and interconnect 25e of the ninth modification (see FIG. 12). However, the diffusion region 21f of this modification is located near the bottom surface of the substrate 21. The plug 24d of this modification is located below the diffusion region 21f. The interconnect 25e of this modification is located below the plug 24d.

[0132] The photodetector of this modified example includes a plurality of via plugs 27. Plug 27b is one of these via plugs 27. Plug 27b is disposed below interconnect 25e and above interconnect 28b. This allows capacitance C' to be increased by diffusion region 21f.

[0133] [Twelfth Modification] FIG. 15 is a cross-sectional view showing the structure of a photodetector according to a twelfth modification of the first embodiment.

[0134] Fig. 15 shows a cross section of one pixel 1 in the photodetector device of this modified example. Fig. 15 also shows a cross section of an extra-pixel region 1' provided in the photodetector device of this modified example. The photodetector device of this modified example has a pixel array 2 including a plurality of pixels 1 (see Fig. 1), and has an extra-pixel region 1' outside these pixels 1.

[0135] The diffusion region 21f of this modification is disposed in the extra-pixel region 1', which makes it possible to reduce the number of wirings within each pixel 1.

[0136] As described above, the photodetector of this embodiment includes the conversion efficiency switching transistor FDG in the first floor section F1. Therefore, according to this embodiment, it is possible to alleviate the lack of space in the second floor section F2 and shorten the length of the wiring between the conversion efficiency switching transistor FDG and the floating diffusion section FD.

[0137] Furthermore, the photodetector of this embodiment includes a SubFD section within the first floor section F1. Therefore, according to this embodiment, it is possible to lengthen the wiring 16b within the SubFD section, thereby increasing the capacitance C (or C'). Note that the structure in which the SubFD section is disposed within the first floor section F1 will also be described in the second and third embodiments described later.

[0138] Second Embodiment FIG. 16 is a cross-sectional view, a plan view, and a circuit diagram showing the structure of a photodetector according to a second embodiment.

[0139] Fig. 16A shows a cross section of one pixel 1 in the photodetector device of this embodiment. Figs. 16B and 16C respectively show the planar structure and circuit configuration of four pixels 1 in the photodetector device of this embodiment. Two of these four pixels 1 form a unit U1, and the remaining two of these four pixels 1 form a unit U2. The pixel 1 shown in Fig. 16A is one of these four pixels 1. Note that, for ease of understanding, Fig. 16A shows a cross section taken along the dashed line shown in Fig. 16B.

[0140] The photodetector of this embodiment includes a first floor portion F1 and a second floor portion F2, similar to the photodetector of the first embodiment. Furthermore, the photodetector of this embodiment includes components generally similar to those of the photodetector of the first embodiment. FIG. 16A shows the first floor portion F1 of the photodetector of this embodiment. The pixel transistor 12 (transfer transistor TG) of this embodiment has a trench gate structure. Therefore, the gate insulating film 12a and gate electrode 12b of this embodiment include portions embedded in the substrate 11. Furthermore, the photodetector of this embodiment includes a pixel isolation insulating film 41 (see FIG. 9A ), similar to the photodetector of the fourth modified example of the first embodiment.

[0141] As shown in FIG. 16A , the photodetector device of this embodiment further includes diffusion regions 51 to 53 formed in the substrate 11. The diffusion regions 51 and 52 are, for example, N-type regions. The diffusion region 53 is, for example, a P-type region (P-well). The diffusion region 51 is disposed above the diffusion region 11b. A portion of the gate insulating film 12a and the gate electrode 12b of the pixel transistor 12 is formed in the diffusion region 51. The diffusion region 52 is disposed above the diffusion region 51 and near the upper surface of the substrate 11. The diffusion region 53 is disposed on the pixel isolation insulating film 41 and near the upper surface of the substrate 11. The diffusion region 53 of this embodiment is electrically connected to the ground potential. The diffusion regions 52 and 53 are examples of the first and second diffusion regions of the present disclosure, respectively.

[0142] As shown in FIG. 16A , the photodetector of this embodiment includes a capacitance C in which the diffusion region 52 serves as one electrode and the diffusion region 53 serves as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. In FIG. 16A , the portion corresponding to the diffusion region 52 is indicated by the symbol SubFD. Hereinafter, this portion will also be referred to as the "SubFD portion."

[0143] 16B shows the first floor F1 of the photodetector of this embodiment, and illustrates, for example, the planar shape of the pixel isolation insulating film 41. In unit U1, the substrate 11 in one pixel 1 and the substrate 11 in the other pixel 1 are connected to each other through an opening provided in the pixel isolation insulating film 41 between these pixels 1. The same applies to the two pixels 1 in unit U2.

[0144] In Figure 16C, the boundary between the first floor F1 and the second floor F2 is indicated by a dashed line. In Figure 16C, each of the four pixels 1 includes a photodiode PD and a transfer transistor TG in the first floor F1. These pixels 1 also share a conversion efficiency switching transistor FDG, a reset transistor RST, an amplifier transistor AMP, and a selection transistor SEL in the second floor F2. For convenience of illustration, the floating diffusion FD is depicted in the second floor F2 in Figure 16C, but is actually located in the first floor F1 as shown in Figures 16A and 16B. The floating diffusion FD is shared by the four pixels 1. The connections between these components in this embodiment are generally similar to those in the first embodiment (see Figure 3).

[0145] Fig. 16B shows four SubFD portions in four pixels 1. On the other hand, Fig. 16C shows one SubFD portion shared by two pixels 1 in unit U1 and one SubFD portion shared by two pixels 1 in unit U2. This is because the two SubFD portions in unit U1 in Fig. 16B are adjacent to each other through the opening in the pixel isolation insulating film 41, and are therefore shown collectively as one SubFD portion in Fig. 16C. The same applies to unit U2.

[0146] Next, the conversion efficiency switching transistor FDG of this embodiment will be described with reference to FIGS. 16A to 16C.

[0147] In this embodiment, in order to expand the dynamic range of the photodetector device, it is desirable to connect a large capacitance to the conversion efficiency switching transistor FDG. Therefore, when using the conversion efficiency switching transistor FDG of a certain pixel 1, it is possible to connect not only the capacitance within that pixel 1 but also the capacitance within another pixel to the conversion efficiency switching transistor FDG. That is, it is possible to borrow and lend capacitance between pixels 1. However, borrowing and lending capacitance between pixels 1 poses a problem of defects spreading between pixels 1. For example, if there is a point defect in the floating diffusion region FD of a certain pixel 1, the point defect will spread to other pixels 1 that borrow and lend capacitance, resulting in degradation of image quality.

[0148] On the other hand, each pixel 1 (or each unit) of this embodiment has a capacitance C between the diffusion regions 52 and 53 in the substrate 11. This makes it possible to provide a large capacitance C for each pixel 1. Therefore, according to this embodiment, it is possible to connect a large capacitance C to the conversion efficiency switching transistor FDG without the need to lend or borrow capacitance between pixels 1.

[0149] Various modifications of the photodetector of the second embodiment will be described below.

[0150] [First and Second Modifications] FIG. 17 is a circuit diagram showing the structure of a photodetector according to a first and second modification of the second embodiment.

[0151] FIG. 17A shows the circuit configuration of four pixels 1 in a photodetector device according to a first modified example. In addition to the components shown in FIG. 16C , these pixels 1 according to this modified example include a SubFD section disposed in the second floor section F2. That is, these pixels 1 according to this modified example include a SubFD section disposed in the first floor section F1 and a SubFD section disposed in the second floor section F2. The SubFD section in the first floor section F1 is formed by a diffusion region 52 in the substrate 11, as described with reference to FIG. 16A . On the other hand, the SubFD section in the second floor section F2 is formed by, for example, a diffusion region in the substrate 21 or wiring in the interlayer insulating film 23. These SubFD sections are all electrically connected to a node between the conversion efficiency switching transistor FDG and the reset transistor RST. Furthermore, the SubFD section in the second floor section F2 forms a capacitance C, similar to the SubFD section in the first floor section F2. According to this modified example, an even larger capacitance can be connected to the conversion efficiency switching transistor FDG.

[0152] FIG. 17B shows the circuit configuration of four pixels 1 in a photodetector device according to the second modification. These pixels 1 of this modification include a conversion efficiency switching transistor FDG2 in addition to the components shown in FIG. 17A . Note that in FIG. 17A , the conversion efficiency switching transistor FDG is referred to as the "conversion efficiency switching transistor FDG1" to distinguish between the two conversion efficiency switching transistors. The conversion efficiency switching transistor FDG2 is disposed between the floating diffusion portion FD and the reset transistor RST. The SubFD portion in the second floor portion F2 of this modification is electrically connected to the node between the conversion efficiency switching transistor FDG2 and the reset transistor RST. According to this modification, similar to the third modification of the first embodiment, the conversion efficiency of photoelectric conversion by the photodiode PD can be switched between three levels (see FIG. 7 ).

[0153] [Third Modification] FIG. 18 is a cross-sectional view and a circuit diagram showing the structure of a photodetector according to a third modification of the second embodiment.

[0154] Fig. 18A shows a cross section of one pixel 1 in the photodetector device of this modified example. Fig. 18B shows the circuit configuration of four pixels 1 in the photodetector device of this modified example. The structure shown in Fig. 18A is similar to the structure shown in Fig. 16A. Meanwhile, Fig. 18B shows two transistors Tr in addition to the components shown in Fig. 16C. One transistor Tr is arranged between the floating diffusion region FD and one of the subFD regions, and the other transistor Tr is arranged between the floating diffusion region FD and the other subFD region.

[0155] The photodiode PD performs photoelectric conversion of incident light and outputs electric charges (signal charges) generated by the photoelectric conversion. If there is too much signal charge, it is not possible to store all of the signal charge within the photodiode PD. In this modification, the signal charge that cannot be stored within the photodiode PD is allowed to overflow into the SubFD section. This allows the signal charge to be accumulated within the SubFD section, thereby making it possible to prevent loss of signal charge.

[0156] The SubFD section of this modification is formed by a diffusion region 52 in the substrate 11, similar to the floating diffusion section FD (diffusion region 11c). Therefore, the SubFD section of this modification is suitable for storing charge. In this modification, potential design is performed so that charge from each photodiode PD overflows directly into the SubFD section. The photodetector of this modification includes a transistor Tr between the floating diffusion section FD and the SubFD section so that the overflowed charge can be stored in the SubFD section.

[0157] [Fourth Modification] FIG. 19 is a cross-sectional view and a circuit diagram showing the structure of a photodetector according to a fourth modification of the second embodiment.

[0158] 19A shows a cross section of one pixel 1 in the photodetector of this modified example. FIG. 19B shows the circuit configuration of four pixels 1 in the photodetector of this modified example. The circuit configuration shown in FIG. 19B is the same as the circuit configuration shown in FIG. 18B. Meanwhile, FIG. 19A shows an insulating film 54 in addition to the components shown in FIG. 18A. The insulating film 54 is made of, for example, SiO ２ The insulating film 54 is an example of a first insulating film of the present disclosure.

[0159] The insulating film 54 is formed in the substrate 11 and surrounds the diffusion region 52 (SubFD portion) in a circular shape in plan view. If charge overflows into the SubFD portion, a strong electric field is generated around the SubFD portion, which may affect the transfer transistor TG and the diffusion region 53. According to this modification, by surrounding the SubFD portion with the insulating film 54, it is possible to alleviate the electric field applied from the SubFD portion to the outside. Note that this effect of alleviating the electric field can be obtained even when charge does not overflow into the SubFD portion.

[0160] [Fifth Modification] FIG. 20 is a cross-sectional view and a plan view showing the structure of a photodetector according to a fifth modification of the second embodiment.

[0161] Fig. 20A shows a cross section of one pixel 1 in the photodetector of this modified example. Fig. 20B shows a planar structure of four pixels 1 in the photodetector of this modified example. The photodetector of this modified example has a structure in which the diffusion region 52 shown in Figs. 16A and 16B is replaced with a laminated structure 55. The laminated structure 55 is formed on the substrate 11 and disposed in the interlayer insulating film 14.

[0162] The laminated structure 55 includes an insulating film 55a and a conductive layer 55b formed in this order on the substrate 11. The insulating film 55a is made of, for example, SiO ２ The conductive layer 55b may be a semiconductor layer such as a polysilicon layer, or a conductor layer such as a metal layer. The insulating film 55a and the conductive layer 55b are examples of the second insulating film and the first conductive layer, respectively, of the present disclosure.

[0163] As shown in FIG. 20A , the photodetector of this modified example includes a capacitance C having a conductive layer 55b as one electrode and a diffusion region 53 as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. In FIG. 20A , the portion corresponding to the conductive layer 55b is indicated by the symbol SubFD. In this modified example, this portion becomes the "SubFD portion." The insulating film 55a is sandwiched between the conductive layer 55b and the diffusion region 53, and functions as a dielectric film between the electrodes of the capacitance C.

[0164] According to this modification, the SubFD portion can be formed by using the conductive layer 55 b instead of the diffusion region 52 .

[0165] [Sixth and Seventh Modifications] FIG. 21 is a cross-sectional view showing the structure of a photodetector according to sixth and seventh modifications of the second embodiment.

[0166] 21A shows a cross section of one pixel 1 in a photodetector according to a sixth modification. The photodetector according to this modification has a structure similar to that of the photodetector according to the fifth modification. However, whereas the stacked structure 55 according to the fifth modification has a planar structure that does not include a portion buried in the substrate 11, the stacked structure 55 according to this modification has a trench structure that includes a portion buried in the substrate 11. The stacked structure 55 according to this modification can be formed by forming a trench in the substrate 11 and sequentially burying an insulating film 55a and a conductive layer 55b in the trench. According to this modification, the electrode area of ​​the capacitance C can be increased.

[0167] 21B shows a cross section of one pixel 1 in a photodetector according to the seventh modification. The photodetector according to this modification has a structure similar to that of the photodetector according to the sixth modification. However, the stacked structure 55 according to this modification has a fin-type structure including multiple protruding portions within the substrate 11. According to this modification, as with the sixth modification, it is possible to increase the electrode area of ​​the capacitance C.

[0168] Eighth Modification FIG. 22 is a cross-sectional view and a plan view showing the structure of a photodetector according to an eighth modification of the second embodiment.

[0169] Fig. 22A shows a cross section of one pixel 1 in the photodetector device of this modified example. Fig. 22B shows a planar structure of four pixels 1 in the photodetector device of this modified example. The photodetector device of this modified example has a structure in which the diffusion regions 52 and 53 shown in Figs. 16A and 16B are replaced with a conductive layer 56 and a diffusion region 57. The conductive layer 56 and the diffusion region 57 are formed in the substrate 11. The conductive layer 56 is an example of the second conductive layer of the present disclosure. The diffusion region 57 is an example of the second diffusion region of the present disclosure.

[0170] The conductive layer 56 is formed on the pixel isolation insulating film 41 within the substrate 11. The conductive layer 56 in this modification is called a side contact layer. The conductive layer 56 is, for example, a semiconductor layer such as a polysilicon layer. This semiconductor layer is, for example, an N-type semiconductor layer.

[0171] The diffusion region 57 is formed on the side surface of the conductive layer 56 in the substrate 11 and is in contact with the side surface of the conductive layer 56. In this modification, the conductivity type of the diffusion region 57 is the same as the conductivity type of the conductive layer 56. The diffusion region 57 is, for example, an N-type region.

[0172] The conductive layer 56 and the diffusion region 57 are formed, for example, as follows: First, a recess is formed in the substrate 11, and the conductive layer 56 is formed in the recess. Next, N-type impurity ions are implanted into the conductive layer 56 and into the substrate 11 near the conductive layer 56. As a result, N-type impurity atoms are introduced into the conductive layer 56, and an N-type region (diffusion region 57) is formed in the substrate 11 near the conductive layer 56. The diffusion region 57 is formed on the side surface of the conductive layer 56.

[0173] As shown in FIG. 22A , the photodetector of this modified example includes a capacitance C with a conductive layer 56 as one electrode and a diffusion region 57 as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. In FIG. 22A , the portion corresponding to the conductive layer 56 is indicated by the symbol SubFD. In this modified example, this portion becomes the "SubFD portion."

[0174] According to this modification, the SubFD portion can be formed by using the conductive layer 56 (side contact layer) instead of the diffusion region 52 .

[0175] [Ninth Modification] FIG. 23 is a cross-sectional view and a plan view showing the structure of a photodetector according to a ninth modification of the second embodiment.

[0176] Fig. 23A shows a cross section of one pixel 1 in the photodetector of this modified example. Fig. 23B shows a planar structure of four pixels 1 in the photodetector of this modified example. The photodetector of this modified example has a structure in which the diffusion region 57 shown in Figs. 23A and 23B is replaced with an insulating film 58.

[0177] The insulating film 58 is formed in the substrate 11. Specifically, the insulating film 58 is formed on the side surface of the conductive layer 56 in the substrate 11 and is in contact with the side surface of the conductive layer 56. The insulating film 58 is made of, for example, SiO ２ The insulating film 58 of this modification is disposed on the pixel isolation insulating film 41 together with the conductive layer 58 .

[0178] As shown in FIG. 23A , the photodetector of this modified example includes a capacitance C having a conductive layer 56 as one electrode and a substrate 11 as the other electrode. The former electrode is an example of the first electrode of the present disclosure. The latter electrode is an example of the second electrode of the present disclosure. In FIG. 23A , the portion corresponding to the conductive layer 56 is indicated by the symbol SubFD. In this modified example, this portion becomes the "SubFD portion." An insulating film 58 is sandwiched between the conductive layer 56 and the substrate 11, and functions as a dielectric film between the electrodes of the capacitance C.

[0179] According to this modification, similarly to the eighth modification, it is possible to form the SubFD portion by using a conductive layer 56 instead of the diffusion region 52. According to this modification, by using an insulating film 58 instead of the diffusion region 57, it is possible to form the capacitance C at approximately the same position as the capacitance C in the eighth modification.

[0180] [Tenth Modification] FIG. 24 is a plan view showing the structure of a photodetector according to a tenth modification of the second embodiment.

[0181] FIG. 24 shows the planar structure of eight pixels 1 in the photodetector device of this modified example. In addition to the above-described units U1 and U2, FIG. 24 also shows units U3 and U4. Each of units U1 to U4 includes two pixels 1. The structures of units U3 and U4 are similar to the structures of units U1 and U2. For example, in each of units U1 to U4, the substrate 11 in one pixel 1 and the substrate 11 in the other pixel 1 are connected to each other through an opening provided in the pixel isolation insulating film 41 between these pixels 1.

[0182] FIG. 25 is a circuit diagram showing the structure of a photodetector according to a tenth modified example of the second embodiment.

[0183] Fig. 25 shows the circuit configuration of the eight pixels 1 shown in Fig. 24. The configurations of units U1 and U2 in this modification are the same as the configurations of units U1 and U2 shown in Fig. 18B. The configurations of units U3 and U4 in this modification are also the same as the configurations of units U1 and U2 shown in Fig. 18B.

[0184] As shown in FIG. 25 , the photodetector of this modified example further includes a conversion efficiency switching transistor FDG3 disposed between the SubFD section in the second floor section F2 of the units U1 and U2 and the SubFD section in the second floor section F2 of the units U3 and U4. The function of the conversion efficiency switching transistor FDG3 is similar to that of the conversion efficiency switching transistors FDG1 and FDG2. According to this modified example, the conversion efficiency switching transistor FDG3 allows the lending and borrowing of capacitance C between the units U1 to U4. This makes it possible to increase the number of switching stages for the conversion efficiency of photoelectric conversion by the photodiode PD.

[0185] In this modification, the conversion efficiency may be switched without using the conversion efficiency switching transistor FDG3.

[0186] [Eleventh Modification] FIG. 26 is a cross-sectional view and a plan view showing the structure of a photodetector according to an eleventh modification of the second embodiment.

[0187] Fig. 26A shows a cross section of one pixel 1 in the photodetector device of this modified example. Fig. 26B shows a planar structure of four pixels 1 in the photodetector device of this modified example. The structure shown in Fig. 26B is the same as the structure shown in Fig. 16B. Meanwhile, Fig. 26A shows a capacitance Cb in addition to the components shown in Fig. 16A. Note that in Fig. 26A, the above-mentioned capacitance C is written as "capacitance Ca" to distinguish between the two capacitances.

[0188] The capacitance Ca has a structure in which the diffusion region 52 serves as one electrode and the diffusion region 53 serves as the other electrode. On the other hand, the capacitance Cb has a structure in which the contact plug 15 on the diffusion region 52 serves as one electrode and the contact plug 15 on the diffusion region 53 serves as the other electrode. The value of the capacitance Cb can be increased by shortening the distance between these contact plugs 15.

[0189] According to this modification, it is possible to connect large capacitances Ca and Cb to the conversion efficiency switching transistor FDG.

[0190] [Twelfth and Thirteenth Modifications] FIG. 27 is a plan view showing the structure of a photodetector according to a twelfth and thirteenth modification of the second embodiment.

[0191] 27A shows the planar structure of four pixels 1 in a photodetector according to the twelfth modification. In this modification, the SubFD section common to the two pixels 1 of unit U1 is disposed in an opening provided in the pixel isolation insulating film 41 between these pixels 1. This is also true for unit U2. In this way, the SubFD section can be disposed in various positions.

[0192] 27B shows the planar structure of four pixels 1 in a photodetector device according to the thirteenth modification. While the planar shape of each pixel 1 in the twelfth modification and the like is rectangular, the planar shape of each pixel 1 in this modification is square. Furthermore, the pixel isolation insulating film 41 in this modification does not have an opening as described in the twelfth modification and the like. In this way, the pixels 1 can be designed in various shapes.

[0193] As described above, the photodetector of this embodiment includes a SubFD portion formed by the diffusion region 52 in the first floor portion F1, the conductive layer 55b, or the conductive layer 56. Therefore, according to this embodiment, it is possible to alleviate the lack of space in the second floor portion F2 and to achieve a large capacitance C without the need for capacitance lending and borrowing between pixels 1.

[0194] Although the conversion efficiency switching transistor FDG in this embodiment is arranged in the first floor part F1, it may be arranged in the second floor part F2 instead. This also applies to each of the conversion efficiency switching transistors FDG1, FDG2, and FDG3.

[0195] Third Embodiment FIG. 28 is a plan view and a cross-sectional view showing the structure of a photodetector according to a third embodiment.

[0196] Fig. 28A shows the planar structure of two pixels 1 (unit U1) in the photodetector device of this embodiment. Fig. 28B shows a cross section of the left pixel 1 in Fig. 28A . Fig. 28C shows a cross section of the right pixel 1 in Fig. 28A . For ease of understanding, Figs. 28B and 28C show cross sections taken along dashed lines L1 and L2 shown in Fig. 28A , respectively.

[0197] The photodetector of this embodiment has a first floor F1 and a second floor F2, similar to the photodetector of the second embodiment. Furthermore, the photodetector of this embodiment has substantially the same components as the photodetector of the second embodiment. Figures 28A to 28C show the first floor F1 of the photodetector of this embodiment.

[0198] The structures shown in Figures 28B and 28C are similar to the structure shown in Figure 16A. However, the diffusion region 52 shown in Figures 28B and 28C is a P-type region. Furthermore, the P-type impurity concentration in the diffusion region 52 shown in Figure 28B is lower than the P-type impurity concentration in the diffusion region 52 shown in Figure 28C. Therefore, the former diffusion region 52 is a P-type region, and the latter diffusion region 52 is a P+ type region. The P- type region forms the electrode of the capacitance C in the left pixel 1 and corresponds to the SubFD portion of this capacitance C. The P+ type region forms the electrode of the capacitance C in the right pixel 1 and corresponds to the SubFD portion of this capacitance C.

[0199] The photodiode PD performs photoelectric conversion of incident light and outputs electric charges (signal charges) generated by the photoelectric conversion. If there is too much signal charge, it is not possible to store all of the signal charge within the photodiode PD. In this embodiment, as in the third modification of the second embodiment shown in FIGS. 18A and 18B , the signal charge that cannot be stored within the photodiode PD is allowed to overflow into the SubFD section. This allows the signal charge to be stored in the SubFD section, thereby preventing loss of signal charge.

[0200] 28A, the signal charge in this embodiment overflows from the SubFD portion (P- type region) of the left pixel 1 to the SubFD portion (P+ type region) of the right pixel 1. According to this embodiment, by forming two diffusion regions 52 having different impurity concentrations, it is possible to form an overflow path between two SubFD portions in different pixels 1. This makes it possible to operate the conversion efficiency switching transistor FDG appropriately even if the size of each pixel 1 is very small.

[0201] Various modifications of the photodetector of the third embodiment will be described below.

[0202] [First, Second, and Third Modifications] FIG. 29 is a plan view showing the structures of photodetector devices according to first, second, and third modifications of the third embodiment.

[0203] FIG. 29A shows the planar structure of four pixels 1 in a photodetector device according to the first modification. The substrates 11 in these pixels 1 are connected to each other through openings formed in the pixel isolation insulating film 41. The upper left pixel 1 has a diffusion region 52 (P−− region) with a low P-type impurity concentration. The upper right pixel 1 has a diffusion region 52 (P− region) with a higher P-type impurity concentration than the upper left pixel 1. The lower right pixel 1 has a diffusion region 52 (P+ region) with a higher P-type impurity concentration than the upper right pixel 1. The lower left pixel 1 has a diffusion region 52 (P++ region) with a higher P-type impurity concentration than the lower right pixel 1. Thus, in this modification, signal charges overflow between the SubFD sections in the order of the P−− region, P− region, P+ region, and P++ region, as indicated by the arrows in FIG. 29A.

[0204] 29B shows the planar structure of four pixels 1 in a photodetector device according to the second modification. The pixel isolation insulating film 41 of this modification has openings with a different shape from the openings of the pixel isolation insulating film 41 of the first modification. In this modification, signal charges also overflow between the SubFD portions in the order of the P-- type region, P- type region, P+ type region, and P++ type region, as shown by the arrows in FIG. 29B.

[0205] 29C shows the planar structure of four pixels 1 in a photodetector device according to the third modification. The pixel isolation insulating film 41 of this modification has openings with a different shape from the openings of the pixel isolation insulating film 41 of the first and second modifications. In this modification, signal charges also overflow between the SubFD portions in the order of the P-- type region, P- type region, P+ type region, and P++ type region, as shown by the arrows in FIG. 29C.

[0206] As described above, the overflow path of this embodiment may be formed between three or more pixels 1 .

[0207] [Fourth Modification] FIG. 30 is a circuit diagram showing the structure of a photodetector according to a fourth modification of the third embodiment.

[0208] FIG. 30 shows the circuit configuration of two pixels 1 (units U1) in a photodetector device according to this modification. Unit U1 according to this modification corresponds to an example of unit U1 shown in FIGS. 28A to 28C . Unit U1 according to this modification includes two photodiodes PD and two transfer transistors TG. Unit U1 according to this modification also shares a floating diffusion region FD, a conversion efficiency switching transistor FDG1, a conversion efficiency switching transistor FDG2, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL. Furthermore, for the sake of distinction, FIG. 30 refers to the two SubFDs as "SubFD1 section" and "SubFD2 section," and the two capacitances C as "capacitance C1" and "capacitance C2."

[0209] The connections between these components in this modification are similar to those shown in Fig. 17B (the second modification of the second embodiment), except that the two conversion efficiency switching transistors FDG1 and FDG2 in this modification are connected in parallel instead of in series.

[0210] The photodetector of this modification includes two overflow transistors Tr, similar to the photodetector shown in FIG. 18B (third modification of the second embodiment). One of the transistors Tr is disposed between the photodiode PD and the SubFD1 section. This allows overflowed charge to be stored in the SubFD1 section. The other transistor Tr is disposed between the SubFD1 section and the SubFD2 section. This allows overflowed charge to be stored in the SubFD2 section. According to this modification, these transistors Tr can also handle charge overflow between the SubFD1 section and the SubFD2 section.

[0211] The SubFD1 portion of this modification may be formed by a diffusion region such as the diffusion region 52, or may be formed by a conductive layer as in some modifications of the second embodiment, or may be formed by wiring or the like as in the first embodiment. This also applies to the SubFD2 portion of this modification.

[0212] As described above, the photodetector device of this embodiment forms an overflow path between the SubFD portions. Therefore, according to this embodiment, even if the size of each pixel 1 is very small, it is possible to operate the conversion efficiency switching transistor FDG appropriately.

[0213] The photodetector devices according to the first to third embodiments can be configured as various devices, such as a solid-state imaging device or a distance measuring device.

[0214] 31 is a block diagram showing an example of the configuration of an electronic device. The electronic device shown in FIG.

[0215] The camera 100 includes an optical unit 101 including a lens group and the like, an imaging device 102 which is the photodetector of any one of the first to third embodiments, a DSP (Digital Signal Processor) circuit 103 which is a camera signal processing circuit, a frame memory 104, a display unit 105, a recording unit 106, an operation unit 107, and a power supply unit 108. The DSP circuit 103, the frame memory 104, the display unit 105, the recording unit 106, the operation unit 107, and the power supply unit 108 are connected to one another via a bus line 109.

[0216] The optical unit 101 takes in incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 102. The imaging device 102 converts the amount of incident light formed on the imaging surface by the optical unit 101 into an electrical signal on a pixel-by-pixel basis and outputs the electrical signal.

[0217] The DSP circuit 103 performs signal processing on the pixel signals output by the imaging device 102. The frame memory 104 is a memory for storing one frame of a moving image or still image captured by the imaging device 102.

[0218] The display unit 105 includes a panel display device such as a liquid crystal panel or an organic EL panel, and displays moving images or still images captured by the imaging device 102. The recording unit 106 records the moving images or still images captured by the imaging device 102 on a recording medium such as a hard disk or semiconductor memory.

[0219] The operation unit 107, under the operation of the user, issues operation commands for various functions of the camera 100. The power supply unit 108 appropriately supplies various types of power to the DSP circuit 103, frame memory 104, display unit 105, recording unit 106, and operation unit 107 as operating power sources.

[0220] By using the photodetector according to any one of the first to third embodiments as the imaging device 102, it is possible to expect to obtain a good image.

[0221] The optical detection device can be applied to various other products, for example, the optical detection device may be mounted on various moving objects such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, and robots.

[0222] 32 is a block diagram showing an example of the configuration of a mobile object control system. The mobile object control system shown in FIG. 32 is a vehicle control system 200.

[0223] The vehicle control system 200 includes a plurality of electronic control units connected via a communication network 201. In the example shown in Fig. 32 , the vehicle control system 200 includes a drive system control unit 210, a body system control unit 220, an outside-vehicle information detection unit 230, an inside-vehicle information detection unit 240, and an integrated control unit 250. Fig. 32 further shows, as components of the integrated control unit 250, a microcomputer 251, an audio / video output unit 252, and an in-vehicle network I / F (Interface) 253.

[0224] The drivetrain control unit 210 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 210 functions as a control device for a drive force generating device such as an internal combustion engine or a drive motor that generates drive force for the vehicle, a drive force transmission mechanism that transmits drive force to the wheels, a steering mechanism that adjusts the steering angle of the vehicle, a braking device that generates braking force for the vehicle, etc.

[0225] Body system control unit 220 controls the operation of various devices equipped in the vehicle body in accordance with various programs. For example, body system control unit 220 functions as a control device for a smart key system, a keyless entry system, a power window device, various lamps (e.g., head lamps, backup lamps, brake lamps, blinkers, fog lamps), etc. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches may be input to body system control unit 220. Body system control unit 220 receives input of such radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0226] The outside-vehicle information detection unit 230 detects information outside the vehicle equipped with the vehicle control system 200. For example, an imaging unit 231 is connected to the outside-vehicle information detection unit 230. The outside-vehicle information detection unit 230 causes the imaging unit 231 to capture images outside the vehicle and receives the captured images from the imaging unit 231. The outside-vehicle information detection unit 230 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0227] The imaging unit 231 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 231 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 231 may be visible light or invisible light such as infrared light. The imaging unit 231 includes the photodetector of any of the first to third embodiments.

[0228] The interior information detection unit 240 detects information about the interior of a vehicle equipped with the vehicle control system 200. For example, a driver state detection unit 241 that detects the state of the driver is connected to the interior information detection unit 240. For example, the driver state detection unit 241 includes a camera that captures an image of the driver, and the interior information detection unit 240 may calculate the degree of fatigue or concentration of the driver or determine whether the driver is dozing off based on the detection information input from the driver state detection unit 241. This camera may include any of the photodetectors of the first to third embodiments, and may be, for example, the camera 100 shown in FIG. 31 .

[0229] The microcomputer 251 can calculate control target values ​​for the driving force generation device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside information detection unit 230 or the inside information detection unit 240, and output control commands to the drivetrain control unit 210. For example, the microcomputer 251 can perform cooperative control aimed at realizing functions of an Advanced Driver Assistance System (ADAS), such as vehicle collision avoidance, impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, collision warning, and lane departure warning.

[0230] In addition, the microcomputer 251 can perform cooperative control for purposes such as autonomous driving, in which the vehicle travels autonomously without the driver's operation, by controlling the driving force generating device, steering mechanism, or braking device based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 230 or the inside vehicle information detection unit 240.

[0231] Furthermore, the microcomputer 251 can output a control command to the body system control unit 220 based on the information about the outside of the vehicle acquired by the outside information detection unit 230. For example, the microcomputer 251 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 230, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0232] The audio / video output unit 252 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 32, an audio speaker 261, a display unit 262, and an instrument panel 263 are shown as such output devices. The display unit 262 may include, for example, an on-board display or a head-up display.

[0233] FIG. 33 is a plan view showing a specific example of the setting position of the imaging unit 231 in FIG.

[0234] 33 includes imaging units 301, 302, 303, 304, and 305 as the imaging unit 231. The imaging units 301, 302, 303, 304, and 305 are provided, for example, at positions such as the front nose of the vehicle 300, the side mirrors, the rear bumper, the back door, and the top of the windshield inside the vehicle cabin.

[0235] The imaging unit 301 provided on the front nose mainly acquires images of the front of the vehicle 300. The imaging unit 302 provided on the left side mirror and the imaging unit 303 provided on the right side mirror mainly acquire images of the sides of the vehicle 300. The imaging unit 304 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 300. The imaging unit 305 provided on the top of the windshield inside the vehicle mainly acquires images of the front of the vehicle 300. The imaging unit 305 is used to detect, for example, leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0236] FIG. 33 shows an example of the imaging ranges of imaging units 301, 302, 303, and 304 (hereinafter referred to as "imaging units 301 to 304"). Imaging range 311 indicates the imaging range of imaging unit 301 provided on the front nose. Imaging range 312 indicates the imaging range of imaging unit 302 provided on the left side mirror. Imaging range 313 indicates the imaging range of imaging unit 303 provided on the right side mirror. Imaging range 314 indicates the imaging range of imaging unit 304 provided on the rear bumper or back door. For example, by overlaying the image data captured by imaging units 301 to 304, an overhead image of vehicle 300 viewed from above can be obtained. Hereinafter, imaging ranges 311, 312, 313, and 314 will be referred to as "imaging ranges 311 to 314."

[0237] At least one of the image capturing units 301 to 304 may have a function of acquiring distance information. For example, at least one of the image capturing units 301 to 304 may be a stereo camera including multiple image capturing devices, or may be an image capturing device having pixels for detecting a phase difference.

[0238] For example, the microcomputer 251 (FIG. 32) calculates the distance to each three-dimensional object within the imaging ranges 311-314 and the change in this distance over time (relative speed with respect to the vehicle 300) based on the distance information obtained from the imaging units 301-304. Based on these calculation results, the microcomputer 251 can extract, as a preceding vehicle, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 300 and that is traveling in approximately the same direction as the vehicle 300 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 251 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle and perform automatic braking control (including adaptive cruise control), automatic acceleration control (including adaptive cruise control), and the like. In this way, according to this example, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without driver operation.

[0239] For example, based on the distance information obtained from the imaging units 301 to 304, the microcomputer 251 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and can use the data for automatic obstacle avoidance. For example, the microcomputer 251 distinguishes obstacles around the vehicle 300 into obstacles that are visible to the driver of the vehicle 300 and obstacles that are difficult to see. The microcomputer 251 then determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or exceeds a set value and a collision is possible, the microcomputer 251 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 261 or the display unit 262, or by performing forced deceleration or avoidance steering via the drivetrain control unit 210.

[0240] At least one of the image capturing units 301-304 may be an infrared camera that detects infrared rays. For example, the microcomputer 251 can recognize pedestrians by determining whether or not a pedestrian is present in the images captured by the image capturing units 301-304. Such pedestrian recognition is performed, for example, by extracting feature points in the images captured by the image capturing units 301-304 as infrared cameras and performing pattern matching processing on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian. When the microcomputer 251 determines that a pedestrian is present in the images captured by the image capturing units 301-304 and recognizes the pedestrian, the audio / image output unit 252 controls the display unit 262 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 252 may also control the display unit 262 to display an icon or the like representing the pedestrian in a desired position.

[0241] FIG. 34 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0242] 34 shows a state in which an operator (doctor) 531 is performing surgery on a patient 532 on a patient bed 533 using an endoscopic surgery system 400. As shown in the figure, the endoscopic surgery system 400 is composed of an endoscope 500, other surgical tools 510 such as an insufflation tube 511 and an energy treatment tool 512, a support arm device 520 that supports the endoscope 500, and a cart 600 on which various devices for endoscopic surgery are mounted.

[0243] The endoscope 500 is composed of a lens barrel 501, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 532, and a camera head 502 connected to the base end of the lens barrel 501. In the example shown in the figure, the endoscope 500 is configured as a so-called rigid lens barrel having a rigid lens barrel 501, but the endoscope 500 may also be configured as a so-called flexible lens barrel having a flexible lens barrel.

[0244] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 501. A light source device 603 is connected to the endoscope 500, and light generated by the light source device 603 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 501, and is irradiated via the objective lens toward an observation target inside the body cavity of the patient 532. The endoscope 500 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0245] An optical system and an image sensor are provided inside the camera head 502, and light reflected from an object to be observed (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 601 as RAW data.

[0246] The CCU 601 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 500 and the display device 602. Furthermore, the CCU 601 receives an image signal from the camera head 502 and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0247] Under the control of the CCU 601 , the display device 602 displays an image based on the image signal that has been subjected to image processing by the CCU 601 .

[0248] The light source device 603 is configured from a light source such as an LED (Light Emitting Diode), and supplies the endoscope 500 with irradiation light when photographing an operation site or the like.

[0249] The input device 604 is an input interface for the endoscopic surgery system 11000. The user can input various information and instructions to the endoscopic surgery system 400 via the input device 604. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 500.

[0250] The treatment tool control device 605 controls the driving of the energy treatment tool 512 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 606 sends gas into the body cavity of the patient 532 via the insufflation tube 511 to ensure a clear field of view for the endoscope 500 and a working space for the surgeon. The recorder 607 is a device capable of recording various types of information related to the surgery. The printer 608 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0251] The light source device 603, which supplies illumination light to the endoscope 500 when photographing the surgical site, can be configured from a white light source formed, for example, by an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 603 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 502 in synchronization with the irradiation timing. This method allows color images to be obtained without providing a color filter to the image sensor.

[0252] Furthermore, the light source device 603 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 502 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0253] The light source device 603 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, known as narrow band imaging. Alternatively, special light observation may be performed using fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 603 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0254] FIG. 35 is a block diagram showing an example of the functional configuration of the camera head 502 and the CCU 601 shown in FIG.

[0255] The camera head 502 has a lens unit 701, an imaging unit 702, a drive unit 703, a communication unit 704, and a camera head control unit 705. The CCU 601 has a communication unit 711, an image processing unit 712, and a control unit 713. The camera head 502 and the CCU 601 are connected to each other via a transmission cable 700 so as to be able to communicate with each other.

[0256] The lens unit 701 is an optical system provided at the connection portion with the lens barrel 501. Observation light taken in from the tip of the lens barrel 501 is guided to the camera head 502 and enters the lens unit 701. The lens unit 701 is configured by combining multiple lenses including a zoom lens and a focus lens.

[0257] The imaging unit 702 is composed of an imaging element. The imaging element constituting the imaging unit 702 may be a single (single-chip type) or multiple (multi-chip type). When the imaging unit 702 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and these may be combined to obtain a color image. Alternatively, the imaging unit 702 may be configured with a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 531 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 702 is composed of a multi-chip type, multiple lens units 701 may be provided corresponding to each imaging element. The imaging unit 702 may be, for example, a photodetector device according to any of the first to third embodiments.

[0258] Furthermore, the imaging unit 702 does not necessarily have to be provided in the camera head 502. For example, the imaging unit 702 may be provided inside the lens barrel 501, immediately after the objective lens.

[0259] The driving unit 703 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 701 by a predetermined distance along the optical axis under the control of the camera head control unit 705. This allows the magnification and focus of the image captured by the imaging unit 702 to be adjusted appropriately.

[0260] The communication unit 704 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 601. The communication unit 704 transmits the image signal obtained from the imaging unit 702 to the CCU 601 via the transmission cable 700 as RAW data.

[0261] Furthermore, the communication unit 704 receives a control signal for controlling the driving of the camera head 502 from the CCU 601 and supplies the control signal to the camera head control unit 705. The control signal includes information relating to the image capturing conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing an image, and / or information specifying the magnification and focus of the captured image.

[0262] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 713 of the CCU 601 based on the acquired image signal. In the latter case, the endoscope 500 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0263] The camera head control unit 705 controls the driving of the camera head 502 based on a control signal received from the CCU 601 via the communication unit 704 .

[0264] The communication unit 711 is configured by a communication device for transmitting and receiving various information to and from the camera head 502. The communication unit 711 receives an image signal transmitted from the camera head 502 via the transmission cable 700.

[0265] Furthermore, the communication unit 711 transmits to the camera head 502 a control signal for controlling the driving of the camera head 502. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0266] The image processing unit 712 performs various types of image processing on the image signal, which is RAW data, sent from the camera head 502 .

[0267] The control unit 713 performs various controls related to the imaging of the surgical site, etc. by the endoscope 500 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 713 generates a control signal for controlling the driving of the camera head 502.

[0268] Furthermore, the control unit 713 causes the display device 602 to display the captured image showing the surgical site, etc., based on the image signal subjected to image processing by the image processing unit 712. At this time, the control unit 713 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 713 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated during use of the energy treatment tool 512, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 602, the control unit 713 may use the recognition results to superimpose various surgical support information on the image of the surgical site. Superimposing the surgical support information and presenting it to the surgeon 531 reduces the burden on the surgeon 531 and enables the surgeon 531 to proceed with the surgery reliably.

[0269] The transmission cable 700 connecting the camera head 502 and the CCU 601 is an electric signal cable for communication of electric signals, an optical fiber for optical communication, or a composite cable of these.

[0270] In the illustrated example, communication is performed by wire using the transmission cable 700, but communication between the camera head 502 and the CCU 601 may also be performed wirelessly.

[0271] Although the embodiments of the present disclosure have been described above, these embodiments may be implemented with various modifications within the scope of the gist of the present disclosure. For example, two or more embodiments may be implemented in combination.

[0272] The present disclosure may also be configured as follows.

[0273] (1) A photodetector comprising: a first substrate; a first multilayer wiring layer provided on the first substrate; a second substrate provided on the first multilayer wiring layer; a second multilayer wiring layer provided on the second substrate or provided below the second substrate between the first multilayer wiring layer and the second substrate; a photoelectric conversion unit provided in the first substrate; a floating diffusion unit provided in the first substrate; and a first transistor including a gate electrode provided in the first multilayer wiring layer, electrically connected to the floating diffusion unit, and switching the conversion efficiency of photoelectric conversion by the photoelectric conversion unit.

[0274] (2) The photodetector according to (1), wherein the first multilayer wiring layer includes a first wiring electrically connected to the first transistor and serving as a first electrode of a capacitor.

[0275] (3) The photodetector according to (2), wherein the first wiring is electrically connected to a diffusion region provided in the first substrate.

[0276] (4) The photodetector according to (2), wherein the first multilayer wiring layer further includes a wiring that serves as a second electrode of the capacitor.

[0277] (5) The photodetector according to (4), wherein the wiring that serves as the second electrode is electrically connected to a diffusion region provided in the first substrate.

[0278] (6) The photodetector according to (2), further comprising a second transistor including a gate electrode provided in the first multilayer wiring layer, electrically connected to the first wiring, and configured to switch the conversion efficiency of photoelectric conversion by the photoelectric conversion unit.

[0279] (7) The photodetector according to (6), wherein the first multilayer wiring layer further includes a second wiring electrically connected to the second transistor and serving as the first electrode of the capacitor together with the first wiring.

[0280] (8) The photodetector according to (7), wherein the first multilayer wiring layer further includes a wiring that serves as a second electrode of the capacitor.

[0281] (9) The photodetector device described in (2), further comprising: a first wiring layer provided within the first multilayer wiring layer; and a second wiring layer provided within the first multilayer wiring layer, the second substrate, or the second multilayer wiring layer, wherein the first wiring layer includes the first wiring, and the second wiring layer includes wiring that becomes a second electrode of the capacitor.

[0282] (10) The photodetector according to (9), wherein the wiring that serves as the second electrode is electrically connected to a diffusion region provided in the second substrate.

[0283] (11) A photodetector comprising: a first substrate; a first multilayer wiring layer provided on the first substrate; a second substrate provided on the first multilayer wiring layer; a second multilayer wiring layer provided on the second substrate or provided below the second substrate between the first multilayer wiring layer and the second substrate; a photoelectric conversion unit provided in the first substrate; a floating diffusion unit provided in the first substrate; a first transistor electrically connected to the floating diffusion unit and switching the conversion efficiency of photoelectric conversion by the photoelectric conversion unit; and a capacitor including a first diffusion region provided in the first substrate, a first conductive layer provided in the first multilayer wiring layer, or a second conductive layer provided in the first substrate as a first electrode electrically connected to the first transistor.

[0284] (12) The photodetector according to (11), wherein the capacitor includes a second diffusion region provided in the first substrate as a second electrode.

[0285] (13) The photodetector according to (11), further comprising a second transistor electrically connected to the first transistor and configured to switch conversion efficiency of photoelectric conversion by the photoelectric conversion unit.

[0286] (14) The photodetector according to (11), wherein the charge from the photoelectric conversion unit overflows to the first electrode.

[0287] (15) The photodetector according to (11), further comprising a first insulating film provided in the first substrate so as to surround the first diffusion region in a plan view.

[0288] (16) The photodetector according to (11), further comprising a second insulating film provided between the first substrate and the first conductive layer and serving as a dielectric film of the capacitor.

[0289] (17) The photodetector according to (16), wherein the first conductive layer and the second insulating film form a planar or trench structure.

[0290] (18) The photodetector according to (12), wherein the second diffusion region is provided on a side surface of the second conductive layer.

[0291] (19) The photodetector according to (14), wherein the charge from the photoelectric conversion unit further overflows between electrodes of a plurality of capacitors.

[0292] (20) The photodetector according to (19), wherein the plurality of capacitors are included in different pixels.

[0293] 1: pixel, 1': extra-pixel region, 2: pixel array, 3: control circuit, 4: vertical drive circuit, 5: column signal processing circuit, 6: horizontal drive circuit, 7: output circuit, 8: vertical signal line, 9: horizontal signal line, 11: substrate, 11a: well region, 11b: diffusion region, 11c: diffusion region, 11d: diffusion region, 11e: diffusion region, 11f: diffusion region, 11g: diffusion region, 11h: diffusion region, 12: pixel transistor, 12': pixel transistor, 12a: gate insulating film, 12b: gate electrode, 12b': gate electrode, 12c: sidewall insulating film, 13: pixel transistor, 13a: gate insulating film, 13b: gate electrode, 13c: sidewall insulating film, 14: interlayer insulating film, 15: contact plug, 15a: plug, 15b: plug, 15c: plug, 15d: plug, 15e: plug, 15f: plug, 16: wiring layer, 16a: wiring, 16b: wiring, 16c: wiring, 16d: wiring, 17: pixel transistor, 17a: gate insulating film, 17b: gate electrode, 17c: sidewall insulating film, 18: via plug, 18a: plug, 18b: plug, 19: wiring layer, 19a: wiring, 19b: wiring, 21: substrate, 21a: well region, 21b: diffusion region, 21c: diffusion region, 21d: diffusion region, 21e: diffusion region, 21f: diffusion region, 22: pixel transistor, 22': pixel transistor, 22a: gate insulating film, 22b: gate electrode, 22b': gate electrode, 22c: sidewall insulating film, 23: interlayer insulating film, 24: contact plug, 24a: plug, 24b: plug, 24c: plug, 24d: plug, 24e: plug, 25: wiring layer, 25a: wiring, 25b: wiring, 25c: wiring, 25d: wiring, 25e: wiring, 25f: wiring, 26: pixel transistor, 26a: gate insulating film, 26b: gate electrode, 26c: sidewall insulating film, 27: via plug, 27a: plug, 27b: plug, 28: wiring layer, 28a: wiring, 28b: wiring, 31: through plug, 31a: plug, 31b: plug, 31c: plug, 41: pixel isolation insulating film, 41a: insulating film, 41b: insulating film, 42: pixel isolation insulating film, 42a: insulating film, 42b: insulating film, 43: wiring layer, 43a: wiring, 51: diffusion region, 52: diffusion region, 53: diffusion region,54: insulating film, 55: laminated structure portion, 55a: insulating film, 55b: conductive layer, 56: conductive layer, 57: diffusion region, 58: insulating film

Claims

1. A photodetector comprising: a first substrate; a first multilayer wiring layer provided on the first substrate; a second substrate provided on the first multilayer wiring layer; a second multilayer wiring layer provided on the second substrate or provided below the second substrate between the first multilayer wiring layer and the second substrate; a photoelectric conversion unit provided in the first substrate; a floating diffusion unit provided in the first substrate; and a first transistor including a gate electrode provided in the first multilayer wiring layer, electrically connected to the floating diffusion unit, and switching the conversion efficiency of photoelectric conversion by the photoelectric conversion unit.

2. The photodetector according to claim 1, wherein the first multilayer wiring layer includes a first wiring that is electrically connected to the first transistor and serves as a first electrode of a capacitor.

3. The photodetector device according to claim 2, wherein the first wiring is electrically connected to a diffusion region provided in the first substrate.

4. The photodetector according to claim 2, wherein said first multilayer wiring layer further includes a wiring that serves as a second electrode of said capacitor.

5. The photodetector device according to claim 4, wherein the wiring that serves as the second electrode is electrically connected to a diffusion region provided in the first substrate.

6. The photodetector device of claim 2, further comprising a second transistor including a gate electrode provided in the first multilayer wiring layer, electrically connected to the first wiring, and switching the conversion efficiency of photoelectric conversion by the photoelectric conversion unit.

7. The photodetector according to claim 6, wherein said first multilayer wiring layer further includes a second wiring electrically connected to said second transistor and which, together with said first wiring, constitutes said first electrode of said capacitor.

8. The photodetector according to claim 7, wherein said first multilayer wiring layer further includes a wiring that serves as a second electrode of said capacitor.

9. The photodetector device of claim 2, further comprising: a first wiring layer provided within the first multilayer wiring layer; and a second wiring layer provided within the first multilayer wiring layer, the second substrate, or the second multilayer wiring layer, wherein the first wiring layer includes the first wiring, and the second wiring layer includes a wiring that becomes a second electrode of the capacitor.

10. The photodetector according to claim 9, wherein the wiring that serves as the second electrode is electrically connected to a diffusion region provided in the second substrate.

11. A photodetector comprising: a first substrate; a first multilayer wiring layer provided on the first substrate; a second substrate provided on the first multilayer wiring layer; a second multilayer wiring layer provided on the second substrate or provided below the second substrate between the first multilayer wiring layer and the second substrate; a photoelectric conversion unit provided in the first substrate; a floating diffusion unit provided in the first substrate; a first transistor electrically connected to the floating diffusion unit and switching the conversion efficiency of photoelectric conversion by the photoelectric conversion unit; and a capacitor including a first diffusion region provided in the first substrate, a first conductive layer provided in the first multilayer wiring layer, or a second conductive layer provided in the first substrate as a first electrode electrically connected to the first transistor.

12. The photodetector of claim 11, wherein the capacitor includes a second diffusion region disposed within the first substrate as a second electrode.

13. The photodetector according to claim 11, further comprising a second transistor electrically connected to the first transistor for switching the conversion efficiency of photoelectric conversion by the photoelectric conversion section.

14. The photodetector according to claim 11, wherein charges from said photoelectric conversion portion overflow to said first electrode.

15. The photodetector according to claim 11, further comprising a first insulating film provided within the first substrate so as to surround the first diffusion region in a plan view.

16. The photodetector device according to claim 11, further comprising a second insulating film provided between said first substrate and said first conductive layer, said second insulating film serving as a dielectric film for said capacitor.

17. The photodetector device of claim 16, wherein the first conductive layer and the second insulating film form a planar or trench type structure.

18. The photodetector device of claim 12, wherein the second diffusion region is provided on a side of the second conductive layer.

19. The photodetector according to claim 14, wherein the charge from the photoelectric conversion section further overflows between electrodes of a plurality of capacitors.

20. The photodetection device according to claim 19, wherein the plurality of capacitances are included in different pixels.

Images