Light detection device and electronic instrument

Abstract

A light detection device according to one embodiment of the present disclosure comprises: a first layer having a photoelectric conversion unit that photoelectrically converts light and having a floating diffusion region that accumulates the charge converted by the photoelectric conversion unit; a second layer that is layered onto the first layer and that has a first transistor which outputs a first signal based on the charge accumulated in the floating diffusion region; a second transistor that is electrically connected to the floating diffusion region and a power supply line; and a third transistor that is electrically connected to the floating diffusion region and a first potential line.

Description

Photodetector and electronic equipment

[0001] The present disclosure relates to photodetection devices and electronic equipment.

[0002] An imaging device has been proposed that has a structure in which a first substrate having sensor pixels, a second substrate having a readout circuit, and a third substrate having a logic circuit are bonded together (Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2020-88380

[0004] In light detecting devices, it is required to suppress degradation of signal quality.

[0005] It is desirable to provide a photodetector that can suppress degradation of signal quality.

[0006] A photodetector according to an embodiment of the present disclosure includes a first layer having a photoelectric conversion unit that photoelectrically converts light and a floating diffusion that accumulates charge converted by the photoelectric conversion unit, a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the charge accumulated in the floating diffusion, a second transistor electrically connected to the floating diffusion and a power supply line, and a third transistor electrically connected to the floating diffusion and a first potential line. An electronic device according to an embodiment of the present disclosure includes an optical system and a photodetector that receives light transmitted through the optical system. The photodetector includes the first layer having a photoelectric conversion unit that photoelectrically converts light and a floating diffusion that accumulates charge converted by the photoelectric conversion unit, a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the charge accumulated in the floating diffusion, a second transistor electrically connected to the floating diffusion and a power supply line, and a third transistor electrically connected to the floating diffusion and a first potential line.

[0007] FIG. 1 is a block diagram illustrating an example of a schematic configuration of an imaging device, which is an example of a photodetector according to an embodiment of the present disclosure. FIG. 2 is a diagram illustrating an example of an arrangement of pixels in the imaging device according to an embodiment of the present disclosure. FIG. 3 is a diagram illustrating an example of a circuit configuration of a pixel in the imaging device according to an embodiment of the present disclosure. FIG. 4 is a diagram illustrating an example of a cross-sectional configuration of the imaging device according to an embodiment of the present disclosure. FIG. 5A is a diagram illustrating an example of a planar configuration of the imaging device according to an embodiment of the present disclosure. FIG. 5B is a diagram illustrating an example of a planar configuration of the imaging device according to an embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of a configuration of an imaging device according to a comparative example. FIG. 7 is a diagram illustrating an example of a configuration of the imaging device according to an embodiment of the present disclosure. FIG. 8A is a diagram illustrating an example of a layout of the imaging device according to an embodiment of the present disclosure. FIG. 8B is a diagram illustrating an example of a layout of the imaging device according to an embodiment of the present disclosure. FIG. 8C is a diagram illustrating an example of a layout of the imaging device according to an embodiment of the present disclosure. FIG. 8D is a diagram illustrating an example of a layout of the imaging device according to an embodiment of the present disclosure. FIG. 8E is a diagram illustrating an example of a layout of the imaging device according to an embodiment of the present disclosure. FIG. 9 is a diagram illustrating an example of an operation of the imaging device according to an embodiment of the present disclosure. FIG. 10 is a timing chart illustrating an example of an operation of an imaging device according to an embodiment of the present disclosure. FIG. 11 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to Modification 1 of the present disclosure. FIG. 12A is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 12B is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 1 of the present disclosure. FIG. 13 is a diagram illustrating an example of an arrangement of pixels of an imaging device according to Modification 2 of the present disclosure. FIG. 14 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to Modification 2 of the present disclosure. FIG. 15A is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 2 of the present disclosure. FIG. 15B is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 2 of the present disclosure. FIG. 16 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to Modification 3 of the present disclosure. FIG. 17A is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 3 of the present disclosure. FIG. 17B is a diagram illustrating an example of a planar configuration of an imaging device according to Modification 3 of the present disclosure.Fig. 18 is a diagram showing an example of a cross-sectional configuration of an imaging device according to a fourth modification of the present disclosure. Fig. 19 is a block diagram showing an example of the configuration of an electronic device having an imaging device. Fig. 20 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 21 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. Fig. 22 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. Fig. 23 is a block diagram showing an example of the functional configuration of a camera head and a CCU.

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. Embodiment 2. Modification 3. Application Example 4. Application Example

[0009] 1 is a block diagram showing an example of a schematic configuration of an imaging device that is an example of a photodetection device according to an embodiment of the present disclosure. The photodetection device is a device that can detect incident light. The imaging device 1 that is a photodetection device has a plurality of pixels P each having a photoelectric conversion unit (photoelectric conversion element) and is configured to photoelectrically convert incident light to generate a signal. The imaging device 1 can receive light that has passed through an optical system (not shown) that includes an optical lens and generate a signal.

[0010] The imaging device 1 is configured, for example, using a semiconductor substrate (e.g., a silicon substrate) on which a plurality of pixels P are provided. The photoelectric conversion unit of each pixel P of the imaging device 1 is, for example, a photodiode (PD) and is configured to be able to photoelectrically convert light. As an example, the imaging device 1 has, as an imaging area, a region (pixel unit 100) in which a plurality of pixels P are two-dimensionally arranged in a matrix.

[0011] The pixel section 100 of the imaging device 1 is a pixel array in which a plurality of pixels P are arranged, and can also be referred to as a light receiving region. The photoelectric conversion section of each pixel P can also be referred to as a photoelectric conversion region. The imaging device 1 captures incident light (image light) from a subject to be measured via an optical system including an optical lens. The imaging device 1 captures an image of the subject formed by the optical lens. The imaging device 1 can generate pixel signals by photoelectrically converting the received light (e.g., visible light, infrared light, etc.).

[0012] The imaging device 1 (photodetector) may be configured as an image sensor, for example. The imaging device 1 may be, for example, a complementary metal oxide semiconductor (CMOS) image sensor. The imaging device 1 may have a structure (a stacked structure) formed by stacking multiple semiconductor layers. The imaging device 1 may be used in various electronic devices, such as digital still cameras, video cameras, and mobile phones.

[0013] 1 , the imaging device 1 includes a pixel unit 100, a pixel control unit 110, a signal processing unit 112, a control unit 113, and a processing unit 114. The imaging device 1 is also provided with, for example, a plurality of control lines Lread and a plurality of signal lines VSL. The control lines Lread are signal lines capable of transmitting signals for controlling the pixels P, and are connected to the pixel control unit 110 and the pixels P of the pixel unit 100.

[0014] 1 , in the pixel unit 100, a plurality of control lines Lread are wired for each pixel row made up of a plurality of pixels P arranged in the horizontal direction (row direction). The control lines Lread are configured to transmit control signals for reading out signals from the pixels P. The control lines Lread can also be considered drive lines (pixel drive lines) that transmit signals for driving the pixels P.

[0015] The signal line VSL is a signal line capable of transmitting a signal from the pixel P, and is connected to the pixel P of the pixel unit 100 and the signal processing unit 112. In the pixel unit 100, for example, one or more signal lines VSL are wired for each pixel column formed by a plurality of pixels P aligned in the vertical direction (column direction).

[0016] The signal line VSL is configured to be able to transmit signals output from the pixels P. In the imaging device 1, multiple signal lines VSL may be provided for one pixel column. The imaging device 1 may have multiple signal lines VSL for each pixel column. The signal lines VSL may be configured using, for example, through electrodes, vias, etc.

[0017] The pixel control unit 110 is configured to be able to control each pixel P of the pixel unit 100. The pixel control unit 110 is a control circuit and is configured by a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The pixel control unit 110 generates signals for controlling the pixels P and outputs them to each pixel P of the pixel unit 100 via a control line Lread. The pixel control unit 110 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0018] The pixel control unit 110 generates signals for controlling the pixels P, such as signals for controlling each transistor of a readout circuit of the pixel P, and supplies the signals to each pixel P via a control line Lread. The pixel control unit 110 can control the reading of pixel signals from each pixel P. The pixel control unit 110 can also be referred to as a pixel driving unit configured to be able to drive each pixel P. The pixel control unit 110 and the control unit 113 can also be referred to collectively as a pixel control unit.

[0019] The signal processing unit 112 is configured to be able to perform signal processing of input pixel signals. The signal processing unit 112 is a signal processing circuit, and includes, for example, a load circuit unit, an AD conversion unit 80, a horizontal selection switch, etc. The signal processing unit 112 may also include an amplifier circuit unit configured to amplify signals read from the pixels P via the signal lines VSL.

[0020] The signal processing unit 112 includes a plurality of AD conversion units 80 (AD conversion circuits) and can output pixel signals converted into digital signals by the AD conversion units 80. The AD conversion units 80 are ADCs (Analog to Digital Converters). For example, an AD conversion unit 80 is provided for each of the plurality of signal lines VSL. An AD conversion unit 80 can be provided for each pixel column of the pixel unit 100.

[0021] The AD conversion unit 80 is configured to convert an input analog signal into a digital signal. The AD conversion unit 80 performs AD conversion processing on the pixel signal, which is an analog signal input from each pixel P via the signal line VSL. The AD conversion unit 80 (AD conversion circuit) includes, for example, a comparison circuit (comparator circuit) and a counter, and can convert the input pixel signal into a digital signal with a predetermined number of bits.

[0022] The signals output from each pixel P selected and scanned by the pixel control unit 110 are input to the signal processing unit 112 via signal lines VSL. The signal processing unit 112 can perform signal processing such as AD conversion of the signals from the pixel P and CDS (Correlated Double Sampling). The signals from each pixel P transmitted through each of the signal lines VSL are subjected to signal processing by the signal processing unit 112 and output to the processing unit 114.

[0023] The processing unit 114 is configured to be able to perform signal processing on the input signal. The processing unit 114 is a processing circuit, and is configured, for example, by a circuit that performs various types of signal processing on pixel signals. The processing unit 114 may include a processor and a memory. The processing unit 114 performs signal processing on pixel signals input from the signal processing unit 112 and outputs the processed pixel signals. The processing unit 114 can perform various types of signal processing, for example, noise reduction processing, gradation correction processing, etc.

[0024] The control unit 113 is configured to be able to control each unit of the imaging device 1. The control unit 113 receives an externally provided clock, data instructing an operation mode, etc., and can also output data such as internal information of the imaging device 1. The control unit 113 is a control circuit, and has, for example, a timing generator configured to be able to generate various timing signals.

[0025] The control unit 113 controls the driving of the pixel control unit 110, the signal processing unit 112, etc. based on various timing signals (pulse signals, clock signals, etc.) generated by the timing generator. The pixel control unit 110, the signal processing unit 112, the control unit 113, the processing unit 114, etc. may be provided on a single semiconductor substrate, or may be provided separately on multiple semiconductor substrates. The imaging device 1 may have a layered structure formed by stacking multiple substrates. Some or all of the signal processing unit 112, the control unit 113, and the processing unit 114 may be configured integrally.

[0026] 2 is a diagram showing an example of the arrangement of pixels in an imaging device according to an embodiment. A pixel P of the imaging device 1 includes a photoelectric conversion unit 12, a lens 31, and a filter 32. As shown in FIG. 2 , the incident direction of light from a subject is defined as the Z-axis direction, the left-right direction on the paper surface perpendicular to the Z-axis direction is defined as the X-axis direction, and the up-down direction on the paper surface perpendicular to the Z-axis and X-axis directions is defined as the Y-axis direction. In the following figures, directions may be indicated based on the directions of the arrows in FIG. 2 .

[0027] A pixel P of the imaging device 1 may have a plurality of photoelectric conversion units 12 (a first photoelectric conversion unit 12a and a second photoelectric conversion unit 12b in the example shown in FIG. 2). In each pixel P of the imaging device 1, for example, a plurality of photoelectric conversion units 12 are arranged adjacent to each other.

[0028] The second photoelectric conversion unit 12b is provided adjacent to the first photoelectric conversion unit 12a. It can be said that a pixel having the first photoelectric conversion unit 12a and a pixel having the second photoelectric conversion unit 12b are provided. Note that the pixel P may have three or more photoelectric conversion units 12. For example, the pixel P may be configured to include four or eight photoelectric conversion units 12.

[0029] In the imaging device 1, a lens 31 and a filter 32 may be provided on the side where light from an optical system such as an imaging lens is incident. The lens 31 (lens unit) is a lens that condenses light and is an optical member also called an on-chip lens. The lens 31 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of pixels P.

[0030] Light from a subject to be measured is incident on the lens 31 via an optical system such as an imaging lens. The lens 31 guides the incident light to the photoelectric conversion unit 12 of the pixel P. The photoelectric conversion unit 12 of the pixel P photoelectrically converts the light incident via the lens 31 and the filter 32.

[0031] The filter 32 is configured to selectively transmit light in a specific wavelength range from the incident light. The filter 32 is an RGB color filter, a filter that transmits infrared light, etc. The filter 32 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of multiple pixels P.

[0032] The plurality of pixels P provided in the pixel section 100 of the imaging device 1 include, for example, pixels (R pixels) provided with filters 32 that transmit red (R) light, pixels (G pixels) provided with filters 32 that transmit green (G) light, and pixels (B pixels) provided with filters 32 that transmit blue (B) light. In the pixel section 100, a plurality of R pixels, a plurality of G pixels, and a plurality of B pixels are repeatedly arranged.

[0033] The R, G, and B pixels are arranged according to a Bayer array, for example. The R, G, and B pixels can generate R, G, and B component pixel signals, respectively. The imaging device 1 can obtain RGB pixel signals. Note that the arrangement of the pixels P is not limited to the above example and can be set arbitrarily.

[0034] As an example, the R pixels, G pixels, and B pixels may each be arranged in 2×2 pixel units. In the pixel unit 100, for example, four adjacent R pixels, four adjacent G pixels, and four adjacent B pixels may be arranged repeatedly. It can also be said that the R pixels, G pixels, and B pixels are each periodically arranged in 2 rows and 2 columns.

[0035] The filter 32 provided in the pixel P of the pixel unit 100 is not limited to a primary color (RGB) color filter, but may be a complementary color filter such as Cy (cyan), Mg (magenta), or Ye (yellow). A filter corresponding to W (white), i.e., a filter that transmits light of the entire wavelength range of incident light, may also be provided. The filter 32 may also be a filter that transmits infrared light.

[0036] It should be noted that the filter 32 may be omitted as needed in the imaging device 1. The filter 32 may not be provided in some or all of the pixels P of the imaging device 1. For example, the filter 32 may not be provided in pixels that receive white (W) light and perform photoelectric conversion.

[0037] In the imaging device 1, one lens 31 may be provided for a plurality of photoelectric conversion units 12, for example, two photoelectric conversion units 12 (a first photoelectric conversion unit 12 a and a second photoelectric conversion unit 12 b). In the imaging device 1, the first photoelectric conversion unit 12 a and the second photoelectric conversion unit 12 b receive light that has passed through different regions of an optical system such as an imaging lens, and perform pupil division.

[0038] Phase difference data (phase difference information) can be obtained by using a first pixel signal based on the charges converted by the first photoelectric conversion unit 12 a and a second pixel signal based on the charges converted by the second photoelectric conversion unit 12 b. The phase difference data makes it possible to perform phase difference AF (autofocus). The pixels P (R pixels, G pixels, B pixels, etc.) of the imaging device 1 are pixels that can be used for phase difference detection and can also be called phase difference pixels (or phase difference detection pixels).

[0039] 3 is a diagram illustrating an example of a circuit configuration of a pixel of an imaging device according to an embodiment. A pixel P of the imaging device 1 includes a plurality of photoelectric conversion units 12 (a first photoelectric conversion unit 12a and a second photoelectric conversion unit 12b in FIG. 3), a plurality of transistors TRG (a transistor TRG1 and a transistor TRG2 in FIG. 3), a floating diffusion FD, and a readout circuit 20. As shown in FIG. 3, the pixel P also includes a transistor ADD.

[0040] The photoelectric conversion unit 12 is configured to receive light and generate a signal. The photoelectric conversion unit 12 is a light receiving unit (light receiving element) and is configured to be able to generate electric charges through photoelectric conversion. As an example, the pixel P has a first photoelectric conversion unit 12a and a second photoelectric conversion unit 12b. In the example shown in FIG. 3 , the first photoelectric conversion unit 12a is a first photodiode (PD1) that converts incident light into electric charges.

[0041] The second photoelectric conversion unit 12b is a second photodiode (PD2) that converts incident light into electric charges. The first photoelectric conversion unit 12a (photodiode PD1) and the second photoelectric conversion unit 12b (photodiode PD2) each perform photoelectric conversion to generate electric charges according to the amount of received light.

[0042] The transistor TRG (transistors TRG1 and TRG2 in FIG. 3) is a transfer transistor and is configured to be able to transfer charges photoelectrically converted in the photoelectric conversion unit 12 to the floating diffusion FD. The transistor TRG is controlled by a signal STRG to electrically connect or disconnect the photoelectric conversion unit 12 and the floating diffusion FD. The transistor TRG can transfer charges photoelectrically converted and accumulated in the photoelectric conversion unit 12 to the floating diffusion FD.

[0043] 3, the pixel P includes a transistor TRG1 and a transistor TRG2. The transistors TRG1 and TRG2 are controlled by different signals. The transistor TRG1 is turned on and off by a signal STRG1. The transistor TRG2 is turned on and off by a signal STRG2.

[0044] The transistor TRG1 is controlled by a signal STRG1 to electrically connect or disconnect the first photoelectric conversion unit 12a and the floating diffusion FD. The transistor TRG1 can transfer charges that are photoelectrically converted and stored in the first photoelectric conversion unit 12a to the floating diffusion FD.

[0045] The transistor TRG2 is controlled by a signal STRG2 to electrically connect or disconnect the second photoelectric conversion unit 12 b and the floating diffusion FD. The transistor TRG2 can transfer the charge that is photoelectrically converted and accumulated in the second photoelectric conversion unit 12 b to the floating diffusion FD.

[0046] The floating diffusion FD is an accumulation unit configured to be able to accumulate transferred charges. The floating diffusion FD can accumulate charges photoelectrically converted by the photoelectric conversion unit 12. The floating diffusion FD can also be considered a holding unit capable of holding the transferred charges. The floating diffusion FD accumulates the transferred charges and converts them into a voltage according to the capacitance C of the floating diffusion FD.

[0047] The readout circuit 20 is configured to be able to output a signal based on the photoelectrically converted charges. The readout circuit 20 is configured to be able to output a signal (first pixel signal) based on the charges generated by the first photoelectric conversion unit 12 a and a signal (second pixel signal) based on the charges generated by the second photoelectric conversion unit 12 b. The readout circuit 20 can also read out a pixel signal corresponding to the charges obtained by adding together the charges converted by the first photoelectric conversion unit 12 a and the charges converted by the second photoelectric conversion unit 12 b.

[0048] 3, the readout circuit 20 includes, for example, a transistor AMP, a transistor SEL, and a transistor RST. The readout circuit 20 may also include a transistor ADD. The transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion FD. The transistor AMP is an amplifying transistor, and can generate and output a signal based on the charge converted by the photoelectric conversion unit 12.

[0049] 3, the gate of the transistor AMP is electrically connected to the floating diffusion FD, and the voltage converted by the floating diffusion FD is input thereto. In the example shown in FIG. 3, the drain of the transistor AMP is connected to a power supply line to which a power supply voltage VDD is supplied. The source of the transistor AMP is connected to a signal line VSL via a transistor SEL.

[0050] The source of the transistor AMP is electrically connected to a load circuit section 25 provided for the signal line VSL. In the example shown in Fig. 3, the load circuit section 25 is configured with a current source 26 capable of supplying current to the transistor AMP. The current source 26 of the load circuit section 25 configures, for example, a source follower circuit together with the transistor AMP.

[0051] The transistor AMP is configured to generate a signal based on the charge accumulated in the floating diffusion FD, i.e., a signal based on the voltage of the floating diffusion FD, and output the signal to a signal line VSL. Note that the readout circuit 20 may be configured to include a current source 26.

[0052] The transistor SEL is configured to be able to control the output of a pixel signal. The transistor SEL is electrically connected in series to the transistor AMP, for example, as in the example shown in Figure 3. The transistor SEL is controlled by a signal SSEL and is configured to be able to output a signal from the transistor AMP to a signal line VSL. The transistor SEL is a selection transistor and can control the output timing of the pixel signal.

[0053] The transistor SEL is configured to be able to output a signal based on the charge converted by the photoelectric conversion unit 12. The transistor SEL can output a pixel signal (first pixel signal, second pixel signal, etc.) of the pixel P to the signal line VSL. The transistor SEL may be provided between the power supply line to which the power supply voltage VDD is applied and the transistor AMP. Furthermore, the transistor SEL may be omitted as necessary.

[0054] The transistor RST is configured to be able to reset the voltage of the floating diffusion FD. In the example shown in Fig. 3, the transistor RST is electrically connected to a power supply line to which a power supply voltage VDD is applied, and is configured to reset the charge of the pixel P. The transistor RST is a reset transistor.

[0055] The transistor RST is controlled by a signal SRST to reset the charge accumulated in the floating diffusion FD and to reset the potential of the floating diffusion FD. For example, a power supply voltage VDD is applied to a power supply line connected to the transistor RST, and the power supply voltage VDD can be supplied to the floating diffusion FD by the transistor RST.

[0056] The transistor RST electrically connects the floating diffusion FD to a power supply line to which a power supply voltage VDD is applied, and can discharge charges accumulated in the floating diffusion FD. The transistor RST can also discharge charges accumulated in the photoelectric conversion unit 12 via the transistor TRG.

[0057] The transistor ADD is electrically connected between the floating diffusion FD and a reference potential line L1. The reference potential line L1 is a wiring to which a predetermined potential (voltage) is applied. The reference potential line L1 is a wiring to which a fixed potential is applied, a wiring to which a ground potential is applied, or the like. The reference potential line L1 may be, for example, a ground line. A specific potential, for example, a ground potential (GND potential), may be supplied to the reference potential line L1. In the example shown in FIG. 3 , the reference potential line L1 is a wiring to which a voltage VSS is applied.

[0058] The transistor ADD is configured to be able to electrically connect the floating diffusion FD and the reference potential line L1. For example, the transistor ADD is controlled by a signal SADD to electrically connect or disconnect the floating diffusion FD and the reference potential line L1 to which a constant voltage (potential) is applied.

[0059] As an example, one of the source and drain of the transistor ADD, for example, the source of the transistor ADD, is electrically connected to the reference potential line L1. A voltage VSS (for example, 0 V) ​​is applied to the source of the transistor ADD. The other of the source and drain of the transistor ADD, for example, the drain of the transistor ADD, is electrically connected to the floating diffusion FD.

[0060] The transistor ADD is controlled to be turned on and off by a signal SADD, and can electrically connect the floating diffusion FD and the reference potential line L1. In the example shown in Figure 3, when the transistor ADD is turned on, the floating diffusion FD and the reference potential line L1 are electrically connected. In this case, the voltage VSS is supplied to the floating diffusion FD via the transistor ADD.

[0061] The above-mentioned transistors TRG, AMP, SEL, RST, and ADD are each a MOS transistor (MOSFET) having a gate, a source, and a drain terminal. In the example shown in Figure 3, the transistors TRG, AMP, SEL, RST, and ADD are each configured as an NMOS transistor. Note that the transistor of pixel P may be configured as a PMOS transistor.

[0062] The pixel control unit 110 (see Figure 1) of the imaging device 1 supplies control signals to the gates of the transistors TRG, SEL, RST, ADD, etc. of each pixel P via the control line Lread described above, turning the transistors on (conducting state) or off (non-conducting state).

[0063] The plurality of control lines Lread for each pixel row of the imaging device 1 includes, for example, a line for transmitting a signal STRG1 that controls the transistor TRG1, a line for transmitting a signal STRG2 that controls the transistor TRG2, etc. The plurality of control lines Lread also includes a line for transmitting a signal SSEL that controls the transistor SEL, a line for transmitting a signal SRST that controls the transistor RST, a line for transmitting a signal SADD that controls the transistor ADD, etc.

[0064] The transistors TRG, SEL, RST, ADD, etc. are controlled to be turned on and off by the pixel control unit 110. The pixel control unit 110 controls the readout circuit 20 of each pixel P to output a pixel signal from each pixel P to a signal line VSL. The pixel control unit 110 can control the reading out of the pixel signal of each pixel P to the signal line VSL.

[0065] Fig. 4 is a diagram showing an example of a cross-sectional configuration of an imaging device according to an embodiment. Also, Figs. 5A and 5B are diagrams showing an example of a planar configuration of an imaging device according to an embodiment. For example, as shown in Fig. 4 , imaging device 1 has a first layer 201, a second layer 202, and a third layer 203. Imaging device 1 has a configuration in which first layer 201 (first layer), second layer 202 (second layer), and third layer 203 (third layer) are stacked in the Z-axis direction.

[0066] The first layer 201 includes, for example, a semiconductor layer 101 and a wiring layer 111. The second layer 202 includes a semiconductor layer 102, a wiring layer 121, and a wiring layer 122. The third layer 203 includes a semiconductor layer 103 and a wiring layer 131. Fig. 5A shows an example of the planar configuration of the semiconductor layer 101 and the wiring layer 111 of the image pickup device 1. Fig. 5B shows an example of the planar configuration of the semiconductor layer 102 and the wiring layer 121 of the image pickup device 1.

[0067] 4, provided from the light incident side are a semiconductor layer 101, a wiring layer 111, a wiring layer 121, a semiconductor layer 102, a wiring layer 122, a wiring layer 131, and a semiconductor layer 103. The semiconductor layer 101, the semiconductor layer 102, and the semiconductor layer 103 are each formed of a semiconductor substrate (for example, a silicon substrate, an SOI (Silicon On Insulator) substrate, etc.).

[0068] The semiconductor layer 101 and the wiring layer 111 can be collectively referred to as a first substrate. The semiconductor layer 102, the wiring layer 121, and the wiring layer 122 can be collectively referred to as a second substrate. Furthermore, the semiconductor layer 103 and the wiring layer 131 can be collectively referred to as a third substrate.

[0069] As shown in FIG. 4 , the semiconductor layer 101 has opposing surfaces 11S1 and 11S2. The surface 11S2 is the surface opposite to the surface 11S1. The surface 11S2 of the semiconductor layer 101 is a light-receiving surface (light incident surface). In the semiconductor layer 101, a plurality of photoelectric conversion units 12 (photoelectric conversion elements) are provided along the surfaces 11S1 and 11S2 of the semiconductor layer 101. In the semiconductor layer 101, for example, a plurality of first photoelectric conversion units 12a and second photoelectric conversion units 12b are embedded and formed.

[0070] The semiconductor layer 102 has opposing surfaces 12S1 and 12S2. The surface 12S2 of the semiconductor layer 102 is the surface opposite to the surface 12S1. The semiconductor layer 103 has opposing surfaces 13S1 and 13S2. The surface 13S2 of the semiconductor layer 103 is the surface opposite to the surface 13S1. The surfaces 11S1, 12S1, and 13S1 are, for example, element formation surfaces on which elements such as transistors are formed. A gate electrode, a gate insulating film (e.g., a gate oxide film), etc. may be provided on each of the surfaces 11S1, 12S1, and 13S1.

[0071] 4 illustrates transistors TRG1, TRG2, transistor AMP, transistor SEL, transistor RST, transistor ADD, etc. of pixel P. Transistors TRG1, TRG2, and a floating diffusion FD are formed on the surface 11S1 side of the semiconductor layer 101. Transistors (transistors AMP, SEL, RST), transistor ADD, etc. of the readout circuit 20 are provided on the surface 12S1 side of the semiconductor layer 102.

[0072] A wiring layer 111 is provided on the surface 11S1 side of the semiconductor layer 101. A wiring layer 121 is provided on the surface 12S1 side of the semiconductor layer 102, and a wiring layer 122 is provided on the surface 12S2 side of the semiconductor layer 102. A wiring layer 131 is provided on the surface 13S1 side of the semiconductor layer 103. The wiring layers 111, 121, 122, and 131 each include, for example, a conductor film and an insulating film, and have a plurality of wirings and vias (VIAs) and the like.

[0073] The wiring layers 111, 121, 122, and 131 each have a configuration in which, for example, a plurality of wirings are stacked with insulating films (interlayer insulating films) between them. Each insulating film of the wiring layers 111, 121, 122, and 131 can also be referred to as an interlayer insulating film (interlayer insulating layer). As an example, each of the wiring layers 111, 121, 122, and 131 includes two or more layers of wirings.

[0074] The wiring of each of the wiring layers 111, 121, 122, and 131 is formed using a metal material such as aluminum (Al), tungsten (W), or copper (Cu). Note that the wiring of each of the wiring layers 111, 121, 122, and 131 may be formed using polysilicon (Poly-Si) or other conductive materials. The interlayer insulating film is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or the like.

[0075] The semiconductor layer 101 and the wiring layer 111 can be collectively referred to as the semiconductor layer 101 (or the first circuit layer). The semiconductor layer 102 and the wiring layers 121 and 122 can be collectively referred to as the semiconductor layer 102 (or the second circuit layer). Furthermore, the semiconductor layer 103 and the wiring layer 131 can be collectively referred to as the semiconductor layer 103 (or the third circuit layer).

[0076] A plurality of electrodes 91 are provided on the wiring layer 111, and a plurality of electrodes 92 are provided on the wiring layer 121. A plurality of electrodes 93 are provided on the wiring layer 122, and a plurality of electrodes 94 are provided on the wiring layer 131. The electrodes 91, 92, 93, and 94 are each an electrode (metal electrode) formed using, for example, copper (Cu).

[0077] The electrodes 91, 92, 93, and 94 are used to bond metal electrodes together, and can also be called bonding electrodes. As an example, the semiconductor layer 101 and the semiconductor layer 102 are bonded together by bonding between the metal electrodes (electrodes 91 and 92) made of Cu, i.e., by Cu-Cu bonding.

[0078] The semiconductor layer 101 and the semiconductor layer 102 are stacked such that the surfaces 11S1 and 12S1 on which elements such as transistors are formed face each other due to the bonding between the electrodes. That is, the semiconductor layer 101 and the semiconductor layer 102 are bonded such that the surface of the semiconductor layer 101 and the surface of the semiconductor layer 102 face each other.

[0079] Furthermore, the semiconductor layer 102 and the semiconductor layer 103 are bonded together by bonding between the electrodes 93 and 94 made of Cu, i.e., by Cu-Cu bonding. As an example, the semiconductor layer 102 and the semiconductor layer 103 are stacked such that the surface 12S2 and the surface 13S1 face each other by bonding between the electrodes. That is, the semiconductor layer 102 and the semiconductor layer 103 are bonded together such that the back surface of the semiconductor layer 102 and the front surface of the semiconductor layer 103 face each other.

[0080] The electrodes 91 and 92 electrically connect the circuit provided on the semiconductor layer 101 side to the circuit provided on the semiconductor layer 102 side. The electrodes 93 and 94 electrically connect the circuit of the semiconductor layer 102 to the circuit of the semiconductor layer 103. Note that the semiconductor layer 103 and the wiring layer 131 may be provided with, for example, the pixel control unit 110, the signal processing unit 112, the control unit 113, the processing unit 114, and the like described above.

[0081] The electrodes 91, 92, 93, and 94 may each be made of a metal material other than copper, such as nickel (Ni), cobalt (Co), or gold (Au), or may be made of other materials. Also, a first layer 201 including the semiconductor layer 101, a second layer 202 including the semiconductor layer 102, and a third layer 203 including the semiconductor layer 103 may be stacked using bumps.

[0082] It should be noted that a plurality of through electrodes may be provided in the semiconductor layer 102 of the imaging device 1. The through electrodes are connection electrodes (connection portions) that connect circuits provided in different layers. In the imaging device 1, for example, a plurality of through electrodes are provided for each pixel P or for each of multiple pixels P. The through electrodes are formed using a metal material such as tungsten, aluminum, or copper, and are provided so as to penetrate the semiconductor layer 102. In the imaging device 1, for example, the readout circuit 20 of the pixel P is electrically connected to a circuit provided in the semiconductor layer 103 via the through electrodes and electrodes 93, 94, etc.

[0083] 4, the lens 31 and filter 32 described above are provided on the surface 11S2 side of the semiconductor layer 101. The lens 31, filter 32, etc. are provided on the side where light from the optical system is incident, and the wiring layer 111 is provided on the side opposite to the light incident side. The lens 31 and filter 32 are stacked on the semiconductor layer 101 in a thickness direction perpendicular to the surface 11S2 of the semiconductor layer 101.

[0084] The lens 31 and the filter 32 are provided on the surface 11S2 side of the semiconductor layer 101, for example, for each pixel P or for each set of pixels P. As an example, the filter 32 is formed between the lens 31 and the semiconductor layer 101. The first photoelectric conversion unit 12a and the second photoelectric conversion unit 12b perform photoelectric conversion on light incident via the lens 31 and the filter 32, respectively.

[0085] 4, 5A, etc., the imaging device 1 is provided with a separation portion 41 and a separation portion 42. The separation portion 41 is provided between adjacent pixels P in the semiconductor layer 101, and separates the pixels P (or the photoelectric conversion portions 12). At least a portion of the separation portion 41 is provided at the boundary between adjacent pixels P. The separation portion 41 is formed using, for example, a trench (groove portion).

[0086] The separation portion 41 can be formed in the semiconductor layer 101 so as to surround the first photoelectric conversion portion 12a and the second photoelectric conversion portion 12b of each pixel P. The separation portion 41 is provided so as to penetrate the semiconductor layer 101, for example, as in the example shown in FIG. 4. The separation portion 41 is formed so as to reach the surface 11S1 of the semiconductor layer 101, and penetrates the semiconductor layer 101. The separation portion 41 can also be called a pixel separation portion or a pixel separation wall.

[0087] The isolation portion 42 is provided between adjacent photoelectric conversion portions 12 to separate the photoelectric conversion portions 12. The isolation portion 42 is configured using, for example, a trench. In the example shown in FIG. 4 etc., the isolation portion 42 is formed between the first photoelectric conversion portion 12a and the second photoelectric conversion portion 12b. The isolation portion 42 is provided from the surface 11S2 side of the semiconductor layer 101 to between the surface 11S2 and the surface 11S1 of the semiconductor layer 101. Note that the isolation portion 42 may be provided so as to penetrate the semiconductor layer 101.

[0088] An insulating film, such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film, is provided in each trench of the isolation portion 41 and the isolation portion 42. Polysilicon, a metal material, another insulating material, or the like may be embedded in the trenches of the isolation portion 41 and the isolation portion 42. At least one of the isolation portions 41 and 42 may be configured of a semiconductor region (a p-type semiconductor region or an n-type semiconductor region) formed by ion implantation.

[0089] The separation portions 41 and 42 may each be formed using another insulating material having a low refractive index. A gap (cavity) may be provided within the trench of at least one of the separation portions 41 and 42. In the imaging device 1, the separation portions 41 and 42 are provided, thereby preventing the charge photoelectrically converted in the photoelectric conversion portion 12 of the pixel P from leaking to the surrounding pixels P (or the photoelectric conversion portion 12). Furthermore, leakage of light to the surrounding pixels P can be prevented.

[0090] In the imaging device 1, as shown in Figures 4, 5A, 5B, etc., the photoelectric conversion unit 12, transistor TRG, and floating diffusion FD of each pixel P are provided in a first layer 201. The transistors (transistors AMP, SEL, RST, etc.) of the readout circuit 20 are provided in a second layer 202. In the imaging device 1, the photoelectric conversion unit 12 and the readout circuit 20 are arranged in separate layers. Therefore, the imaging device 1 can have a structure that is advantageous for miniaturizing pixels.

[0091] The charges photoelectrically converted by the photoelectric conversion unit 12 in the semiconductor layer 101 are transferred via the transistor TRG to the floating diffusion FD in the semiconductor layer 101 and the readout circuit 20 in the semiconductor layer 102. The readout circuit 20 can generate a pixel signal based on the charges converted by the photoelectric conversion unit 12 and output the pixel signal to the signal processing unit 112 in the semiconductor layer 103 via the signal line VSL.

[0092] In the imaging device 1, the floating diffusion FD of the pixel P of the semiconductor layer 101 is electrically connected to the transistor AMP, the transistor RST, and the like of the semiconductor layer 102 via a wiring 71 of the wiring layer 111 and a wiring 72 of the wiring layer 121, as in the example shown in Fig. 4 etc. The wiring 71 and the wiring 72 may be configured to include contacts, vias, and the like.

[0093] 4, the wiring 71 and the wiring 72 are provided, for example, for each pixel P or for each set of pixels P. The wirings 71 and 72 are provided so as to extend in the stacking direction (the Z-axis direction in FIG. 4). In the wiring layer 111 and the wiring layer 121, for example, a plurality of wirings 71 and a plurality of wirings 72 are arranged so as to line up in the X-axis direction and the Y-axis direction, respectively.

[0094] The floating diffusion FD and the wirings 71 and 72 can be collectively referred to as the floating diffusion FD. The wirings 71 and 72 are each part of the floating diffusion FD and can also be referred to as FD wiring. In the wiring layer 111 and the wiring layer 121, FD wiring is provided for each pixel P so that the wirings are adjacent to each other at a predetermined interval. The floating diffusion FD (FD wiring) can include electrodes 91 and 92.

[0095] As shown in FIGS. 4 and 5B, the imaging device 1 includes a transistor ADD electrically connected to the floating diffusion FD (see also FIG. 3). The transistor ADD is provided, for example, in the second layer 202. The transistor ADD may also be provided in the first layer 201. The transistor ADD may also be disposed around the transistor TRG1 or the transistor TRG2 on the surface 11S1 side of the semiconductor layer 101.

[0096] The transistor ADD is configured to electrically connect the floating diffusion FD to the reference potential line L1. Therefore, the floating diffusion FD (FD wiring) of any pixel P, for example, some of a plurality of adjacent pixels P, can be electrically connected to the reference potential line L1, and the floating diffusion FD can function as a shield wiring. This makes it possible to suppress crosstalk between the plurality of FD wirings.

[0097] If the imaging device 1 did not have a transistor ADD, crosstalk could occur between the floating diffusion FD of a pixel P and the floating diffusion FD of a surrounding pixel P, as schematically shown by the dashed arrows in Figure 6. For example, noise caused by interference between FD wirings could be mixed into the voltage signal of the floating diffusion FD of the pixel P to be read out, degrading the signal quality of the pixel signal. For example, noise in the power supply voltage VDD could propagate via the transistor RST and FD wiring of a certain pixel P to the FD wiring of another pixel P, increasing the noise component mixed into the pixel signal.

[0098] Therefore, as described above, the imaging device 1 according to the present embodiment is provided with the transistor ADD. This allows the floating diffusion FD (FD wiring) of any pixel P to be electrically connected to the reference potential line L1 to which a voltage different from the power supply voltage VDD is applied. This allows the floating diffusion FD (FD wiring) to be used as a shield section (shield area).

[0099] The pixel control unit 110 (see FIG. 1 ) of the imaging device 1 controls the transistor ADD so that, for example, a floating diffusion FD provided for a pixel P that is not to be read out is electrically connected to the reference potential line L1. As an example, when a pixel signal is read out from the central pixel P of the three pixels P shown in FIG. 7 , the pixel control unit 110 can perform control so that the FD wiring of each of the left and right pixels P adjacent to the central pixel P is electrically connected to the reference potential line L1.

[0100] 7 , the voltage VSS is applied to each of the FD wirings (wirings 71, 72, etc.) of the left and right pixels P that are not to be read out by the reference potential line L1 and the transistor ADD. Each of the FD wirings of the left and right pixels P can function as shield wiring. Therefore, in the imaging device 1, crosstalk between multiple FD wirings can be suppressed. It is also possible to suppress noise from being mixed into the pixel signal of the center pixel P that is to be read out.

[0101] When multiple FD wirings are arranged adjacent to each other, the provision of a transistor ADD can suppress coupling between the FDs. Crosstalk (e.g., propagation of power supply noise, etc.) can be suppressed. By using the transistor ADD, crosstalk can be reduced regardless of the pitch (arrangement interval) of the joining wirings 71, 72, vias (VIA), etc. Even in the case of fine pixels in particular, it is possible to suppress noise from being mixed into pixel signals, thereby improving the quality of the pixel signals.

[0102] Figures 8A to 8E are diagrams showing layout examples of an imaging device according to an embodiment. Figure 8A shows a layout example of layer portion 51 of first layer 201 shown in Figure 4. Figure 8B shows a layout example of layer portion 52 of first layer 201. Figure 8C shows a layout example of layer portion 61 of second layer 202 shown in Figure 4. Figure 8D shows a layout example of layer portion 62 of second layer 202, and Figure 8E shows a layout example of layer portion 63 of second layer 202.

[0103] 8A, a layer portion 51 of the first layer 201 is provided with a transistor TRG1, a transistor TRG2, a floating diffusion FD, etc. As shown in FIGS. 8A and 8B, a wiring for transmitting a signal STRG1 and a wiring for transmitting a signal STRG2 are provided by wiring in the layer portion 51 and wiring in the layer portion 52. In addition, a wiring 71 serving as an FD wiring is provided. The wiring for transmitting the signal STRG1 is electrically connected to the gate of the transistor TRG1, and the wiring for transmitting the signal STRG2 is electrically connected to the gate of the transistor TRG2.

[0104] 8C , the layer portion 61 of the second layer 202 is provided with the transistors AMP, SEL, RST, ADD, etc. The wiring of the layer portion 61 provides wiring for transmitting the signal SSEL, a power supply line for supplying the power supply voltage VDD, etc. In the examples shown in FIGS. 8C and 8D , the wiring of the layer portion 61 and the wiring of the layer portion 62 provide a reference potential line L1.

[0105] 8E, wiring for transmitting signal SADD, signal line VSL, etc. are provided by wiring in layer portion 62 and wiring in layer portion 63, etc. In the example shown in FIGS. 8C to 8E, wiring for transmitting signal SADD1 and wiring for transmitting signal SADD2 are provided as control signals for controlling transistor ADD. Also, wiring 72 is provided as FD wiring.

[0106] 8C to 8E, the gate of the transistor ADD of each pixel P is electrically connected to the wiring that transmits the signal SADD1 or the wiring that transmits the signal SADD2. This makes it possible to individually (independently) control the transistor ADD to which the signal SADD1 is input and the transistor ADD to which the signal SADD2 is input. Note that the number and arrangement of the control signals for the transistor ADD are not limited to the examples shown in the drawings.

[0107] Fig. 9 is a diagram for explaining an example of operation of an imaging device according to an embodiment. Fig. 10 is a timing chart showing an example of operation of an imaging device according to an embodiment. Fig. 9 schematically illustrates 4 x 4 pixels, with the pixel P in the upper left corner being pixel P11 in the first row and first column, and the pixel P in the lower right corner being pixel P44 in the fourth row and fourth column. Note that only 4 x 4 pixels in a partial region of the pixel unit 100 are illustrated, and other pixels P may also exist, for example, to the left of pixel P11 or above pixel P11.

[0108] The pixel control unit 110 of the imaging device 1 can, for example, scan pixels row by row to read out pixel signals. The pixel control unit 110 is configured to be able to sequentially select pixels row by row or multiple rows and read out pixel signals. As an example, the pixel control unit 110 can turn off the transistors SEL of the pixels P (pixels P11 to P14, pixels P31 to P44) in non-selected rows, while reading out pixel signals from the pixels P (pixels P22 and P24) to be read out to the signal line VSL.

[0109] The timing chart shown in Figure 10 (A) shows, with the horizontal axis representing time, the control signals (drive signals) supplied to the pixels P (pixels P21 and P23) in the selected row that are not to be read out, and the voltages of the floating diffusions FD of the pixels P that are not to be read out (referred to as voltage VFD).

[0110] 10B shows the control signals supplied to the pixels P (pixels P22 and P24) to be read out among the pixels P in the selected row, and the voltage VFD of the floating diffusion FD of the pixels P to be read out. In FIGS. 10A and 10B, a transistor to which a high-level control signal is input is turned on (conductive), and a transistor to which a low-level control signal is input is turned off (non-conductive).

[0111] 10A and 10B, at time t1, the signal SRST goes high. When the signal SRST goes high, the transistor RST goes on, and the power supply line that supplies the power supply voltage VDD is electrically connected to the floating diffusion FD. This causes the charge in the floating diffusion FD to be discharged, and the voltage VFD of the floating diffusion FD is reset. At time t2, the signal SRST goes low, and the transistor RST goes off.

[0112] 10A, at time t3, the signal SADD (e.g., signal SADD1) input to pixel P21 and pixel P23 goes high. When the signal SADD goes high, the transistor ADD goes on, and the reference potential line L1, to which the voltage VSS is applied, is electrically connected to the floating diffusion FD. As a result, the voltage VFD of the floating diffusion FD becomes the voltage VSS.

[0113] Furthermore, the signal SADD (for example, the signal SADD2) input to the pixel P22 and the pixel P24 is at a low level as shown in Fig. 10B, so that the transistors ADD of the pixels P22 and P24 are turned off.

[0114] At time t4, the signal SSEL input to pixels P21 to P24 goes high. When the signal SSEL goes high, the transistors SEL of the pixels P21 to P24, which become the pixels P in the selected row, are turned on. The signal SSEL supplied to pixels P11 to P14 and pixels P31 to P44 is set to low.

[0115] 10B, at time t5, the signal STRG input to pixel P22 and pixel P24 goes high. When the signal STRG goes high, the transistor TRG is turned on, and the photoelectric conversion unit 12 and the floating diffusion FD are electrically connected. The charge photoelectrically converted and accumulated in the photoelectric conversion unit 12 is transferred to the floating diffusion FD.

[0116] 3, in the pixel P22 and pixel P24, when the signal STRG1 goes high and is turned on, charge transfer is performed from the first photoelectric conversion unit 12a. When the signal STRG2 goes high and is turned on, charge transfer is performed from the second photoelectric conversion unit 12b.

[0117] Because the transistor SEL of pixel P22 is on, a pixel signal corresponding to the voltage VFD of the floating diffusion FD of pixel P22 is output by the transistor AMP to the signal line VSL connected to pixel P22. Moreover, because the transistor SEL of pixel P24 is also on, a pixel signal corresponding to the voltage VFD of the floating diffusion FD of pixel P24 is output by the transistor AMP to the signal line VSL connected to pixel P24.

[0118] When pixel signals are read from the pixel P22 and pixel P24 to be read, the floating diffusions FD of the pixels P not to be read around the pixel P22 and pixel P24 are in a state in which the voltage VSS is applied via the transistor ADD. Therefore, the floating diffusions FD of the pixels P not to be read can function as shield portions. This can suppress crosstalk between pixels. It is also possible to suppress noise from being mixed into the pixel signals to be read.

[0119] 10A and 10B, the signal SSEL goes low, turning the transistor SEL off. Note that, in the period after time t6, the transistor ADD is turned on in the pixels P that are not to be read, and pixel signals can be read out in order starting from the pixels P that are to be read.

[0120] In this way, in the imaging device 1 according to the present embodiment, by providing the transistor ADD, it is possible to suppress crosstalk between a plurality of floating diffusions FD (FD wirings). This prevents noise from being mixed into the voltage signal of the floating diffusion FD in the pixel P to be read out, thereby suppressing degradation of signal quality. It is also possible to suppress degradation of the image quality of an image generated using pixel signals.

[0121] [Actions and Effects] The photodetector according to this embodiment includes a first layer (first layer 201) having a photoelectric conversion unit (photoelectric conversion unit 12) that photoelectrically converts light and a floating diffusion (floating diffusion FD) that accumulates the charge converted by the photoelectric conversion unit, a second layer (second layer 202) stacked with the first layer and having a first transistor (transistor AMP) that outputs a first signal based on the charge accumulated in the floating diffusion, a second transistor (transistor RST) electrically connected to the floating diffusion and a power supply line, and a third transistor (transistor ADD) electrically connected to the floating diffusion and a first potential line (reference potential line L1).

[0122] The photodetector (image capture device 1) according to this embodiment includes a transistor ADD electrically connected to the floating diffusion FD and the reference potential line L1. This prevents crosstalk from occurring, making it possible to realize a photodetector capable of preventing degradation of signal quality.

[0123] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0124] <2. Modifications> (2-1. Modification 1) In the above-described embodiment, an example configuration of the imaging device 1 has been described, but this is merely an example, and the configuration of the imaging device 1 is not limited to the above-described example. FIG. 11 is a diagram for explaining an example circuit configuration of a pixel of an imaging device according to Modification 1 of the present disclosure. FIGS. 12A and 12B are diagrams for explaining an example planar configuration of the imaging device. FIG. 12A shows an example planar configuration of a first layer 201 of the imaging device 1, and FIG. 12B shows an example planar configuration of a second layer 202 of the imaging device 1.

[0125] A pixel P of the imaging device 1 may have four or more photoelectric conversion units 12. For example, as shown in FIGS. 11 and 12A , the pixel P may be configured to include eight photoelectric conversion units 12 (first to eighth photoelectric conversion units 12 a to 12 h) and eight transistors TRG (transistors TRG1 to TRG8). Each transistor of the readout circuit 20 may be formed in the second layer 202, as in the example shown in FIG. 12B . Note that the readout circuit 20 may be provided separately in the first layer 201 and the second layer 202.

[0126] (2-2. Modification 2) Fig. 13 is a diagram showing an example of the arrangement of pixels in an imaging device according to Modification 2. Fig. 14 is a diagram for explaining an example of the circuit configuration of pixels in an imaging device according to Modification 2. Figs. 15A and 15B are diagrams for explaining an example of the planar configuration of an imaging device. Fig. 15A shows an example of the planar configuration of a first layer 201 of an imaging device 1, and Fig. 15B shows an example of the planar configuration of a second layer 202 of an imaging device 1.

[0127] 13 , each of the plurality of pixels P of the imaging device 1 may have one photoelectric conversion unit 12. In the imaging device 1, for example, one lens 31 and one filter 32 are provided for one photoelectric conversion unit 12. A readout circuit 20 may be provided for the plurality of pixels P. The imaging device 1 may have a configuration in which the plurality of pixels P share one readout circuit 20.

[0128] In the example shown in FIG. 14 etc., a readout circuit 20 is arranged for every four pixels P (referred to as pixel Pa, pixel Pb, pixel Pc, and pixel Pd). Pixel Pa, pixel Pb, pixel Pc, and pixel Pd share one readout circuit 20. For example, 2×2 pixels formed by adjacent pixels Pa to Pd share one readout circuit 20. As an example, as shown in the example of FIG. 15B , the readout circuit 20 is provided for a 2×2 pixel area that shares the readout circuit 20. The multiple pixels P that share one readout circuit 20 can also be referred to as a pixel unit (or pixel block).

[0129] The imaging device 1 can read out pixel signals of each of the 2×2 pixels by operating the readout circuit 20 in a time-division manner. The imaging device 1 can also read out a pixel signal obtained by adding together the signals of each of the 2×2 pixels. The imaging device 1 may also have a configuration in which five or more pixels P, for example, eight pixels P, share one readout circuit 20. In this modified example, the same effects as those of the above-described embodiment can be obtained.

[0130] (2-3. Modification 3) Fig. 16 is a diagram for explaining an example of the circuit configuration of a pixel of an imaging device according to Modification 3. Figs. 17A and 17B are diagrams for explaining an example of the planar configuration of an imaging device according to Modification 3. Fig. 17A shows an example of the planar configuration of a first layer 201 of the imaging device 1, and Fig. 17B shows an example of the planar configuration of a second layer 202 of the imaging device 1.

[0131] 16 and 17A, the transistor ADD may be provided in the first layer 201. For example, the transistor ADD may be formed around the floating diffusion FD and the transistor TRG on the surface 11S1 side of the semiconductor layer 101. Note that, as in the example shown in FIG. 17A, a plurality of transistors ADD (transistor ADD1 and transistor ADD2 in FIG. 17A) connected in parallel to each other may be provided.

[0132] In the imaging device 1 according to this modification, by disposing the transistor ADD on the first layer 201, it is possible to ensure a sufficient area for disposing the transistors of the readout circuit 20 on the second layer 202. For example, as shown in the example of FIG. 17B , it is possible to increase the area for disposing the transistor AMP. The size of the transistor AMP can be increased, making it possible to suppress noise from being mixed into pixel signals.

[0133] (2-4. Modification 4) FIG. 18 is a diagram showing an example of a cross-sectional configuration of an imaging device according to Modification 4. The imaging device 1 may have a layered structure as shown in FIG. 18. In the example shown in FIG. 18, a semiconductor layer 101, a wiring layer 111, a semiconductor layer 102, a wiring layer 121, a wiring layer 131, and a semiconductor layer 103 are provided from the light incident side. The semiconductor layer 101, the semiconductor layer 102, and the semiconductor layer 103 are formed of a semiconductor substrate (silicon substrate, SOI substrate, etc.). For example, the semiconductor layer 102 may be formed of a silicon layer on a BOX (Buried Oxide) layer in an SOI substrate.

[0134] 18 , the semiconductor layer 101 and the semiconductor layer 102 are provided such that a surface 11S1 and a surface 12S2 face each other. The semiconductor layer 101 and the semiconductor layer 102 are stacked such that the wiring layer 111 faces the semiconductor layer 102. The semiconductor layer 102 and the semiconductor layer 103 are stacked such that a surface 12S1 and a surface 13S1 face each other, for example. Transistors TRG1 and TRG2 and a floating diffusion FD are formed on the surface 11S1 side of the semiconductor layer 101. The transistors (transistors AMP, SEL, and RST) of the readout circuit 20 are provided on the surface 12S1 side of the semiconductor layer 102.

[0135] The transistor ADD is provided, for example, on the surface 12S1 side of the semiconductor layer 102. The wiring 71, which is the FD wiring, may be configured to include a through electrode that penetrates the semiconductor layer 102, as in the example shown in FIG. 18 . The transistor ADD may also be provided on the surface 11S1 side of the semiconductor layer 101. In this modified example, the provision of the transistor ADD also makes it possible to reduce crosstalk. It is also possible to prevent noise from being mixed into pixel signals.

[0136] (2-5. Modification 5) The photoelectric conversion unit 12, transistor TRG, readout circuit 20, transistor ADD, etc. of the imaging device 1 (photodetector) may be provided in the first layer 201. The photoelectric conversion unit 12, transistor TRG, readout circuit 20, transistor ADD, etc. may be provided in, for example, the semiconductor layer 101 and the wiring layer 111. In the case of this modification, crosstalk can also be suppressed by providing the transistor ADD. It is possible to realize a photodetector that can suppress degradation of signal quality.

[0137] 3. Application Examples The imaging device 1 and the like can be applied to any type of electronic device with an imaging function, for example, a camera system such as a digital still camera or a video camera, a mobile phone with an imaging function, etc. Fig. 19 shows a schematic configuration of an electronic device 1000.

[0138] The electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.

[0139] The lens group 1001 captures incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the signal as a pixel signal to the DSP circuit 1002.

[0140] The DSP circuit 1002 is a signal processing circuit that processes signals supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signals from the imaging device 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 on a frame-by-frame basis.

[0141] The display unit 1004 is composed of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records image data of moving images or still images captured by the imaging device 1 on a recording medium such as a semiconductor memory or a hard disk.

[0142] The operation unit 1006, in response to a user's operation, outputs operation signals for various functions of the electronic device 1000. The power supply unit 1007 supplies various types of power to the DSP circuit 1002, frame memory 1003, display unit 1004, recording unit 1005, and operation unit 1006 as needed.

[0143] 4. Application Examples (Application Examples to Mobile Bodies) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0144] FIG. 20 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0145] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 20 , the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0146] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0147] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0148] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0149] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0150] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0151] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0152] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0153] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0154] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 20, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0155] FIG. 21 is a diagram showing an example of the installation position of the imaging unit 12031.

[0156] In FIG. 21 , a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0157] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0158] 21 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0159] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0160] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0161] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0162] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0163] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, for example, the image capturing device 1 or the like can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031, it becomes possible to obtain high-resolution captured images. It becomes possible to perform high-precision control using captured images in the mobile object control system.

[0164] (Application Example to Endoscopic Surgery System) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0165] FIG. 22 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0166] 22 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0167] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0168] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0169] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0170] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102 and performs various types of image processing on the image signal, such as development processing (demosaic processing), to display an image based on the image signal.

[0171] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0172] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing the surgical site, etc.

[0173] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiation light, magnification, focal length, etc.) of the endoscope 11100.

[0174] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0175] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0176] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0177] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0178] FIG. 23 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0179] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.

[0180] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0181] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0182] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.

[0183] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted appropriately.

[0184] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0185] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0186] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0187] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404 .

[0188] The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0189] Furthermore, the communication unit 11411 transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0190] The image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102 .

[0191] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0192] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0193] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.

[0194] In the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0195] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. Of the above-described configurations, the technology according to the present disclosure can be suitably applied to, for example, the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to provide a high-definition endoscope 11100.

[0196] The present disclosure has been described above by way of embodiments, modifications, application examples, and applied examples, but the present technology is not limited to the above embodiments, etc., and various modifications are possible. For example, although the above-mentioned modifications have been described as modifications of the above embodiments, the configurations of the modifications can be combined as appropriate. For example, the present disclosure is not limited to back-illuminated image sensors, but can also be applied to front-illuminated image sensors.

[0197] In the above embodiments, an imaging device has been described as an example, but the photodetector of the present disclosure may be, for example, a device that receives incident light and converts the light into an electric charge. The output signal may be a signal of image information or a signal of ranging information. The photodetector (imaging device) may be applied to an image sensor, a ranging sensor, etc.

[0198] According to an embodiment of the present disclosure, a photodetector includes a first layer having a photoelectric conversion unit that converts light into electric charges and a floating diffusion that accumulates electric charges converted by the photoelectric conversion unit, a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the electric charges accumulated in the floating diffusion, a second transistor electrically connected to the floating diffusion and a power supply line, and a third transistor electrically connected to the floating diffusion and a first potential line. This makes it possible to realize a photodetector that can suppress degradation of signal quality.

[0199] According to an embodiment of the present disclosure, a photodetector includes a photoelectric conversion element that converts light into electric charges, a floating diffusion capable of accumulating electric charges converted by the photoelectric conversion element, a first transistor capable of generating a first signal based on the electric charges accumulated in the floating diffusion, a second transistor electrically connected between the floating diffusion and a power supply line, and a third transistor electrically connecting the floating diffusion and a first potential line. This makes it possible to suppress crosstalk and realize a photodetector capable of suppressing degradation of signal quality.

[0200] Note that the effects described in this specification are merely examples and are not limited to those described above, and other effects may be present. The present disclosure may also have the following configurations: (1) A photodetector comprising: a first layer having a photoelectric conversion unit that converts light into electricity and a floating diffusion that accumulates charge converted by the photoelectric conversion unit; a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the charge accumulated in the floating diffusion; a second transistor electrically connected to the floating diffusion and a power supply line; and a third transistor electrically connected to the floating diffusion and a first potential line. (2) The photodetector described in (1) above further comprises a fourth transistor electrically connected to the first transistor and outputting the first signal to a signal line. (3) The photodetector described in (1) or (2) above, wherein the second transistor is electrically connected to the power supply line and resets the voltage of the floating diffusion. (4) The photodetector according to any one of (1) to (3), further comprising a first interconnection electrically connected to the floating diffusion, wherein the floating diffusion is electrically connected to a gate of the first transistor in the second layer via the first interconnection. (5) The photodetector according to (4), further comprising: a first junction electrode included in the first layer and electrically connected to the first interconnection; and a second junction electrode included in the second layer, joined at a junction surface between the first layer and the second layer. (6) The photodetector according to any one of (1) to (5), further comprising: a plurality of pixels each having the photoelectric conversion unit, wherein the floating diffusion, the first transistor, a first interconnection electrically connected between the floating diffusion and the first transistor, and the third transistor are each provided for each pixel or for each of a plurality of pixels. (7) The photodetector according to (6), wherein the plurality of first interconnections each extend in a stacking direction of the first layer and the second layer.(8) The photodetector according to any one of (1) to (7), further comprising: a plurality of pixels including a first pixel and a second pixel, each having the photoelectric conversion unit; and a control circuit that controls the third transistor so that the floating diffusion provided for the first pixel or the second pixel is electrically connected to the first potential line. (9) The photodetector according to any one of (1) to (8), further comprising: a plurality of pixels including a first pixel and a second pixel, each having the photoelectric conversion unit; and a control circuit capable of controlling the third transistor, wherein the control circuit is capable of executing control to electrically connect the floating diffusion provided for the second pixel to the first potential line when reading out the first signal from the first pixel. (10) The photodetector according to (9), wherein the second pixel is provided around the first pixel. (11) The photodetector according to any one of (1) to (10), wherein the first potential line is a wiring to which a fixed potential is applied or a wiring to which a ground potential is applied. (12) The photodetector according to any one of (1) to (11), wherein the third transistor is provided in the second layer. (13) The photodetector according to any one of (1) to (11), wherein the third transistor is provided in the first layer. (14) The photodetector according to any one of (1) to (13), further comprising a fifth transistor provided in the first layer and capable of transferring charge converted in the photoelectric conversion unit to the floating diffusion. (15) The photodetector according to any one of (1) to (14), further comprising a readout circuit having the first transistor and the second transistor and capable of outputting the first signal, the readout circuit being provided in the second layer. (16) The photodetector according to (15), wherein the readout circuit includes a fourth transistor electrically connected to the first transistor and outputting the first signal to a signal line.(17) The photodetector according to any one of (1) to (16), wherein the first layer includes a first semiconductor layer and a first wiring layer, the second layer includes a second semiconductor layer and a second wiring layer, and the first layer and the second layer are stacked such that the first wiring layer faces the second semiconductor layer. (18) The photodetector according to any one of (1) to (17), further comprising a third layer having a signal processing circuit capable of performing signal processing. (19) An electronic device comprising: an optical system; and a photodetector that receives light that has passed through the optical system, wherein the photodetector comprises: a first layer having a photoelectric conversion unit that performs photoelectric conversion of light and a floating diffusion that accumulates charge converted by the photoelectric conversion unit, a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the charge accumulated in the floating diffusion, a second transistor electrically connected to the floating diffusion and a power supply line, and a third transistor electrically connected to the floating diffusion and a first potential line. (20) A photodetector comprising: a photoelectric conversion element that performs photoelectric conversion of light, a floating diffusion that can accumulate charge converted by the photoelectric conversion element, a first transistor that can generate a first signal based on the charge accumulated in the floating diffusion, a second transistor electrically connected between the floating diffusion and a power supply line, and a third transistor that can electrically connect the floating diffusion to a first potential line. (21) The photodetector according to (20), further comprising a fourth transistor electrically connected to the first transistor and capable of outputting the first signal to a signal line.(22) An electronic device comprising: an optical system; and a photodetector that receives light that has passed through the optical system, wherein the photodetector has: a photoelectric conversion element that photoelectrically converts light; a floating diffusion that can accumulate charges converted by the photoelectric conversion element; a first transistor that can generate a first signal based on the charges accumulated in the floating diffusion; a second transistor that is electrically connected between the floating diffusion and a power supply line; and a third transistor that can electrically connect the floating diffusion and a first potential line.

[0201] This application claims priority based on Japanese Patent Application No. 2023-142479, filed on September 1, 2023, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0202] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A photodetector comprising: a first layer having a photoelectric conversion unit that converts light into electric charges and a floating diffusion that accumulates electric charges converted by the photoelectric conversion unit; a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the electric charges accumulated in the floating diffusion; a second transistor electrically connected to the floating diffusion and a power supply line; and a third transistor electrically connected to the floating diffusion and a first potential line.

2. The photodetector according to claim 1, further comprising a fourth transistor electrically connected to said first transistor for outputting said first signal to a signal line.

3. The photodetector according to claim 1, wherein the second transistor is electrically connected to the power supply line and resets the potential of the floating diffusion.

4. The photodetector device of claim 1, further comprising a first wiring electrically connected to the floating diffusion, the floating diffusion being electrically connected to the gate of the first transistor in the second layer via the first wiring.

5. The photodetector device according to claim 4, wherein a first junction electrode included in the first layer and electrically connected to the first wiring and a second junction electrode included in the second layer are joined at the junction surface between the first layer and the second layer.

6. The photodetection device according to claim 1, further comprising a plurality of pixels each having the photoelectric conversion unit, wherein the floating diffusion, the first transistor, a first wiring electrically connected between the floating diffusion and the first transistor, and the third transistor are each provided for each pixel or for each of a plurality of the pixels.

7. The photodetector according to claim 6, wherein each of the plurality of first wirings extends in the stacking direction of the first layer and the second layer.

8. The photodetection device according to claim 1, further comprising: a plurality of pixels including a first pixel and a second pixel each having the photoelectric conversion unit; and a control circuit that controls the third transistor so that the floating diffusion provided for the first pixel or the second pixel is electrically connected to the first potential line.

9. The photodetection device according to claim 1, further comprising: a plurality of pixels including a first pixel and a second pixel each having the photoelectric conversion unit; and a control circuit that controls the third transistor, wherein the control circuit is capable of executing control to electrically connect the floating diffusion provided for the second pixel to the first potential line when the first signal is read out from the first pixel.

10. The light detection device according to claim 9, wherein the second pixel is provided around the first pixel.

11. The photodetector according to claim 1, wherein the first potential line is a wiring to which a fixed potential is applied or a wiring to which a ground potential is applied.

12. The photodetector device according to claim 1, wherein the third transistor is provided in the second layer.

13. The photodetector device according to claim 1, wherein the third transistor is provided in the first layer.

14. The photodetector according to claim 1, further comprising a fifth transistor provided in the first layer and capable of transferring charges converted by the photoelectric conversion portion to the floating diffusion.

15. The photodetector according to claim 1, further comprising a readout circuit having the first transistor and the second transistor and capable of outputting the first signal, the readout circuit being provided in the second layer.

16. The photodetection device according to claim 15, wherein the readout circuit has a fourth transistor electrically connected to the first transistor and outputting the first signal to a signal line.

17. The photodetector device of claim 1, wherein the first layer includes a first semiconductor layer and a first wiring layer, the second layer includes a second semiconductor layer and a second wiring layer, and the first layer and the second layer are stacked such that the first wiring layer faces the second semiconductor layer.

18. The photodetector device of claim 1, further comprising a third layer having a signal processing circuit capable of performing signal processing.

19. An electronic device comprising: an optical system; and a photodetector that receives light that has passed through the optical system, wherein the photodetector has: a first layer having a photoelectric conversion unit that photoelectrically converts light and a floating diffusion that accumulates electric charges converted by the photoelectric conversion unit; a second layer stacked with the first layer and having a first transistor that outputs a first signal based on the electric charges accumulated in the floating diffusion; a second transistor electrically connected to the floating diffusion and a power supply line; and a third transistor electrically connected to the floating diffusion and a first potential line.

Images