Solid-state imaging device and electronic apparatus

Abstract

[Problem] To make it possible to realize high image quality by being capable of being driven at a low voltage. [Solution] This solid-state imaging device comprises: a photoelectric conversion element for transferring, to a substrate, a charge generated in accordance with the amount of incident light; a detection unit for detecting a detection signal corresponding to the charge transferred to the substrate; a comparison unit for comparing a prescribed threshold and the signal level of the detection signal to thereby determine whether the amount of charge transferred to the substrate exceeds a prescribed reference amount; and a discharge unit for discharging the charge of the photoelectric conversion element and the substrate each time the amount of charge transferred to the substrate exceeds the reference amount.

Description

Solid-state imaging device and electronic device

[0001] The present disclosure relates to a solid-state imaging device and an electronic device.

[0002] Solid-state imaging devices using CMOS (Complementary Metal-Oxide-Semiconductor) technology are used in a variety of applications, including mobile devices and in-vehicle devices, due to their ability to integrate a variety of functions. A threshold voltage modulation image sensor (VMIS) has been proposed that can transfer charges generated by photoelectric conversion using a simple device structure (see Non-Patent Document 1). The VMIS described in Non-Patent Document 1 modulates the potential of the source follower readout output by modulating the substrate of a ring-type NMOSFET.

[0003] 1.5M pixel imager with localized hole modulation method (2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers)

[0004] However, the VMIS of Non-Patent Document 1 has a problem of large threshold voltage variations. Furthermore, conventional image sensors, including the VMIS of Non-Patent Document 1, require HV-Tr (High Voltage Transistor) as pixel transistors, making it difficult to achieve low power consumption. Recently, portable electronic devices such as smartphones and tablets have become widespread, and there is a demand for imaging devices that can be driven at a low voltage in order to extend battery life.

[0005] Therefore, the present disclosure provides a solid-state imaging device and electronic equipment that can be driven at a low voltage and achieve high image quality.

[0006] In order to solve the above problems, according to the present disclosure, there is provided a solid-state imaging device comprising: a photoelectric conversion element that transfers charges generated in accordance with the amount of incident light to a substrate; a detection unit that detects a detection signal in accordance with the charges transferred to the substrate; a comparison unit that determines whether the amount of charges transferred to the substrate exceeds a predetermined reference amount by comparing the signal level of the detection signal with a predetermined threshold; and a discharge unit that discharges charges from the photoelectric conversion element and the substrate every time the amount of charges transferred to the substrate exceeds the reference amount.

[0007] The device may further include a number counting unit that counts the number of times the ejection unit ejects.

[0008] The detection unit may have a first transistor that detects the charge transferred to the substrate, the photoelectric conversion element may be arranged on at least a part of the substrate and have a diffusion region that accumulates the charge generated in accordance with the amount of incident light, and at least a part of the diffusion region may be arranged opposite the channel of the first transistor.

[0009] The detection section may detect the detection signal, the signal level of which changes depending on the amount of charge generated by the photoelectric conversion element, regardless of the amount of incident light.

[0010] The detection unit may have a first transistor that detects the charge transferred to the substrate, the photoelectric conversion element may be arranged on at least a part of the substrate and have a diffusion region that accumulates the charge generated in accordance with the amount of incident light, and may further include an element isolation region that is arranged between the diffusion region and the first transistor, and the end of the diffusion region that is closer to the first transistor may be arranged along the element isolation region.

[0011] The detection unit may detect the detection signal at a constant signal level when the amount of incident light is less than a predetermined light intensity, and may detect the detection signal whose signal level changes depending on the amount of charge generated in the photoelectric conversion element when the amount of incident light is equal to or greater than the predetermined light intensity.

[0012] The diffusion region may have an impurity concentration higher than the impurity concentration of the substrate.

[0013] The discharge unit may have a second transistor that discharges the charge from the photoelectric conversion element and the substrate each time the amount of charge transferred to the substrate exceeds the reference amount and when the counting unit has finished measuring the number of discharges.

[0014] The image sensor may include a plurality of pixels each performing photoelectric conversion, and each of the plurality of pixels may have the photoelectric conversion element, the detection unit, the comparison unit, the discharge unit, and the number measurement unit.

[0015] Each of the plurality of pixels may have a pixel circuit that outputs a pixel signal corresponding to residual charge remaining in the photoelectric conversion element and the substrate when the counting unit finishes counting the number of discharges.

[0016] The discharge unit may include: a third transistor that discharges charges from the photoelectric conversion element and the substrate; and a second transistor that transfers the charges from the photoelectric conversion element and the substrate to the third transistor every time the amount of charge transferred to the substrate exceeds the reference amount, and that transfers the residual charges to the pixel circuit when the counting unit has finished measuring the number of discharges.

[0017] In parallel with the process of the pixel circuits in the plurality of pixels detecting the pixel signals, the detection unit may perform a detection process of the detection signal, the comparison unit may perform a determination process, and the number of discharges may be measured by the number measurement unit.

[0018] The image forming apparatus may further include a signal processing unit that processes signals photoelectrically converted by the plurality of pixels, wherein the count measurement unit in each of the plurality of pixels supplies a first digital signal based on information about the measured number of discharges to the signal processing unit, and the signal processing unit generates a third digital signal by combining the first digital signal with a second digital signal obtained by digitizing the pixel signal, and the second digital signal may include information about residual charges remaining in the photoelectric conversion element and the substrate when measurement of the number of discharges by the count measurement unit is completed.

[0019] The second digital signal may include information about a difference between a reset level and a signal level.

[0020] The signal processing unit may generate the first digital signal based on a value obtained by multiplying a fourth digital signal including information on the measured number of discharges by a predetermined coefficient unique to each pixel.

[0021] The signal level of the fourth digital signal may be a level corresponding to the value of a predetermined function having as an input parameter a value obtained by multiplying the signal level of the detection signal after the charge of the photoelectric conversion element has been discharged by the predetermined threshold value.

[0022] The charges transferred from the photoelectric conversion element to the substrate and used by the comparison unit for judgment may be electrons or holes, the conductivity type of the transistor provided in the detection unit may be constant regardless of the type of charge used by the comparison unit for judgment, and the conductivity type of the transistor provided in the discharge unit may have a conductivity type corresponding to the type of charge used by the comparison unit for judgment.

[0023] The threshold value of a transistor provided in the detection unit may change depending on the amount of charge transferred from the substrate.

[0024] The comparison section may compare the signal level of the detection signal with the predetermined threshold value while providing hysteresis.

[0025] Furthermore, according to the present disclosure, there is provided an electronic device comprising: a solid-state imaging device; and an image processing unit that processes image data output from the solid-state imaging device, wherein the solid-state imaging device comprises: a photoelectric conversion element that transfers charges generated in accordance with the amount of incident light to a substrate; a detection unit that detects a detection signal in accordance with the charges transferred to the substrate; a comparison unit that determines whether the amount of charge transferred to the substrate exceeds a predetermined reference amount by comparing the signal level of the detection signal with a predetermined threshold; and a discharge unit that discharges charges from the photoelectric conversion element and the substrate every time the amount of charge transferred to the substrate exceeds the reference amount.

[0026] 1 is a block diagram of an electronic device according to an embodiment of the present disclosure. 2 is a block diagram of a solid-state imaging device according to an embodiment of the present disclosure. 3 is a diagram showing a stacked structure of a solid-state imaging device. 4 is a block diagram showing a configuration of a pixel according to an embodiment of the present disclosure. 5 is a circuit diagram showing a more detailed first configuration example of a pixel according to an embodiment of the present disclosure. 6 is a timing chart of each signal during an exposure period of a pixel according to an embodiment of the present disclosure. 7 is a block diagram showing a configuration of a signal processing unit according to an embodiment of the present disclosure. 8 is a circuit diagram showing a more detailed second configuration example of a pixel according to an embodiment of the present disclosure. 9 is a plan view of a pixel according to an embodiment of the present disclosure. 10 is a cross-sectional view of a pixel according to an embodiment of the present disclosure. 11 is a graph showing the relationship between the intensity of incident light, the PD voltage level, and the detection signal level according to an embodiment of the present disclosure. 12 is a circuit diagram of a pixel according to a first comparative example. 13 is a circuit diagram of a pixel according to a second comparative example. 14 is a cross-sectional view of a pixel according to a first modified example of the embodiment of the present disclosure. 15 is a graph showing the relationship between the intensity of incident light, the PD voltage level, and the detection signal level according to a first modified example of the embodiment of the present disclosure. 16 is a block diagram of a pixel according to a first modified example of the embodiment of the present disclosure. 17 is a circuit diagram showing a more detailed configuration of a pixel according to a first modified example of the embodiment of the present disclosure. 18 is a plan view of a pixel according to a first modified example of the embodiment of the present disclosure. 1 is a cross-sectional view of a pixel according to a second modified example of an embodiment of the present disclosure; 2 is a circuit diagram showing a configuration of a pixel according to a second modified example of an embodiment of the present disclosure; 3 is a cross-sectional view of a pixel according to a third modified example of an embodiment of the present disclosure; 4 is a circuit diagram showing a configuration of a pixel according to a third modified example of an embodiment of the present disclosure; 5 is a plan view of a pixel according to a third modified example of an embodiment of the present disclosure; 6 is a block diagram showing an example of a schematic configuration of a vehicle control system; 7 is an explanatory diagram showing an example of installation positions of an outside vehicle information detection unit and an imaging unit;

[0027] Hereinafter, embodiments of a solid-state imaging device and an electronic device will be described with reference to the drawings. The following description will focus on the main components of the solid-state imaging device and the electronic device, but the solid-state imaging device and the electronic device may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0028] 1 is a block diagram of an electronic device 1 according to an embodiment of the present disclosure. The electronic device 1 captures image data and includes a solid-state imaging device 10, an image processing unit 2, a recording unit 3, and a control unit 4. The electronic device 1 can be applied to, for example, an in-vehicle camera, a smartphone, or a camera mounted on an industrial robot, but the specific use and configuration of the electronic device 1 are arbitrary.

[0029] The solid-state imaging device 10 is, for example, a VMIS, and performs photoelectric conversion on incident light to capture image data. The image data output from the solid-state imaging device 10 is input to the image processing unit 2 and the recording unit 3 via a transmission line L1. The electronic device 1 also has an imaging lens 5 that focuses the incident light and guides it to the solid-state imaging device 10.

[0030] The image processing unit 2 performs predetermined image processing such as image recognition, tracking, analysis, etc. on the image data. The image data that has been subjected to image processing by the image processing unit 2 is output to the recording unit 3, for example.

[0031] The recording unit 3 records image data output from the solid-state imaging device 10 or the image processing unit 2. The recording unit 3 may be disposed in a server connected via a network. In the electronic device 1 according to this embodiment, at least one of the image processing unit 2 and the recording unit 3 in FIG. 1 may be omitted.

[0032] The control unit 4 instructs the solid-state imaging device 10 to generate image data via a control line L2.

[0033] Fig. 2 is a block diagram of a solid-state imaging device 10 according to an embodiment of the present disclosure. The solid-state imaging device 10 of Fig. 2 includes a pixel array unit 11, a vertical drive circuit 12, a timing control circuit 13, and a signal processing unit 14. The pixel array unit 11 of Fig. 2 has a plurality of pixels 20 arranged in a first direction H and a second direction V. In this specification, the left-right (horizontal) direction of Fig. 2 is referred to as the first direction H, and the up-down (vertical) direction of Fig. 2 is referred to as the second direction V. Furthermore, a group of pixels arranged in the first direction H is referred to as a pixel row, and a group of pixels arranged in the second direction V is referred to as a pixel column.

[0034] Each pixel 20 has a photoelectric conversion element that generates a charge corresponding to the amount of incident light. Each of the multiple pixels 20 also has a skimming circuit and a pixel circuit (not shown in FIG. 2 ). The skimming circuit monitors the charge transferred by the photoelectric conversion element to the substrate and generates a data signal. The pixel circuit outputs a pixel signal corresponding to the charge of the photoelectric conversion element and the substrate. Details of the skimming circuit, pixel circuit, data signal, and pixel signal will be described later. A vertical signal line VSL and a data line DATA are provided for each pixel column consisting of multiple pixels arranged in the column direction. The vertical signal line VSL transmits a pixel signal, and the data line DATA transmits a data signal.

[0035] The vertical drive circuit 12 is configured with, for example, a shift register, an address decoder, etc. The vertical drive circuit 12 drives each pixel 20 in the pixel array unit 11 on a pixel row basis. Note that the vertical drive circuit 12 may drive all pixels 20 in the pixel array unit 11 simultaneously.

[0036] The timing control circuit 13 is configured by a timing generator that generates various timing signals, etc. The timing control circuit 13 controls the driving of the vertical drive circuit 12 and the signal processing unit 14 based on the various timing signals.

[0037] The signal processing unit 14 is supplied with the data signal output from the skimming circuit and the pixel signal output from the pixel circuit. The signal processing unit 14 performs predetermined signal processing on the data signal and the pixel signal. The signal processing unit 14 also has a correction circuit 15 that performs predetermined correction on the data signal. The detailed configuration of the signal processing unit 14 will be described later.

[0038] The solid-state imaging device 10 is composed of, for example, three stacked chips. FIG. 3 is a diagram showing the stacked structure of the solid-state imaging device 10. The solid-state imaging device 10 has a three-dimensional structure formed by bonding together a first pixel chip b1, a second pixel chip b2, and a logic chip b3 in this order. These chips are bonded together by vias or the like. Note that these chips may also be bonded together by Cu-Cu bonding or bumps, in addition to vias.

[0039] The first pixel chip b1, for example, includes a plurality of photoelectric conversion elements in the pixel array unit 11, pixel circuits, and part of the skimming circuit. The second pixel chip b2, for example, includes the remaining part of the skimming circuit. The logic chip b3, for example, includes a vertical drive circuit 12, a timing control circuit 13, and a signal processing unit 14.

[0040] The circuits arranged on each chip are not limited to the circuits described above. For example, part or all of the skimming circuit may be arranged on the first pixel chip b1, and part or all of the pixel circuit may be arranged on the second pixel chip b2. Furthermore, the solid-state imaging device 10 may be configured with stacked chips in two or less layers, or four or more layers.

[0041] By placing part of the skimming circuit connected to pixel 20 on the second pixel chip b2, the solid-state imaging device 10 can increase the proportion of the area of ​​the photoelectric conversion element in the chip area, thereby improving sensitivity and enabling the chip to be miniaturized.

[0042] 4 is a block diagram showing the configuration of a pixel 20 according to an embodiment of the present disclosure. The pixel 20 includes a pixel main section 21, a skimming circuit 22, and a pixel circuit 23. The pixel main section 21 includes a photoelectric conversion element PD and a discharge section 31. The skimming circuit 22 includes a detection section 32, a comparison section 33, and a counting section (CN; Counter) 34. The pixel circuit 23 includes a readout circuit 35. Note that in this specification, the pixel main section 21 may be referred to as the pixel 20.

[0043] The photoelectric conversion element PD is, for example, a photodiode and is formed in a part of a substrate. The photoelectric conversion element PD is also called a buried photodiode. The photoelectric conversion element PD generates charges according to the amount of incident light and transfers the generated charges to the substrate. In this specification, the charges accumulated in the photoelectric conversion element PD and the substrate may be simply referred to as charges accumulated in the photoelectric conversion element PD.

[0044] The discharge unit 31 includes a transfer transistor (second transistor) Ttrg and a reset transistor (third transistor) Trst (not shown in FIG. 4 ). The transfer transistor Ttrg is configured, for example, as an NMOS (N-channel Metal-Oxide-Semiconductor) transistor. The drain of the transfer transistor Ttrg is connected to the photoelectric conversion element PD. The source of the transfer transistor Ttrg is connected to the readout circuit 35 and the reset transistor Trst. A signal TG is input to the gate of the transfer transistor Ttrg. When the signal TG is high, for example, the transfer transistor Ttrg transfers the charge accumulated in the photoelectric conversion element PD to the input of the readout circuit 35. The reset transistor Trst discharges the charge transferred from the transfer transistor Ttrg to the input of the readout circuit 35. Furthermore, when the counting unit 34 finishes counting the number of times, the transfer transistor Ttrg transfers residual charge remaining in the photoelectric conversion element PD and the substrate to the readout circuit 35.

[0045] The detector 32 detects a detection signal Vskim corresponding to the charge transferred to the substrate. The signal level (e.g., voltage level) of the detection signal Vskim changes depending on the amount of charge transferred to the substrate. The comparator 33 compares the signal level of the detection signal Vskim with a predetermined threshold to determine whether the amount of charge transferred to the substrate exceeds a predetermined reference amount.

[0046] The comparator 33 outputs, for example, a high-level signal TG when the amount of charge transferred to the substrate exceeds a predetermined reference amount. More specifically, the signal TG transitions from low to high each time the amount of charge transferred to the substrate exceeds the predetermined reference amount. The signal TG is input to the gate of the transfer transistor Ttrg and the count counter 34. When the signal TG is high, the transfer transistor Ttrg controls the discharge of the charge transferred to the substrate, and the count counter 34 measures the number of times the discharge unit 31 discharges the charge transferred to the substrate (hereinafter referred to as the discharge count). The count counter 34 outputs a data signal (fourth digital signal) Ddata, including information on the number of discharges measured during a predetermined count measurement period, to the data line DATA.

[0047] When the counting unit 34 has finished counting the number of times, the readout circuit 35 outputs a pixel signal Vimg corresponding to the residual charge transferred from the transfer transistor Ttrg to the vertical signal line VSL. A selection signal SEL is input to the readout circuit 35 to notify the timing of outputting the pixel signal Vimg.

[0048] 4, the solid-state imaging device 10 according to the embodiment of the present disclosure includes a skimming circuit 22 that discharges electric charges whenever the electric charges accumulated in the photoelectric conversion element PD and the substrate exceed a certain reference amount. This allows only small changes in the potential of the photoelectric conversion element PD and the detection signal Vskim, and therefore allows each transistor in the pixel 20 to be driven at a low voltage.

[0049] FIG. 5 is a circuit diagram showing a more detailed first configuration example of the pixel 20. As shown in FIG. 5, the detection unit 32 has a threshold modulation transistor (first transistor) Tftg and a current source CS. The readout circuit 35 has an amplification transistor Tamp and a selection transistor Tsel. The transistors Tftg, Tamp, Tsel, and Trst are configured, for example, by NMOS transistors. The transistors Tftg, Ttrg, Tamp, Tsel, and Trst arranged in the pixel 20 are also called pixel transistors.

[0050] The pixel main section 21, pixel circuit 23, and threshold modulation transistor Tftg are arranged, for example, on the first pixel chip b1, while the current source CS, comparison section 33, and number counter 34 are arranged, for example, on the second pixel chip b2.

[0051] One of the anode or cathode (e.g., the cathode) of the photoelectric conversion element PD is connected to the drain of the transfer transistor Ttrg and the back gate of the threshold modulation transistor Tftg, and the other (e.g., the anode) is connected to the ground wiring. The source of the transfer transistor Ttrg is connected to the source of the reset transistor Trst and the gate of the amplification transistor Tamp via a floating diffusion region (FD) that converts the amount of charge into voltage.

[0052] When a high-level signal TG is input to the gate of the transfer transistor Ttrg, the transfer transistor Ttrg transfers the charge of the photoelectric conversion element PD to the floating diffusion region FD.

[0053] The drain of the reset transistor Trst of the discharge unit 31 is connected to the power supply wiring VDD, and a reset signal RST is input to the gate thereof. When a high-level reset signal RST is input, the reset transistor Trst discharges the charge transferred to the floating diffusion region FD to the power supply wiring VDD side.

[0054] The threshold modulation transistor Tftg has a drain connected to the power supply line VDD and a source connected to the comparator 33 and the current source CS. A signal xTG is input to the gate of the threshold modulation transistor Tftg. The signal xTG is generated, for example, based on an inverted version of the signal TG. The threshold modulation transistor Tftg is a transistor that detects charges transferred from the photoelectric conversion element PD to the substrate. Specifically, the threshold modulation transistor Tftg is a transistor whose threshold varies depending on the amount of charge transferred to the substrate, and can sensitively detect the amount of charge transferred to the substrate. The threshold modulation transistor Tftg inputs a detection signal Vskim corresponding to this threshold and the signal xTG to the comparator 33.

[0055] The comparator 33 receives the detection signal Vskim at a first input terminal and receives the threshold voltage Vth at a second input terminal. For example, the comparator 33 outputs a high-level signal when the signal level of the detection signal Vskim is equal to or lower than the signal level of the threshold voltage Vth. The comparator 33 can adjust the threshold voltage Vth for each pixel 20 so that the amount of charge discharged from each pixel 20 is the same even if the signal level of the detection signal Vskim relative to the reference amount of charge differs among the multiple pixels 20. The comparator 33 may be configured to have hysteresis.

[0056] The readout circuit 35 includes an amplifier transistor Tamp and a select transistor Tsel, which form a source follower circuit. The gate of the amplifier transistor Tamp is at the same potential as the floating diffusion region FD and is used as the input of the source follower circuit. The amplifier transistor Tamp has a drain connected to the power supply line VDD and a source connected to the drain of the select transistor Tsel.

[0057] The source of the selection transistor Tsel is connected to the vertical signal line VSL. When a high-level selection signal SEL is input to the gate of the selection transistor Tsel, the selection transistor Tsel is turned on and outputs a pixel signal Vimg having a voltage level corresponding to the potential of the floating diffusion region FD to the vertical signal line VSL.

[0058] 6 is a timing chart of each signal during an exposure period of the pixel 20 according to the embodiment of the present disclosure. The timing chart shows the waveforms of the gate signal (selection signal) SEL of the selection transistor Tsel, the gate signal (reset signal) RST of the reset transistor Trst, the gate signal xTG of the threshold modulation transistor Tftg, the output signal TG of the comparison unit 33, the voltage PD corresponding to the accumulated charge of the photoelectric conversion element PD, and the voltage FD corresponding to the charge of the floating diffusion region FD, as well as the number of discharges Count (also referred to as a count code) measured by the number of times measurement unit 34.

[0059] The pixel 20 starts exposure to light from time t0. Based on the light incident on the pixel 20, the photoelectric conversion element PD accumulates charge, and the voltage level of the photoelectric conversion element PD drops. Also, from time t0, a discharge count measurement period for measuring the number of discharges starts. At time t0, the signal xTG goes high, causing the threshold modulation transistor Tftg to start detecting the charge of the photoelectric conversion element PD and the substrate. Also, the signal TG goes low, causing the transfer transistor Ttrg to turn off. At time t0, the discharge count Count is set to 0.

[0060] At time t0, the reset signal RST is at a high level, turning on the reset transistor Trst. The selection signal SEL is at a low level, turning off the selection transistor Tsel. During the discharge count measurement period, the reset transistor Trst remains on, and the selection transistor Tsel remains off.

[0061] At time t1, when the charge (e.g., electrons) accumulated in the photoelectric conversion element PD exceeds a predetermined reference amount and the voltage level of the photoelectric conversion element PD falls below a predetermined reference value Cth, the signal TG output by the comparator 33 goes high, turning on the transfer transistor Ttrg and transferring the charge of the photoelectric conversion element PD to the floating diffusion region FD. At this time, the selection transistor Tsel remains off and the reset transistor Trst remains on. Therefore, the charge (electrons) transferred to the floating diffusion region FD are discharged to the power supply wiring VDD without being transmitted to the vertical signal line VSL. When the signal TG transitions from low to high, the counter 34 counts up the number of discharges, and the number of discharges Count becomes 1.

[0062] At time t2, charge is discharged from photoelectric conversion element PD, causing signal TG output by comparison unit 33 to go low. Between times t1 and t2, charge is discharged from photoelectric conversion element PD and floating diffusion region FD, causing the voltage level of photoelectric conversion element PD to rise. Furthermore, from time t2, photoelectric conversion element PD begins to accumulate charge again, causing the voltage level of photoelectric conversion element PD to drop.

[0063] Between times t3 and t4, the charge accumulated in the photoelectric conversion element PD again exceeds the predetermined reference amount, so that the charge in the photoelectric conversion element PD and the floating diffusion region FD is discharged, and the number of discharges is counted up to 2. In this way, during the discharge number measurement period, the discharge of the charge in the photoelectric conversion element PD and the floating diffusion region FD and the count up of the discharge number are repeated every time the charge accumulated in the photoelectric conversion element PD exceeds the certain reference amount.

[0064] 6 shows an example in which the discharge count Count becomes M between times t5 and t6, just before the discharge count measurement period ends. That is, in the example of FIG. 6, charge is discharged M times from the photoelectric conversion element PD. Note that if the amount of incident light is small, the photoelectric conversion element PD may not generate a charge equal to or greater than a predetermined reference amount, and charge may not be discharged even once from the photoelectric conversion element PD. In this case, the discharge count Count becomes 0 at the end of the discharge count measurement period.

[0065] The number of discharges M is a value obtained by dividing the total amount of charge generated in the photoelectric conversion element PD during the discharge number measurement period by a predetermined reference amount, and therefore can be expressed by a function f as shown in the following formula (1). The function f is a function that calculates the number of discharges M using as input parameters the output voltage Vvac of the detection unit 32 after the photoelectric conversion element PD is reset (i.e., a voltage based on the total amount of charge generated in the photoelectric conversion element PD during the discharge number measurement period) and the threshold voltage Vth input to the comparison unit 33.

[0066] At time t7, the discharge count measurement period ends. The count measurement unit 34 outputs a data signal Ddata based on the discharge count Count (i.e., the discharge count M) at time t7 to the data line DATA. Also, at time t7, the residual charge readout period begins. The residual charge readout period is a period during which the pixel circuit 23 reads out charge (i.e., residual charge) from the photoelectric conversion element PD that was not discharged during the discharge count measurement period. Residual charge is, for example, charge whose amount does not meet a predetermined reference amount. Note that even if no charge is discharged from the photoelectric conversion element PD even once during the discharge count measurement period, the residual charge is still read out.

[0067] At time t7, the reset signal RST goes low to turn off the reset transistor Trst, and the selection signal SEL goes high to turn on the selection transistor Tsel, causing the pixel signal Vimg (also referred to as the first pixel signal Vp) at the reset level of the floating diffusion region FD to be output from the vertical signal line VSL.

[0068] Between times t8 and t9, the signal xTG goes low, causing the output signal TG of the comparator 33 to go high, turning on the transfer transistor Ttrg and transferring the charge of the photoelectric conversion element PD to the floating diffusion region FD. As a result, at time t9, a pixel signal Vimg (also referred to as a second pixel signal Vd) having a signal level based on the residual charge of the photoelectric conversion element PD is output from the vertical signal line VSL.

[0069] If the photoelectric conversion element PD has accumulated charge close to a predetermined reference amount at the end of the discharge count measurement period, the transfer transistor Ttrg may turn on when the first pixel signal Vp is read out between times t7 and t8, potentially transferring the charge from the photoelectric conversion element PD to the floating diffusion region FD. In this case, the reset level pixel signal Vimg may not be correctly read out from the floating diffusion region FD. To address this issue, one of the following first to third countermeasures may be taken. Furthermore, the skimming circuit 22 reacting to the transfer transistor Ttrg when the first pixel signal Vp is read out and turning it on is hereinafter referred to as a skimming response during reset level readout.

[0070] When the reset signal RST goes low at time t7, the voltage of the floating diffusion region FD drops due to coupling, and as a result, the cathode voltage of the photoelectric conversion element PD also drops due to coupling, which could cause the skimming circuit 22 to react and turn on the transfer transistor Ttrg. Therefore, a first countermeasure is to make the timing at which the selection signal SEL goes high a little earlier than the timing at which the reset signal RST goes low. Since the selection signal SEL goes high first, the voltage of the floating diffusion region FD rises once. Even if the reset signal then goes low and the voltage of the floating diffusion region FD drops, the degree of drop in the voltage of the floating diffusion region FD is reduced, so a skimming response can be avoided when reading the reset level.

[0071] The second measure is to increase the voltage level of the signal xTG input to the gate of the threshold modulation transistor Tftg during the residual charge readout period compared to the discharge count measurement period. This increases the threshold voltage of the threshold modulation transistor Tftg, making it difficult for the voltage level of the output signal from the detection unit 32 to decrease. In other words, by lowering the response sensitivity of the skimming circuit 22, it is possible to avoid a skimming response when reading out the reset level.

[0072] The third measure is to lower the threshold voltage Vth of the comparator 33 during the residual charge readout period than during the discharge count measurement period. This reduces the response sensitivity of the skimming circuit 22, as with the second measure, and makes it possible to avoid skimming responses when reading out the reset level.

[0073] At time t10, the residual charge readout period ends, the selection signal SEL goes low, and the selection transistor Tsel turns off. Between times t10 and t11, the reset signal RST and signal TG go high, turning on the reset transistor Trst and transfer transistor Ttrg, discharging the charges in the photoelectric conversion element PD and floating diffusion region FD to the power supply line VDD and resetting the voltage levels of the photoelectric conversion element PD and floating diffusion region FD. This allows the discharge count measurement period to start again.

[0074] The discharge count measurement period in FIG. 6 can be set during the exposure period of another pixel row. That is, the discharge count measurement for each pixel in the first pixel row can be performed in parallel with the readout operation for each pixel in the second pixel row. That is, the skimming circuit 22 of one pixel 20 can perform the detection process of the detection signal Vskim by the detection unit 32, the determination process by the comparison unit 33, and the count measurement process by the count measurement unit 34 in parallel with the process of detecting the pixel signal Vimg of the pixel circuit 23 corresponding to another pixel 20. This eliminates the need to reduce the frame rate even if the discharge count measurement period is set. Note that if it is acceptable to reduce the frame rate, the discharge count measurement and residual charge readout for the next pixel row may be performed after the discharge count measurement and residual charge readout period for each pixel row has ended.

[0075] 7 is a block diagram showing the configuration of the signal processing unit 14 according to an embodiment of the present disclosure. The signal processing unit 14 includes an analog-to-digital converter (ADC) 41 and a correction circuit 15. The correction circuit 15 includes a coefficient generation unit 42, a multiplier 43, and an adder 44. The signal processing unit 14 receives pixel signals Vimg via multiple vertical signal lines VSL from multiple pixel circuits 23 in multiple pixels 20 in the pixel array unit 11. The signal processing unit 14 also receives data signals Ddata via multiple data lines DATA from skimming circuits 22 in the multiple pixels 20.

[0076] The ADC 41 is arranged for each pixel column in correspondence with the vertical signal line VSL arranged for each pixel column. The ADC 41 arranged for each pixel column is also called a column ADC. The ADC 41 converts the pixel signal Vimg into a digital signal and inputs it to the adder 44.

[0077] More specifically, the ADC 41 outputs a digital signal (second digital signal Dcds) obtained by digitizing the difference between the first pixel signal Vp and the second pixel signal Vd output from the pixel circuit 23. The process of calculating the difference between the first pixel signal Vp and the second pixel signal Vd is called CDS (Correlated Double Sampling). The second digital signal Dcds is a signal that includes information about residual charges remaining on the photoelectric conversion element PD and the substrate when the counting unit 34 finishes counting the number of discharges.

[0078] The correction circuit 15 performs a predetermined correction on the data signal Ddata for each pixel 20. The correction circuit 15 includes a coefficient generation unit 42 and a multiplier 43. The coefficient generation unit 42 generates a correction coefficient a(i,j) for a pixel 20 belonging to the ith pixel row and the jth pixel column (also referred to as the pixel 20 at pixel coordinates (i,j)). The correction coefficient a(i,j) is generated based on, for example, fixed-pattern noise (FPN) caused by sensitivity variations that occur among the pixels 20. The multiplier 43 outputs a digital signal (first digital signal Ddc) to the adder 44, the digital signal being based on a value obtained by multiplying the data signal Ddata by a correction coefficient specific to each pixel 20 generated by the coefficient generation unit 42.

[0079] The adder 44 combines the second digital signal Dcds and the first digital signal Ddc and outputs a digital signal (third digital signal Dout). The signal level of the third digital signal Dout is expressed as follows using the correction coefficient a(i, j), the number of discharges M, the first pixel signal Vp, and the second pixel signal Vd:

[0080] The third digital signal Dout has a signal level based on the amount of charge accumulated by the photoelectric conversion element PD during the exposure period of Fig. 6. The pixel 20 can also expand the dynamic range of the third digital signal Dout to be greater than or equal to the saturated charge amount of the photoelectric conversion element PD by discharging part of the amount of charge accumulated by the photoelectric conversion element PD during the exposure period of Fig. 6 and outputting it as a data signal Ddata from the skimming circuit 22.

[0081] Note that the solid-state imaging device 10 according to the embodiment of the present disclosure may have a configuration that does not include the pixel circuit 23, the ADC 41, and the adder 44. In this case, the first digital signal Ddc output by the multiplier 43 becomes the final digital signal.

[0082] FIG. 8 is a circuit diagram illustrating a second configuration example of a pixel 20 according to an embodiment of the present disclosure. The skimming circuit 22a illustrated in FIG. 8 includes a comparator 33a having hysteresis. The comparator 33a differs from the comparator 33 of FIG. 5 in that it is a single-input type that does not receive a threshold voltage Vth. The comparator 33a includes, for example, PMOS transistors Tr1, Tr2, and Tr3 and NMOS transistors Tr4, Tr5, and Tr6. The transistors Tr1, Tr2, Tr4, and Tr5 are connected in series between a power supply line VDD and a ground line. The gates of the transistors Tr1, Tr2, Tr4, and Tr5 are connected to an input node n1 of the comparator 33a. The drain of the transistor Tr3 is connected to the drain of the transistor Tr1 and the source of the transistor Tr2, and the source is connected to the ground line. The source of the transistor Tr6 is connected to the source of the transistor Tr4 and the drain of the transistor Tr5, and the drain is connected to the power supply line VDD. The gates of the transistors Tr3 and Tr6 are connected to an output node n2 of the comparator 33a. The detection signal Vskim is input to an input node n1 of the comparator 33a from the detector 32a. The comparator 33a compares the signal level of the detection signal with a predetermined upper or lower threshold, and outputs the result to the count counter 34 from the output node n2.

[0083] The comparator 33a having hysteresis can prevent overreaction to slight fluctuations in the signal level of the detection signal Vskim caused by the transfer transistor Ttrg discharging charge from the photoelectric conversion element PD. This allows the transfer transistor Ttrg to remain on until it discharges a predetermined amount of charge from the photoelectric conversion element PD. This allows the comparator 33a to adjust the amount of charge discharged from multiple pixels 20 to be the same even if the threshold voltage Vth of FIG. 5 is not input. Note that the comparator 33a may also be configured to receive the threshold voltage Vth.

[0084] Fig. 8 shows a transistor Tvbn corresponding to the current source CS in Fig. 5. When a bias voltage Vbn is applied to the gate of the transistor Tvbn, the transistor Tvbn supplies a constant current to the threshold modulation transistor Tftg and the comparison unit 33a.

[0085] 9 is a plan view of the pixel 20 shown in FIG. 8. Pixel transistors Tftg, Ttrg, Tamp, Tsel, and Trst are arranged on the first pixel chip b1. Transistor Tvbn is arranged on the second pixel chip b2. Viewed from the transfer transistor Ttrg, the threshold modulation transistor Tftg is arranged on the upper side in FIG. 9. Viewed from the transfer transistor Ttrg and threshold modulation transistor Tftg, the selection transistor Tsel, amplification transistor Tamp, and reset transistor Trst are arranged on the left side in FIG. 9. The selection transistor Tsel, amplification transistor Tamp, and reset transistor Trst are arranged in this order from the top of FIG. 9.

[0086] 9 also shows a signal path P1 through which the detection signal Vskim is detected based on the charge of the photoelectric conversion element PD, and a signal path P2 through which the charge of the photoelectric conversion element PD is discharged. The detection signal Vskim flowing through the signal path P1 is transmitted to the second pixel chip b2 through the threshold modulation transistor Tftg. The charge discharged through the signal path P2 is discharged from the power supply wiring VDD side through the transfer transistor Ttrg and the reset transistor Trst.

[0087] Fig. 10 is a cross-sectional view taken along line A-A in Fig. 9. Fig. 10 illustrates at least a part of the photoelectric conversion element PD. The photoelectric conversion element PD is composed of a semiconductor region in which the impurity concentration changes continuously or stepwise in the depth direction of the substrate 50.

[0088] The photoelectric conversion element PD is disposed on at least a portion of the substrate 50 and has a diffusion region 51 that accumulates charges generated in accordance with the amount of incident light. The diffusion region 51 is also called an SP (Sensor Potential). Note that incident light enters the photoelectric conversion element PD from the lower side in FIG. 10 .

[0089] The substrate 50 has an isolation region 52 disposed between the diffusion region 51 and the threshold modulation transistor Tftg. The end of the diffusion region 51 closer to the threshold modulation transistor Tftg is disposed along the isolation region 52. More specifically, the isolation region 52 is disposed so as not to cause the diffusion region 51 to face the channel 53 of the threshold modulation transistor Tftg.

[0090] The photoelectric conversion element PD shown in FIG. 10 is a buried photodiode formed by a PNP junction. Electrons e are primarily accumulated in a diffusion region 51, which is an N-type semiconductor region. The impurity concentration of the diffusion region 51 is higher than that of the N-semiconductor region in the substrate 50. The channel 53 is, for example, an N-diffusion region with a low impurity concentration. The threshold of the threshold modulation transistor Tftg can be adjusted by controlling the amount of impurity in the channel 53. A P-type impurity diffusion region (hereinafter referred to as the P-type diffusion region) is located below the channel 53, and an N-semiconductor region constituting the substrate 50 is located below this P-type diffusion region. Because the N-semiconductor region is located below the channel 53 with the P-type diffusion region sandwiched between them, the N-semiconductor region functions as the backgate of the threshold modulation transistor Tftg. A source region 55 and a drain region (not shown) of the threshold modulation transistor Tftg are formed on both sides of the channel 53. A contact for outputting the detection signal Vskim is connected to the source region 55. The source region 55 is a highly concentrated N-type impurity diffusion region (hereinafter referred to as the N+ diffusion region). A depletion layer is formed near the interface between the N+ diffusion region and the P-type diffusion region. As the depletion layer expands, it compresses the channel, lowering the threshold of the threshold modulation transistor Tftg and making it easier to turn on.

[0091] In the example of Figure 10, because the number of electrons in the N- semiconductor region is small, it is not possible for all holes in the depletion layer to recombine with electrons in the N- semiconductor region, and the depletion layer is incompletely depleted. Therefore, when a small amount of charge (e.g., electrons e) is transferred from the photoelectric conversion element PD to the N- semiconductor region of the substrate 50, it recombines with the holes in the depletion layer and is unable to fluctuate the threshold of the threshold modulation transistor Tftg. Therefore, the signal level of the detection signal Vskim, which is the source voltage of the threshold modulation transistor Tftg, hardly changes. This allows for reduced threshold variation.

[0092] A source region 56 of the transfer transistor Ttrg and a drain region 57 of the reset transistor Trst are disposed in the P-type semiconductor region of the substrate 50. The source regions 55, 56 and the drain region 57 are configured in an N-well region.

[0093] 11 is a graph showing the relationship between the light intensity of incident light, the voltage level of the photoelectric conversion element PD (hereinafter referred to as the PD voltage level), and the signal level of the detection signal Vskim (hereinafter referred to as the detection signal level) in a pixel 20 according to an embodiment of the present disclosure. FIG. 11 shows a curve W1 indicating the PD voltage level for each light intensity, and a curve W2 indicating the detection signal level for each light intensity. The horizontal axis of FIG. 11 represents the light intensity of incident light. The vertical axis of FIG. 11 represents the PD voltage level for the curve W1 and the detection signal level for the curve W2.

[0094] 11 illustrates the first threshold Lhigh and the second threshold Llow. The first threshold Lhigh is the light intensity of incident light when the charge generated by the photoelectric conversion element PD reaches the saturated charge amount of the diffusion region 51. As shown by the curve W1, when the light intensity of the incident light is less than the first threshold Lhigh, the PD voltage level decreases monotonically as the light intensity of the incident light increases. On the other hand, when the light intensity of the incident light is equal to or greater than the first threshold Lhigh, the PD voltage level hardly decreases even when the light intensity of the incident light increases.

[0095] Because the threshold modulation transistor Tftg has an incompletely depleted depletion layer, the detection signal level hardly changes when the intensity of incident light is equal to or lower than the second threshold Llow. When the intensity of incident light exceeds the second threshold Llow, the threshold of the threshold modulation transistor Tftg gradually increases, and the detection signal level monotonically decreases as the intensity of incident light increases. When the intensity of incident light exceeds the first threshold Lhigh, the detection signal level saturates and no longer changes.

[0096] 11 shows a first light intensity region R1 where the light intensity is less than the second threshold Llow, a second light intensity region R2 where the light intensity is equal to or greater than the second threshold Llow and less than the first threshold Lhigh, and a third light intensity region R3 where the light intensity is equal to or greater than the first threshold Lhigh. The detection signal level and the PD voltage level do not work together in the light intensity region R1, but do work together in the light intensity regions R2 and R3. That is, the threshold modulation transistor Tftg detects the detection signal Vskim of a constant signal level in the light intensity region R1, and detects the detection signal Vskim signal that changes depending on the amount of charge generated in the photoelectric conversion element PD in the light intensity region R2.

[0097] As a result, the threshold modulation transistor Tftg according to the embodiment of the present disclosure can reduce threshold variations due to the influence of dark current of the photoelectric conversion element PD, particularly when the intensity of incident light is low. As described above, the pixel 20 is also called an incomplete readout type pixel because some of the fluctuations in the charge amount of the photoelectric conversion element PD are not detected by the threshold modulation transistor Tftg. Furthermore, the pixel 20 that reads out the electrons out of the electrons and holes accumulated in the photoelectric conversion element PD is also called an indirect type pixel.

[0098] The charge of the photoelectric conversion element PD in the light intensity region R1 is read out as residual charge from the pixel circuit 23. The residual charge is read out via the floating diffusion region FD, not via the threshold modulation transistor Tftg. Furthermore, reset level noise is removed from the residual charge by CDS processing in the signal processing unit 14.

[0099] Fig. 12 is a circuit diagram of a pixel 101 according to a first comparative example. The pixel 101 in Fig. 12 differs from the pixel 20 in Fig. 5 in that it does not include a skimming circuit 22. In the pixel 101, the charge generated by the photoelectric conversion element PD during an exposure period for one frame continues to accumulate within the pixel 101 without being discharged until it is read out as a pixel signal Vimg. This requires that the pixel 101 be driven at a high voltage, and that the pixel transistors Ttrg, Tamp, Tsel, and Trst are all configured as HV-Trs with a breakdown voltage of, for example, 3.0 V.

[0100] 13 is a circuit diagram of a pixel 102 according to a second comparative example. The pixel 102 in FIG. 13 has a threshold modulation transistor Tr100, which transfers charge at the cathode of a photoelectric conversion element PD to its back gate. The threshold modulation transistor Tr100 varies its threshold voltage and source voltage level depending on the charge accumulated in the photoelectric conversion element PD, and outputs a pixel signal from its source to a vertical signal line VSL that corresponds to the amount of charge in the photoelectric conversion element PD.

[0101] The threshold of the threshold modulation transistor Tr100 fluctuates sensitively due to fluctuations in the amount of charge accumulated in the photoelectric conversion element PD, and also fluctuates sensitively the pixel signal output from the source of the threshold modulation transistor Tr100. As a result, particularly when the intensity of incident light is low, threshold variations due to the influence of noise such as dark current are reflected in the signal level of the pixel signal.

[0102] The pixel 20 according to the embodiment of the present disclosure is superior to the pixel 101 according to the first comparative example in that the skimming circuit 22 discharges charge whenever a predetermined amount of charge accumulates, allowing it to be driven at a low voltage. This allows the pixel transistor to be configured using, for example, a 1.0 V low-voltage transistor (LV-Tr). Furthermore, compared to the pixel 102 according to the second comparative example, the pixel 20 transfers charge from the photoelectric conversion element PD to the substrate, and the depletion layer formed near the interface between the source region 55 and the P-type diffusion region of the threshold modulation transistor Tftg, which uses the substrate as a back gate, is incompletely depleted. This reduces threshold variation in the threshold modulation transistor Tftg, thereby stabilizing the electrical characteristics of the final pixel signal.

[0103] Although Figure 8 and other figures illustrate the skimming circuit 22 having the number counting unit 34, the skimming circuit 22 may be configured without the number counting unit 34. For example, a capacitor that sequentially accumulates the charge discharged by the discharge unit 31 may be provided outside the pixel 20. In this case, a signal corresponding to the first digital signal Ddc can be obtained from the charge sequentially accumulated in the capacitor during the period corresponding to the discharge number counting period in Figure 6 by using an AD converter (not shown). Furthermore, a reduction in the voltage of the pixel transistor and a reduction in the threshold variation of the threshold modulation transistor Tftg can also be achieved in a similar manner.

[0104] (First Modification) Figure 14 is a cross-sectional view of a pixel 20a according to a first modification of the embodiment of the present disclosure. The pixel 20a differs from the pixel 20 of Figure 10 in that the diffusion region 51a of the photoelectric conversion element PD is disposed facing at least a portion of the channel 53 of the threshold modulation transistor Tftg across a P-type diffusion region. Because the diffusion region 51a has a higher N-type impurity concentration than the substrate 50, the depletion layer formed near the interface between the source region 55 and the P-type diffusion region is fully depleted. Due to this full depletion, even a small amount of charge transferred from the photoelectric conversion element PD to the substrate 50 fluctuates the threshold voltage of the threshold modulation transistor Tfth, which in turn changes the detection signal level, i.e., the source voltage, and thus becomes susceptible to threshold variation.

[0105] 10, the pixel 20a does not have a reset transistor Trst. The circuit configuration of the pixel 20a will be described later.

[0106] Fig. 15 is a graph showing the relationship between the light intensity of incident light and the PD voltage level and the detection signal level in a pixel 20a according to a first modified example of an embodiment of the present disclosure. Fig. 15 shows a curve W3 indicating the PD voltage level for each light intensity, and a curve W4 indicating the detection signal level for each light intensity. The horizontal axis of Fig. 15 represents the light intensity of incident light. The vertical axis of Fig. 15 represents the PD voltage level for curve W3 and the detection signal level for curve W4.

[0107] Curve W4 in Fig. 15 differs from curve W2 in Fig. 11 in that the detection signal level monotonically decreases as the light intensity of the incident light increases in light intensity region R1. That is, in pixel 20a, the signal level of detection signal Vskim changes according to the amount of charge generated in photoelectric conversion element PD, regardless of the amount of incident light. As shown in Fig. 15, pixel 20a is also called a full readout type pixel because fluctuations in the amount of charge in photoelectric conversion element PD are detected by threshold modulation transistor Tftg regardless of the amount of incident light.

[0108] 10, the full readout type pixel 20a does not require the readout of residual charge in the light intensity region R1. This eliminates the need for the pixel circuit 23, as well as the ADC 41 and adder 44 used for signal processing of the residual charge. In addition, the residual charge readout period in FIG. 5 is not required.

[0109] FIG. 16 is a block diagram illustrating a pixel 20a according to a first modified example of an embodiment of the present disclosure. FIG. 17 is a circuit diagram illustrating a more detailed configuration of the pixel 20a. The pixel 20a in FIGS. 16 and 17 differs from the pixel 20 in FIGS. 4 and 8 in that it does not include a pixel circuit 23 and a reset transistor Trst. The source of the transfer transistor Ttrg is connected to the power supply wiring VDD. The transfer transistor Ttrg is turned on each time the amount of charge transferred to the substrate exceeds a reference amount. The transfer transistor Ttrg may also be turned on when the counting unit 34 finishes counting the number of times. The transfer transistor Ttrg discharges charge from the photoelectric conversion element PD to the power supply wiring VDD. The transfer transistor Ttrg in the pixel 20a is also referred to as a reset transistor.

[0110] Fig. 18 is a plan view of the pixel 20a. As described above, the pixel 20a has fewer transistors and the reset transistor Trst in the pixel circuit 23, and therefore the pixel area can be reduced compared to the pixel 20 in Fig. 9. Note that the pixel 20a may have a configuration including the pixel circuit 23.

[0111] The pixel 20a has threshold variations in the detection signal Vskim due to complete depletion compared to the pixel 20. The pixel 20a may be provided with a memory unit or the like that stores the amount of charge discharged by the discharge unit 31. By correcting the first digital signal Ddc using the amount of discharged charge stored in the memory unit, it is possible to eliminate the influence of threshold variations.

[0112] (Second Modification) The pixel 20 in FIG. 10 and the pixel 20a in FIG. 14 each have a photoelectric conversion element PD formed by a PNP junction. The pixel according to the embodiment of the present disclosure may also have a photoelectric conversion element formed by an NPN junction. FIG. 19 is a cross-sectional view of a pixel 20b according to a second modification of the embodiment of the present disclosure. The pixel 20b has a photoelectric conversion element PDa formed by an NPN junction. The photoelectric conversion element PDa mainly accumulates holes h in a diffusion region 51b, which is a P-type semiconductor region, based on incident light. The pixel 20b is an incomplete readout type pixel, and the end of the diffusion region 51b is disposed along the element isolation region 52. The channel of the threshold modulation transistor is an N-diffusion layer, and a P-semiconductor region of the substrate 50 is disposed below it. At least a portion of the P-semiconductor region functions as a backgate of the threshold modulation transistor. Because the P-semiconductor region has a low P-type impurity concentration, the depletion layer formed near the interface between the source region 55 and the P-semiconductor region is incompletely depleted. Therefore, it is possible to reduce variations in threshold voltage. The pixel 20b that reads out the holes out of the electrons and holes stored in the photoelectric conversion element PDa is also called a direct type pixel.

[0113] The pixel 20b also has a reset transistor Trsta and a transfer transistor Ttrga, which are configured as PMOS transistors. The transistors Trsta and Ttrga correspond to the transistors Trst and Ttrg in FIG. 10. The reset transistor Trsta has a drain region 56a configured in the P-well region. The transfer transistor Ttrga has a source region 57a ​​configured in the P-well region.

[0114] 10, the charge used by the comparison unit 33 for determination is an electron, and in the pixel 20b of Fig. 19, the charge used by the comparison unit 33 for determination is a hole. Also, as shown in Fig. 10 and Fig. 19, the conductivity type of the threshold modulation transistor Tftg provided in the detection unit 32 is constant regardless of the type of charge used by the comparison unit 33 for determination, and the conductivity types of the transfer transistor Ttrg (Ttrga) and reset transistor Trst (Trsta) provided in the discharge unit 31 have a conductivity type according to the type of charge used by the comparison unit 33 for determination.

[0115] Fig. 20 is a circuit diagram showing the configuration of pixel 20b. Fig. 21 is a plan view of pixel 20b. The skimming circuit 22b shown in Fig. 20 has an inverter 61 arranged therein. The inverter 61 is used to invert the detection signal Vskim detected by the detection unit 32b and input it to the comparison unit 33a. The inverter 61 has transistors Tr11 and Tr12. The transistor Tr11 is a PMOS transistor, and the transistor Tr12 is an NMOS transistor.

[0116] The detection unit 32b has a transistor Tvbp configured as a PMOS transistor. The transistor Tvbp corresponds to the transistor Tvbn in Fig. 8, and a bias voltage Vbp is applied to the gate of the transistor Tvbp.

[0117] 21 is transmitted to the second pixel chip b2 through the threshold modulation transistor Tftg. The charge discharged through the signal path P2a is discharged from the ground wiring GND side through the transfer transistor Ttrga and the reset transistor Trsta.

[0118] 22 is a cross-sectional view of a pixel 20c according to a third modification of the embodiment of the present disclosure. The pixel 20c is a full readout pixel having a photoelectric conversion element PDa formed by an NPN junction. The diffusion region 51c of the pixel 20c is disposed so that at least a portion thereof faces the channel 53 of the threshold modulation transistor Tftg, and a P-semiconductor region of the substrate 50 is disposed below the diffusion region 51c.

[0119] FIG. 23 is a circuit diagram showing the configuration of pixel 20c. FIG. 24 is a plan view of pixel 20c. Pixel 20c in FIGS. 23 and 24 differs from pixel 20b in FIGS. 20 and 21 in that it does not have a pixel circuit 23 or a reset transistor Trsta. The transfer transistor Ttrga in pixel 20c corresponds to the transfer transistor Ttrg in FIG. 17. The drain of the transfer transistor Ttrga is connected to the ground wiring GND. Note that pixel 20c may have a configuration including the pixel circuit 23, or may be provided with a memory unit or the like that stores the amount of charge discharged by the discharge unit 31.

[0120] As described above, the solid-state imaging device 10 according to the embodiment of the present disclosure transfers charge generated by photoelectric conversion of the photoelectric conversion element PD to the substrate, discharges the transferred charge each time the amount of charge transferred to the substrate reaches a reference amount, and measures the number of discharges. This reduces the amount of voltage change in the photoelectric conversion element PD and the substrate. This allows each transistor in the pixel to be driven at a low voltage, thereby achieving low power consumption. The measurement of the number of discharges can be performed in parallel with the readout operation of multiple pixel rows, eliminating the need to reduce the frame rate. A threshold modulation transistor that uses the substrate, to which charge from the photoelectric conversion element is transferred, as its back gate can be configured as either an incomplete readout type or a complete readout type. Furthermore, after the measurement of the number of discharges is completed, residual charge in the substrate can be read out via a floating diffusion region, allowing for highly accurate reading of the charge generated by photoelectric conversion.

[0121] (Application Examples) The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, a robot, construction machinery, or agricultural machinery (tractor).

[0122] 25 is a block diagram showing a schematic configuration example of a vehicle control system 7000, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied. The vehicle control system 7000 includes a plurality of electronic control units connected via a communication network 7010. In the example shown in FIG. 25 , the vehicle control system 7000 includes a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an outside-vehicle information detection unit 7400, an inside-vehicle information detection unit 7500, and an integrated control unit 7600. The communication network 7010 connecting these multiple control units may be an in-vehicle communication network conforming to any standard, such as a Controller Area Network (CAN), a Local Interconnect Network (LIN), a Local Area Network (LAN), or FlexRay (registered trademark).

[0123] Each control unit includes a microcomputer that performs arithmetic processing according to various programs, a memory unit that stores the programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various controlled devices. Each control unit includes a network I / F for communicating with other control units via a communication network 7010, and a communication I / F for communicating with devices or sensors inside and outside the vehicle via wired or wireless communication. Figure 25 illustrates the functional configuration of the integrated control unit 7600, including a microcomputer 7610, a general-purpose communication I / F 7620, a dedicated communication I / F 7630, a positioning unit 7640, a beacon receiving unit 7650, an in-vehicle device I / F 7660, an audio / video output unit 7670, an in-vehicle network I / F 7680, and a memory unit 7690. The other control units also include a microcomputer, a communication I / F, a memory unit, and the like.

[0124] The drivetrain control unit 7100 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 7100 functions as a control device for a drive force generating device for generating drive force for the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating braking force for the vehicle. The drivetrain control unit 7100 may also function as a control device for an ABS (Antilock Brake System) or an ESC (Electronic Stability Control), etc.

[0125] A vehicle state detection unit 7110 is connected to the drivetrain control unit 7100. The vehicle state detection unit 7110 includes at least one of a gyro sensor that detects the angular velocity of the axial rotational motion of the vehicle body, an acceleration sensor that detects the acceleration of the vehicle, or a sensor that detects the amount of operation of the accelerator pedal, the amount of operation of the brake pedal, the steering angle of the steering wheel, the engine rotation speed, the rotation speed of the wheels, etc. The drivetrain control unit 7100 performs arithmetic processing using signals input from the vehicle state detection unit 7110, and controls the internal combustion engine, the drive motor, the electric power steering device, the brake device, etc.

[0126] The body system control unit 7200 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 7200. The body system control unit 7200 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0127] The battery control unit 7300 controls the secondary battery 7310, which is the power supply source for the drive motor, in accordance with various programs. For example, information such as battery temperature, battery output voltage, or remaining battery capacity is input to the battery control unit 7300 from a battery device equipped with the secondary battery 7310. The battery control unit 7300 performs arithmetic processing using these signals, and controls the temperature regulation of the secondary battery 7310 or a cooling device or the like equipped in the battery device.

[0128] The outside vehicle information detection unit 7400 detects information outside the vehicle equipped with the vehicle control system 7000. For example, at least one of an imaging unit 7410 and an outside vehicle information detection unit 7420 is connected to the outside vehicle information detection unit 7400. The imaging unit 7410 includes at least one of a time-of-flight (ToF) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The outside vehicle information detection unit 7420 includes at least one of an environmental sensor for detecting the current weather or climate, or a surrounding information detection sensor for detecting other vehicles, obstacles, pedestrians, etc. around the vehicle equipped with the vehicle control system 7000.

[0129] The environmental sensor may be, for example, at least one of a raindrop sensor that detects rain, a fog sensor that detects fog, a sunshine sensor that detects the degree of sunshine, and a snow sensor that detects snowfall. The surrounding information detection sensor may be at least one of an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device. The imaging unit 7410 and the outside vehicle information detection unit 7420 may each be provided as an independent sensor or device, or may be provided as a device in which multiple sensors or devices are integrated.

[0130] 26 shows an example of the installation positions of the imaging unit 7410 and the vehicle exterior information detection unit 7420. The imaging units 7910, 7912, 7914, 7916, and 7918 are provided, for example, at least one of the front nose, side mirrors, rear bumper, back door, and upper part of the windshield inside the vehicle cabin of the vehicle 7900. The imaging unit 7910 provided on the front nose and the imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 7900. The imaging units 7912 and 7914 provided on the side mirrors mainly acquire images of the sides of the vehicle 7900. The imaging unit 7916 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900. The imaging unit 7918 provided on the upper part of the windshield inside the vehicle cabin is mainly used to detect leading vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0131] 26 shows an example of the imaging ranges of the imaging units 7910, 7912, 7914, and 7916. Imaging range a indicates the imaging range of the imaging unit 7910 provided on the front nose, imaging ranges b and c indicate the imaging ranges of the imaging units 7912 and 7914 provided on the side mirrors, respectively, and imaging range d indicates the imaging range of the imaging unit 7916 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 7910, 7912, 7914, and 7916, a bird's-eye view image of the vehicle 7900 viewed from above can be obtained.

[0132] The outside vehicle information detection units 7920, 7922, 7924, 7926, 7928, and 7930 provided on the front, rear, sides, corners, and above the windshield inside the vehicle cabin of the vehicle 7900 may be, for example, ultrasonic sensors or radar devices. The outside vehicle information detection units 7920, 7926, and 7930 provided on the front nose, rear bumper, back door, and above the windshield inside the vehicle cabin of the vehicle 7900 may be, for example, LIDAR devices. These outside vehicle information detection units 7920 to 7930 are mainly used to detect preceding vehicles, pedestrians, obstacles, etc.

[0133] Returning to FIG. 25 , the explanation will be continued. The outside-vehicle information detection unit 7400 causes the imaging unit 7410 to capture an image outside the vehicle and receives the captured image data. The outside-vehicle information detection unit 7400 also receives detection information from the connected outside-vehicle information detection unit 7420. If the outside-vehicle information detection unit 7420 is an ultrasonic sensor, a radar device, or a LIDAR device, the outside-vehicle information detection unit 7400 emits ultrasonic waves or electromagnetic waves and receives information on the received reflected waves. Based on the received information, the outside-vehicle information detection unit 7400 may perform object detection processing or distance detection processing for people, vehicles, obstacles, signs, text on the road, etc. Based on the received information, the outside-vehicle information detection unit 7400 may also perform environment recognition processing for recognizing rainfall, fog, road conditions, etc. Based on the received information, the outside-vehicle information detection unit 7400 may also calculate the distance to an object outside the vehicle.

[0134] The outside vehicle information detection unit 7400 may also perform image recognition processing or distance detection processing to recognize people, vehicles, obstacles, signs, or characters on the road surface based on the received image data. The outside vehicle information detection unit 7400 may perform processing such as distortion correction or alignment on the received image data, and may also generate an overhead image or a panoramic image by combining image data captured by different image capturing units 7410. The outside vehicle information detection unit 7400 may also perform viewpoint conversion processing using image data captured by different image capturing units 7410.

[0135] The interior information detection unit 7500 detects information inside the vehicle. A driver state detection unit 7510 that detects the driver's state is connected to the interior information detection unit 7500, for example. The driver state detection unit 7510 may include a camera that captures an image of the driver, a biosensor that detects the driver's biometric information, or a microphone that collects sound from within the vehicle cabin. The biosensor is provided, for example, on the seat or steering wheel, and detects the biometric information of a passenger sitting in the seat or the driver gripping the steering wheel. The interior information detection unit 7500 may calculate the driver's level of fatigue or concentration based on the detection information input from the driver state detection unit 7510, or may determine whether the driver is dozing off. The interior information detection unit 7500 may perform processing such as noise canceling on the collected audio signal.

[0136] The integrated control unit 7600 controls the overall operation of the vehicle control system 7000 according to various programs. An input unit 7800 is connected to the integrated control unit 7600. The input unit 7800 may be implemented by a device that can be operated by a passenger, such as a touch panel, a button, a microphone, a switch, or a lever. Data obtained by voice recognition of a voice input through a microphone may be input to the integrated control unit 7600. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or a personal digital assistant (PDA) that can operate the vehicle control system 7000. The input unit 7800 may be, for example, a camera, in which case the passenger can input information using gestures. Alternatively, data obtained by detecting the movement of a wearable device worn by the passenger may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on information input by the passenger using the input unit 7800 and outputs the input signal to the integrated control unit 7600. Passengers and the like operate this input unit 7800 to input various data to the vehicle control system 7000 and to instruct processing operations.

[0137] The storage unit 7690 may include a ROM (Read Only Memory) that stores various programs executed by the microcomputer, and a RAM (Random Access Memory) that stores various parameters, calculation results, sensor values, etc. The storage unit 7690 may also be realized by a magnetic storage device such as an HDD (Hard Disc Drive), a semiconductor storage device, an optical storage device, a magneto-optical storage device, or the like.

[0138] The general-purpose communication I / F 7620 is a general-purpose communication I / F that mediates communication with various devices present in the external environment 7750. The general-purpose communication I / F 7620 may implement a cellular communication protocol such as GSM (Global System of Mobile communications), WiMAX (registered trademark), LTE (Long Term Evolution), or LTE-Advanced (LTE-A), or other wireless communication protocols such as a wireless LAN (also referred to as Wi-Fi (registered trademark)) or Bluetooth (registered trademark). The general-purpose communication I / F 7620 may connect to a device (e.g., an application server or a control server) present on an external network (e.g., the Internet, a cloud network, or an operator-specific network) via, for example, a base station or an access point. In addition, the general-purpose communication I / F 7620 may connect to a terminal located near the vehicle (e.g., a terminal of a driver, pedestrian, or store, or an MTC (Machine Type Communication) terminal) using, for example, P2P (Peer To Peer) technology.

[0139] The dedicated communication I / F 7630 is a communication I / F that supports a communication protocol designed for use in vehicles. The dedicated communication I / F 7630 may implement a standard protocol such as WAVE (Wireless Access in Vehicle Environment), which is a combination of a lower layer IEEE 802.11p and an upper layer IEEE 1609, DSRC (Dedicated Short Range Communications), or a cellular communication protocol. The dedicated communication I / F 7630 typically performs V2X communication, which is a concept including one or more of vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.

[0140] The positioning unit 7640 performs positioning by receiving, for example, GNSS signals from GNSS (Global Navigation Satellite System) satellites (for example, GPS signals from GPS (Global Positioning System) satellites), and generates position information including the latitude, longitude, and altitude of the vehicle. Note that the positioning unit 7640 may identify the current position by exchanging signals with a wireless access point, or may obtain position information from a terminal such as a mobile phone, PHS, or smartphone that has a positioning function.

[0141] The beacon receiving unit 7650 receives, for example, radio waves or electromagnetic waves transmitted from radio stations or the like installed on the road, and acquires information such as the current location, congestion, road closures, required travel time, etc. The function of the beacon receiving unit 7650 may be included in the dedicated communication I / F 7630 described above.

[0142] The in-vehicle device I / F 7660 is a communication interface that mediates connections between the microcomputer 7610 and various in-vehicle devices 7760 present in the vehicle. The in-vehicle device I / F 7660 may establish wireless connections using wireless communication protocols such as wireless LAN, Bluetooth (registered trademark), NFC (Near Field Communication), or WUSB (Wireless USB). Furthermore, the in-vehicle device I / F 7660 may establish a wired connection such as USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface), or MHL (Mobile High-Definition Link) via a connection terminal (and a cable, if necessary) not shown. The in-vehicle device 7760 may include, for example, at least one of a mobile device or a wearable device owned by a passenger, or an information device carried into or attached to the vehicle. The in-vehicle device 7760 may also include a navigation device that searches for a route to an arbitrary destination. The in-vehicle device I / F 7660 exchanges control signals or data signals with these in-vehicle devices 7760.

[0143] The in-vehicle network I / F 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network I / F 7680 transmits and receives signals in accordance with a predetermined protocol supported by the communication network 7010.

[0144] The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 in accordance with various programs based on information acquired via at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. For example, the microcomputer 7610 may calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the acquired information inside and outside the vehicle, and output control commands to the drivetrain control unit 7100. For example, the microcomputer 7610 may perform cooperative control aimed at realizing functions of an Advanced Driver Assistance System (ADAS), including vehicle collision avoidance or impact mitigation, following driving based on the following distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc. In addition, the microcomputer 7610 may perform cooperative control for the purpose of autonomous driving, in which the vehicle travels autonomously without relying on driver operation, by controlling a driving force generating device, a steering mechanism, a braking device, etc. based on information acquired about the vehicle's surroundings.

[0145] The microcomputer 7610 may generate three-dimensional distance information between the vehicle and objects such as surrounding structures and people, and create local map information including information about the vicinity of the vehicle's current location, based on information acquired via at least one of the general-purpose communication I / F 7620, the dedicated communication I / F 7630, the positioning unit 7640, the beacon receiving unit 7650, the in-vehicle device I / F 7660, and the in-vehicle network I / F 7680. Furthermore, the microcomputer 7610 may predict dangers, such as a vehicle collision, the approach of a pedestrian, or entry into a closed road, based on the acquired information, and generate a warning signal. The warning signal may be, for example, a signal for generating a warning sound or turning on a warning lamp.

[0146] The audio / image output unit 7670 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying vehicle occupants or the outside of the vehicle of information. In the example of FIG. 25 , an audio speaker 7710, a display unit 7720, and an instrument panel 7730 are illustrated as output devices. The display unit 7720 may include, for example, at least one of an on-board display and a head-up display. The display unit 7720 may have an AR (Augmented Reality) display function. The output device may also be other devices, such as headphones, a wearable device such as an eyeglass-type display worn by the occupant, a projector, or a lamp. When the output device is a display device, the display device visually displays results obtained by various processes performed by the microcomputer 7610 or information received from other control units in various formats, such as text, images, tables, and graphs. When the output device is an audio output device, the audio output device converts audio signals, such as reproduced audio data or acoustic data, into analog signals and audibly outputs the analog signals.

[0147] In the example shown in FIG. 25 , at least two control units connected via the communication network 7010 may be integrated into a single control unit. Alternatively, each control unit may be composed of multiple control units. Furthermore, the vehicle control system 7000 may include another control unit not shown. In the above description, some or all of the functions performed by one of the control units may be performed by another control unit. In other words, as long as information is transmitted and received via the communication network 7010, predetermined arithmetic processing may be performed by one of the control units. Similarly, a sensor or device connected to one of the control units may be connected to another control unit, and multiple control units may transmit and receive detection information to and from each other via the communication network 7010.

[0148] A computer program for realizing each function of the electronic device 1 according to the present embodiment described with reference to FIG. 1 can be implemented in any control unit or the like. A computer-readable recording medium storing such a computer program can also be provided. Examples of the recording medium include a magnetic disk, an optical disk, a magneto-optical disk, and a flash memory. The computer program may also be distributed, for example, via a network without using a recording medium.

[0149] In the vehicle control system 7000 described above, the solid-state imaging device 10 according to the present embodiment described with reference to Fig. 4 can be applied to the imaging unit 7410 of the application example shown in Fig. 25. This allows the imaging unit 7410 to output a higher-resolution image.

[0150] 1 may be realized in a module (for example, an integrated circuit module configured on a single die) for the integrated control unit 7600 shown in Fig. 25. Alternatively, the electronic device 1 described using Fig. 1 may be realized by a plurality of control units of the vehicle control system 7000 shown in Fig. 25.

[0151] The present technology may be configured as follows: (1) A solid-state imaging device comprising: a photoelectric conversion element that transfers charges generated in accordance with the amount of incident light to a substrate; a detection unit that detects a detection signal in accordance with the charges transferred to the substrate; a comparison unit that determines whether the amount of charge transferred to the substrate exceeds a predetermined reference amount by comparing a signal level of the detection signal with a predetermined threshold; and a discharge unit that discharges charges from the photoelectric conversion element and the substrate each time the amount of charge transferred to the substrate exceeds the reference amount. (2) The solid-state imaging device according to (1), further comprising a count measurement unit that measures the number of discharges from the discharge unit. (3) The solid-state imaging device according to (2), wherein the detection unit has a first transistor that detects the charges transferred to the substrate, and the photoelectric conversion element is disposed on at least a portion of the substrate and has a diffusion region that accumulates the charges generated in accordance with the amount of incident light, and at least a portion of the diffusion region is disposed opposite a channel of the first transistor. (4) The solid-state imaging device according to (3), wherein the detection unit detects the detection signal, the signal level of which changes in accordance with the amount of charge generated in the photoelectric conversion element, regardless of the amount of incident light. (5) The solid-state imaging device according to (2), wherein the detection unit includes a first transistor that detects charge transferred to the substrate, the photoelectric conversion element is disposed on at least a part of the substrate and has a diffusion region that accumulates the charge generated in accordance with the amount of incident light, and an element isolation region is disposed between the diffusion region and the first transistor, and an end of the diffusion region closer to the first transistor is disposed along the element isolation region. (6) The solid-state imaging device according to (5), wherein the detection unit detects the detection signal of a constant signal level when the amount of incident light is less than a predetermined light intensity, and detects the detection signal of a signal level that changes in accordance with the amount of charge generated in the photoelectric conversion element when the amount of incident light is equal to or greater than the predetermined light intensity. (7) The solid-state imaging device according to any one of (3) to (6), wherein the impurity concentration of the diffusion region is higher than the impurity concentration of the substrate.(8) The solid-state imaging device according to (3) or (4), wherein the discharge unit has a second transistor that discharges charges from the photoelectric conversion element and the substrate each time the amount of charge transferred to the substrate exceeds the reference amount and when the counting unit has finished counting the number of discharges. (9) The solid-state imaging device according to any one of (3) to (7), comprising a plurality of pixels each performing photoelectric conversion, wherein each of the plurality of pixels has the photoelectric conversion element, the detection unit, the comparison unit, the discharge unit, and the number counting unit. (10) The solid-state imaging device according to (9), wherein each of the plurality of pixels has a pixel circuit that outputs a pixel signal according to residual charges remaining in the photoelectric conversion element and the substrate when the counting unit has finished counting the number of discharges. (11) The solid-state imaging device according to (10), wherein the discharge unit includes: a third transistor that discharges charges from the photoelectric conversion element and the substrate, and a second transistor that transfers the charges from the photoelectric conversion element and the substrate to the third transistor every time the amount of charge transferred to the substrate exceeds the reference amount, and that transfers the residual charges to the pixel circuit when the counting unit has finished counting the number of discharges. (12) The solid-state imaging device according to (10) or (11), wherein the detection unit detects the detection signal, the comparison unit determines the detection, and the counting unit counts the number of discharges. (13) The solid-state imaging device according to any one of (10) to (12), further comprising a signal processing unit that processes signals photoelectrically converted by the plurality of pixels, wherein the number counter in each of the plurality of pixels supplies a first digital signal based on information about the measured number of discharges to the signal processing unit, the signal processing unit combines a second digital signal obtained by digitizing the pixel signal with the first digital signal to generate a third digital signal, and the second digital signal includes information about residual charges remaining in the photoelectric conversion element and the substrate when measurement of the number of discharges by the number counter is completed. (14) The solid-state imaging device according to (13), wherein the second digital signal includes information about a difference between a reset level and a signal level.(15) The solid-state imaging device according to (13) or (14), wherein the signal processing unit generates the first digital signal based on a value obtained by multiplying a fourth digital signal including information on the measured number of discharges by a predetermined coefficient specific to each pixel. (16) The solid-state imaging device according to (15), wherein a signal level of the fourth digital signal is a level corresponding to a value of a predetermined function having as an input parameter a value obtained by multiplying the signal level of the detection signal after discharge of the charge of the photoelectric conversion element by the predetermined threshold. (17) The solid-state imaging device according to any one of (1) to (16), wherein the charge transferred from the photoelectric conversion element to the substrate and used for determination by the comparison unit is an electron or a hole, the conductivity type of a transistor provided in the detection unit is constant regardless of the type of charge used for determination by the comparison unit, and the conductivity type of the transistor provided in the discharge unit has a conductivity type corresponding to the type of charge used for determination by the comparison unit. (18) The solid-state imaging device according to any one of (1) to (17), wherein a threshold value of a transistor provided in the detection unit changes according to the amount of charge transferred from the substrate. (19) The solid-state imaging device according to any one of (1) to (18), wherein the comparison unit compares a signal level of the detection signal with the predetermined threshold value while providing hysteresis. (20) An electronic device comprising: a solid-state imaging device; and an image processing unit that processes image data output from the solid-state imaging device, wherein the solid-state imaging device comprises: a photoelectric conversion element that transfers charges generated according to the amount of incident light to a substrate; a detection unit that detects a detection signal according to the charges transferred to the substrate; a comparison unit that determines whether the amount of charge transferred to the substrate exceeds a predetermined reference amount by comparing the signal level of the detection signal with a predetermined threshold value; and a discharge unit that discharges charges from the photoelectric conversion element and the substrate every time the amount of charge transferred to the substrate exceeds the reference amount.

[0152] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents.

[0153] 1 Electronic device, 2 Image processing unit, 3 Recording unit, 4 Control unit, 5 Imaging lens, 10 Solid-state imaging device, 11 Pixel array unit, 12 Vertical drive circuit, 13 Timing control circuit, 14 Signal processing unit, 15 Correction circuit, 20, 20a, 20b, 20c, 101, 102 Pixel, 21 Pixel main unit, 22, 22a, 22b Skimming circuit, 23 Pixel circuit, 31 Discharge unit, 32, 32a, 32b Detection unit, 35 Readout circuit, 33, 33a Comparison unit, 34 Number measurement unit, 41 ADC, 42 Coefficient generation unit, 43 Multiplier, 44 Adder, 50 Substrate, 51, 51a, 51b, 51c Diffusion region, 52 Element isolation region, 53 Channel, 55, 56, 57a Source region, 56a, 57 Drain region, 61 Inverter

Claims

1. A solid-state imaging device comprising: a photoelectric conversion element that transfers electric charges generated in accordance with the amount of incident light to a substrate; a detection unit that detects a detection signal in accordance with the electric charges transferred to the substrate; a comparison unit that determines whether the amount of electric charges transferred to the substrate exceeds a predetermined reference amount by comparing the signal level of the detection signal with a predetermined threshold; and a discharge unit that discharges electric charges from the photoelectric conversion element and the substrate every time the amount of electric charges transferred to the substrate exceeds the reference amount.

2. The solid-state imaging device according to claim 1, further comprising a counting unit that counts the number of ejections of said ejection unit.

3. The solid-state imaging device of claim 2, wherein the detection unit has a first transistor that detects the charge transferred to the substrate, the photoelectric conversion element is disposed on at least a portion of the substrate and has a diffusion region that accumulates the charge generated in accordance with the amount of the incident light, and at least a portion of the diffusion region is disposed opposite the channel of the first transistor.

4. The solid-state imaging device according to claim 3, wherein the detection section detects the detection signal, the signal level of which changes in accordance with the amount of charge generated in the photoelectric conversion element, regardless of the amount of incident light.

5. The solid-state imaging device of claim 2, wherein the detection unit has a first transistor that detects the charge transferred to the substrate, the photoelectric conversion element is disposed on at least a portion of the substrate and has a diffusion region that accumulates the charge generated in accordance with the amount of incident light, and further comprises an element isolation region that is disposed between the diffusion region and the first transistor, and an end of the diffusion region that is closer to the first transistor is disposed along the element isolation region.

6. The solid-state imaging device of claim 5, wherein the detection unit detects the detection signal at a constant signal level when the amount of incident light is less than a predetermined light intensity, and detects the detection signal whose signal level changes according to the amount of charge generated in the photoelectric conversion element when the amount of incident light is equal to or greater than the predetermined light intensity.

7. The solid-state imaging device according to claim 3, wherein the impurity concentration of the diffusion region is higher than the impurity concentration of the substrate.

8. The solid-state imaging device according to claim 3, wherein the discharge section has a second transistor that discharges electric charges from the photoelectric conversion element and the substrate each time the amount of electric charge transferred to the substrate exceeds the reference amount and when the counting section finishes counting the number of discharges.

9. A solid-state imaging device as described in claim 3, comprising a plurality of pixels each performing photoelectric conversion, each of the plurality of pixels having the photoelectric conversion element, the detection section, the comparison section, the discharge section, and the number measurement section.

10. The solid-state imaging device according to claim 9, wherein each of the plurality of pixels has a pixel circuit that outputs a pixel signal corresponding to residual charge remaining in the photoelectric conversion element and the substrate when the counting unit finishes counting the number of discharges.

11. The solid-state imaging device of claim 10, wherein the discharge section comprises: a third transistor that discharges electric charges from the photoelectric conversion element and the substrate; and a second transistor that transfers the electric charges from the photoelectric conversion element and the substrate to the third transistor every time the amount of charge transferred to the substrate exceeds the reference amount, and that transfers the residual electric charges to the pixel circuit when the counting section finishes counting the number of discharges.

12. The solid-state imaging device according to claim 10, wherein, in parallel with the process of the pixel circuits in the plurality of pixels detecting the pixel signals, a detection process of the detection signal by the detection unit, a determination process by the comparison unit, and a measurement process of the number of discharges by the number measurement unit are performed.

13. A solid-state imaging device as described in claim 10, further comprising a signal processing unit that processes signals photoelectrically converted by the plurality of pixels, wherein the count measurement unit in each of the plurality of pixels supplies a first digital signal based on information of the measured number of discharges to the signal processing unit, and the signal processing unit generates a third digital signal by combining the first digital signal with a second digital signal obtained by digitizing the pixel signal, and the second digital signal includes information on residual charges remaining in the photoelectric conversion element and the substrate when measurement of the number of discharges by the count measurement unit is completed.

14. The solid-state imaging device according to claim 13, wherein the second digital signal includes information of a difference between a reset level and a signal level.

15. The solid-state imaging device according to claim 13, wherein the signal processing unit generates the first digital signal based on a value obtained by multiplying a fourth digital signal, which includes information on the measured number of ejections, by a predetermined coefficient unique to each pixel.

16. The solid-state imaging device according to claim 15, wherein the signal level of the fourth digital signal is a level corresponding to a value of a predetermined function having as an input parameter a value obtained by multiplying the signal level of the detection signal after the charge of the photoelectric conversion element is discharged by the predetermined threshold value.

17. The solid-state imaging device of claim 1, wherein the charge transferred from the photoelectric conversion element to the substrate and used by the comparison unit for determination is an electron or a hole, the conductivity type of the transistor provided in the detection unit is constant regardless of the type of charge used by the comparison unit for determination, and the conductivity type of the transistor provided in the discharge unit has a conductivity type corresponding to the type of charge used by the comparison unit for determination.

18. The solid-state imaging device according to claim 1, wherein a threshold value of a transistor provided in said detection section changes according to an amount of charge transferred from said substrate.

19. The solid-state imaging device according to claim 1, wherein the comparison section compares the signal level of the detection signal with the predetermined threshold value while providing hysteresis.

20. An electronic device comprising: a solid-state imaging device; and an image processing unit that processes image data output from the solid-state imaging device, wherein the solid-state imaging device comprises: a photoelectric conversion element that transfers charges generated in accordance with the amount of incident light to a substrate; a detection unit that detects a detection signal in accordance with the charges transferred to the substrate; a comparison unit that determines whether the amount of charge transferred to the substrate exceeds a predetermined reference amount by comparing the signal level of the detection signal with a predetermined threshold; and a discharge unit that discharges charges from the photoelectric conversion element and the substrate every time the amount of charge transferred to the substrate exceeds the reference amount.

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