Equalization switch circuit for equalization system, and equalization system

By designing a combination of reverse-set transistors and resistor capacitors in the equalization system, combined with the monitoring of the protection unit, the misdirection problem of existing equalization circuits when voltage fluctuations are large is solved, achieving higher safety and stability, and reducing power consumption.

WO2025055358A1PCT designated stage expired Publication Date: 2025-03-20SG MICRO CORP
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Patent Information

Application Number
PCT/CN2024/092611
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-11
Filing Date
2024-05-11
Publication Date
2025-03-20

AI Technical Summary

Technical Problem

The existing equalization circuit is prone to misdirection of switches when the battery voltage fluctuates greatly, resulting in short circuit problems and affecting the performance and safety of the battery pack.

Method used

An equalization switch circuit for an equalization system is designed, using a first transistor and a second transistor arranged in reverse, combining a first resistor and a capacitor, the conduction of the transistor is controlled by charging a narrow pulse drive capacitor, and under the monitoring of the protection unit, it avoids misleading.

Benefits of technology

It effectively avoids misdirection of the balance switch, protects the battery pack from being damaged due to short circuits, improves the safety and stability of the balance system, and reduces the power consumption of the circuit.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed in the present invention are an equalization switch circuit for an equalization system, and an equalization system. The equalization switch circuit comprises: a first transistor and a second transistor, which are reversely arranged; a first resistor and a capacitor, which are used for controlling the turning on of the first transistor and the second transistor; and a protection unit, which is used for monitoring the voltage at a second end of the capacitor when the equalization switch circuit is disabled, and pulling down gate electrodes of the first transistor and the second transistor to the ground when the voltage at the second end of the capacitor is less than a set threshold value, so that an equalization switch can be prevented from being mistakenly turned on when a body diode of the first transistor or the second transistor is turned on due to any external interference, and a plurality of power sources in the equalization system can be protected from being damaged due to a short circuit, thereby improving the safety and stability of the equalization system.
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Description

Balanced switch circuit for balanced system and balanced system

[0001] This application claims priority to a Chinese invention application filed on September 11, 2023, with application number 2023111653513 and titled “Balancing switch circuit for a balancing system and a balancing system”, and incorporates the entire specification, claims, drawings and abstract of the above-mentioned Chinese invention application into this application by reference. Technical Field

[0002] The present invention relates to the technical field of power supply balancing, and more particularly to a balancing switch circuit for a balancing system and a balancing system. Background Art

[0003] Battery packs are widely used in applications such as laptops, electric vehicles, and uninterruptible power supplies. Battery packs consist of multiple cells connected in series. However, due to manufacturing processes and usage, the voltage of each cell can vary. This can lead to imbalances during the charge and discharge process, which can cause overcharge or over-discharge of each cell, impacting the performance and safety of the battery pack. To address this inconsistency and extend the battery life, a balancing circuit is required in the battery pack.

[0004] Existing balancing circuits mainly include passive balancing circuits and active balancing circuits. Passive balancing circuits use energy-consuming components such as resistors to dissipate the excess energy in the high-voltage battery as heat energy, achieving battery voltage balancing within the battery pack. Although passive balancing circuits have the advantages of low cost and small size, they also have limitations such as severe energy waste and difficulty in heat dissipation. Active balancing circuits mainly use non-energy components such as capacitors, inductors, and transformers as intermediate energy transmission elements to transfer energy from the high-voltage battery to the low-voltage battery, achieving voltage balancing between batteries. They have the advantages of high efficiency and strong balancing capabilities.

[0005] During operation, the balancing circuit requires a voltage acquisition switch to collect the voltage of each battery cell in the battery pack to monitor the status of each cell. However, existing balancing circuits typically implement this acquisition switch using two back-to-back connected MOSFET transistors (Metal Oxide Semiconductor Field Effect Transistors). In actual use, a significant drop in the voltage of a cell can easily cause the switch connected to that cell to mis-conduct, causing other switches to conduct, resulting in a short circuit and impacting battery pack performance. Summary of the Invention

[0006] In view of the above problems, the object of the present invention is to provide a balancing switch circuit and a balancing system for a balancing system, which can avoid mis-conduction of the balancing switch when any external interference causes the body diode of the first transistor or the second transistor to be turned on, protect multiple power supplies in the balancing system from being damaged by short circuit, and improve the safety and stability of the balancing system.

[0007] According to one aspect of the present invention, a balancing switch circuit for a balancing system is provided, wherein the balancing system is used to balance voltages across multiple power supplies, wherein the balancing switch circuit includes: a first transistor, wherein a first end of the first transistor serves as a first connection end of the balancing switch circuit; a second transistor, wherein a first end of the second transistor serves as a second connection end of the balancing switch circuit, wherein second ends of the first transistor and the second transistor are both electrically connected to a first node, and control ends of the first transistor and the second transistor are both electrically connected to a second node; a first resistor, wherein the first resistor is electrically connected between the first node and the second node; a capacitor, wherein a first end of the capacitor is electrically connected to the second node, and a second end of the capacitor is electrically connected to a third node; and a protection unit, wherein the protection unit is configured to monitor a voltage at the third node and, when the balancing switch circuit is in an off state, pull the voltage at the second node down to a reference ground if the voltage at the third node is detected to be less than a set threshold value, thereby preventing the first transistor and the second transistor from being mis-conducted.

[0008] Optionally, the second end of the capacitor is also used to receive a turn-on signal, which is used to charge the capacitor so as to control the conduction of the first transistor and the second transistor, wherein the turn-on signal is a pulse signal, and the first transistor and the second transistor are turned on during the effective pulse of the turn-on signal.

[0009] Optionally, the method further includes: a conduction control module, configured to generate the conduction signal; and a driver, wherein the driver is electrically connected between the output of the conduction control module and the second end of the capacitor.

[0010] Optionally, the protection unit includes: a comparator for comparing the voltage at the third node with a reference voltage, the reference voltage being used to represent the set threshold, and the comparator being used to generate a valid protection signal when the voltage at the third node is less than the reference voltage; a third transistor, a first end of the third transistor being electrically connected to the second node, and a second end of the third transistor being electrically connected to the reference ground; and a protection control module, the protection control module being electrically connected to the control end of the third transistor, and being used to turn on the third transistor according to the valid protection signal, wherein the protection control module is also used to receive the turn-on signal and enable or disable according to the turn-on signal.

[0011] Optionally, when the first transistor and the second transistor are turned off, the voltage value of the reference voltage is set so that the turn-on time of the third transistor is earlier than the time when the voltage between the first node and the second node is equal to the turn-on threshold of the first transistor and the second transistor.

[0012] Optionally, it further includes: a pre-charging unit, configured to pre-charge the control terminals of the first transistor and the second transistor according to a bias voltage.

[0013] Optionally, the pre-charging unit includes: a fourth transistor, a first end of the fourth transistor being connected to the bias voltage, and a second end of the fourth transistor being connected to the control ends of the first transistor and the second transistor; and a second resistor, a first end of the second resistor being connected to the bias voltage, and a second end of the second resistor being connected to the control end of the fourth transistor and the first end of the capacitor.

[0014] Optionally, the bias voltage is set to be equal to the sum of the voltage at the first connection and a set voltage, and the set voltage is equal to the voltage across the power supply.

[0015] Optionally, the method further includes: a transient voltage suppression diode connected between the first node and the second node.

[0016] According to another aspect of the present invention, there is provided a balancing system for balancing the voltages across multiple power supplies, comprising: an energy storage element configured to store or release energy; a first power supply node; a second power supply node; a balancing switch array comprising a plurality of the aforementioned balancing switch circuits, wherein the first connection end of each balancing switch circuit is electrically connected to the positive terminal or the negative terminal of the corresponding power supply, and the second connection end of each balancing switch circuit is electrically connected to the first power supply node or the second power supply node; a reversing switch array connected between the first power supply node and the second power supply node and the energy storage element, and configured to switch so that the selected power supply is electrically connected to the energy storage element according to a preset polarity; a voltage sampling circuit configured to obtain the voltage values ​​of the multiple power supplies by sampling the voltage value on the energy storage element; and a controller for controlling the switching of the balancing switch array and the reversing switch array according to the voltage values ​​of the multiple power supplies to balance the voltage values ​​of the multiple power supplies.

[0017] Optionally, the controller is configured to: obtain a strong power source with a maximum voltage value and a weak power source with a minimum voltage value from the voltage values ​​of the multiple power sources, electrically connect the strong power source to the energy storage element so that the strong power source charges the energy storage element, and enable control of the energy storage element to charge the weak power source, wherein the energy storage element includes at least one flying capacitor.

[0018] In summary, the balancing switch circuit for a balancing system provided by an embodiment of the present invention includes a first transistor and a second transistor arranged in opposite directions, and a first resistor and a capacitor for controlling the conduction of the first and second transistors. The first resistor is electrically connected between the source and gate of the first and second transistors, and the first end of the capacitor is connected to the gate of the first and second transistors. A narrow pulse conduction signal is applied to the second end of the capacitor to charge the capacitor to control the conduction of the balancing switch. The balancing switch circuit of the embodiment of the present invention uses a narrow pulse combined with a capacitor drive method to control the conduction of the first and second transistors. This allows the balancing switch to only be turned on for half a resonant cycle at a time, reducing the power consumption of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0020] FIG1 is a schematic structural diagram of a series battery pack balancing system according to the prior art in a specific application.

[0021] FIG2 is a diagram showing the working principle of a series battery pack balancing system provided according to the prior art.

[0022] FIG3 is a schematic structural diagram of a balancing switch circuit for a balancing system according to a first embodiment of the present invention.

[0023] FIG. 4 is a schematic diagram illustrating the structure of a balancing switch circuit for a balancing system according to a second embodiment of the present invention.

[0024] FIG5 is a schematic structural diagram of an equalization system according to a third embodiment of the present invention. DETAILED DESCRIPTION

[0025] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0026] It should be understood that in the following description, a "circuit" refers to a conductive loop formed by at least one element or subcircuit connected electrically or electromagnetically. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected" between two nodes, it can be directly coupled or connected to the other element or there can be intermediate elements. The connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two elements.

[0027] The present invention may be embodied in various forms, some examples of which are described below.

[0028] FIG1 is a schematic diagram of the structure of a series battery pack balancing system according to the prior art in a specific application. As shown in FIG1 , the series battery pack balancing system 100 provided by the prior art includes a balancing switch array 102, a controller 103, a voltage sampling module 104, and an energy storage module 105. The voltage sampling module 104 is used to collect the voltage value of each single cell in the battery pack 101 and provide the collected voltage value to the controller 103. The controller 103 compares the voltage value of each single cell and, based on the comparison result, controls the balancing switch array 102 to connect the single cell with the maximum voltage value to the energy storage module 105. When the single cell with the maximum voltage value reaches equilibrium with the energy storage module 105, the balancing switch array 102 is controlled to disconnect the electrical connection between the single cell with the maximum voltage value and the energy storage module 105. At the same time, the balancing switch array 102 is controlled to connect the single cell with the minimum voltage value to the energy storage module 105. When the power in the single cell with the minimum voltage value and the energy storage module 105 reaches equilibrium, the isolation switch array 102 is controlled to disconnect the electrical connection between the single cell with the minimum voltage value and the energy storage module 105, and the voltage value of each single cell collected by the voltage sampling module 104 is compared again until the power in all single cells in the series battery group 101 reaches equilibrium.

[0029] Figure 2 illustrates the operating principle of a series battery pack balancing system according to prior art. As shown in Figure 2, a series battery pack 101 comprises battery cells BT1, BT2, BT3, BTn-1, and BTn connected in series. The resulting output differential voltage points are, in order, BIT0, BIT1, BIT2, BIT3, BITn-1, and BIT1n. The voltages across voltage nodes BIT0 and BIT1 represent the voltage of battery cell BT1; the voltages across voltage nodes BIT1 and BIT2 represent the voltage of battery cell BT2; and the voltages across voltage nodes BITn-1 and BITn represent the voltage of battery cell BTn. The connection nodes between the series battery pack 101 and the balancing switch array 102 are BIT0, BIT1, BIT2, BIT3, BITn-1, and BIT1n. Furthermore, the energy storage module 105 is a capacitor Cfly, and the balancing switch array 102 includes multiple balancing switches S1, S2, S3···Sn-1, Sn, wherein the first voltage ends of the balancing switches S1, S2, S3···Sn-1, Sn are electrically connected to the voltage nodes BIT0, BIT1, BIT2, BIT3···BITn-1, BIT1n in the series battery group 101, respectively, and the second voltage ends of the balancing switches S1, S2, S3···Sn-1, Sn are electrically connected to the capacitor Cfly, wherein the second voltage ends of the balancing switches S1, S3, S5···Sn-1 are electrically connected to the second end of the capacitor Cfly, and the second voltage ends of the balancing switches S2, S4, S6···Sn are electrically connected to the first end of the capacitor Cfly. As mentioned above, existing balancing switches are usually implemented using two MOSFETs connected back to back. In actual use, when the voltage of a battery drops significantly, it is easy to cause the switch connected to the battery to misconnect, which in turn causes other switches to misconnect, causing a short circuit problem and affecting the performance of the battery pack.

[0030] FIG3 is a schematic diagram of the structure of a balancing switch circuit for a balancing system according to a first embodiment of the present invention. The balancing system is used to balance the voltages across multiple power sources. It should be noted that the term "power source" herein may refer to substantially any type of component or circuit location that can generate a voltage across both ends. In an exemplary embodiment, a battery cell may be used as a power source. For example, the battery cell includes a rechargeable battery such as a lithium-ion battery, a nickel-cadmium battery, a nickel-metal cyanide battery, a lead-acid battery, a nickel-zinc battery, or other rechargeable battery. In another exemplary embodiment, a single or multiple capacitor circuits, diode circuits, transistor circuits, etc. may also be used as a power source. Of course, the power source may also include a circuit combination such as a resistor / capacitor network or a semiconductor network that can generate a voltage and can be balanced according to the system and method described herein.

[0031] As shown in FIG3 , the balancing switch circuit 200 of this embodiment includes a first transistor 201 , a second transistor 202 , a resistor Rpd, and a capacitor Cdrv.

[0032] It should be noted that the above-mentioned transistor may be an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). For the convenience of explanation, the following description is made by taking the transistor as a MOSFET as an example. In some embodiments of the present application, the MOSFET may be an N-type MOSFET. In this case, the first end of the transistor is called the drain, the second end is called the source, and the control end is called the gate. Alternatively, in other embodiments of the present application, the MOSFET may be a P-type MOSFET. In this case, the first end of the switch tube is called the source, the second end is called the drain, and the control end is called the gate. For the convenience of explanation, the following description is made by taking each transistor as an N-type MOSFET as an example.

[0033] In Figure 3, a first transistor 201 and a second transistor 202 can be connected in series to form a balancing switch. The first terminal (e.g., the drain) of the first transistor 201 can serve as a first connection terminal VBN of the balancing switch circuit 200, which is electrically connected to the positive or negative terminal of the corresponding power supply. Furthermore, because the first transistor 201 and the second transistor 202 are arranged in opposite directions, the second terminal (e.g., the source) of the first transistor 201 is electrically connected to the second terminal (e.g., the source) of the second transistor 202. The first terminal (e.g., the drain) of the second transistor 202 serves as a second connection terminal VBP of the balancing switch circuit 200, which is electrically connected to the first or second terminal of the fly capacitor Cfly.

[0034] For example, the first transistor 201 and the second transistor 202 are both driven by capacitors. When not driven, the first transistor 201 and the second transistor naturally enter the switch-off state, which facilitates protection design and implements negative voltage stress design. As shown in Figure 3, the first end of the resistor Rpd and the second end of the first transistor 201 and the second transistor 202 are electrically connected to node A, and the second end of the resistor Rpd and the control end (e.g., gate) of the first transistor 201 and the second transistor 202 are electrically connected to node B. The first end of the capacitor Cdrv is electrically connected to the second end of the resistor Rpd and the node B, and the second end of the capacitor Cdrv (i.e., node C) is used to receive a conduction signal ENA.

[0035] In this embodiment, a conduction signal ENA is applied to the second terminal of capacitor Cdrv. This conduction signal ENA charges capacitor Cdrv, causing the voltage across capacitor Cdrv to rise, thereby forming a voltage between the two terminals of resistor Rpd (i.e., between nodes A and B) to control the conduction of first transistor 201 and second transistor 202. Furthermore, the conduction signal ENA is a pulse signal. This drive pulse signal is coupled through capacitor Cdrv to turn on first transistor 201 and second transistor 202. First transistor 201 and second transistor 202 are briefly turned on during the active pulse of the conduction signal ENA. Furthermore, the stability time of the Rpd-Cdrv network, together with the switch threshold, determines the duration that the first transistor 201 and second transistor 202 remain in the on state.

[0036] Furthermore, the balancing switch circuit 200 also includes a conduction control module 206 and a driver 207. The output of the conduction control module 206 is electrically connected to the input of the driver 207, and the output of the driver 207 is electrically connected to the second end of the capacitor Cdrv. When the first transistor 201 and the second transistor 202 need to be turned on, the conduction control module 206 generates the conduction signal ENA, and the driver 207 then charges the capacitor Cdrv according to the conduction signal ENA, thereby temporarily turning on the first transistor 201 and the second transistor 202. The effective pulse duration and duty cycle of the conduction signal ENA are limited to a level that does not affect the conduction of the first transistor 201 and the second transistor 202 when causing changes in the DC potential of the gate.

[0037] As previously mentioned, due to circuit structure limitations, the acquisition switches or balancing switches used in the prior art are prone to mis-conduction when the battery voltage or the voltage on the flying capacitor bus undergoes significant fluctuations, which can lead to short circuits. Therefore, the balancing switch circuit 200 of the present application further includes a protection unit 210.

[0038] Under normal conditions, the battery voltage fluctuates slightly. The voltage on the fly capacitor bus is clamped to the current or last sampled voltage, which may be higher or lower than the battery voltage. The connection between the battery and the fly capacitor bus is disconnected by the reversed arrangement of first transistor 201 and second transistor 202. The DC voltage on capacitor Cdrv follows the lower voltage of first connection terminal VBN or second connection terminal VBP. Voltage fluctuations on the battery or fly capacitor bus are transmitted to protection unit 210 through capacitor Cdrv. If the voltage fluctuation exceeds a preset range, protection unit 210 triggers the discharge of capacitor Cdrv, forcing first transistor 201 and second transistor 202 to turn off. That is, the protection unit 210 is used to compare the voltage at the node C with a set threshold when the first transistor 201 and the second transistor 202 are turned off, and when the voltage at the node C is less than the set threshold, the protection unit 210 is used to discharge the capacitor Cdrv to pull down the voltage at the gate voltage of the first transistor 201 and the second transistor 202 (i.e., the node B) to the reference ground, thereby ensuring that the first transistor 201 and the second transistor 202 are in the off state, thereby avoiding mis-turning on of the first transistor 201 and the second transistor 202.

[0039] Furthermore, the protection unit 210 includes a third transistor 203, a protection control module 204, and a comparator 205. The comparator 205 has a positive input terminal and a negative input terminal. The positive input terminal of the comparator 205 is used to receive a reference voltage Vth representing the set threshold value. The negative input terminal of the comparator 205 is electrically connected to the node C. The output terminal of the comparator 205 is electrically connected to one input terminal of the protection control module 204. The comparator 205 is used to compare the voltage at the node C with the reference voltage Vth to generate a protection signal. The other input terminal of the protection control module 204 is electrically connected to the output terminal of the conduction control module 206. The output terminal of the protection control module 204 is electrically connected to the control terminal (e.g., gate) of the third transistor 203. The first terminal (e.g., drain) of the third transistor 203 is electrically connected to the node B. The second terminal (e.g., source) of the third transistor 203 is electrically connected to the reference ground.

[0040] In an exemplary embodiment, when the balancing switch circuit 200 of this embodiment is in the off state, the conduction signal ENA is in an invalid state, the driver 207 is in a high-impedance state, and the gates of the first transistor 201 and the second transistor 202 are pulled to a potential equal to their sources by the resistor Rpd, that is, the potentials of the nodes A and B are equal. At the same time, the protection control module 204 is enabled in response to the inactive conduction signal ENA and monitors the voltage at the second terminal of the capacitor Cdrv via the comparator 205. When the voltage at the first connection terminal VBN or the second connection terminal VBP of the balancing switch circuit 200 suddenly drops (for example, due to a short circuit in the power supply connected thereto), the voltage at the node A will drop. Subsequently, through the action of Rpd and the capacitor Cdrv, the voltage at the node C will drop by a corresponding amount. When the voltage at the node C drops by a certain amount, for example, when the voltage at the node C is less than the reference voltage Vth, the comparator 205 provides an effective protection signal (e.g., a high level) to the protection control module 204. In response to this effective protection signal, the protection control module 204 turns on the third transistor 203, thereby providing a discharge path from the node B (or the gates of the first and second transistors 201 and 202) to the reference ground, thereby preventing mis-conduction of the first transistors 201 and 202.

[0041] It should be noted that in the protection unit of this embodiment, when the voltage of the first transistor 201 and the second transistor 202 drops when they are in the off state, the turn-on time of the third transistor 203 should be earlier than the time when the voltage at the node A and the node B reaches the turn-on threshold of the first transistor 201 and the second transistor 202. In an exemplary embodiment, the above purpose can be achieved by setting the voltage value of the reference voltage Vth.

[0042] Furthermore, the resistor Rpd of the balancing switch circuit 200 in this embodiment further has a negative voltage protection function. When a negative voltage appears at the first connection terminal VBN (ie, the battery terminal), the resistor Rpd is used to limit the current to provide clamping protection.

[0043] FIG4 is a schematic diagram of a balancing switch circuit for a balancing system according to a second embodiment of the present invention. The balancing switch circuit 300 of the second embodiment differs from the balancing switch circuit 200 of the first embodiment in that the balancing switch circuit 300 further includes a pre-charging unit 320. The input of the pre-charging unit 320 is configured to receive a bias voltage Vb, and the output of the pre-charging unit 320 is electrically connected to the gates of the first transistor 301 and the second transistor 302. The pre-charging unit 320 is configured to pre-charge the gates of the first transistor 301 and the second transistor 302 according to the bias voltage Vb, thereby pulling the gate potential of the first transistor 301 and the second transistor 302 to an appropriate operating point. When the first transistor 301 and the second transistor 302 need to be turned on, the driver 307 only needs to provide a small swing to fully turn on the first transistor 301 and the second transistor 302.

[0044] Furthermore, the pre-charging unit 320 includes a fourth transistor 321 and a resistor Rpu. The fourth transistor 321 is, for example, a P-type MOSFET R. A first terminal (e.g., source) of the fourth transistor 321 is electrically connected to the bias voltage Vb and the first terminal of the resistor Rpu. A control terminal (e.g., gate) of the fourth transistor 321 is electrically connected to the second terminal of the resistor Rpu and the first terminal of the capacitor Cdrv. A second terminal (e.g., drain) of the fourth transistor 321 is electrically connected to the gates of the first transistor 301 and the second transistor 302.

[0045] Furthermore, in order to fully turn on the first transistor 301 and the second transistor 302, the bias voltage Vb needs to be higher than the voltage at the first connection terminal VBN of the balancing switch circuit 300. Furthermore, the bias voltage Vb is at least equal to the sum of the voltage at the first connection terminal VBN and a set voltage. For example, the set voltage is equal to a voltage that can be provided across a power supply.

[0046] Bias voltage Vb can be generated in a variety of ways. In an exemplary embodiment, the balancing system generally includes multiple balancing switch circuits 300, which are electrically connected to multiple power supplies, and the multiple power supplies are generally electrically connected in series. Here, multiple power supplies being connected in series means that the multiple power supplies are arranged sequentially, with the negative terminal of the first power supply being electrically connected to the positive terminal of the second power supply. Typically, the negative terminal of the first power supply is electrically connected to a reference ground, and the positive terminal of the last power supply is used to provide the total DC voltage potential of the series-connected power supply group (or series battery group). Therefore, because the first power supply in the multiple power supplies can provide a voltage that is one unit higher than the second power supply, the bias voltage Vb of the balancing switch circuit corresponding to the second power supply can be provided by the first power supply. For example, assuming the number of power supplies is m, where m is an integer greater than 1, and assuming that the first connection terminal VBN of the balancing switch circuit 300 in FIG4 is electrically connected to the positive terminal of the i-th power supply (where 1<i<m, and i is an integer), and the bias terminal 322 of the balancing switch circuit 300 is electrically connected to the positive terminal of the (i+1)-th power supply, a bias voltage Vb can be provided that is one unit voltage higher than the first connection terminal VBN. In another embodiment, when i=m, the bias terminal 322 of the balancing switch circuit 300 can be connected to a charge pump to generate the bias voltage Vb.

[0047] Furthermore, the balancing switch circuit 300 of the second embodiment further includes a transient voltage suppressor (TVS) diode DT connected between nodes A and B. When the TVS diode DT experiences a transient high-energy surge, its impedance decreases rapidly (up to 1*10^-12 seconds) while absorbing a large current, clamping the voltage across the diode to a predetermined value. This protects subsequent circuit components from damage caused by the transient high-energy surge.

[0048] Figure 5 is a schematic diagram of the structure of a balancing system according to a third embodiment of the present invention. As shown in Figure 5, the balancing system 400 of this embodiment includes or is connected to multiple power sources 401. As previously mentioned, each power source 401 can represent any suitable power source, such as a battery cell. In the specific embodiment shown in Figure 5, each power source 401 is a single battery cell with a rated voltage. However, each power source 401 can also represent multiple battery cells, a battery module, multiple battery modules, or a collection of other battery cells. In addition, each power source 401 can also use any other type of power source, such as a supercapacitor, a fuel cell, and a solar cell. It should also be noted that this embodiment does not limit the number of power sources connected in series; any number of power sources can be used. For ease of illustration, the power sources 401 are sequentially represented in Figure 5 as power source 401a through power source 401g.

[0049] As known to those skilled in the art, each power supply 401 includes a positive terminal (indicated by "+") and a negative terminal (indicated by "-"). Multiple power supplies 401 are electrically connected in series. Multiple power supplies 401 are connected in series when they are arranged one after another, with the negative terminal of the first power supply 401 of two adjacent power supplies 401 being electrically connected to the positive terminal of the second power supply 401. That is, the positive terminal of power supply 401a is electrically connected to the negative terminal of power supply 401b, the positive terminal of power supply 401b is electrically connected to the negative terminal of power supply 401c, and so on. Typically, the negative terminal 415 of the first power supply 401a is used to electrically connect to the reference ground, and the positive terminal 413 of the last power supply 401g is used to provide the total DC voltage potential of the series-connected power supply group (or series battery group).

[0050] The balancing system 400 includes a balancing switch array 410 , a commutation switch array 420 , a voltage acquisition switch array 430 , a voltage sampling circuit 440 , a controller 450 , and an energy storage element 460 .

[0051] The balancing switch array 410 includes a plurality of balancing switches 402. Each balancing switch 402 includes a first connection terminal and a second connection terminal. When the balancing switch 402 is activated, electrons can flow between the two terminals. Conversely, when the balancing switch 402 is deactivated, electrons are generally prevented from flowing between the two terminals.

[0052] Furthermore, the multiple balancing switches 402 in the balancing switch array 410 can be implemented by the balancing switch circuit 200 or 300 in the above-mentioned embodiment. In the balancing switch circuit 200, the first end (e.g., the drain) of the first transistor 201 can serve as the first connection terminal VBN of the balancing switch 402, the second end (e.g., the source) of the first transistor 201 is connected to the second end (e.g., the source) of the second transistor 202, and the first end (e.g., the drain) of the second transistor 202 serves as the second connection terminal VBP of the balancing switch 402.

[0053] Furthermore, the balancing switch circuit 200 in this embodiment further includes a protection unit 210. The protection unit 210 can compare the voltage at the node C with a set threshold when the balancing switch 402 is disabled. When the voltage at the node C is less than the set threshold, the protection unit 210 is configured to discharge the capacitor Cdrv to pull the gate voltages of the first transistor 201 and the second transistor 202 (i.e., the node B) down to the reference ground, thereby ensuring that the first transistor 201 and the second transistor 202 are in the off state, thereby preventing mis-conduction of the balancing switch 402.

[0054] Furthermore, the number of balancing switches 402 is greater than the number of power supplies 401 in the series power supply group. For example, the number of balancing switches 402 is greater than the number of power supplies 401 by one. For example, in the described embodiment, since seven power supplies 401 are electrically connected in series, eight balancing switches 402 are used. For clarity, the eight balancing switches 402 are sequentially labeled 402a-402h. The first connection terminal of each balancing switch 402 can be electrically connected to the positive terminal or the negative terminal of the corresponding power supply 401. For example, the first connection terminal of balancing switch 402a is electrically connected to the negative terminal of power supply 401a, the first connection terminal of balancing switch 402b is electrically connected to the positive terminal of power supply 401a, and so on. Since multiple power supplies 401 are electrically connected in series, the first connection terminal of balancing switch 402b is electrically connected to both the positive terminal of power supply 401a and the negative terminal of power supply 401b. The same reasoning applies to the other balancing switches 402.

[0055] Referring again to FIG. 5 , balancing system 400 further includes a first power supply node 411 and a second power supply node 412 (first power supply node 411 and second power supply node 412 may also be referred to as flying capacitor bus nodes). First power supply node 411 is formed by electrically connecting the second connection terminals of every other balancing switch 402, i.e., alternating balancing switches 402. Second power supply node 412 is formed by electrically connecting the second connection terminals of each balancing switch 402 that is not connected to first power supply node 411. In a preferred embodiment, as shown in FIG. 5 , first power supply node 411 is electrically connected to the second connection terminals of balancing switches 402b, 402d, 402f, and 402h, and second power supply node 412 is electrically connected to the second connection terminals of balancing switches 402a, 402c, 402e, and 402g.

[0056] In which, multiple balancing switches 402 can be operated to selectively electrically connect the positive terminal of the selected power supply 401 (for example, power supplies 401a-401g) to the first power supply node 411 and the negative terminal of the selected power supply 401 to the second power supply node 412, or to electrically connect the negative terminal of the selected power supply 401 to the first power supply node 411 and the positive terminal of the selected power supply 401 to the second power supply node 412.

[0057] The reversing switch array 420 has a first input end electrically connected to the first power supply node 411, a second input end electrically connected to the second power supply node 412, a first output end electrically connected to the first end of the energy storage element 460, and a second output end electrically connected to the second end of the energy storage element 460. The reversing switch array 420 can enable the balancing switch array 410 to be connected to the adjacent power supply 401, resulting in the relative polarity of the first power supply node 411 and the second power supply node 412 being reversed, so that the selected power supply 401 is always electrically connected to the energy storage element 460 with the correct polarity.

[0058] Furthermore, the switching switch array 420 includes switches 403-406. The first terminals of switches 403 and 404 are both electrically connected to a first power supply node 411, the second terminal of switch 403 is electrically connected to a first terminal of an energy storage element 460, and the second terminal of switch 404 is electrically connected to a second terminal of an energy storage element 460. In some embodiments, switches 403 and 404 may be implemented as transistors (e.g., metal oxide semiconductor (MOS) transistors), relays, other electrically controllable switches, or a combination thereof. Switch 403 is configured to selectively electrically connect the first power supply node 411 to the first terminal of the energy storage element 460, and switch 404 is configured to selectively electrically connect the first power supply node 411 to the second terminal of the energy storage element 460.

[0059] The first ends of switches 405 and 406 are both electrically connected to second power supply node 412, the second end of switch 405 is electrically connected to the first end of energy storage element 460, and the second end of switch 406 is electrically connected to the second end of energy storage element 460. In some embodiments, switches 405 and 406 can be implemented as transistors (e.g., metal oxide semiconductor (MOS) transistors), relays, other electrically controllable switches, or combinations thereof. Switch 405 is configured to selectively electrically connect second power supply node 412 to the first end of energy storage element 460, and switch 406 is configured to selectively electrically connect second power supply node 412 to the second end of energy storage element 460.

[0060] The energy storage element 460 is used to store or release energy. For example, the energy storage element 460 includes at least one flying capacitor Cfly. FIG5 illustrates an example in which the energy storage element 460 includes one flying capacitor Cfly.

[0061] The voltage acquisition switch array 430 has a first input terminal electrically connected to the first end of the flying capacitor Cfly, a second input terminal electrically connected to the second end of the flying capacitor Cfly, and a first output terminal and a second output terminal electrically connected to the voltage sampling circuit 440. The voltage acquisition switch array 430 is configured to provide the voltage on the flying capacitor Cfly to the voltage sampling circuit 440.

[0062] Furthermore, the voltage acquisition switch array 430 includes switches 407 and 408. A first end of the switch 407 is electrically connected to a first end of the fly capacitor Cfly, a second end of the switch 407 is electrically connected to a voltage sampling circuit 440, a first end of the switch 408 is electrically connected to a second end of the fly capacitor Cfly, and a second end of the switch 408 is electrically connected to the voltage sampling circuit 440.

[0063] The voltage sampling circuit 440 is configured to collect the voltage on the fly capacitor Cfly at preset time intervals to complete voltage sampling of the power source 401 that charges the fly capacitor Cfly, and provide all collected voltage data to the controller 450. For example, the voltage sampling circuit 440 can be implemented using an analog-to-digital converter (ADC), which is configured to convert the voltage signal on the fly capacitor Cfly into a digital signal corresponding thereto. Therefore, the digital data carried by the digital signal proportionally corresponds to the voltage of the fly capacitor Cfly and the power source 401 that charges the fly capacitor Cfly.

[0064] The controller 440 is used to control the operation of each component in the balancing system 400. For example, the controller 440 can be a general-purpose central processing unit (CPU), a general-purpose processor, a digital signal processing (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The above-mentioned processors can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and so on. The controller 440 can be independent of the balancing system 400 or integrated into other units, and is not specifically limited here.

[0065] In operation, the controller 440 controls the balancing switch array 410 to electrically connect each power supply 401 in the series power supply group to the first power supply node 411 and the second power supply node 412 one at a time, and controls the switching of the commutation switch array 420 to electrically connect the selected power supply 401 to the first and second terminals of the fly capacitor Cfly with the correct polarity, thereby charging the fly capacitor Cfly to a voltage level that matches the potential difference across the selected power supply 401. In this embodiment, the plurality of balancing switches 402 in the balancing switch array 410 can be implemented by the balancing switch circuit 200 described above. For example, the controller 440 controls the conduction process of the corresponding balancing switch circuit 200 by applying a control signal to the conduction control module 206.

[0066] For example, the controller 440 can control the balancing switch array 410 to electrically connect the positive and negative terminals of the power supply 401a to the first power node 411 and the second power node 412, and control the switching of the commutation switch array 420 to electrically connect the first power node 411 to the first terminal of the fly capacitor Cfly and the second power node 412 to the second terminal of the fly capacitor Cfly, thereby charging the fly capacitor Cfly to a voltage that matches the potential difference between the two terminals of the power supply 401a. The controller 440 then controls the balancing switch array 410 and the commutation switch array 420 to be disconnected, and then controls the voltage acquisition switch array 430 to be connected. The analog-to-digital converter (ADC) converts the voltage signal on the fly capacitor Cfly into a corresponding digital signal, thereby completing the voltage sampling of the power supply 401a. The above steps are then repeated until each power supply 401 in the series power supply group is sampled, thereby obtaining the voltage value of each power supply 401.

[0067] The controller 440 is further configured to receive voltage values ​​of the multiple power supplies 401a-401g acquired by the analog-to-digital converter (ADC). The controller 440 then compares the voltage values ​​of the multiple power supplies 401a-401g to identify the strong power supply with the maximum voltage value and the weak power supply with the minimum voltage value from the multiple power supplies 401.

[0068] In some embodiments, the controller 440 can sort the voltage values ​​of the multiple power sources 401a-401g from small to large, or from large to small, to achieve the purpose of obtaining weak power sources and strong power sources. The above is only an example of a method for obtaining weak power sources and strong power sources, and other methods are not described in detail here.

[0069] After obtaining the strong and weak power supplies in the series power group, controller 440 also includes a step of voltage balancing the strong and weak power supplies. This includes electrically connecting the strong power supply to a fly capacitor Cfly via a balancing switch array and a commutation switch array, allowing the strong power supply to charge the fly capacitor Cfly. The current path between the strong power supply and the fly capacitor is then disconnected, and the weak power supply is electrically connected to the fly capacitor Cfly, allowing the fly capacitor Cfly to charge the weak power supply. The voltage sampling and voltage balancing steps are then repeated until the voltage values ​​of all power supplies 401a-401g in the series power group are the same.

[0070] In summary, the balancing switch circuit for a balancing system provided by an embodiment of the present invention includes a first transistor and a second transistor arranged in opposite directions, and a first resistor and a capacitor for controlling the conduction of the first and second transistors. The first resistor is electrically connected between the source and gate of the first and second transistors, and the first end of the capacitor is connected to the gate of the first and second transistors. A narrow pulse conduction signal is applied to the second end of the capacitor to charge the capacitor to control the conduction of the balancing switch. The balancing switch circuit of the embodiment of the present invention uses a narrow pulse combined with a capacitor drive method to control the conduction of the first and second transistors. This allows the balancing switch to only be turned on for half a resonant cycle at a time, reducing the power consumption of the circuit.

[0071] Furthermore, the balancing switch circuit of the embodiment of the present invention also includes a protection unit, which is used to monitor the voltage at the second terminal of the capacitor when the balancing switch is disabled, and pull the gates of the first transistor and the second transistor to ground when the voltage at the second terminal of the capacitor is less than a set threshold. In this way, the balancing switch can be forcibly turned off when the voltage fluctuation at the power supply terminal or the flying capacitor bus exceeds a preset range, thereby avoiding mis-turning on of the balancing switch, protecting multiple power supplies in the balancing system from damage due to short circuits, and improving the safety and stability of the balancing system.

[0072] In the above description, the well-known structural elements and steps are not described in detail. However, it should be understood by those skilled in the art that the corresponding structural elements and steps can be implemented by various technical means. In addition, in order to form the same structural elements, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although each embodiment is described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination.

[0073] The embodiments of the present invention are described above, but these embodiments do not describe all details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and modify and use it based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A balancing switch circuit for a balancing system, wherein the balancing system is used to balance the voltages across a plurality of power supplies, wherein: The balancing switch circuit comprises: A first transistor, wherein a first end of the first transistor serves as a first connection end of the balancing switch circuit; a second transistor, wherein a first end of the second transistor serves as a second connection end of the balancing switch circuit, second ends of the first transistor and the second transistor are both electrically connected to a first node, and control ends of the first transistor and the second transistor are both electrically connected to a second node; a first resistor electrically connected between the first node and the second node; a capacitor, a first terminal of the capacitor being electrically connected to the second node, and a second terminal of the capacitor being electrically connected to a third node; and A protection unit, wherein the protection unit is used to monitor the voltage at the third node, and when the balancing switch circuit is in an off state, if it is monitored that the voltage at the third node is less than the set threshold value, the voltage at the second node is pulled down to a reference ground to avoid mis-conduction of the first transistor and the second transistor.

2. The balanced switch circuit according to claim 1, wherein: The second end of the capacitor is also used to receive a conduction signal, and the conduction signal is used to charge the capacitor so as to control the conduction of the first transistor and the second transistor. The conduction signal is a pulse signal, and the first transistor and the second transistor are turned on during an effective pulse period of the conduction signal.

3. The balancing switch circuit according to claim 2, further comprising: A conduction control module, used for generating the conduction signal; as well as A driver is electrically connected between the output of the conduction control module and the second end of the capacitor.

4. The balanced switch circuit according to claim 3, wherein: The protection unit comprises: a comparator, configured to compare the voltage at the third node with a reference voltage, wherein the reference voltage is used to represent the set threshold value, and the comparator is configured to generate a valid protection signal when the voltage at the third node is less than the reference voltage; a third transistor, a first terminal of the third transistor being electrically connected to the second node, and a second terminal of the third transistor being electrically connected to the reference ground; and a protection control module, the protection control module being electrically connected to the control terminal of the third transistor and configured to turn on the third transistor according to the effective protection signal, The protection control module is further used to receive the conduction signal and enable or disable according to the conduction signal.

5. The balanced switch circuit according to claim 4, wherein: When the first transistor and the second transistor are turned off, the voltage value of the reference voltage is set so that the third transistor is turned on earlier than the time when the voltage between the first node and the second node is equal to the turn-on threshold of the first transistor and the second transistor.

6. The balancing switch circuit according to claim 1, further comprising: A pre-charging unit is used to pre-charge the control terminals of the first transistor and the second transistor according to a bias voltage.

7. The balanced switch circuit according to claim 8, wherein: The pre-charging unit comprises: a fourth transistor, a first terminal of the fourth transistor being connected to the bias voltage, and a second terminal of the fourth transistor being connected to control terminals of the first transistor and the second transistor; and A second resistor, wherein a first end of the second resistor is connected to the bias voltage, and a second end of the second resistor is connected to the control end of the fourth transistor and the first end of the capacitor.

8. The balanced switch circuit according to claim 6, wherein: The bias voltage is set equal to the sum of the voltage at the first connection and a set voltage, and the set voltage is equal to the voltage across the power supply.

9. The balancing switch circuit according to claim 1, further comprising: A transient voltage suppression diode is connected between the first node and the second node.

10. A balancing system for balancing voltages across a plurality of power supplies, comprising: An energy storage element configured to store or release energy; a first power supply node; a second power supply node; A balancing switch array, comprising a plurality of balancing switch circuits according to any one of claims 1 to 11, wherein a first connection end of each balancing switch circuit is electrically connected to a positive terminal or a negative terminal of a corresponding power supply, and a second connection end of each balancing switch circuit is electrically connected to the first power supply node or the second power supply node; a commutation switch array, connected between the first power node, the second power node and the energy storage element, and configured to switch so that the selected power source is electrically connected to the energy storage element according to a preset polarity; A voltage sampling circuit is configured to obtain voltage values ​​of the multiple power supplies by sampling the voltage value on the energy storage element; as well as The controller is used to control the switching of the balancing switch array and the commutation switch array according to the voltage values ​​of the multiple power supplies, so as to balance the voltage values ​​of the multiple power supplies.

11. The balancing system according to claim 10, wherein: The controller is configured to: A strong power source with a maximum voltage value and a weak power source with a minimum voltage value are obtained from the voltage values ​​of the multiple power sources, and the strong power source is electrically connected to the energy storage element so that the strong power source charges the energy storage element, and the energy storage element is enabled to charge the weak power source. Wherein, the energy storage element includes at least one flying capacitor.

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