Oxide semiconductor thin film, semiconductor device and method for manufacturing same, and sputtering target and method for manufacturing sputtering target
Patent Information
- Application Number
- PCT/JP2024/032065
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-14
- Filing Date
- 2024-09-06
- Publication Date
- 2025-03-20
AI Technical Summary
The existing oxide semiconductor films are prone to negative threshold voltage shifts at high temperatures, affecting the reliability of the equipment.
An oxide semiconductor film containing indium (In), gallium (Ga) and aluminum (Al) is used, with a composition ratio of within a specific range, ensuring that carrier concentrations are maintained at high temperatures and avoiding negative shifts in the threshold voltage.
The oxide semiconductor film without negative shift in threshold voltage at high temperature is realized, which improves the reliability and stability of the equipment.
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Abstract
Description
Oxide semiconductor thin film, semiconductor device and method for manufacturing the same, sputtering target and method for manufacturing the sputtering target
[0001] The present invention relates to an oxide semiconductor thin film, a semiconductor device and a method for manufacturing the same, a sputtering target and a method for manufacturing a sputtering target.
[0002] Thin-film transistors (TFTs) using an In—Ga—Zn—O-based oxide semiconductor film (IGZO) as an active layer can achieve higher mobility than conventional TFTs using an amorphous silicon film as an active layer, and have therefore been widely applied to various displays in recent years (see, for example, Patent Document 1).
[0003] Recently, research into applying IGZO to semiconductor devices other than displays has been intensifying. However, negative shifts in threshold voltages have become a problem in device reliability tests (see Non-Patent Documents 1 and 2).
[0004] JP 2009-31750 A
[0005] A. Chasin et al., “Understanding and modeling the PBTI reliability of thin-film IGZO transistors,” vol. 1, pp. 31.1.1-31.1.4, 2022J. Guo et al., “Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability,” Dig. Tech. Pap. - Symp. VLSI Technol., vol. 2022-June, pp. 300-301, 2022
[0006] Semiconductor devices require higher process temperatures than display devices, oxide semiconductors are more susceptible to reduction, and higher reliability is required than in display devices. Therefore, oxide semiconductor materials that do not experience a negative shift in threshold voltage even at high temperatures are required.
[0007] In view of the above circumstances, an object of the present invention is to provide an oxide semiconductor thin film having a low carrier concentration and high hole mobility, and a thin film semiconductor device using the oxide semiconductor thin film as an active layer, which does not exhibit a negative shift in threshold voltage even at high temperatures, a semiconductor device using the oxide semiconductor thin film, a sputtering target capable of forming such an oxide semiconductor thin film, and a method for manufacturing the same.
[0008] As a result of extensive research conducted to achieve the above object, it was discovered that an oxide semiconductor thin film containing indium, gallium, and aluminum in a predetermined composition ratio maintains a low carrier concentration even after high-temperature processing and does not exhibit a negative shift in threshold voltage, and the present invention was completed based on this finding.
[0009] A first aspect of the present invention is an oxide semiconductor thin film that is composed of an oxide semiconductor containing, as a main component, an oxide containing indium, gallium, and aluminum in the following composition, and the oxide semiconductor has a composition ratio in a region surrounded by a line segment connecting points A and B, a line segment connecting points B and C, a line segment connecting points C and D, and a line segment connecting points D and A in a ternary phase diagram of In, Ga, and Al: Composition: In X Ga Y Al Z Point A: In 10 Ga 90 Al 0 Point B: In 30 Ga 30 Al 40 Point C: In 45 Ga 15 Al 40 Point D: In 45 Ga 55 Al 0 In the second aspect of the present invention, the carrier concentration is 1×10 18 cm -3The third aspect of the present invention is an oxide semiconductor thin film having a hole mobility of 1 cm or less. 2 / Vs or more. A fourth aspect of the present invention is the oxide semiconductor thin film according to the first aspect, which has an etching rate of 1 nm / sec or more when etched with a phosphoric acid-based etchant. A fifth aspect of the present invention is a semiconductor device comprising an oxide semiconductor thin film, at least a portion of which is the oxide semiconductor thin film according to any one of the first to fourth aspects. A sixth aspect of the present invention is the semiconductor device according to the fifth aspect, which has a gate electrode, a gate insulating film, an active layer, a source electrode, and a drain electrode, and the oxide semiconductor thin film is the active layer. A seventh aspect of the present invention is a method for manufacturing a semiconductor device comprising an oxide semiconductor thin film, the method comprising: forming the oxide semiconductor thin film according to any one of the first to fourth aspects as at least a portion of the oxide semiconductor thin film; and performing a reduction treatment on the oxide semiconductor of the oxide semiconductor thin film. An eighth aspect of the present invention is a sputtering target that is composed of an oxide sintered body containing, as a main component, an oxide containing indium, gallium, and aluminum in the following composition, and the oxide semiconductor has a composition ratio in a region surrounded by a line segment connecting points A and B, a line segment connecting points B and C, a line segment connecting points C and D, and a line segment connecting points D and A in a ternary phase diagram of In, Ga, and Al. Composition: In X Ga Y Al Z Point A: In 10 Ga 90 Al 0 Point B: In 30 Ga 30 Al 40 Point C: In 45 Ga 15 Al 40 Point D: In 45 Ga 55 Al 0A ninth aspect of the present invention is the sputtering target according to the eighth aspect, wherein the sputtering target has a relative density of 90% or more. A tenth aspect of the present invention is a method for producing a sputtering target comprising mixing indium oxide powder, gallium oxide powder, and aluminum oxide powder to form a molded body, and firing the molded body at 1100°C or more and 1650°C or less to produce a sputtering target having the oxide sintered body according to the eighth or ninth aspect. An eleventh aspect of the present invention is a method for producing a sputtering target comprising mixing oxides, hydroxides, or carbonates of indium, gallium, and aluminum and calcining the precursor powder at 1000°C to 1500°C to form a molded body, and firing the molded body at 1100°C or more and 1650°C or less to produce a sputtering target having the oxide sintered body according to the eighth or ninth aspect.
[0010] In the present invention, an oxide sintered body having a predetermined composition consisting of indium, gallium, and aluminum has a carrier concentration of 1×10 18 cm -3 The hole mobility is as low as 1 cm or less. 2 When this oxide semiconductor thin film is used as the active layer of a semiconductor device, a semiconductor device can be realized in which the threshold voltage does not negatively shift even at high temperatures.
[0011] FIG. 1 is a diagram showing a ternary diagram illustrating the composition of an oxide semiconductor of the present invention. FIG. 2 is a cross-sectional view showing an example of the structure of a semiconductor device of the present invention. FIG. 3 is a cross-sectional view showing an example of the structure of a semiconductor device of the present invention. FIG. 4 is a cross-sectional view showing an example of the structure of a semiconductor device of the present invention. FIG. 5 is a cross-sectional view showing an example of the structure of a semiconductor device of the present invention. FIG. 6 is a diagram showing the transfer characteristics of semiconductor device 8. FIG. 7 is a diagram showing the threshold voltage of a comparative semiconductor device.
[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0013] [Oxide Semiconductor Thin Film] The oxide semiconductor thin film of the present invention is composed of an oxide semiconductor containing, as a main component, an oxide containing indium, gallium, and aluminum in the following composition, and the oxide semiconductor has a composition ratio in a region surrounded by the following line segment connecting points A and B, the following line segment connecting points B and C, the following line segment connecting points C and D, and the following line segment connecting points D and A in a ternary phase diagram of In, Ga, and Al: Composition: In X Ga Y Al Z Point A: In 10 Ga 90 Al 0 Point B: In 30 Ga 30 Al 40 Point C: In 45 Ga 15 Al 40 Point D: In 45 Ga 55 Al 0
[0014] This composition range is shown in Figure 1. In-containing oxides are prone to oxygen vacancies, and if the In content exceeds 45%, the carrier concentration becomes too high at high temperatures, making the oxide unusable. On the other hand, Ga and Al suppress the occurrence of oxygen vacancies, but if the Al content exceeds 40%, the carrier concentration becomes too low and electrical conductivity cannot be obtained, making the oxide unusable. Furthermore, in regions where both Ga and Al are abundant, it becomes difficult to obtain electrical conductivity, making the oxide unusable.
[0015] In the composition range enclosed by the lines connecting the above-mentioned points A, B, C, and D, the carrier concentration is 1×10 18 cm -3 The hole mobility is as low as 1 cm or less. 2 It was found that the oxide semiconductor thin film had a .DELTA..times ...
[0016] The oxide semiconductor thin film formed using such an oxide semiconductor has the above-mentioned carrier concentration and hole mobility. Therefore, in a semiconductor device using the oxide semiconductor thin film of the present invention as an active layer, that is, a semiconductor device having a gate electrode, a gate insulating film, an active layer, a source electrode, and a drain electrode such as a TFT, a reduction treatment is required to increase the carrier concentration. However, even after the reduction treatment, the carrier concentration is less than 1×10 18 cm -3 It was also found that the following could be maintained:
[0017] Such reduction treatment does not need to be carried out specially for the purpose of reduction. After the oxide semiconductor thin film is formed, the reduction treatment of the oxide semiconductor thin film can be carried out simultaneously with a process at about 300°C or above 300°C, such as a CVD SiO film formation process.
[0018] The oxide semiconductor thin film of the present invention can be patterned by wet etching, and has an etching rate of 1 nm / sec or more when etched with, for example, a phosphoric acid-based etchant, such as a PAN-based etching solution containing 70-80% phosphoric acid, 1-9% nitric acid, and 1-10% acetic acid.
[0019] Here, the preferred range of the oxide semiconductor of the present invention is shown in the ternary diagram in Figure 1. As shown in this ternary diagram, the oxide semiconductor in the range surrounded by the following points P, Q, R, and S has a hole mobility of 2 cm 2 / Vs or more, and the carrier concentration is 5×10 16 cm -3 This is a more preferable composition range in which relatively high mobility can be maintained. 15 Ga 85 Al 0 Q point: In 30 Ga 45 Al 25 R point: In 45 Ga 35 Al 25 S point: In 40 Ga 60 Al 0
[0020] The method for forming the oxide semiconductor thin film of the present invention is not particularly limited. For example, the film may be formed by sputtering using a sputtering target having the same composition as the film to be formed, or by atomic layer deposition (ALD) or vacuum evaporation, and the film formation method is not particularly limited as long as an amorphous oxide semiconductor thin film can be formed.
[0021] The oxide semiconductor thin film of the present invention can also be used as an active layer of a thin film semiconductor device (also simply referred to as a semiconductor device), which is a thin film semiconductor transistor such as a TFT.
[0022] A thin-film semiconductor device including the oxide semiconductor thin film of the present invention is a thin-film semiconductor device including an active layer made of an amorphous oxide semiconductor thin film, a gate electrode provided on one surface of the active layer via a gate insulating film, and a source electrode and a drain electrode connected to the active layer, wherein the active layer is made of the above-mentioned oxide semiconductor thin film of the present invention.
[0023] A specific example of a semiconductor device has a structure in which the gate insulating film and the gate electrode are provided on the upper surface of the active layer, and the source electrode and the drain electrode are provided on the upper surface side of the active layer. The structure of an example of such a thin film semiconductor device is shown in Figure 3.
[0024] 2 shows a schematic configuration of an example of a thin film transistor according to the present invention. The thin film transistor 110 of this embodiment includes an active layer 11, a gate insulating film 12, a gate electrode 13, and a protective film (passivation) 14 on a substrate 10, and has a source electrode 15S and a drain electrode 15D extending from the active layer 11 via the protective film 14.
[0025] The substrate 10 is typically a silicon substrate or a glass substrate. The gate electrode 13 is typically made of a metal single layer or multilayer film such as molybdenum (Mo), titanium (Ti), aluminum (Al), or copper (Cu), or a common gate electrode material used in semiconductor devices such as TiN, W, or WSi, and is formed by, for example, a sputtering method. In this embodiment, the gate electrode 13 is made of molybdenum. The thickness of the gate electrode 13 is not particularly limited and is, for example, 200 nm. The gate electrode 13 is formed by, for example, a sputtering method, an ALD method, or a vacuum deposition method.
[0026] The active layer 11 functions as a channel layer of the thin film transistor 110. The film thickness of the active layer 11 is, for example, 5 nm to 200 nm. The active layer 11 is made of the oxide semiconductor thin film of the present invention described above. The active layer 11 is formed by, for example, a sputtering method, an ALD method, a vacuum deposition method, or the like.
[0027] The gate insulating film 12 is formed between the gate electrode 13 and the active layer 11. The gate insulating film 12 is made of, for example, a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a laminated film of these. There are no particular limitations on the film formation method, and it may be a CVD method, a sputtering method, a vapor deposition method, or the like. There are no particular limitations on the film thickness of the gate insulating film 12, and it is, for example, 200 nm to 400 nm.
[0028] The source electrode 15S and the drain electrode 15D are formed on the protective film 14 and the cap layer 13, spaced apart from each other. The source electrode 15S and the drain electrode 15D can be composed of a single layer of metal such as aluminum, molybdenum, copper, or titanium, or a multilayer film of these metals. As will be described later, the source electrode 15S and the drain electrode 15D can be simultaneously formed by patterning a metal film. The thickness of the metal film is, for example, 100 nm to 200 nm. The source electrode 15S and the drain electrode 15D are formed by, for example, sputtering, vacuum deposition, or the like.
[0029] At least one of the upper and lower surfaces of the active layer 11 of the thin film transistor 110 may be provided with a semiconductor thin film having a lower carrier density than the active layer 11 .
[0030] An example of such a thin film transistor is shown in FIG. 3. The thin film transistor 110A in FIG. 3 has semiconductor thin films 11A and 11B with low carrier density on both the upper and lower surfaces of the active layer 11. Examples of the semiconductor thin films 11A and 11B include InGaAl oxide (IGA) films with high carrier concentration. Similar to the active layer 11, the semiconductor thin films 11A and 11B are formed by, for example, sputtering, ALD, vacuum deposition, or the like.
[0031] The thin film transistor of the present invention is not limited to such a structure, and may have a structure as shown in FIGS.
[0032] The thin film transistor 110B in FIG. 4 has a structure in which a gate electrode 13 is provided on the lower surface of an active layer 11, and has a structure in which the gate electrode 13, a gate insulating film 12, and the active layer 11 are stacked on a substrate 10, and a source electrode 15S and a drain electrode 15D are drawn out from above the gate insulating film 12 and the active layer 11.
[0033] The thin film transistor 110C of FIG. 5 has a structure in which an etching stop layer 16 is provided on the gate insulating film 12 and the active layer 11 of the thin film transistor 110B of FIG.
[0034] The thin film transistor 110D in FIG. 6 is a dual-gate type TFT, and has a bottom gate electrode 13A on the lower surface side of the active layer 11 via a gate insulating layer 12A, and a top gate electrode 13B on the upper surface side via a gate insulating layer 12B. The source electrode 15S and the drain electrode 15D are led out via an n-layer 11A provided continuously with the active layer 11, i.e., an N-type layer with a low concentration of N-type impurities.
[0035] Although the specific examples described above are lateral transistors, the present invention is not limited to these, and it goes without saying that vertical transistors may also be used.
[0036] [Semiconductor Device 1-16] Using various oxide semiconductor thin films having the compositions shown in the table below, ESL-type thin film transistors having an etching stop layer (ESL) as shown in Fig. 6 were manufactured. The oxide semiconductor thin films were used as active layers.
[0037] The oxide semiconductor thin films having the compositions shown in the table below contain In 2 O 3 , Ga 2 O 3 , and Al 2 O 3 Using the sputtering target of the above, In-Ga-Al-O thin films of various compositions were deposited using a multi-cathode.
[0038] 5 was manufactured by the following procedure: First, a Mo layer was formed as a gate electrode metal on the substrate 10, and then patterned to form the gate electrode 13.
[0039] Next, a stacked film of SiO (upper) / SiN (lower) was formed as the gate insulating film 13 .
[0040] Next, as described above, active layers 11 made of oxide semiconductor thin films of various compositions (samples 1-16 in Table 1) were formed, annealed at 400° C., and patterned by wet etching using a phosphoric acid-based etchant.
[0041] Next, a film of SiOx was formed by CVD as an ESL to serve as an etching stop layer 16. In this CVD film formation process, the substrate is heated to about 300° C., and the oxide semiconductor forming the active layer 11 is reduced by this process.
[0042] After this, the etching stop layer 16 was patterned, a Ti film was formed as a metal film for the source and drain and patterned, then a protective film (passivation) 14 was formed and annealed, and then the protective film 14 was patterned, and finally a source electrode 15S and a drain electrode 15D were formed.
[0043] (Sample 1-17) For Sample 1-17 having the composition shown in Table 1, the hole mobility and carrier concentration were measured after forming an SiOx film by CVD.
[0044] Specifically, a 100 nm thick SiO film was formed by CVD on a 50 nm thick oxide semiconductor film formed on a glass substrate, and then the substrate was cut into a 7 mm square, and the four corners were etched using a dry etching device to prepare a sample for measuring the Hall effect.
[0045] The sample for Hall effect measurement was set in a resistivity / Hall measurement system (ResiTest8400AC; manufactured by Toyo Corporation), and the Hall effect was evaluated at room temperature, and the carrier density and mobility were measured. The results are shown in Table 1.
[0046] As a result, the oxide semiconductor thin films of Samples 1, 2, 5 to 11, and 15 had a carrier concentration of 1×10 18 cm -3 The hole mobility is as low as 1 cm or less. 2 In particular, the oxide semiconductor thin films of Samples 1, 5, and 7 to 11 were found to be particularly preferable. On the other hand, Samples 3 and 4 were insulators, and Samples 12 and 14 had a hole mobility of 1 cm or more. 2 / Vs, and sample 13 has a carrier concentration of 1×10 18 cm -3 were larger and less desirable.
[0047]
[0048] (Semiconductor Device 8) For semiconductor device 8 having the structure of FIG. 6 in which the oxide semiconductor thin film of sample 8 is used as the active layer, the transfer characteristics showing the relationship between gate voltage and drain current were measured. The temperature at which gate insulating layer 12B made of SiO provided on active layer 11 by CVD was set to 300°C. The threshold voltage (gate voltage at which the drain current becomes 1 nA) was measured at four points A to D. As shown in FIG. 7, the threshold voltage was −0.5 to 3 V in all cases, confirming that there was no negative shift.
[0049] (Comparative Semiconductor Device) A device was fabricated in the same manner as above, except that the active layer was made of IGZO111 (In:Ga:Zn=33.3:33.3:33.3) and the CVD film formation temperature was lowered to 270° C., and the threshold voltage was measured. As shown in FIG. 8 , the device was in a normally-on state, with no switching operation, and the threshold voltage could not be measured.
[0050] From the results of FIGS. 7 and 8, it was found that the semiconductor device using the oxide semiconductor of the present invention did not undergo a negative shift in threshold voltage even when subjected to high-temperature treatment, and had excellent heat resistance.
[0051] (Sputtering Target) Indium oxide, gallium oxide, and aluminum oxide were weighed and mixed using a ball mill so as to obtain the composition of Sample 8 in Table 1. The mixed powder was sintered by holding it at 1000°C for 10 hours in the atmosphere to obtain a sintered body.
[0052] In the example, indium oxide, gallium oxide, and aluminum oxide were used as raw materials and sintered in air to obtain a sintered body with a relative density of 96.4%. Although this sintered body is an insulator, it is possible to form the oxide semiconductor thin film of the present invention by RF sputtering.
[0053] REFERENCE SIGNS LIST 10 Substrate 11 Active layer 11A, B Semiconductor thin film 12 Gate insulating film 12A Gate insulating layer 12B Gate insulating layer 13 Gate electrode 13A Bottom gate electrode 13B Top gate electrode 14 Protective film 15D Drain electrode 15S Source electrode 16 Etching stop layer 110 Thin film transistor
Claims
1. An oxide semiconductor thin film composed of an oxide semiconductor mainly composed of an oxide containing indium, gallium, and aluminum in the following composition, wherein the composition ratios of X, Y, and Z of the oxide semiconductor are the composition ratios of the region surrounded by the line segment connecting points A and B, the line segment connecting points B and C, the line segment connecting points C and D, and the line segment connecting points D and A in the ternary phase diagram of In, Ga, and Al. Composition: In X G Y A Z Point A: In 10 G 90 A 0 Point B: In 30 G 30 A 40 Point C: In 45 G 15 A 40 Point D: In 45 G 55 A 0 2. An oxide semiconductor thin film composed of an oxide semiconductor mainly composed of an oxide containing indium, gallium, and aluminum in the following composition, wherein the composition ratios of X, Y, and Z of the oxide are the composition ratios of the region surrounded by the line segment connecting points A and B, the line segment connecting points B and E, the line segment connecting points E and D, and the line segment connecting points D and A in the ternary phase diagram of In, Ga, and Al. Composition: In X G Y A Z Point A: In 10 G 90 A 0 Point B: In 30 G 30 A 40 Point E: In 40 G 45 A 15 Point D: In 45 G 55 A 0 3. After high-temperature treatment at 300°C or higher, the carrier concentration is 1×10 18 cm -3 The oxide semiconductor thin film according to claim 1 or 2, wherein:
4. The mobility after high-temperature treatment at 300°C or higher is 1 cm 2 The oxide semiconductor thin film according to claim 1 or 2, wherein the Vref is 1 / Vs or more.
5. The oxide semiconductor thin film according to any one of claims 1 to 4, which has an etching rate of 1 nm / sec or more when etched with a phosphoric acid-based etchant.
6. A semiconductor device comprising an oxide semiconductor thin film, at least a part of which is the oxide semiconductor thin film according to any one of claims 1 to 5.
7. The semiconductor device according to claim 6, which is a semiconductor device having a gate electrode, a gate insulating film, an active layer, a source electrode and a drain electrode, and said oxide semiconductor thin film is said active layer.
8. A method for manufacturing a semiconductor device having an oxide semiconductor thin film, comprising: forming the oxide semiconductor thin film according to any one of claims 1 to 5 as at least a part of the oxide semiconductor thin film; and a process including a reduction treatment of the oxide semiconductor of the oxide semiconductor thin film.
9. A sputtering target composed of an oxide sintered body mainly composed of an oxide containing indium, gallium, and aluminum in the following composition, wherein the composition ratios of X, Y, and Z of the oxide semiconductor are the composition ratios of the region surrounded by the line segment connecting points A and B, the line segment connecting points B and C, the line segment connecting points C and D, and the line segment connecting points D and A in the ternary phase diagram of In, Ga, and Al. Composition: In X G Y A Z Point A: In 10 G 90 A 0 Point B: In 30 G 30 A 40 Point C: In 45 G 15 A 40 Point D: In 45 G 55 A 0 10. A sputtering target composed of an oxide sintered body mainly composed of an oxide containing indium, gallium, and aluminum in the following composition, wherein the composition ratios of X, Y, and Z of the oxide are the composition ratios of the area surrounded by the line segment connecting points A and B, the line segment connecting points B and E, the line segment connecting points E and D, and the line segment connecting points D and A in the ternary phase diagram of In, Ga, and Al. Composition: In X G Y A Z Point A: In 10 G 90 A 0 Point B: In 30 G 30 A 40 Point E: In 40 G 45 A 15 Point D: In 45 G 55 A 0 11. The sputtering target according to claim 9 or 10, which has a relative density of 90% or more.
12. A method for producing a sputtering target comprising mixing indium oxide powder, gallium oxide powder, and aluminum oxide powder to form a molded body, and sintering the molded body at 1100°C or higher and 1650°C or lower to produce a sputtering target having the oxide sintered body according to any one of claims 9 to 11.
13. A method for producing a sputtering target comprising mixing oxides, hydroxides or carbonates of indium, gallium and aluminum and calcining the resulting precursor powder at 1000°C to 1500°C to form a molded body, and calcining the molded body at 1100°C or higher and 1650°C or lower to produce a sputtering target having the oxide sintered body according to any one of claims 9 to 11.
Citation Information
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