Packet replication method and system for packet processing pipeline

Abstract

The present invention relates to the field of packet replication, and in particular to a packet replication method and system for a packet processing pipeline. The present invention only requires buffering one copy of a packet, and then the packet and a packet header vector obtained by parsing a customized generic data structure are simultaneously inputted into a packet processing pipeline. When an input is provided to a replication module, a flow table is queried on the basis of a replication identifier field to obtain a number of times of replication. The wire speed for the packet header vector is replicated and outputted by means of a replication enablement field and the number of times of replication, and a replication index field is set in a reverse order. Finally, the packet header vector and data are recombined by means of deparsing, so that replication and output of the wire speed for the packet are achieved. The present invention implements a high-performance packet replication method and reduces logic and storage resources required for replicating and storing packets. The position of the replication module in the pipeline can be flexibly adjusted, and modules achieve parameterization and wire speed processing. The present invention exhibits flexibility and expandability, and is applicable to network functions and techniques that have packet replication requirements.

Description

A data packet replication method and system for a data packet processing pipeline

[0001] Related applications

[0002] This application claims priority to Chinese patent application No. 2023112266880, entitled “A method and system for data packet replication in a data packet processing pipeline,” filed on September 21, 2023, and the above application is hereby incorporated by reference. Technical Field

[0003] The present invention is applied to the field of FPGA acceleration and data packet replication, and relates to a scenario where data packet replication is required when the FPGA performs high-speed data packet processing, and in particular to a data packet replication method and system for a data packet processing pipeline. Background Art

[0004] In the packet processing pipeline, a matching process and the execution of matching results are usually required. This structure that executes the corresponding action after matching is called a match action unit (MAU). Different behaviors are achieved by executing different actions in each unit, which involves matching and modifying certain fields in the packet header vector (PHV) of the packet. Because FPGA chip storage resources are relatively scarce, when using FPGAs for packet processing, for network functions that require replication, such as multicast, caching, and redundant transmission, if packets are cached in multiple data channels, the resource consumption is bound to be huge. In addition, the use of one to multiple different data channels also adds additional branching logic and backpressure logic, increasing the design complexity of the module and further consuming the chip's logic resources. This leads to the design of adding a MAU specifically for copying PHV to the multi-level MAU of the pipeline. In the packet processing pipeline, the data packet is input into the packet cache module, and the packet header and custom fields are combined into a PHV input pipeline for processing. The PHV is copied and updated when passing through the replication module, and the multi-level MAU is used to cooperate with the replication information. Before the PHV enters the reverse parsing, the packet cache outputs data with the same cache space multiple times, and reverse parsing is performed with the PHV to achieve the purpose of copying the data packet. This can reduce the resource usage of the cached data packet and simplify the replication logic, thereby achieving high-performance packet replication, which is of great significance for the processing of packet replication using FPGA.

[0005] Among the related patents, Chinese patent CN201811644018.X ("Data transmission method and device based on MAC layer packet replication") replicates the target packet into multiple copies at the media access control MAC layer and stores the remaining target packets in the buffer of the MAC layer, increasing the resource usage of the buffer. Chinese patent CN201210274379.6 ("Multicast message replication method and device") replicates the cache address of the message, reads the corresponding message through the port scheduling cache address, and outputs it. However, it needs to obtain the total number of replications corresponding to the cache address, and the resources occupied will increase with the increase of cache addresses. It only supports multicast replication and cannot support other types of packets. Chinese patent CN201210491806.6 ("Fast packet replication method, packet reading method") replicates the packet segment by segment, and does not replicate data segments that are identical to the corresponding segments of the original packet or the corresponding segments of other packet copies. However, this method requires storing the data segments generated for different packet copies, which occupies additional resources. Determining whether the data segments are identical and reading the data segments consumes additional logic and time.

[0006] Summary of the Invention

[0007] The purpose of the present invention is to address the defects of low data packet replication performance, high resource occupation and lack of flexibility in data packet processing pipelines that require data packet replication. It is necessary to propose a universal data packet replication method to achieve high-performance data packet replication while reducing the occupation of logical resources and storage resources, thereby realizing different network functions with replication requirements.

[0008] To achieve the above-mentioned purpose, the present invention proposes a data packet replication method for a data packet processing pipeline. The method only needs to cache a copy of the data packet, and at the same time, parse the data packet and a custom general data structure to obtain a data packet header vector and input it into the data packet processing pipeline. When the data packet is input into the data packet replication module, the flow table is queried according to the replication identification field to obtain the number of replications, and the data packet header vector is replicated and output at line speed by copying the enable field and the number of replications, and the replication index field is set in reverse order. Finally, the data packet header vector and data are recombined through inverse parsing to achieve line-speed replication and output of the data packet.

[0009] To achieve the above objectives, the present invention is implemented through the following technical solutions.

[0010] The present invention proposes a data packet replication method for a data packet processing pipeline, wherein the data packet processing pipeline includes a multi-stage matching action unit; the method comprises:

[0011] After the data packet enters the data packet processing pipeline, a copy of the data packet is cached; at the same time, the data packet header vector is parsed through a custom data structure and input into the data packet processing pipeline;

[0012] At any position in the data packet processing pipeline, the data packet header vector is copied according to the copy identification field and copy enable field set by a matching action unit at a level before the position, and the copied data packet header vector is output in reverse order according to the number of copies;

[0013] The copied data packet header vector and the data obtained from the cached data packet are parsed, and the parsed data packet is output to the data packet processing pipeline to complete the copying of the data packet.

[0014] As one of the improvements to the above technical solution, the method of copying the data packet header vector according to the copy identification field and the copy enable field set by the matching action unit at a certain level before the position, and outputting the copied data packet header vector in reverse order according to the number of copies, specifically includes:

[0015] Extracting the copy identification field and the copy enable field in the data packet header vector set by a matching action unit at a certain level before the position;

[0016] Use the replication flag field as the key value to query the flow table, obtain the replication count, and replicate the packet header vector based on the replication count;

[0017] Determine whether to copy the data packet header vector according to the copy enable field;

[0018] When copying the data packet header vector, the copy index field is set, and the copied data packet header vector is output to the next level matching action unit in reverse order according to the number of copies.

[0019] As one of the improvements of the above technical solution, the copy identification field, the copy enable field, the flow table mask and the copy index field are all stored in the data packet header vector.

[0020] As one of the improvements to the above technical solution, the step of copying the data packet header vector according to the number of copies specifically includes:

[0021] Output a copy of the original data packet header vector, build a counter at the same time, and enter the number of copies into the counter;

[0022] The corresponding number of data packet header vectors are copied according to the value of the counter. Each time a data packet header vector is copied, the counter is reduced by 1; if the number of copies is 0, no copy is made.

[0023] As one of the improvements of the above technical solution, when copying a data packet header vector, the next data packet header vector is blocked until the current data packet header vector is copied.

[0024] As one of the improvements of the above technical solution, the counter is updated synchronously with the number of replications, and the counter value is the same as the number of replications. During replication, the counter decreases, and the replication index field also decreases. When the counter is 0, it stops blocking the next data packet header vector.

[0025] As one of the improvements to the above technical solution, the blocking of the next data packet header vector is achieved through a counter and back pressure logic control. Specifically, when the counter is greater than 0, the input signal of the next data packet header vector cannot reach a handshake agreement with the action unit, and the next data packet header vector is back pressed.

[0026] As one of the improvements to the above technical solution, the parsing of the copied data packet header vector and the cached data packet specifically includes:

[0027] Determine the corresponding packet length field and copy index field according to the copied data packet header vector;

[0028] Output the corresponding cached data packet according to the packet length field and the copy index field;

[0029] Combine the packet header vector and the cached packet and perform reverse parsing.

[0030] As one of the improvements of the above technical solution, the copied data packet header vector is output at line speed.

[0031] The present invention also designs a data packet replication system for a data packet processing pipeline, the system comprising: a data packet parsing module, a data packet replication module, a data packet cache module, and a data inverse parsing module; wherein the data packet replication module is placed at any position in the data packet processing pipeline, and comprises a key value extraction submodule and an action unit submodule; a matching action unit at a certain level before the data packet replication module is provided with a replication identification field and a replication enable field in a data packet header vector;

[0032] The data packet parsing module is used to generate a data packet header vector after the data packet enters the data packet processing pipeline, input the data packet header vector into the matching action units at each level, and store the data packet in the data packet buffer module;

[0033] The key value extraction submodule is used to extract the replication identification field as a key value to query the flow table and obtain the number of replications;

[0034] The action unit submodule is configured to determine the number of times the data packet header vector is copied according to the number of copies, to set a copy index field when copying the data packet header vector, and to output the data packet header vector in reverse order according to the number of copies to a matching action unit following the data packet copy module; and to block the next data packet header vector when copying the data packet header vector until the current data packet header vector is copied.

[0035] The data packet buffer module is used to output the data packet in the buffer space corresponding to the data packet header vector;

[0036] The data packet inverse parsing module is used to combine and parse the data packet header vector and the cached data packet, and output the data packet to the data packet processing pipeline.

[0037] Compared with the prior art, the present invention has the following advantages:

[0038] 1. The present invention only needs to replicate PHV. PHV is not input at line speed before entering the replication module because PHV corresponds to one data packet, and the replication module replicates and outputs PHV at line speed, thereby achieving high-performance replication.

[0039] 2. The packet replication module, set at any position in the packet processing pipeline, serves as the first-level MAU of the packet processing pipeline. Its position in the pipeline can be flexibly adjusted, and it is decoupled from the previous and next MAUs, thus improving flexibility.

[0040] 3. The data packet cache module in the system of the present invention only caches data packets once, reducing resource usage;

[0041] 4. The present invention can replicate data packets of different bit widths and flexibly adjust the bit width according to different resource board scenarios, thereby changing performance, with versatility and portability. It can also replicate and modify PHVs of different bit widths. Since PHVs can also be customized, it has flexibility and scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] FIG1 is a schematic diagram of an implementation system of the present invention;

[0043] FIG2 is a flowchart of a data packet replication module of the present invention;

[0044] FIG3 is a flowchart of the implementation system of the present invention. DETAILED DESCRIPTION

[0045] The technical solution of the present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0046] Example 1

[0047] The purpose of the present invention is to provide a method for replicating PHV in a data packet processing pipeline, thereby improving the performance of data packet replication and reducing the occupation of logic resources and storage resources.

[0048] The method of the present invention comprises:

[0049] When the PHV enters the data packet replication module, the replication identification field and replication enable field have been set by the first-level MAU before the data packet replication module.

[0050] The replication identification field is used as a key value to obtain the replication count by querying the flow table in the data packet replication module.

[0051] The data packet replication module determines the number of replications of the data packet header vector according to the number of replications.

[0052] The packet replication module replicates the packet header vector according to the replication number.

[0053] As an improvement to the above method, the packet header vector is copied according to the number of copies; specifically:

[0054] The data packet replication module first outputs a copy of the original PHV and inputs the number of copies into a counter. The data packet replication module replicates the PHV according to the value of the counter. Each time a copy of the PHV is made, the counter is reduced by 1.

[0055] When the data packet replication module replicates the PHV, it also sets the replication index field and outputs it in reverse order according to the number of replications.

[0056] As an improvement to the above method, the setting of the copy index field is completed in reverse order through a counter, and the value of the copy index field is assigned by the counter.

[0057] When the data packet replication module replicates a PHV, it blocks the next PHV until the current PHV is replicated.

[0058] As an improvement to the above method, the blocking of the next PHV is controlled by a counter and back pressure logic. When the counter is greater than 0, the input signal of the next PHV cannot reach a handshake agreement with the action unit and is thus back pressured.

[0059] Before reverse parsing the PHV, the packet length field and the copy index field are input into the data packet cache module to achieve data copy output.

[0060] As an improvement to the above method, the PHV copied by the copy module corresponds to the same data packet cache space as the original PHV.

[0061] As an improvement to the above method, the copy identification field, the copy enable field and the copy index field are all stored in a data packet header vector.

[0062] PHV and data are reverse parsed to achieve the copy output of the data packet.

[0063] Example 2

[0064] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings.

[0065] Figure 1 is a schematic diagram of the implementation system of the present invention. This diagram illustrates the placement of the packet parsing module, matching action units at each level, packet replication module, packet reverse parsing module, and packet cache module within the overall pipeline architecture, as well as the relationships between these modules. After passing through the packet parsing module, packets are split into two paths: one path is the PHV signal, which passes through each MAU, participates in matching, and executes corresponding actions; the other path is the original packet, which is input into the remaining space of the packet cache. The packet replication module, as a first-level MAU, can be flexibly adjusted within each MAU. However, a first-level MAU precedes the packet replication module to set the corresponding fields for the PHV to facilitate its normal operation. Before reverse parsing the input packet, the PHV also extracts relevant fields and inputs them into the packet cache module, enabling the packet cache module to output the corresponding data.

[0066] FIG2 is a flowchart of the data packet replication module of the present invention. The specific steps are as follows:

[0067] Step 1: After power-on and board reset, the controller sends a flow table configuration signal to the flow table in the packet replication module. The matching field of the flow table is the replication identification field of the PHV. The corresponding matching result of each table entry is the number of replications, which can be 0.

[0068] Step 2: The PHV enters the packet replication module. The replication flag and replication enable fields in the PHV have already been set in the matching action unit before the packet replication module. The replication flag is used to match the packet replication module's flow table, and the replication enable field is used to enable the replication action.

[0069] Step 3: The PHV inputs a packet header vector queue on one side and a key value selection module on the other. Because the information stored in the PHV results in a large bus width, using the FPGA chip's BRAM resources to store the PHV would be a significant waste of resources. Therefore, a shift register can be used to form an SRL FIFO as the packet header vector queue. The key value selection module extracts the duplicate flag field from the PHV and outputs it. The width and position of the duplicate flag field within the PHV can be customized by the user.

[0070] Step 4: Copy the identification field into the flow table for matching. If the entry is matched, the hit signal is set to 1, the valid signal is set to 1, and the data is output together with the number of copies. If the entry is not matched, the hit signal is set to 0, and the valid signal is set to 1.

[0071] Step 5: If the valid signal on the primary interface side of the packet header vector queue is 1 and the backpressure signal on the PHV on the slave interface side of the matching action unit is 1, that is, the handshake condition between the primary interface side of the packet header vector queue and the PHV on the slave interface side of the matching action unit has been reached, and the handshake condition between the primary interface side of the flow table and the matching slave interface side of the matching action unit has been reached, then the hit signal, the number of replications, and the packet header vector are synchronously input to the matching action unit. If any of the valid signal on the primary interface side of the packet header vector queue, the backpressure signal on the PHV on the slave interface side of the matching action unit, the valid signal on the primary interface side of the flow table, and the backpressure signal on the matching slave interface side of the matching action unit is 0, then nothing is done.

[0072] Step 6: The matching action unit first checks the hit signal. If the hit signal is 1, the copy enable is 1, and the number of copies is greater than 0, the copy count is entered into a counter and the original PHV is output. The counter value influences the two sets of backpressure signals from the interface side of the matching action unit through backpressure logic. When the counter value is greater than 0, both sets of backpressure signals from the interface side are reset to 0. The matching action unit then outputs a corresponding number of PHVs based on the counter value. Each time a PHV is output, the copy index field in the PHV is set to the current counter value and the counter is decremented by 1 until it reaches 0. If the hit signal is 1 and the number of copies is 0, only the original PHV is output. If the hit signal is 1 but the copy enable is 0, only the original PHV is output. If the hit signal is 0, the output port field of the PHV is set, directing the corresponding data packet to the controller, thus notifying the controller to update the flow table.

[0073] FIG3 is a flowchart of the implementation system of the present invention. Combined with the system schematic diagram and the replication module workflow diagram, the workflow of the implementation system of the present invention is now described in detail:

[0074] (1) The data packet enters the data packet parsing module. The data packet parsing module calculates the packet length of the last frame of data entering. If the remaining space in the data packet cache can cache a data packet of the corresponding packet length, the data packet is input into the data packet cache module, and the packet length information is extracted and combined with the custom data structure to form the PHV input pipeline. If the remaining space in the data packet cache is insufficient, the data packet is back-pressed when the remaining space is full, and the data packet is input again until there is space in the data packet cache.

[0075] (2) The PHV enters the pipeline, participates in matching and performs corresponding actions through MAUs at all levels. Before entering the packet replication module, the replication identification field and replication enable field in the PHV have been set by the MAU before the packet replication module.

[0076] (3) The PHV enters the packet replication module and matches the flow table of the packet replication module. If the flow table is not matched, or if the flow table is matched but replication is not required, the PHV is not replicated and the original PHV enters the lower-level MAU. If the flow table is matched and replication is required, the PHV that has not yet entered the matching action unit is back-pressed. The matching action unit executes the action of replicating the PHV and modifying the replication index field in reverse order according to the number of replications. The replicated PHV is output at line speed.

[0077] (4) Before entering the data packet reverse parsing module, the PHV inputs the packet length field and the copy index field in the PHV into the data packet cache module. The data packet cache module outputs the data in the corresponding space according to the packet length field and repeatedly outputs the data according to the copy index field.

[0078] (5) PHV and data enter the data packet reverse parsing module, and reassemble the data packet to output at line speed.

[0079] In the existing technology, data packets are copied and output multiple times in the packet processing pipeline. If a one-input, multiple-output replication method is adopted, more bus resources are required and more storage resources are used to cache the data packets. In the FPGA-based packet processing scenario, FPGA resources are scarce, and packet-level replication will consume more logic resources and storage resources, which cannot achieve high-performance replication.

[0080] Compared with the above-mentioned problems existing in the prior art, the advantages of the present invention are: a high-performance data packet replication method is implemented in the data packet processing pipeline, which reduces the logical resources and storage resources for replicating and storing data packets. At the same time, the data packet replication module, as one of the first-level matching action units in the pipeline, is decoupled from the matching action units at all levels and the data packet cache, and can flexibly adjust its position in the pipeline. At the same time, each module realizes parameterization and line-speed processing, has flexibility and scalability, and can meet network functions and technologies with data packet replication requirements, such as multicast, caching, redundant transmission, etc.

[0081] Finally, it should be noted that the above embodiments are intended only to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions to the technical solutions of the present invention do not depart from the spirit and scope of the technical solutions of the present invention and are intended to be encompassed by the claims of the present invention.

Claims

1. A data packet replication method for a data packet processing pipeline, wherein the data packet processing pipeline comprises a multi-stage matching action unit; the method comprises: After the data packet enters the data packet processing pipeline, a copy of the data packet is cached; at the same time, the data packet header vector is parsed through a custom data structure and input into the data packet processing pipeline; At any position in the data packet processing pipeline, according to the copy identification field and the copy enable field set by a matching action unit at a certain level before the position, the data packet header vector is copied, and the copied data packet header vector is output in reverse order according to the number of copies; The copied data packet header vector and the data obtained from the cached data packet are parsed, and the parsed data packet is output to the data packet processing pipeline to complete the copying of the data packet.

2. The data packet replication method of the data packet processing pipeline according to claim 1, characterized in that: The method of duplicating the data packet header vector according to the duplication identification field and the duplication enable field set by a matching action unit at a certain level before the position, and outputting the duplicated data packet header vector in reverse order according to the number of duplications, specifically includes: Extracting the copy identification field and the copy enable field in the data packet header vector set by a matching action unit at a certain level before the position; Use the replication flag field as the key value to query the flow table, obtain the replication count, and replicate the data packet header vector according to the replication count; Determine whether to copy the data packet header vector according to the copy enable field; While copying the data packet header vector, the copy index field is set, and the copied data packet header vector is output to the next level matching action unit in reverse order according to the number of copies.

3. The data packet replication method of the data packet processing pipeline according to claim 2, characterized in that: The copy identification field, the copy enable field, the flow table mask and the copy index field are all stored in the data packet header vector.

4. The data packet replication method of the data packet processing pipeline according to claim 2, characterized in that: The step of duplicating the data packet header vector according to the number of duplications specifically includes: Output a copy of the original packet header vector, build a counter at the same time, and enter the number of copies into the counter; The corresponding number of data packet header vectors are copied according to the value of the counter. Each time a data packet header vector is copied, the counter is reduced by 1; if the number of copies is 0, no copying is performed.

5. The data packet replication method of the data packet processing pipeline according to claim 4, characterized in that: When copying the data packet header vector, the next data packet header vector is blocked until the current data packet header vector is copied.

6. The data packet replication method of the data packet processing pipeline according to claim 5, characterized in that: The counter is updated synchronously with the number of replications, and the counter value is the same as the number of replications. During replication, the counter is decremented, and the replication index field is also decremented. When the counter is 0, the next data packet header vector is stopped from being blocked.

7. The data packet replication method of the data packet processing pipeline according to claim 6, characterized in that: The blocking of the next data packet header vector is achieved through counter and back pressure logic control, specifically: when the counter is greater than 0, the input signal of the next data packet header vector cannot reach a handshake agreement with the action unit, and the next data packet header vector is back pressured.

8. The data packet replication method of the data packet processing pipeline according to claim 1, characterized in that: The parsing of the copied data packet header vector and the cached data packet specifically includes: Determine the corresponding packet length field and the copy index field according to the copied data packet header vector; Output the corresponding cached data packet according to the packet length field and the copy index field; Combine the packet header vector with the cached packet and perform reverse parsing.

9. The data packet replication method of the data packet processing pipeline according to any one of claims 1 to 8, characterized in that: The replicated packet header vector is output at line rate.

10. A data packet replication system for a data packet processing pipeline, characterized in that: The system comprises: a data packet parsing module, a data packet duplication module, a data packet caching module and a data reverse parsing module; wherein the data packet duplication module is placed at any position in the data packet processing pipeline, and comprises a key value extraction submodule and an action unit submodule; a certain level of matching action unit before the data packet duplication module is provided with a duplication identification field and a duplication enable field in a data packet header vector; The data packet parsing module is used to generate a data packet header vector after the data packet is input into the data packet processing pipeline, and input the data packet into the matching action units at each level, and store the data packet into the data packet buffer module; The key value extraction submodule is used to extract the replication identification field as a key value to query the flow table and obtain the number of replications; The action unit submodule is used to determine the number of times the data packet header vector is copied according to the number of copies, to set the copy index field when copying the data packet header vector, and to output the data packet header vector in reverse order according to the number of copies to the matching action unit after the data packet copy module; and to block the next data packet header vector when copying the data packet header vector until the current data packet header vector is copied; The data packet buffer module is used to output the data packet in the buffer space corresponding to the data packet header vector; The data packet reverse parsing module is used to combine and parse the data packet header vector and the cached data packet, and output the data packet to the data packet processing pipeline.

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