Semiconductor device and method for producing semiconductor device

Abstract

A semiconductor device according to one embodiment of the present invention comprises: a first metal layer; a semiconductor chip that includes an upper electrode, a lower electrode, a semiconductor layer provided between the upper electrode and the lower electrode, and a first resin layer provided on the upper electrode and containing a first resin; a second metal layer that is provided between the first metal layer and the lower electrode and contains silver (Ag) or copper (Cu); a second resin layer that is annular, covers the outer peripheral part of the semiconductor chip, and contains a second resin different from the first resin; and a third resin layer that is provided between the first resin layer and the second resin layer and contains a third resin different from the first resin and the second resin.

Description

Semiconductor device and manufacturing method thereof

[0001] FIELD Embodiments of the present invention relate to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In a power semiconductor module, for example, a semiconductor chip is mounted on an insulating substrate, and the semiconductor chip is, for example, a metal oxide field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), or a diode.

[0003] In a power semiconductor module that requires high-temperature operation, for example, when bonding a semiconductor chip to a metal layer on the surface of an insulating substrate, a highly heat-resistant bonding layer is formed by using metal fine particles and pressing the semiconductor chip against the metal layer at high temperature.

[0004] It is expected that the manufacturing yield when mounting semiconductor chips on a substrate will be improved.

[0005] Patent No. 5804203

[0006] An object of the present invention is to provide a semiconductor device that improves the manufacturing yield when semiconductor chips are mounted on a substrate.

[0007] A semiconductor device according to one embodiment of the present invention comprises a semiconductor chip including a first metal layer, an upper electrode, a lower electrode, a semiconductor layer provided between the upper electrode and the lower electrode, and a first resin layer provided on the upper electrode and containing a first resin; a second metal layer provided between the first metal layer and the lower electrode and containing silver (Ag) or copper (Cu); a second resin layer covering the outer periphery of the semiconductor chip, having an annular shape, and containing a second resin different from the first resin; and a third resin layer provided between the first resin layer and the second resin layer and containing a third resin different from the first resin and the second resin.

[0008] Schematic diagram of a semiconductor chip of a semiconductor device of an embodiment. Schematic diagram of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment. Explanatory diagram of an example of a manufacturing method of a semiconductor device of an embodiment.

[0009] In this specification, the same or similar components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0010] In this specification, the upward direction of the drawing may be referred to as "up" and the downward direction of the drawing may be referred to as "down" in order to indicate the positional relationship of parts, etc. In this specification, the concepts of "up" and "down" do not necessarily refer to the direction of gravity.

[0011] The type of resin constituting the semiconductor device of the embodiment can be identified by, for example, Fourier Transform Infrared Spectroscopy (FT-IR) or pyrolysis-gas chromatography / mass spectrometry.

[0012] The semiconductor device of the embodiment comprises a semiconductor chip including a first metal layer, an upper electrode, a lower electrode, a semiconductor layer provided between the upper electrode and the lower electrode, and a first resin layer provided on the upper electrode and containing a first resin; a second metal layer provided between the first metal layer and the lower electrode and containing silver (Ag) or copper (Cu); a second resin layer that covers the outer periphery of the semiconductor chip, is annular, and contains a second resin different from the first resin; and a third resin layer provided between the first resin layer and the second resin layer and contains a third resin different from the first resin and the second resin.

[0013] 1A and 1B are schematic diagrams of a semiconductor chip of a semiconductor device according to an embodiment, where Fig. 1A is a cross-sectional view and Fig. 1B is a top view.

[0014] The semiconductor device of the embodiment is a power semiconductor module 100. The power semiconductor module 100 of the embodiment has, for example, a plurality of semiconductor chips mounted thereon. The semiconductor chips are, for example, Schottky barrier diodes (SBDs).

[0015] 1A and 1B are diagrams showing a semiconductor chip 10 provided in a power semiconductor module 100 according to an embodiment. The semiconductor chip 10 is, for example, an SBD.

[0016] The semiconductor chip 10 includes an upper electrode 10a, a lower electrode 10b, a semiconductor layer 10c, and a protective resin layer 10d (first resin layer).

[0017] The semiconductor layer 10c is provided between the upper electrode 10a and the lower electrode 10b. The semiconductor layer 10c is, for example, a silicon carbide layer.

[0018] The protective resin layer 10d is provided on the upper electrode 10a. The protective resin layer 10d includes a first resin. The first resin includes, for example, polyimide (PI). The protective resin layer 10d is, for example, a polyimide layer.

[0019] The semiconductor chip 10 includes a device region and a termination region. The termination region surrounds the device region. The termination region is provided on the periphery of the semiconductor chip. The dotted line B in FIG. 1B indicates the boundary between the device region and the termination region.

[0020] The termination region has the function of reducing the strength of the electric field applied to the end of the element region and improving the breakdown voltage of the semiconductor chip 10 .

[0021] A termination structure 10x is formed in the semiconductor layer 10c in the termination region. The termination structure is, for example, a resurf structure or a guard ring structure.

[0022] 2(a) and 2(b) are schematic diagrams of a semiconductor device according to an embodiment, in which Fig. 2(a) is a cross-sectional view, Fig. 2(b) is a top view, and Fig. 2(a) and Fig. 2(b) are views showing a part of a power semiconductor module 100.

[0023] The power semiconductor module 100 includes a semiconductor chip 10, an insulating substrate 12, a metal adhesive layer 14 (second metal layer), a resin frame layer 16 (second resin layer), a resin adhesive layer 18 (third resin layer), bonding wires 20, and a sealing resin layer 22 (fourth resin layer). The insulating substrate 12 has a ceramic layer 12a, a front metal layer 12b (first metal layer), and a back metal layer 12c.

[0024] The insulating substrate 12 is provided below the semiconductor chip 10. The semiconductor chip 10 is mounted on the insulating substrate 12. The insulating substrate 12 has the function of electrically isolating the semiconductor chip 10 from a metal base plate (not shown) provided below the insulating substrate 12.

[0025] The insulating substrate 12 includes a ceramic layer 12a, a top metal layer 12b, and a bottom metal layer 12c. The ceramic layer 12a is provided between the top metal layer 12b and the bottom metal layer 12c.

[0026] The ceramic layer 12a is made of, for example, aluminum oxide, aluminum nitride, or silicon nitride, and the front and back metal layers 12b and 12c are made of, for example, copper.

[0027] The metal adhesion layer 14 is provided between the insulating substrate 12 and the semiconductor chip 10. The metal adhesion layer 14 is provided between the surface metal layer 12b and the lower electrode 10b. The metal adhesion layer 14 is in contact with the surface metal layer 12b and the lower electrode 10b.

[0028] The metal adhesive layer 14 functions to bond the insulating substrate 12 and the semiconductor chip 10. The metal adhesive layer 14 electrically connects the insulating substrate 12 and the semiconductor chip 10.

[0029] The metal adhesion layer 14 includes silver (Ag) or copper (Cu). The metal adhesion layer 14 is, for example, a silver layer. The metal adhesion layer 14 is, for example, a copper layer.

[0030] The resin frame layer 16 is provided on the semiconductor chip 10. The resin frame layer 16 covers the outer periphery of the semiconductor chip 10. The resin frame layer 16 covers the top surface and end surfaces of the semiconductor chip 10. The resin frame layer 16 is annular.

[0031] The inner peripheral edge (IE in FIG. 2B) of the resin frame layer 16 is provided inside the boundary (B in FIG. 2B) between the element region and the termination region of the semiconductor chip 10. The resin frame layer 16 covers the surface of the termination region of the semiconductor chip 10.

[0032] The resin frame layer 16 includes a second resin. The second resin is different from the first resin. The second resin has a glass transition temperature of 200° C. or higher, for example. The second resin is, for example, polyamide-imide (PAI) or thermoplastic polyimide (TPI).

[0033] The resin adhesive layer 18 is provided on the semiconductor chip 10. The resin adhesive layer 18 covers the outer periphery of the semiconductor chip 10. The resin adhesive layer 18 covers the top surface and end surfaces of the semiconductor chip 10. The resin adhesive layer 18 is annular.

[0034] The resin adhesive layer 18 is provided between the protective resin layer 10d and the resin frame layer 16. The resin adhesive layer 18 is in contact with the protective resin layer 10d and the resin frame layer 16.

[0035] The resin adhesive layer 18 includes a third resin. The third resin is different from the first resin and the second resin. The third resin has a glass transition temperature of 200° C. or higher, for example. The third resin is, for example, polyimide silicone.

[0036] The bonding wire 20 is connected to the upper electrode 10a. The bonding wire 20 has a function of electrically connecting, for example, an external terminal (not shown) to the semiconductor chip 10. The bonding wire 20 is, for example, an aluminum wire or a copper wire.

[0037] The sealing resin layer 22 covers the semiconductor chip 10, the insulating substrate 12, the resin frame layer 16, and the bonding wires 20. The sealing resin layer 22 is enclosed in, for example, a resin case (not shown).

[0038] The sealing resin layer 22 has a function of protecting the semiconductor chip 10, the insulating substrate 12, the resin frame layer 16, and the bonding wires 20. The sealing resin layer 22 also has a function of electrically insulating the semiconductor chip 10, the insulating substrate 12, the resin frame layer 16, and the bonding wires 20.

[0039] The sealing resin layer 22 includes a fourth resin, which is different from the first, second, and third resins, and is, for example, a silicone gel or an epoxy resin.

[0040] In a method for manufacturing a semiconductor device according to an embodiment, a resin frame is adhered to the outer periphery of a semiconductor chip using an adhesive, an adhesive layer containing silver or copper particles is formed on the metal layer, the semiconductor chip is placed on the adhesive layer, a resin member is placed inside the resin frame, and a pressure member is used from the side of the resin frame and the resin member to press the semiconductor chip against the metal layer at a temperature above room temperature, thereby adhering the metal layer and the semiconductor chip.

[0041] An example of a method for manufacturing a semiconductor device according to an embodiment will be described below.

[0042] 3, 4, 5, 6, 7, 8, and 9 are explanatory diagrams of an example of a method for manufacturing a semiconductor device according to an embodiment, and are cross-sectional views corresponding to FIG.

[0043] First, a semiconductor chip 10 is prepared. The semiconductor chip 10 includes an upper electrode 10a, a lower electrode 10b, a semiconductor layer 10c, and a protective resin layer 10d. The semiconductor chip 10 includes an element region and a termination region. The semiconductor layer 10c includes a termination structure 10x. The semiconductor chip 10 is, for example, an SBD.

[0044] Next, a resin frame 30 is bonded onto the semiconductor chip 10 using adhesive 31 (FIGS. 3 and 4). The resin frame 30 is bonded to the outer periphery of the semiconductor chip 10. The inner periphery of the resin frame 30 is provided, for example, inside the boundary between the element region and the termination region of the semiconductor chip 10.

[0045] The resin frame 30 includes a second resin. The second resin is different from the first resin. The second resin has a glass transition temperature of 200° C. or higher, for example. The second resin is, for example, polyamide-imide (PAI) or thermoplastic polyimide (TPI).

[0046] The adhesive 31 includes a third resin. The third resin is different from the first resin and the second resin. The third resin has a glass transition temperature of 200° C. or higher, for example. The third resin is, for example, polyimide silicone.

[0047] The resin frame 30 will eventually become the resin frame layer 16. The adhesive 31 will eventually become the resin adhesive layer 18.

[0048] Next, an adhesive layer 32 containing silver or copper particles is formed on the insulating substrate 12 (FIG. 5). The insulating substrate 12 has a ceramic layer 12a, a front metal layer 12b (metal layer), and a back metal layer 12c. The adhesive layer 32 is formed on the front metal layer 12b.

[0049] The adhesive layer 32 is, for example, a sheet containing silver particles or copper particles, or a paste containing silver particles or copper particles.

[0050] The adhesive layer 32 is finally sintered to form the metallic adhesive layer 14 .

[0051] Next, the semiconductor chip 10 is placed on the adhesive layer 32 (FIG. 6). The lower electrode 10b of the semiconductor chip 10 and the adhesive layer 32 come into contact with each other.

[0052] Next, a resin member 33 is placed on the semiconductor chip 10 (FIG. 7). The resin member 33 is placed inside the resin frame 30. The resin member 33 is made of, for example, a fluororesin.

[0053] Next, the surface metal layer 12b is bonded to the semiconductor chip 10 (FIG. 8). The adhesive layer 32 is sintered to metallize the adhesive layer 32, thereby bonding the surface metal layer 12b to the semiconductor chip 10.

[0054] For example, the semiconductor chip 10 is pressed against the surface metal layer 12b using a pressure member 34 from the side of the resin frame 30 and the resin member 33. The pressure on the semiconductor chip 10 is performed, for example, in a heating furnace at a temperature higher than room temperature. For example, the semiconductor chip 10 is heated to a temperature of 200°C or higher and then pressed.

[0055] The pressure member 34 is made of, for example, metal. When pressure is applied to the semiconductor chip 10, the resin frame 30 and the resin member 33 act as buffer materials to protect the semiconductor chip 10.

[0056] Next, the resin member 33 is removed from above the semiconductor chip 10 (FIG. 9).

[0057] Next, the bonding wires 20 are connected onto the upper electrodes 10a. Thereafter, the semiconductor chip 10, the insulating substrate 12, the resin frame 30, and the bonding wires 20 are covered with the sealing resin layer 22.

[0058] By the above manufacturing method, the power semiconductor module 100 of the embodiment shown in FIG. 2(a) is manufactured.

[0059] Next, the operation and effects of the semiconductor device of the embodiment will be described.

[0060] In power semiconductor modules that require high-temperature operation, a highly heat-resistant adhesive layer is formed by using metal particles to bond the semiconductor chip to the metal layer on the surface of the insulating substrate. The adhesive layer is formed by pressing the semiconductor chip against the metal layer at high temperature.

[0061] When a semiconductor chip is pressed against an insulating substrate at a high temperature, for example, a resin member acting as a buffer is sandwiched between the semiconductor chip and a pressure member, and the semiconductor chip is pressed from above. At this time, if a foreign object exists between the resin member and the semiconductor chip, the foreign object may be embedded in the surface of the semiconductor chip.

[0062] If foreign matter is embedded in the surface of a semiconductor chip, for example, leakage current due to the foreign matter may occur in the semiconductor chip. Furthermore, if foreign matter is embedded in the surface of a semiconductor chip, for example, the electric field strength distribution within the semiconductor chip may change, degrading the breakdown voltage characteristics of the semiconductor chip. Therefore, if foreign matter is embedded in the surface of a semiconductor chip, there is a risk of a decrease in the initial yield of semiconductor modules and a decrease in reliability yield.

[0063] In particular, the termination region provided on the periphery of the semiconductor chip is an area where the electric field strength within the semiconductor chip is high. Therefore, if foreign matter is embedded in the surface of the termination region of the semiconductor chip, there is a high possibility that a decrease in the initial yield and a decrease in the reliability yield of the semiconductor module will become apparent.

[0064] In the manufacturing method of the semiconductor device of the embodiment, when the semiconductor chip 10 is pressurized at high temperature, the surface of the outer periphery of the semiconductor chip 10 is covered with the resin frame 30. Therefore, when the semiconductor chip 10 is pressurized at high temperature, it is possible to prevent foreign matter from being embedded in the surface of the termination region of the semiconductor chip 10. This makes it possible to prevent a decrease in the initial yield of the power semiconductor module 100 and a decrease in reliability. In other words, it is possible to improve the manufacturing yield of the power semiconductor module 100. Furthermore, the power semiconductor module 100 of the embodiment has a structure that facilitates an improvement in the manufacturing yield.

[0065] In the manufacturing method of the semiconductor device according to the embodiment, even if a foreign object is present between the surface of the outer periphery of the semiconductor chip 10 and the resin frame 30, the foreign object is fixed in advance by the adhesive 31. Therefore, when the semiconductor chip 10 is pressurized at high temperature, it is possible to prevent the foreign object from being embedded in the surface of the termination region of the semiconductor chip 10.

[0066] From the viewpoint of suppressing a decrease in the initial yield and a decrease in reliability of the power semiconductor module 100, it is preferable that the surface of the termination region of the semiconductor chip 10 is completely covered with the resin frame 30. Therefore, it is preferable that the inner peripheral edge of the resin frame 30 is provided inside the boundary between the element region and the termination region of the semiconductor chip 10.

[0067] From the viewpoint of suppressing deterioration of the characteristics of the resin frame 30 when the semiconductor chip 10 is pressurized at high temperatures, it is preferable that the second resin contained in the resin frame 30 has high heat resistance. The glass transition temperature of the second resin is preferably 200°C or higher, and more preferably 250°C or higher.

[0068] From the viewpoint of suppressing deterioration of the properties of adhesive 31 when semiconductor chip 10 is pressurized at high temperatures, it is preferable that the third resin contained in adhesive 31 has high heat resistance. The glass transition temperature of the third resin is preferably 200°C or higher, and more preferably 250°C or higher.

[0069] As described above, according to the embodiment, it is possible to realize a semiconductor device and a method for manufacturing a semiconductor device that improves the yield when mounting semiconductor chips on a substrate.

[0070] In the embodiment, an SBD is used as the semiconductor chip, but the semiconductor chip is not limited to an SBD. For example, other transistors and diodes such as MOSFETs, IGBTs, and PIN diodes can also be used. Furthermore, a combination of a transistor and a diode can also be used.

[0071] In the embodiment, a power semiconductor module has been described as an example of a semiconductor device, but the semiconductor device may also be a discrete device on which one semiconductor chip is mounted.

[0072] In the embodiment, the case where the bonding wires 20 and the sealing resin layer 22 are provided has been described as an example, but it is also possible to adopt a configuration in which the bonding wires 20 and the sealing resin layer 22 are not provided.

[0073] In the embodiment, the semiconductor layer 10c is a silicon carbide layer, but the semiconductor layer 10c may be another semiconductor layer, for example, a silicon layer or a nitride semiconductor layer.

[0074] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. For example, components of one embodiment may be replaced or changed with components of another embodiment. These embodiments and modifications thereof are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0075] REFERENCE SIGNS LIST 10 Semiconductor chip 10a Upper electrode 10b Lower electrode 10c Semiconductor layer 10d Protective resin layer (first resin layer) 12b Surface metal layer (first metal layer, metal layer) 14 Metal adhesive layer (second metal layer) 16 Resin frame layer (second resin layer) 18 Resin adhesive layer (third resin layer) 22 Sealing resin layer (fourth resin layer) 30 Resin frame 31 Adhesive 32 Adhesive layer 33 Resin member 34 Pressurizing member 100 Power semiconductor module (semiconductor device)

Claims

1. A semiconductor device comprising: a semiconductor chip including a first metal layer, an upper electrode, a lower electrode, a semiconductor layer provided between the upper electrode and the lower electrode, and a first resin layer provided on the upper electrode and containing a first resin; a second metal layer provided between the first metal layer and the lower electrode and containing silver (Ag) or copper (Cu); a second resin layer covering an outer periphery of the semiconductor chip, being annular and containing a second resin different from the first resin; and a third resin layer provided between the first resin layer and the second resin layer and containing a third resin different from the first resin and the second resin.

2. The semiconductor device according to claim 1, wherein the semiconductor chip includes an element region and a termination region surrounding the element region, and an inner peripheral edge of the second resin layer is provided inside the boundary between the element region and the termination region.

3. The semiconductor device according to claim 1, wherein said second resin layer and said third resin layer cover an upper surface and a side surface of said semiconductor chip.

4. The semiconductor device according to claim 1, wherein said third resin layer is in contact with said first resin layer and said second resin layer.

5. The semiconductor device according to claim 1, further comprising a fourth resin layer containing a fourth resin different from said first resin, said second resin, and said third resin, and covering said first metal layer, said semiconductor chip, and said second resin layer.

6. The semiconductor device according to claim 1, wherein said semiconductor layer is a silicon carbide layer.

7. The semiconductor device according to claim 1, wherein said first resin is polyimide.

8. The semiconductor device according to claim 1, wherein the glass transition temperature of said second resin is 200° C. or higher.

9. The semiconductor device according to claim 1, wherein said second resin is polyamide-imide or thermoplastic polyimide.

10. The semiconductor device according to claim 1, wherein the glass transition temperature of said third resin is 200° C. or higher.

11. The semiconductor device according to claim 1, wherein said third resin is polyimide silicone.

12. The semiconductor device according to claim 5, wherein said fourth resin is a silicone gel or an epoxy resin.

13. A method for manufacturing a semiconductor device, comprising: bonding a resin frame to the outer periphery of a semiconductor chip using an adhesive; forming an adhesive layer containing silver or copper particles on a metal layer; placing the semiconductor chip on the adhesive layer; placing a resin member on the inside of the resin frame; and using a pressure member from the side of the resin frame and the resin member to press the semiconductor chip against the metal layer at a temperature higher than room temperature, thereby bonding the metal layer and the semiconductor chip.

14. The method of manufacturing a semiconductor device according to claim 13, wherein said temperature is 200° C. or higher.

15. A method for manufacturing a semiconductor device as described in claim 13, wherein the semiconductor chip includes an element region and a termination region surrounding the element region, and when the resin frame is bonded to the semiconductor chip, an inner peripheral edge of the resin frame is provided inside the boundary between the element region and the termination region.

16. The method for manufacturing a semiconductor device according to claim 13, wherein the resin frame includes polyamideimide or thermoplastic polyimide.

17. The method for manufacturing a semiconductor device according to claim 13, wherein the adhesive comprises polyimide silicone.

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